JP3024155B2 - Inverter circuit - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to an inverter circuit, and more particularly to an inverter circuit using MOS transistors.

[Conventional technology]

FIG. 3 shows an example of such a conventional inverter circuit. This is a well-known complementary MOS inverter circuit, for example, the same as the one shown on page 750 of “Semiconductor Handbook (2nd edition)” (edited by the Semiconductor Handbook Editing Committee) (November 1977, Ohmsha). It is.

This type of inverter circuit is widely used as a basic logic circuit in a digital MOS integrated circuit.

In FIG. 3, a load is an enhancement type MOS transistor which operates in the opposite polarity to each other, and a P-channel MOS transistor 12 and an N-channel MOS transistor 13 are vertically connected between a power supply and a ground.
The gates of both transistors were commonly connected to become an input terminal 17, and similarly, the drains were commonly connected to become an output terminal 18.

When a low-level voltage (ground potential) is applied to the input terminal 17, the N-channel MOS transistor 13 is turned off, and the P-channel MOS transistor 12 is turned on at the same time. For this reason, the output terminal 18 is connected to the power supply voltage V _DD with a low impedance, and is open between the power supply voltage V _DD and the ground, so that the output voltage V ₀ outputs a high level. When the input voltage is at a high level, the MOS transistors 12 and 13
And ON and OFF are completely opposite states, and the output voltage becomes low level.

[Problems to be solved by the invention]

The above-described conventional inverter circuit has a disadvantage that the switching speed decreases as the temperature increases. This is because the mobility of electrons or holes, which are carriers of a MOS transistor, has a negative temperature coefficient, and when the temperature rises, the mobility decreases, and therefore, the drain current governed by this decreases. This is because the time for charging and discharging the capacity as the load increases.

In a complementary MOS inverter circuit, the switching speed depends on the P-channel and N-channel MOS
Only the turn-on time of the transistor need be considered. For simplicity, when the characteristics of the MOS transistor are approximated by the broken lines in the constant current region and the resistance region, each is approximately 1/2 of the turn-on time, so if either one is calculated and doubled, That's enough.

Here, calculation is performed for the constant current region. The output voltage V ₀ at the time of switching of the inverter circuit in this case
Is represented by the following equation.

V ₀ = I _D t / C where I _D is the drain current, t is the switching time in the constant current region, and C is the load capacitance, which is approximately the sum of the drain capacitance and the gate capacitance of the next stage. Therefore, the switching time t is as follows.

t = CV ₀ / _ID For example, assuming that C = 0.4 pF, V ₀ = 3.0 V, and I _D = 1.5 mA as parameters of a typical MOS transistor, t
Is 0.8 ns. Therefore, the total switching time 2t is 1.6ns
Becomes

For a particular MOS transistor, C is constant;
If operating conditions such as a power supply voltage are specified, the switching time t is proportional to the drain current _ID . In the complementary MOS inverter circuit, since the drain current flows only at the time of switching, the above-mentioned _ID may be considered to be a value in a constant current region assuming that the operation characteristics of the MOS transistor are approximated by a broken line. Alternatively, it may be considered as a current supply capability capable of supplying a drain current.

The drain current _ID is represented by the following equation.

I _D = μK ｛(V _GS -V _T ) ^2- (V _GD -V _T ) ² ｝ where μ is the carrier mobility, k is a constant determined by the channel width and length of the transistor, and V _GS is the gate.・ Source voltage, V _GD is the gate-drain voltage.

As is clear from the above equation, under a specific operating condition of a specific transistor, the drain current _ID is proportional to the carrier mobility μ.

The carrier mobility μ depends on the temperature and is almost minus 3 /
It is said to show a square characteristic. As an example, μ at 25 ° C. is about 800 Cm ² / Vs, and when the temperature rises to 70 ° C., this drops to 630 Cm ² / Vs. Therefore, the drain current _ID also decreases at this rate.

As described above, since the total switching time 2t is inversely proportional to _ID , the increase in temperature causes an increase in t, that is, a decrease in the switching speed. In the inverter circuit of this example, 2t was 1.6 ns at a normal temperature of 25 ° C. However, when the temperature rises to 70 ° C., there is a disadvantage that the temperature increases to 2.0 ns.

The above is a study of the switching time for one stage of the inverter circuit.However, in an actual logic circuit, since many stages of inverter circuits operate in cascade, the increase in switching time is accumulated by the number of stages. This is a value that cannot be ignored.

[Means for solving the problem]

The inverter circuit according to the present invention includes: an inverter configured to output a signal inverted with respect to an input signal and configured by a MOS transistor; a first depletion-type MOS transistor connected in series with the inverter; Temperature detection means for applying a DC voltage corresponding to the gate of the depletion type MOS transistor,
In the inverter circuit, wherein the serially connected inverter circuit and the depression type MOS transistor are connected between different power supply terminals,
An oscillation circuit whose oscillation frequency changes in response to a temperature change;
The diode includes two diodes connected in series, and a capacitor connected between an output side of the oscillation circuit and a common connection point of the two diodes, and supplies the DC voltage from one of the two diodes. It is characterized by being performed.

〔Example〕

 Next, the present invention will be described with reference to the drawings.

FIG. 1 shows an embodiment of the present invention. As shown, four MOS transistors 11, 12, 13, and 14 are connected in series between a power supply 15 and a ground 16 to form an inverter circuit. Here, MOS transistor 11 is a P-channel depletion type, 12 is a P-channel enhancement type,
13 is an N-channel enhancement type, and 14 is an N-channel depletion type. 2nd and 3rd MO
The gate terminals of the S transistors 12 and 13 are commonly connected to form an input terminal 17, and the drain terminals are commonly connected to form an output terminal 17. A temperature detection circuit 21 is connected to the gate of the depletion type transistor 11, and a temperature detection circuit 31 is connected to the gate of the transistor 14, respectively.

That is, two enhancement-type MOS transistors 12 and 13 constitute an inverter circuit similar to a conventional inverter circuit, and a depletion-type MOS transistor 1 controlled by a temperature detection circuit is provided on the power supply side and the ground side.
1 and 14 are connected respectively.

 FIG. 2 is an example of a temperature detection circuit.

As shown in FIG. 2A, the temperature detecting circuit 21 has two diode-connected N-channel MOS transistors between a power supply 15 and an output terminal 22 such that the source side is connected to the power supply 15. 211 and 212 are connected in cascade, and a common connection point 213 of both is connected to the oscillation circuit 21 by a capacitor 215.
Connected to 4. This constitutes a well-known voltage doubler rectifier circuit.

The oscillation circuit 214 includes, for example, several stages of a conventional inverter circuit as shown in FIG. 3, and has a configuration in which a feedback path is provided from an odd-numbered output side to an initial-stage input side.
In the present example, it is composed of four stages, and returns to the first stage from the third stage.

The temperature detection circuit 31 is, as shown in FIG. 2B, a reverse polarity circuit of the temperature detection circuit 21. Two diode-connected MOS transistors 311 and 312 are cascaded, and
Is connected to the ground terminal 16.

 Next, the operation of this embodiment will be described.

As is well known, MOS transistors include an N-channel type and a P-channel type having two different conductive polarities.
Further, there are an enhancement type and a depletion type having two different conduction modes. Since the channel polarity is well known, the description is omitted. The enhancement mode of the conduction mode means that the threshold voltage has the same polarity as the substrate potential, that is, the N-channel type has a positive potential, and a gate voltage more positive than this means a drain current. The thing that flows. Therefore, the gate voltage is 0V
In this case, the drain current is 0, which is suitable for a switching element using a saturation region. On the other hand, in the depletion type, the threshold voltage has the opposite polarity to the substrate potential,
That is, in the case of the N-channel type, it is a negative potential, which means that a drain current can be controlled by a negative gate voltage. Therefore, it is easy to use for current control using a non-saturated region with a negative bias. The case of the P-channel type is the same as the above description, except that the positive / negative relationship is reversed.

In FIG. 1, two depletion type MOS transistors 11 and 14 operate in a non-saturation region, and at room temperature, form a basic inverter circuit composed of two cascade-connected enhancement type MOS transistors 12 and 13. In order to supply a sufficient drain current, the temperature detection circuits 21 and 31
, An appropriate gate voltage is applied. When the temperature rises and the drain current of the enhancement type MOS transistors 12 and 13 decreases, the temperature detection circuits 21 and 31
Controls to increase the gate voltages of the depletion type MOS transistors 11 and 14 and recover the drain currents of 12 and 13.

As can be understood from the above description, the temperature detection circuit 21
And 31 operate to detect a temperature change and increase the gate voltage of the depletion type MOS transistors 11 and 14 when the temperature rises. Note that the temperature detection circuit 31 is a reverse polarity circuit of the temperature detection circuit 21 as described above, and the voltage,
Except that the polarity of the current is reversed, they are exactly the same, and therefore, only the temperature detection circuit 21 will be described here.

The oscillation circuit 214 of the temperature detection circuit 21 is a feedback oscillator using an inverter circuit, and its oscillation frequency is inversely proportional to the delay time of the inverter circuit in the feedback loop. As described in the prior art section, these inverter circuits increase the switching speed, that is, the delay time when the temperature rises, and therefore decrease the frequency. As an example, if the oscillation frequency is 3.6 MHz at a normal temperature of 25 ° C., when the temperature rises to 70 ° C., the frequency drops to 3 MHz.

The output of the oscillation circuit is applied to a voltage doubler rectifier circuit composed of MOS transistors 211 and 212 diode-connected by a capacitor 215. The output voltage of the oscillation circuit is
The voltage at the output terminal of the capacitor 215, that is, the input terminal of the rectifier circuit 213, which is constant regardless of the frequency, is determined by the impedance of the capacitor 215 and the terminal 213.
It is determined by the ratio with the impedance of the rectifier circuit viewed from the viewpoint.

Since the value of the capacitor 215 is constant, its impedance depends on the frequency. Therefore, when the frequency is high, the impedance is low, and when the frequency is low, the impedance rises.

The impedance of the rectifier circuit is mainly determined by the leak current of the diode-connected MOS transistor, which is independent of the frequency.

Thus, the voltage at terminal 213 decreases as the frequency decreases. It should be noted here that the reference point of the voltage in this case is on the power supply side, which is reversed with respect to the ground. That is, when the frequency decreases, the voltage of the terminal 213 increases. As a result, the output voltage at the output terminal 22 of the temperature detection circuit 21 increases.

 The above is summarized as follows.

As the temperature rises, the oscillation frequency of the oscillation circuit 214 decreases, and the output voltage of the output terminal 22 of the temperature detection circuit 21, that is, the gate voltage of the depletion type MOS transistor 11 increases, and the drain current increases. , The enhancement-type MOS transistor 12 that constitutes the basic inverter circuit
And 13 are controlled so as to recover the drain current reduced by the temperature rise. The temperature detection circuit 31 performs the same operation, and increases the gate voltage of the depletion type transistor 14 of the opposite polarity to share the negative side of the operation. As a result, the switching speed of the inverter circuit does not decrease and the performance at normal temperature is maintained.

As apparent from the above description, the MOS transistor 1
By properly selecting the characteristics of 1, 12, 13, and 14 and the circuit constants of the temperature detection circuits 21 and 31, it is possible to obtain an inverter circuit having a constant temperature coefficient, that is, a switching speed that is constant regardless of the temperature. .

It is clear that the inverter circuit of this embodiment can be easily applied to a MOS integrated circuit device. In this case,
Fast and constant MO over a wide temperature range
An S logic integrated circuit device is obtained.

Although the above description has been made by taking the complementary MOS inverter circuit as an example, it goes without saying that the present invention can be applied to a single channel MOS inverter circuit without departing from the gist of the present invention.

Further, as the temperature detection circuit, a combination of a feedback oscillator using an inverter circuit and a voltage doubler rectifier circuit is illustrated, but any type may be applied without departing from the gist of the present invention. It is.

〔The invention's effect〕

As described above, according to the present invention, it is possible to provide an inverter circuit that does not reduce the switching speed even when the environmental temperature changes, by detecting a temperature change and controlling the drain current value to be constant. I can come out.

Further, by using the present inverter circuit as a basic logic element, there is an effect that a MOS logic integrated circuit device having a high operating speed and a constant operation over a wide temperature range can be provided.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG.
And (B) are circuit diagrams showing the temperature detecting circuits 21 and 31 in the embodiment shown in FIG. 1, and FIG. 3 is a circuit diagram showing an example of a conventional inverter circuit. 11 ... Depletion type P-channel MOS transistor, 12 ... Enhancement type P-channel MOS transistor, 13 ... Enhancement type N-channel MOS transistor, 14 ... Depletion type N-channel MOS transistor
Transistor, 15 Power supply terminal, 16 Ground terminal, 17
... input terminal, 18 ... output terminal, 21, 31 ... temperature detection circuit, 22, 32 ... temperature detection circuit output terminal, 211, 212, 311, 3
12 ... Diode connected MOS transistor, 214,314
…… Oscillation circuit, 215,315 …… Capacitor

Claims (2)

(57) [Claims] An inverter configured to output a signal inverted with respect to an input signal, a first depletion type MOS transistor connected in series with the inverter, and adapted to a change in ambient temperature. Temperature detection means for applying the DC voltage to the gate of the depletion type MOS transistor, wherein the inverter circuit and the depletion type MOS transistor connected in series are connected between different power supply terminals. Temperature detecting means is connected between an oscillation circuit whose oscillation frequency changes in response to a temperature change, two diodes connected in series, an output side of the oscillation circuit and a common connection point of the two diodes. And the DC voltage is supplied from one of the two diodes. An inverter circuit that. 2. The inverter means comprising two MOS transistors of different channel types and connected in series with the inverter means on the opposite side of the first depletion type MOS transistor. 2. The inverter circuit according to claim 1, further comprising two depletion type MOS transistors.