JP2844971B2 - Digital code processing system - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is used for a functional core selecting device of a digital code processing system.

[0002]

2. Description of the Related Art Conventionally, a digital code processing system has
In order to realize the functions of the entire system, a group of functional cores required for the system has been created, and these functional core groups have been arbitrarily connected directly to realize a desired function of the entire system.

[0003]

However, in such a conventional digital code processing system, since the functional core groups are directly connected, the specification of the functional core group is changed for some reason (a part of the functional core group is deleted). However, there is a drawback that it is not easy to realize a new function of the whole system when the operation order of each function needs to be changed.

SUMMARY OF THE INVENTION The present invention solves the above-mentioned drawbacks, and provides a digital code processing system capable of easily changing the specifications and operation order of functional cores and realizing the whole functions of a new system. With the goal.

[0005]

According to the present invention, a set of input signals is input to N input terminals and a set of input signals is processed to generate one or more sets of output signals. In a digital code processing system having N functional cores including a signal processing circuit and N output terminals for outputting a set of output signals of each of the signal processing circuits, a digital code processing system based on an input first command signal A first selection circuit that selects one or more sets of output signals of each of the signal processing circuits and outputs M sets of positive integer output signals, and selects M sets of input signals based on a second command signal to be input And a second selection circuit for providing one set to each of the functional cores, wherein each of the functional cores receives one set of input signals from a corresponding one of the N input terminals based on the input third command signal. Signal and a set of input signals from the second selection circuit. Includes a third selection circuit for applying to the signal processing circuit as the set of signals, characterized by comprising a control circuit providing said first, second and third command signals.

In the present invention, each of the output terminals can be connected to an input terminal of the next functional core except for the N-th terminal.

Further, according to the present invention, the output of the first selection circuit and the input of the second selection circuit can be connected.

[0008]

When each output terminal is connected to the input terminal of the next functional core, when changing the functional core, one set of M output signals of the first selection circuit is given to the new functional core, The output signal of the new functional core is provided to the second selection circuit as one of M input signals. The control circuit provides first, second and third command signals to the first, second and third selection circuits, respectively. The first selection circuit selects one or more sets of output signals of each signal processing circuit based on the first command signal and outputs M sets of positive integer M output signals. The second selection circuit selects M sets of input signals based on the second command signal and provides one set to each functional core. Each functional core, based on a third command signal input by the third selection circuit, converts a set of input signals from the corresponding input terminals out of N and a set of input signals from the second selection circuit. The signal is selected and given to the signal processing circuit as a set of signals. When changing the operation order of the functional core, the output of the first selection circuit and the input of the second selection circuit are connected, and control is performed by giving a command signal in the same manner as described above.

As described above, the specifications and the operation order of the functional cores can be easily changed, and the entire functions of the new system can be easily realized.

[0010]

Embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram of a digital code processing system according to an embodiment of the present invention.

[0011] In FIG foremost, a digital code processing system is a set of positive integers N input terminals 1 ₁ to 1 _N for inputting an input signal and processes a set of signals to be input one or more sets of N output terminals for outputting N number of functional cores 10 ₁ to 10 _N including signals to produce an output signal processing circuit 12 ₁ to 12 _N, a set of output signals of the signal processing circuit 12 ₁ to 12 _N 2 _{1 to} 2 _N.

[0012] Here, it is an aspect of the present invention is to select one or more sets of output signals of the first command signal as a command signal S1 to the basis each of the signal processing circuit 12 ₁ to 12 _N for inputting a positive integer A selection circuit 30 as a first selection circuit that outputs M sets of output signals, and M sets of input signals based on a designation signal S2 as a second command signal to be input to each of the functional cores 10 ₁ to 10 _N and a selection circuit 40 as the second selection circuit for providing one set, each functional core 10 ₁ to 10 _N are input terminals corresponding of the N on the basis of the designation signal S as a third command signal input 1 ₁ １1 _N and one set of input signals from the selection circuit 40
It includes a selection circuit 11 ₁ to 11 _N as a third selection circuit for applying to the signal processing circuit 12 ₁ to 12 _N as a set of signals, in that a control circuit 20 gives a command signal S1 to S3.

Further, the output terminals 2 ₁ to 2 _N is connected to the input terminal ₁ 1 to 1 _N of the following functions except N-th core 10 ₁ to 10 _N.

The operation of the digital code processing system having such a configuration will be described. FIG. 2 is a flowchart showing a procedure for changing the functional core of the digital code processing system of the present invention. FIG. 3 is a flowchart showing a procedure for changing the operation order of the functional cores of the digital code processing system of the present invention.

[0015] In FIG. 1, the selection circuit 11 _first functional cores 10 ₁ selects a set of input signals from the normal input terminal 1 _1, and outputs to the signal processing circuit 12 _1. The signal processing circuit 12 _1, a k ₁ set of output signals performs signal processing in accordance with specifications required for the function normally output to the output terminal 2 _1,
Applied to the input terminal 1 ₂ of the following functional cores 10 _2. Further connecting the k _i sets of output signals to the selection circuit 30 in this embodiment.

The functional cores 10 ₁ to 10 _N include a selection circuit 11
_{1 to} 11 _N and signal processing circuits 12 _{1 to} 12 _N , and the number of necessary function groups (here, N
Output terminal 2 _{i and} input terminal 1
It is assumed that _{i + 1} is connected.

The selection circuit 30 includes the function cores 10 ₁ to 10
.SIGMA.k _i sets coming sent from _N (sigma A sum of i = 1 to N) as an input signal a signal group, the command signal S1 from the control circuit 20 selects the M sets of the signal to the output terminal 3 Output.

The selection circuit 40 by a command signal S2 from the control circuit 20 from the input signal from the input terminal 4, to select the N sets of output signals, the selection circuit of the N sets of functional core 10 within _one to 10 _N 11 and it sends it to ₁ to 11 _N Nomou set of inputs.

Here, a case where the functional specification of the functional core 10 _i (1 ≦ i ≦ N) is changed will be described with reference to FIG. 2, for example.

First, it is assumed that the change of the function specification is performed in the signal processing circuit, and the one that realizes the new function is the signal processing circuit 11 _j and the function core 10 _j including the signal processing circuit 11 _j .

The input of the functional core 10 _j and the M of the selection circuit 30
The output signal of the functional core 10 _j is connected to one set of M input signals of the selection circuit 40. Further, the control circuit 20 sends a command signal S to the selection circuit 30.
1 to give the output signal of the functional core 10 _i-1
j , and a command signal S2 is given to the selection circuit 40 so that the output signal of the functional core 10 _j is sent to another input of the selection circuit 11 _{i + 1} in the functional core 10 _{i + 1} . Control to output. Further, the control circuit 20 gives the command signal S3 to the selection circuit 11 _{i + 1} in the functional core 10 _{i + 1} and selects the output signal thereof from the signal from the functional core 10 _j instead of the signal from the functional core 10 _i. And sends it to the signal processing circuit 12 _{i + 1} .

As described above, the functional specifications of the functional core can be changed.

The change of the operation order of the functional core 10 is as follows.
As shown in FIG. 3, the M sets of outputs of the selection circuit 30 are connected to the M sets of inputs of the selection circuit 40, and the control circuit 20 supplies command signals S1 to S3 to control the selection circuits 11, 30, and 40. This can be achieved by:

[0024]

As described above, according to the present invention, the specifications and the operation order of the functional core can be easily changed.
There is an excellent effect that the entire functions of the new system can be easily realized.

[Brief description of the drawings]

FIG. 1 is a block diagram of a digital code processing system according to an embodiment of the present invention.

FIG. 2 is a flowchart showing a procedure for changing a functional core of the digital code processing system of the present invention.

FIG. 3 is a flowchart for changing the operation order of the functional cores of the digital code processing system of the present invention.

[Explanation of symbols]

₁ 1 ~1 _N, 4 input terminals 2 ₁ ~2 _N, 3 output terminal 10 ₁ to 10 _N functional cores 11 ₁ ~11 _N, 30,40 selection circuit 12 ₁ to 12 _N signal processing circuits S1, S2, S3 command signal

Claims (3)

(57) [Claims] An N number of input terminals including a positive integer N input terminals for inputting a set of input signals and a signal processing circuit for processing the input set of signals to generate one or more sets of output signals. In a digital code processing system having a functional core and N output terminals for outputting a set of output signals of each signal processing circuit, at least one of the signal processing circuits based on a first command signal to be input. A first selection circuit that selects a set of output signals and outputs M sets of positive integer output signals, and selects M sets of input signals based on a second command signal to be input to each of the functional cores. A second selection circuit for providing a set of input signals from a corresponding one of the N input terminals based on a third command signal input thereto and the second selection circuit. And a set of input signals from
A digital code processing system, comprising: a third selection circuit for providing the set of signals to the signal processing circuit; and a control circuit for providing the first, second, and third command signals. 2. The digital code processing system according to claim 1, wherein each of the output terminals is connected to an input terminal of the next functional core except for the Nth one. 3. The digital code processing system according to claim 1, wherein an output of said first selection circuit and an input of said second selection circuit are connected.