JP2022018356A - Switching circuit - Google Patents

Abstract

To provide a switching circuit capable of improving switching rate of a switching element and suppressing malfunction.SOLUTION: A switching circuit comprises: a first switching element Q1 that has a first drain electrode D1, a first gate electrode G1 and a first source electrode S1; a bi-directional switching element 31 that has an input-output electrode 311 connected with the first gate electrode G1, a control signal input electrode 315 that receives a control signal for controlling switching, and an output-input electrode 313; and a capacitor 23 connected between the first source electrode S1 and the output-input electrode 313.SELECTED DRAWING: Figure 2

Description

The present invention relates to a switching circuit.

In switching circuits used for converters and inverters, switching elements such as MOSFETs (Metal-Oxide-Semiconductor Field-Effective Transistors) and IGBTs (Insulated Gate Bipolar Transistors) are driven on and off by control signals input to gate electrodes. Be controlled.

However, a noise voltage may be superimposed on the control signal input to the gate electrode of the switching element, and the noise voltage superimposed on the control signal may induce a malfunction of the switching element. In a switching circuit, it is desired to suppress the occurrence of malfunction while ensuring the switching speed of the switching element. Patent Document 1 discloses a switching circuit capable of suppressing self-turn-on while ensuring the switching speed of the switching element.

Japanese Unexamined Patent Publication No. 2019-13349

However, the conventional switching circuit has a problem that the switching speed of the switching element may not be ensured while suppressing the occurrence of malfunction.

An object of the present invention is to provide a switching circuit capable of improving the switching speed of a switching element and suppressing a malfunction.

In order to achieve the above object, the switching circuit according to one aspect of the present invention includes a first switching element having a first drain electrode, a first gate electrode and a first source electrode, and an input connected to the first gate electrode. A bidirectional switching element having an output electrode, a control signal input electrode for inputting a control signal for controlling switching, and an input / output electrode, and a capacitor connected between the first source electrode and the input / output electrode. To prepare for.

According to one aspect of the present invention, it is possible to improve the switching speed of the switching element and suppress malfunction.

It is a circuit diagram which shows the power conversion circuit which uses the switching circuit which concerns on 1st Embodiment of this invention. It is a circuit diagram which shows the switching circuit which concerns on 1st Embodiment of this invention. It is a timing chart of the 1st control signal and the 2nd control signal in the switching circuit which concerns on 1st Embodiment of this invention. Timing chart of first control signal and second control signal in the switching circuit according to the first embodiment of the present invention, gate-source voltage, drain-source voltage and drain current of the first switching element provided in the switching circuit. It is a figure (the 1) which shows each waveform of 1 and the connection state of the capacitor provided in the switching circuit. Timing chart of first control signal and second control signal in the switching circuit according to the first embodiment of the present invention, gate-source voltage, drain-source voltage and drain current of the first switching element provided in the switching circuit. It is a figure (No. 2) which shows each waveform of 1 and the connection state of the capacitor provided in the switching circuit. It is a timing chart of the 1st control signal and the 2nd control signal in the switching circuit which concerns on the modification of 1st Embodiment of this invention. Timing chart of the first control signal and the second control signal in the switching circuit according to the modification of the first embodiment of the present invention, the gate-source voltage of the first switching element provided in the switching circuit, and the drain-source voltage. It is a figure (No. 1) which shows each waveform of a drain current, and the connection state of the capacitor provided in the switching circuit. Timing chart of the first control signal and the second control signal in the switching circuit according to the modification of the first embodiment of the present invention, the gate-source voltage of the first switching element provided in the switching circuit, and the drain-source voltage. It is a figure (No. 2) which shows each waveform of a drain current, and the connection state of the capacitor provided in the switching circuit. It is a circuit diagram which shows the switching circuit which concerns on 2nd Embodiment of this invention. It is a circuit diagram which shows the switching circuit which concerns on 3rd Embodiment of this invention. It is a circuit diagram which shows the switching circuit which concerns on 4th Embodiment of this invention.

Hereinafter, the switching circuit according to the embodiment of the present invention will be described in detail with reference to the drawings. The present invention is not limited to each embodiment. In addition, the components in each of the following embodiments include those that can be easily assumed by those skilled in the art or those that are substantially the same.

[First Embodiment]
The switching circuit according to the first embodiment of the present invention will be described with reference to FIGS. 2 to 8. First, a power conversion device using the switching circuit according to the present embodiment will be described with reference to FIG. 1 by taking an inverter as an example. The switching circuit according to this embodiment is not limited to the inverter, but can be applied to switching elements such as converters and full bridge circuits.

(Power converter)
As shown in FIG. 1, the power conversion device 10 is connected to the three-phase AC power supply 11. The power conversion device 10 has a rectifier circuit 12 that full-wave rectifies the three-phase AC power input from the three-phase AC power supply 11, and a smoothing capacitor 13 that smoothes the power rectified by the rectifier circuit 12. .. Although not shown, the rectifier circuit 12 is configured by fully bridging six diodes or by fully bridging six switching elements.

The positive electrode side line Lp is connected to the positive electrode output terminal of the rectifier circuit 12, and the negative electrode side line Ln is connected to the negative electrode output terminal. A smoothing capacitor 13 is connected between the positive electrode side line Lp and the negative electrode side line Ln. Further, the power conversion device 10 includes an inverter circuit 14 that converts a DC voltage applied between the positive electrode side line Lp and the negative electrode side line Ln into a three-phase AC voltage. The inverter circuit 14 includes switching circuits 1Up, 1Vp, 1Wp constituting the upper arm portion connected to the positive electrode side line Lp, and switching circuits 1Un, 1Vn, 1Wn constituting the lower arm portion connected to the negative electrode side line Ln. It is equipped with.

The switching circuit 1Up and the switching circuit 1Un are connected in series between the positive electrode side line Lp and the negative electrode side line Ln to form a U-phase output arm 16U. The switching circuit 1Vp and the switching circuit 1Vn are connected in series between the positive electrode side line Lp and the negative electrode side line Ln to form a V-phase output arm 16V. The switching circuit 1Wp and the switching circuit 1Wn are connected in series between the positive electrode side line Lp and the negative electrode side line Ln to form a W phase output arm 16W. Details of the switching circuits 1Up, 1Vp, 1Wp, 1Un, 1Vn, and 1Wn will be described later.

The connection part of the switching circuit 1Up and the switching circuit 1Un, the connection part of the switching circuit 1Vp and the switching circuit 1Vn, and the connection part of the switching circuit 1Wp and the switching circuit 1Wn are connected to, for example, a three-phase AC electric motor 15 which is an inductive load. Has been done.

The power conversion device 10 has a control device 17 that controls switching circuits 1Up, 1Vp, 1Wp, 1Un, 1Vn, and 1Wn. The control device 17 is configured to individually output control signals to each of the switching circuits 1Up, 1Vp, 1Wp, 1Un, 1Vn, and 1Wn. As a result, the control device 17 controls the switching circuits 1Up, 1Vp, 1Wp, 1Un, 1Vn, 1Wn by the control signal, and is provided in each of the switching circuits 1Up, 1Vp, 1Wp, 1Un, 1Vn, 1Wn. One switching element Q1 (not shown in FIG. 1, details will be described later) is driven by, for example, pulse width modulation (PWM).

(Configuration of switching circuit)
The switching circuit according to this embodiment will be described with reference to FIGS. 2 to 8. The switching circuits 1Up, 1Vp, 1Wp, 1Un, 1Vn, and 1Wn shown in FIG. 1 have the same configuration and exhibit the same function. Therefore, in the following, when the switching circuits 1Up, 1Vp, 1Wp, 1Un, 1Vn, and 1Wn are described without distinction, they are collectively referred to as "switching circuit 1".

The present embodiment relates to a switching circuit. FIG. 2 is a circuit diagram showing a schematic configuration of the switching circuit 1 according to the present embodiment. FIG. 3 is a timing chart of the first control signal 1S and the second control signal 2S in the switching circuit 1 according to the present embodiment. “1S” in FIG. 3 indicates the voltage waveform of the first control signal 1S, and “2S” in FIG. 3 indicates the voltage waveform of the second control signal 2S. Further, "HL" in FIG. 3 indicates the maximum voltage level of the first control signal 1S and the second control signal 2S, and "LO" in FIG. 3 indicates the first control signal 1S and the second control signal 2S. Shows the minimum level of voltage.

4 and 5 show the timing charts of the first control signal 1S and the second control signal 2S in the switching circuit 1 according to the present embodiment, and the switching circuit 1 controlled by the first control signal 1S and the second control signal 2S. It is a figure which shows the gate-source voltage VGS, the drain-source voltage VDS, and the drain current ID of the first switching element Q1. “1S” in FIGS. 4 and 5 indicates the voltage waveform of the first control signal 1S, and “2S” in FIGS. 4 and 5 indicates the voltage waveform of the second control signal 2S. “VGS” in FIGS. 4 and 5 shows the waveform of the gate-source voltage VGS of the first switching element Q1. “+ V1” in FIGS. 4 and 5 indicates the maximum level of the gate-source voltage VGS, and “−V1” in FIGS. 4 and 5 indicates the minimum level of the gate-source voltage VGS. ing. Further, in FIGS. 4 and 5, for easy understanding, a capacitor 23 connected between the first gate electrode G1 and the first source electrode S1 of the first switching element Q1 provided in the switching circuit 1 is shown. The connection state of is illustrated.

As shown in FIG. 2, the switching circuit 1 according to the present embodiment is connected to a first switching element Q1 having a first drain electrode D1, a first gate electrode G1 and a first source electrode S1 and a first gate electrode G1. A bidirectional switching element 31 having an input / output electrode 311, a control signal input electrode 315 to which a control signal for controlling switching is input, and an input / output electrode 313, and a first source electrode S1 and an input / output electrode 313. It is provided with a capacitor 23 connected between them. Further, the switching circuit 1 includes a first control unit SG1 that generates a first control signal 1S and a second control unit SG2 that generates a second control signal 2S. Further, the switching circuit 1 includes a first output unit P1 that outputs the first control signal 1S to the first gate electrode G1 and a second output unit P2 that outputs the second control signal 2S to the control signal input electrode 315. ing.

The first switching element Q1 is a wide bandgap semiconductor element. The wide bandgap semiconductor device is, for example, a semiconductor device formed by using at least one of silicon carbide (SiC), gallium nitride-based material (GaN-based material), gallium oxide (GaO), and diamond. .. Further, the first switching element Q1 may be a semiconductor element formed by using, for example, silicon (Si). The first switching element Q1 in the present embodiment is a semiconductor element formed of SiC and is a SiC-PWM.

The first drain electrode D1 of the first switching element Q1 provided in each of the switching circuit 1Up, the switching circuit 1Vp, and the switching circuit 1Wp (see FIG. 1) is connected to the positive electrode side line Lp (see FIG. 1). The first source electrode S1 of the first switching element Q1 provided in the switching circuit 1Up is connected to the first drain electrode D1 of the first switching element Q1 provided in the switching circuit 1Un (see FIG. 1). The first source electrode S1 of the first switching element Q1 provided in the switching circuit 1Vp is connected to the first drain electrode D1 of the first switching element Q1 provided in the switching circuit 1Vn (see FIG. 1). The first source electrode S1 of the first switching element Q1 provided in the switching circuit 1Wp is connected to the first drain electrode D1 of the first switching element Q1 provided in the switching circuit 1Wn (see FIG. 1). The first source electrode S1 of the first switching element Q1 provided in each of the switching circuit 1Un, the switching circuit 1Vn, and the switching circuit 1Wn is connected to the negative electrode side line Ln (see FIG. 1).

The bidirectional switching element 31 has a second switching element Q2 and a third switching element Q3 connected in anti-series. The second switching element Q2 is a Si- MOSFET. The second switching element Q2 has a second drain electrode D2, a second gate electrode G2, and a second source electrode S2.

The third switching element Q3 is a Si- MOSFET. The third switching element Q3 has a third drain electrode D3, a third gate electrode G3, and a third source electrode S3.

The second switching element Q2 and the third switching element Q3 are configured in reverse series by connecting the second source electrode S2 and the third source electrode S3. The second switching element Q2 and the third switching element Q3 are Si- MOSFETs. Therefore, a second parasitic diode PD2 connected in antiparallel is formed on the second drain electrode D2 and the second source electrode S2 of the second switching element Q2. A third parasitic diode PD3 connected in antiparallel is formed on the third drain electrode D3 and the third source electrode S3 of the third switching element Q3. Therefore, since the second parasitic diode PD2 and the third parasitic diode PD3 are configured in anti-series series, they form a bidirectional switch.

The second switching element Q2 and the third switching element Q3 are configured by connecting the second gate electrode G2 and the third gate electrode G3.

The first output unit P1 is connected to the first gate electrode G1 of the first switching element Q1. The input terminal of the first output unit P1 is connected to the output terminal of the first control unit SG1 for driving the first switching element Q1 on and off. The first control unit SG1 generates the first control signal 1S shown in FIG. The first output unit P1 outputs a first drive signal based on the first control signal 1S to the first gate electrode G1 of the first switching element Q1. The first output unit P1 is connected to a power supply (not shown) that outputs positive voltage + V1 and negative voltage −V1, and the first control signal 1S having a low voltage level of negative voltage −V1 and a high voltage level of positive voltage + V1. Is configured to be output to the first gate electrode G1. More specifically, when the voltage level of the first control signal 1S input from the first control unit SG1 is low, the first output unit P1 has a voltage level of negative voltage −V1. The first drive signal of is output to the first gate electrode G1. When the voltage level of the first control signal 1S input from the first control unit SG1 is high, the first output unit P1 sets the first drive signal of the first drive voltage whose voltage level is positive voltage V1. Output to one gate electrode G1.

Further, in the first output unit P1, the output terminal for outputting the reference potential VSS (for example, the ground potential) is connected to the first source electrode S1 of the first switching element Q1. As a result, the first output unit P1 applies a first drive voltage having the first source electrode S1 as a reference potential VSS between the first gate electrode G1 and the first source electrode S1 of the first switching element Q1. Can be done. Therefore, when the voltage level of the first control signal 1S input to the first output unit P1 is low, the gate-source voltage of the first switching element Q1 becomes a negative voltage. On the other hand, when the voltage level of the first control signal 1S input to the first output unit P1 is high, the gate-source voltage of the first switching element Q1 becomes a positive voltage.

The first control unit SG1 is configured to generate the first control signal 1S under the control of a control device 17 (see FIG. 1) provided in the power conversion device 10. The first switching element Q1 is driven on and off based on the first control signal 1S. The first control signal 1S is a pulse voltage signal.

The switching circuit 1 includes a first gate resistor R1 connected between the first output unit P1 and the first gate electrode G1. The first switching element Q1 has a gate resistance R0 which is a built-in gate resistance. The gate resistance R0 is provided on the first gate electrode G1. The first gate resistance R1 is connected to the gate resistance R0. The first output unit P1 and the first gate electrode G1 are connected via the first gate resistance R1.

In the present embodiment, the second drain electrode D2 is connected to the connection node 21 between the first gate electrode G1 and the first gate resistor R1. More specifically, the second drain electrode D2 is connected to the connection node 21 between the gate resistance R0 and the first gate resistance R1. That is, the second drain electrode D2 of the second switching element Q2 is connected to the first gate electrode G1. The second drain electrode D2 of the second switching element Q2 corresponds to the input / output electrode 311 of the bidirectional switching element 31.

Since the first gate resistance R1 is provided between the first output unit P1 and the first gate electrode G1, the resistance value of the first gate resistance R1 can be appropriately selected to obtain the first switching element Q1. Switching speed, switching loss, etc. can be controlled.

As described above, the first output unit P1 is connected to a power supply (not shown) that outputs positive voltage + V1 and negative voltage −V1, and the low voltage level is negative voltage −V1 and the high voltage level is positive voltage + V1. It is configured to output one control signal 1S to the first gate electrode G1. Therefore, the first output unit P1 can make the potential of the first gate electrode G1 negative with respect to the potential of the first source electrode S1 with respect to the first gate electrode G1 and the first source electrode S1. As a result, the switching circuit 1 can switch the first switching element Q1 at high speed, and can prevent the first switching element Q1 from malfunctioning.

The second output unit P2 is connected to a gate electrode connection node 22 to which the second gate electrode G2 of the second switching element Q2 constituting the bidirectional switching element 31 and the third gate electrode G3 of the third switching element Q3 are connected. Has been done. The gate electrode connection node 22 corresponds to a control signal input electrode 315 to which a control signal for on / off control of the bidirectional switching element 31 is input.

In the second output unit P2, the output terminal that outputs the reference potential VSS (for example, the ground potential) is connected to the connection portion of the second source electrode S2 of the second switching element Q2 and the third source electrode S3 of the third switching element Q3. ing. When the voltage level of the second control signal 2S input from the second control unit SG2 is low, the second output unit P2 both uses the second drive signal of the second drive voltage whose voltage level is the reference potential VSS. The voltage is output to the control signal input electrode 315 of the switching element 31. When the voltage level of the second control signal 2S input from the second control unit SG2 is high, the second output unit P2 outputs a second drive signal having a voltage level of, for example, positive voltage + V1. Output to the control signal input electrode 315. As a result, the second output unit P2 is second-driven with the connection portion between the control signal input electrode 315 of the bidirectional switching element 31 and the second source electrode S2 and the third source electrode S3 as the reference potential VSS. A voltage can be applied. Therefore, when the voltage level of the second control signal 2S input to the second output unit P2 is low, the gate-source voltage of the second switching element Q2 and the gate-source voltage of the third switching element Q3. Is zero. On the other hand, when the voltage level of the second control signal 2S input to the second output unit P2 is high, the gate-source voltage of the second switching element Q2 and the gate-source voltage of the third switching element Q3. Is a positive voltage + V1.

The input terminal of the second output unit P2 is connected to the output terminal of the second control unit SG2 for driving the bidirectional switching element 31 on and off. The second control unit SG2 generates the second control signal 2S shown in FIG. The second control unit SG2 is configured to generate the second control signal 2S under the control of the control device 17 (see FIG. 1) provided in the power conversion device 10. The second output unit P2 outputs a second drive signal having a second drive voltage for on / off driving the bidirectional switching element 31 based on the second control signal 2S. The bidirectional switching element 31 is driven on and off by a second drive signal based on the second control signal 2S. The second control signal 2S is a pulse voltage signal. The switching circuit 1 includes a second gate resistor R2 connected between the second output unit P2 and the gate electrode connection node 22 of the bidirectional switching element 31. By appropriately selecting the resistance value of the second gate resistor R2, the switching speed of the bidirectional switching element 31 and the like can be controlled.

The capacitor 23 is connected between the first source electrode S1 and the third drain electrode D3. One electrode of the capacitor 23 is connected to the third drain electrode D3 of the third switching element Q3. The other electrode of the capacitor 23 is connected to the first source electrode S1 of the first switching element Q1. Therefore, the third drain electrode D3 of the third switching element Q3 corresponds to the input / output electrode 313 of the bidirectional switching element 31.

The capacitor 23 is connected to the first gate electrode G1 via the bidirectional switching element 31 and the connection node 21. The capacitor 23 functions as a capacitive element that absorbs a noise voltage described later. By driving the bidirectional switching element 31 on and off by the second output unit P2, the electrical connection between the first gate electrode G1 and the capacitor 23 is controlled. When the bidirectional switching element 31 is on, the capacitor 23 is electrically connected to the first gate electrode G1. Further, when the bidirectional switching element 31 is in the off state, the capacitor 23 is electrically disconnected from the first gate electrode G1.

The first switching element Q1 may be a MOSFET (Metal-Oxide-Semiconductor Field-Effective Transistor) or an IGBT (Insulated Gate Bipolar Transistor). Further, the second switching element Q2 may be a diode or an IGBT. Further, the third switching element Q3 may be a diode or an IGBT. That is, the bidirectional switching element 31 may be configured by connecting at least two of a diode, a MOSFET, and an IGBT in anti-series connection. Here, these MOSFETs may be, for example, Si-PWMs, these diodes may be, for example, Si diodes, and these IGBTs may be, for example, Si-IGBTs.

(Operation of switching circuit)
The timing chart shown in FIG. 3, the connection state of the capacitor 23 between the first gate electrode G1 and the first source electrode S1 and the first gate electrode G1 and the first source electrode S1 shown in FIGS. 4 and 5. The operation of the switching circuit 1 according to the present embodiment will be described with reference to the waveform of the voltage between the gate and the source applied between them and the switching waveform of the first switching element Q1.

As shown in FIG. 3, the first control signal 1S is a rectangular wave in which high level and low level are alternately repeated in a fixed period T1. Further, the second control signal 2S is a rectangular wave that alternately repeats high level and low level in a fixed period T2. The length of the period T1 is substantially the same as the length of the period T2. That is, the period T1 of the first control signal 1S and the period T2 of the second control signal 2S are set to the same value.

The period T1 of the first control signal 1S includes a period H1 in which the first control signal 1S is output at a high level (HL) and a period L1 in which the first control signal 1S is output at a low level (LO). Further, the period T2 of the second control signal 2S includes a period H2 in which the second control signal 2S is output at a high level (HL) and a period L2 in which the second control signal 2S is output at a low level (LO). include.

The length of the period H1 and the length of the period L1 are determined in consideration of the desired timing in the on / off drive of the first switching element Q1. Further, the length of the period H2 and the length of the period L2 are determined in consideration of the desired timing in the on / off drive of the bidirectional switching element 31 (that is, the on / off drive of the second switching element Q2 and the third switching element Q3). Will be done.

In the present embodiment, during the period H1 in which the first control signal 1S is output from the first control unit SG1 at a high level, the second control signal 2S is output from the first control unit SG1 at a low level. Then, during the period L1 in which the first control signal 1S is output from the first control unit SG1 at a low level, the second control signal 2S is output from the second control unit SG2 at a high level.

When the first control signal 1S input to the first gate electrode G1 is at a high level, the first switching element Q1 is turned on, and the drain and source in the first switching element Q1 are electrically conductive. When the first control signal 1S input to the first gate electrode G1 is at a low level, the first switching element Q1 is turned off, and the electrical conduction between the drain and the source in the first switching element Q1 is cut off. ..

Further, when the second control signal 2S input to the gate electrode connection node 22 of the second gate electrode G2 and the third gate electrode G3 is at a high level, the second switching element Q2 and the third switching element Q3 are turned on. .. Therefore, when the second control signal 2S input to the gate electrode connection node 22 to which the second gate electrode G2 and the third gate electrode G3 are connected is at a high level, the bidirectional switching element 31 is turned on and input / output. Electrical conduction between the electrode 311 and the input / output electrode 313. When the second control signal 2S input to the gate electrode connection node 22 is at a low level, the second switching element Q2 and the third switching element Q3 are turned off. Therefore, when the second control signal 2S input to the gate electrode connection node 22 is at a low level, the bidirectional switching element 31 is turned off, and electrical conduction between the input / output electrodes 311 and the input / output electrodes 313. Is blocked.

The first output unit P1 and the second output unit P2 repeat the first operation B1, the third operation B3, and the second operation B2 in this order to drive the first switching element Q1. The first control signal 1S shown in FIG. 3 is a signal output from the first control unit SG1. The second control signal 2S shown in FIG. 3 is a signal output from the second control unit SG2. The first output unit P1 outputs a signal having the same waveform as the first control signal 1S to the first gate electrode G1 except that the voltage level is different, and drives the first switching element Q1. Further, the second output unit P2 outputs a signal having the same waveform as the second control signal 2S to the control signal input electrode 315 of the bidirectional switching element 31 except that the high level voltage level is different, and bidirectional switching is performed. Drives the element 31. Therefore, in FIG. 3, the first operation B1, the second operation B2, and the third operation B3 will be described using the first control signal 1S and the second control signal 2S.

In the first operation B1, the first output unit P1 turns the bidirectional switching element 31 off before the first output unit P1 turns the first switching element Q1 from the on state to the off state, and then the first output. This is an operation in which the unit P1 changes the first switching element Q1 from the on state to the off state. That is, in the first operation B1, the second control signal 2S output from the second output unit P2 is low before the first control signal 1S output from the first output unit P1 falls from the high level to the low level. After being set as a level, the first control signal 1S drops from a high level to a low level. In the first operation B1, the capacitor 23 is electrically disconnected from the first gate electrode G1, and then the first switching element Q1 is changed from the on state to the off state.

In the second operation B2, the second output unit P2 turns the bidirectional switching element 31 off before the first output unit P1 turns the first switching element Q1 from the off state to the on state, and then the first output. This is an operation in which the unit P1 changes the first switching element Q1 from the off state to the on state. In the second operation B2, the second control signal 2S output from the second output unit P2 is set to the low level before the first control signal 1S output from the first output unit P1 rises from the low level to the high level. After that, the first control signal 1S rises from the low level to the high level. In the second operation B2, the capacitor 23 is electrically disconnected from the first gate electrode G1 and the first switching element Q1 is changed from the off state to the on state.

Here, as a comparative example of the present embodiment, a configuration in which the second control unit SG2, the second output unit P2, the second gate resistor R2, the second switching element Q2, and the third switching element Q3 are not provided can be considered. In this configuration, the capacitor 23 is directly connected between the first gate electrode G1 and the first source electrode S1 in the first switching element Q1. In this configuration, the switching speed of the first switching element Q1 is the capacitor 23 as compared with the case where the capacitor 23 is not connected between the first gate electrode G1 and the first source electrode S1 in the first switching element Q1. It may be delayed due to the influence.

On the other hand, since the switching circuit 1 according to the present embodiment includes a bidirectional switching element 31 configured by connecting the second switching element Q2 and the third switching element Q3 in reverse series, the first switching element Q1 is turned on and off. When the state is switched, the capacitor 23 is disconnected from the capacitor 23 regardless of the voltage polarity between the first gate electrode G1 and the first source electrode S1. Therefore, the switching circuit 1 according to the present embodiment can switch the on / off state of the first switching element Q1 without being affected by the capacitor 23. As a result, the switching circuit 1 can prevent the switching speed of the first switching element Q1 from being slowed down due to the influence of the capacitor 23.

The third operation B3 is an operation in which the second output unit P2 turns on the bidirectional switching element 31 while the first output unit P1 turns off the first switching element Q1. More specifically, in the third operation B3, the first output unit P1 outputs an off state signal of the first control signal 1S input from the first control unit SG1, and the first switching element Q1 is in the off state. During the period, the second output unit P2 outputs the on-state signal of the second control signal 2S input from the second control unit SG2 to turn on the bidirectional switching element 31. That is, in the third operation B3, the second control unit SG2 sets the second control signal 2S to a high level during the period when the first control signal 1S output from the first control unit SG1 is at a low level. Therefore, by the third operation B3, the capacitor 23 is electrically connected to the first gate electrode G1 while the first switching element Q1 is in the off state.

In the third operation B3, the capacitor 23 is electrically connected to the first gate electrode G1 while the first switching element Q1 is in the off state. For example, when noise is generated or invades the first control unit SG1 and a noise voltage is generated between the first output unit P1 and the first gate electrode G1, the noise voltage is absorbed by the capacitor 23. Therefore, the switching circuit 1 according to the present embodiment suppresses the induction of malfunction of the first switching element Q1 by the noise voltage generated between the first output unit P1 and the first gate electrode G1. Can be done.

That is, in the switching circuit 1 according to the present embodiment, the capacitor 23 is connected to the first gate electrode G1 while the first switching element Q1 is in the off state, so that the first switching element Q1 is erroneously connected. Suppress the operation. Then, when the switching circuit 1 switches the on / off state in the first switching element Q1, the capacitor 23 is not connected to the first gate electrode G1 and the on / off state in the first switching element Q1 is set. Switch. With this configuration, the switching circuit 1 according to the present embodiment can improve the switching speed of the first switching element Q1 and suppress the malfunction of the first switching element Q1.

The third operation B3 in the present embodiment is performed between the first operation B1 and the second operation B2. The timing at which the second output unit P2 turns the bidirectional switching element 31 from the off state to the on state in the third operation B3 is such that the first output unit P1 turns the first switching element Q1 from the on state to the off state in the first operation B1. Immediately after doing. Further, the timing at which the second output unit P2 turns the bidirectional switching element 31 from the on state to the off state in the second operation B2 is such that the first output unit P1 turns on the first switching element Q1 from the off state in the second operation B2. It is just before the state. Then, the bidirectional switching element 31 turned on in the third operation B3 is maintained in the on state until it is controlled to the off state by the second output unit P2 in the third operation B3.

Here, "immediately after the first output unit P1 turns the first switching element Q1 from the on state to the off state" means that the first switching element Q1 continues from the time when the first switching element Q1 is turned off. Indicates the time when a sufficiently short time has elapsed with respect to the period of being off. The first switching element Q1 has a turn-off time to off that shifts from an on state to an off state. After the turn-off time to off, the first switching element Q1 is continuously turned off. Therefore, as shown in FIG. 4, immediately after the first output unit P1 turns the first switching element Q1 from the on state to the off state, the second output unit P2 which was in the off state is turned on and the third operation B3 is performed. It is necessary to set the time interval to be set to the turn-off time to off or more. That is, it is necessary to set the turn-off time to off or more for a sufficiently short time with respect to the period in which the first switching element Q1 is continuously turned off from the time when the first switching element Q1 is turned off. be. Therefore, the period of the first operation B1 is set to be equal to or longer than the turn-off time toff of the first switching element Q1.

Further, "immediately before the first output unit P1 turns the first switching element Q1 from the off state to the on state" means the interval at which the first switching element Q1 turns on after the bidirectional switching element 31 turns off. However, it is shown that the time is sufficiently short with respect to the period in which the first switching element Q1 is continuously in the off state. Therefore, as shown in FIG. 5, immediately before the first output unit P1 turns the first switching element Q1 from the off state to the on state, the second output unit P2 that was in the on state is turned off and the second operation B2 is performed. It is necessary to set the time interval to be 0 or more. That is, the time interval in which the first switching element Q1 is turned on after the bidirectional switching element 31 is turned off is sufficiently shorter than the period during which the first switching element Q1 is continuously turned off. The time should be set to 0 or higher. Further, in the second operation B2, it is necessary to switch the first switching element Q1 from the off state to the on state. Therefore, the period of the second operation B2 is set to be equal to or longer than the turn-on time ton of the first switching element Q1.

As shown in FIG. 4, in the third operation B3, since the voltage level of the first control signal 1S is low level, the first switching element Q1 is in the off state. Therefore, the gate-source voltage VGS of the first switching element is a negative voltage −V1, the drain-source voltage VDS of the first switching element Q1 is a predetermined high voltage level, and the first switching element Q1 The drain current ID of is almost non-flowing (nearly zero). Further, as described above, since the first source electrode S1 of the first switching element Q1 is set to the reference potential by the first output unit P1, a negative voltage is applied to the capacitor 23.

As shown in FIG. 4, when the third operation B3 is shifted to the second operation B2, the voltage level of the second control signal 2S is switched from the high level to the low level, and then the voltage level of the first control signal 1S is changed. Switch from low level to high level. The first switching element Q1 causes a predetermined delay ton_GDU_d with respect to the rising edge of the first control signal 1S, and shifts from the off state to the on state. As a result, the gate-source voltage VGS of the first switching element Q1 increases, the drain-source voltage VDS of the first switching element Q1 decreases, and the drain current ID of the first switching element Q1 increases. The gate-source voltage VGS of the first switching element Q1 stabilizes at a positive voltage + V1 after the turn-on time ton of the first switching element Q1 has elapsed. Further, each of the drain-source voltage VDS and the drain current ID of the first switching element Q1 stabilizes at a predetermined level after the turn-on time ton of the first switching element Q1 has elapsed.

In the second operation B2, the voltage level of the second control signal 2S shifts from the high level to the low level, so that the bidirectional switching element 31 shifts from the on state to the off state. Therefore, the capacitor 23 is electrically disconnected from the first gate electrode G1 of the first switching element Q1. As a result, the gate-source voltage VGS of the first switching element Q1 shifts smoothly from negative to positive, so that the first switching element Q1 can be switched at high speed.

As shown in FIGS. 4 and 5, when the second operation B2 is shifted to the first operation B1, the voltage level of the first control signal 1S is switched from the high level to the low level. The first switching element Q1 causes a predetermined delay toff_GDU_d with respect to the falling edge of the first control signal 1S, and shifts from the on state to the off state. As a result, the gate-source voltage VGS of the first switching element Q1 decreases, the drain-source voltage VDS of the first switching element Q1 increases, and the drain current ID of the first switching element Q1 decreases. The gate-source voltage VGS of the first switching element Q1 stabilizes at a negative voltage −V1 after the turn-off time to off of the first switching element Q1 has elapsed. Further, each of the drain-source voltage VDS and the drain current ID of the first switching element Q1 stabilizes at a predetermined level after the turn-off time to off of the first switching element Q1 has elapsed.

In the second operation B2, the bidirectional switching element 31 is maintained in the off state. Therefore, the capacitor 23 is electrically disconnected from the first gate electrode G1 of the first switching element Q1. As a result, the gate-source voltage VGS of the first switching element Q1 smoothly shifts from positive to negative, so that the first switching element Q1 can be switched at high speed.

As shown in FIG. 5, when the third operation B3 is shifted to the second operation B2, the voltage level of the second control signal 2S is switched from the low level to the high level. The bidirectional switching element 31 shifts from the off state to the on state when the second control signal 2S rises. As a result, the capacitor 23 is electrically connected to the first gate electrode G1 of the first switching element Q1. Since the first source electrode S1 of the first switching element Q1 is set to the reference potential by the first output unit P1, a negative voltage is applied to the capacitor 23. After that, the switching circuit 1 repeatedly drives the first switching element Q1 and the bidirectional switching element 31 in the order of "second operation B2 → first operation B1 → third operation B3 → second operation B2 → ...". ..

By the way, in the conventional switching circuit, a negative voltage of less than 0V may be applied between the gate electrode and the source electrode of the switching element in order to switch the switching element at high speed or to suppress the malfunction of the switching element. .. In the switching circuit disclosed in Patent Document 1, when a negative voltage of less than 0 V is applied between the first gate electrode and the first source electrode of the first switching element, the parasitic diode of the second switching element becomes conductive. .. Therefore, the second switching element is turned on, and the first gate electrode of the first switching element and the capacitor 23 are not electrically disconnected. Therefore, the conventional switching circuit has a problem that the first switching element Q1 cannot be switched at high speed because the capacitor 23 is charged during the switching operation of the first switching element Q1.

On the other hand, the switching circuit 1 according to the present embodiment includes a bidirectional switching element 31 between the first gate electrode G1 and the first source electrode S1 of the first switching element Q1. Therefore, even if a negative voltage of less than 0 V is applied between the first gate electrode G1 of the first switching element Q1 and the first source electrode S1, the third switching element Q3 constituting the bidirectional switching element 31 The third parasitic diode PD3 maintains an electrically unconnected state between the first gate electrode G1 and the capacitor 23. As a result, in the switching circuit 1, since the capacitor 23 is not charged during the switching operation of the first switching element Q1, the first switching element Q1 can be switched at high speed, and the switching speed can be improved.

As described above, the switching circuit 1 according to the present embodiment can improve the switching speed of the switching element and suppress malfunction.

(Modification example)
A switching circuit according to a modified example of the present embodiment will be described with reference to FIG. The switching circuit 1 according to the present modification has the same configuration as the switching circuit 1 according to the present embodiment, and is characterized in that the first control signal 1S and the second control signal 2S are different.

FIG. 6 is a diagram showing a timing chart of the first control signal and the second control signal of the switching circuit according to this modification. “1S”, “2S”, “HL” and “LO” in FIG. 6 have the same contents as “1S”, “2S”, “HL” and “LO” in FIG.

The fourth operation B4 that turns on the second control signal 2S while the first control signal 1S is on is set in the first control signal 1S and the second control signal 2S in this modification. Even while the first switching element Q1 different from the first control signal 1S and the second control signal 2S shown in FIG. 3 is on, the bidirectional switching element 31 is turned on and the capacitor 23 is used as the first gate electrode G1. On the other hand, it is connected. As a result, the switching circuit 1 according to the present modification may have a slower switching speed of the first switching element Q1 than the switching circuit 1 according to the present embodiment, but the first switching element Q1 is in the ON state. It is possible to improve the suppression of malfunction in.

7 and 8 show a timing chart showing the first control signal 1S and the second control signal 2S in the switching circuit 1 according to the present modification, and the switching circuit controlled by the first control signal 1S and the second control signal 2S. It is a figure which shows the gate-source voltage VGS, the drain-source voltage VDS, and the drain current ID of the first switching element Q1 of 1. “1S”, “2S”, “VGS”, “+ V1” and “−V1” in FIGS. 7 and 8 are “1S”, “2S”, “VGS” in FIGS. 4 and 5. It shows the same contents as "+ V1" and "-V1". Further, in FIGS. 7 and 8, in order to facilitate understanding, a capacitor 23 connected between the first gate electrode G1 and the first source electrode S1 of the first switching element Q1 provided in the switching circuit 1 is shown. The connection state of is illustrated.

The operation of the switching circuit 1 at the timing of the first control signal 1S and the second control signal 2S in this modification will be described with reference to FIGS. 6 to 8. As shown in FIG. 6, the first control signal 1S is a rectangular wave in which the period H1 of the high level HL and the period L1 of the low level LO are alternately repeated in a fixed period T1. Further, the second control signal 2S includes a constant period T21 including a period H21 of high level HL and a time interval L21 of low level LO, and a constant period H22 including a period H22 of high level HL and a time interval L22 of low level LO. It is a rectangular wave that alternately repeats the period T22 of. The length of the period T1 is substantially the same as the length of the sum of the periods T21 and the period T22. That is, the period T1 of the first control signal 1S and the period of the sum of the periods T21 and the period T22 of the second control signal 2S are set to the same value.

As shown in FIG. 6, in the switching circuit 1 according to this modification, the fourth operation B4 is set between the second operation B2 and the third operation B3, and the first output unit P1 and the second output unit are set. P2 drives the first switching element Q1 by repeating the first operation B1, the third operation B3, the second operation B2, and the fourth operation B4 in this order. The first control signal 1S and the second control signal 2S shown in FIG. 6, that is, the first operation B1 and the second operation B2 performed by the first output unit P1 and the second output unit P2, and the third operation performed by the second output unit P2. The operation B3 is the same as the operation at the timing of the first control signal 1S and the second control signal 2S in the present embodiment and is described with reference to FIG. 3, and is omitted here.

The fourth operation B4 is an operation in which the second output unit P2 turns on the bidirectional switching element 31 while the first output unit P1 turns on the first switching element Q1. More specifically, in the fourth operation B4, the first output unit P1 outputs an on-state signal of the first control signal 1S input from the first control unit SG1 to turn on the first switching element Q1. During the period, the second output unit P2 outputs the ON state signal of the second control signal 2S input from the second control unit SG2, and the bidirectional switching element 31 is turned on. That is, in the fourth operation B4, the second control unit SG2 sets the second control signal 2S to the high level during the period when the first control signal 1S output from the first control unit SG1 is at the high level. Therefore, by the fourth operation B4, the capacitor 23 is electrically connected to the first gate electrode G1 while the first switching element Q1 is in the ON state.

In the fourth operation B4, the capacitor 23 is electrically connected to the first gate electrode G1 while the first switching element Q1 is in the ON state. For example, when noise is generated or invades the first control unit SG1 and a noise voltage is generated between the first output unit P1 and the first gate electrode G1, the noise voltage is absorbed by the capacitor 23. Therefore, in the switching circuit 1 according to this modification, it is possible to suppress the induction of malfunction of the first switching element Q1 by the noise voltage generated between the first output unit P1 and the first gate electrode G1. Can be done. That is, in the switching circuit 1 according to this modification, the capacitor 23 is connected to the first gate electrode G1 even during the period when the first switching element Q1 is on, so that the first switching element Q1 is erroneously connected. Suppress the operation.

Further, since the switching circuit 1 according to the present modification operates the first switching element Q1 by the third operation B3, the switching speed of the first switching element Q1 can be improved as in the switching circuit 1 according to the present embodiment. At the same time, it is possible to suppress the malfunction of the first switching element Q1.

The fourth operation B4 of this modification is performed between the second operation B2 and the first operation B1. The timing at which the second output unit P2 turns the bidirectional switching element 31 from the off state to the on state in the fourth operation B4 is such that the first output unit P1 turns the first switching element Q1 from the off state to the on state in the second operation B2. Immediately after doing. Further, the timing at which the second output unit P2 turns the bidirectional switching element 31 from the on state to the off state in the fourth operation B4 is such that the first output unit P1 turns off the first switching element Q1 from the on state in the first operation B1. It is just before the state. Then, the bidirectional switching element 31 turned on in the fourth operation B4 is maintained in the on state until controlled by the second output unit P2 in the first operation B1.

Further, in the present modification, "immediately after the first output unit P1 turns the first switching element Q1 from the off state to the on state" means that the first switching element Q1 becomes the first switching element Q1 after the bidirectional switching element 31 is turned off. It is shown that the interval of turning on is sufficiently shorter than the period in which the bidirectional switching element 31 is continuously turned off. Therefore, immediately before the first output unit P1 turns the first switching element Q1 from the off state to the on state, the second output unit P2 sets the bidirectional switching element 31 which was in the on state to the off state and performs the second operation B2. As shown in FIG. 7, the time interval L22 to be performed needs to be set to be equal to or longer than the turn-on time ton when the first switching element Q1 shifts from the off state to the on state. The time interval L22 corresponds to the period of the second operation B2. Therefore, in this modification, the period of the second operation B2 is set to be equal to or longer than the turn-on time ton of the first switching element Q1.

And, in this modification, "immediately after the first output unit P1 turns the first switching element Q1 from the on state to the off state" means the first switching element Q1 from the time when the first switching element Q1 is turned off. Indicates the time when a sufficiently short time has elapsed with respect to the period in which is continuously off. The first switching element Q1 has a turn-off time to off that shifts from an on state to an off state. After the turn-off time to off, the first switching element Q1 is continuously turned off. Therefore, immediately after the first output unit P1 turns the first switching element Q1 from the on state to the off state, the time interval L21 for turning the second output unit P2, which was in the off state, into the third operation B3 is shown in FIG. As shown in 8, it is necessary to set it to tof or higher. The time interval L21 corresponds to the period of the first operation B1. Therefore, in this modification, the period of the first operation B1 is set to be equal to or longer than the turn-off time to off of the first switching element Q1.

The first operation B1, the second operation B2, and the third operation B3 in the switching circuit 1 according to the present modification are the same as the first operation B1, the second operation B2, and the third operation B3 in the switching circuit 1 according to the present embodiment. Is. Therefore, regarding the operation of the first switching element Q1 in this modification, the operation in the fourth operation B4 will be described, and the description of the operation in the first operation B1, the second operation B2, and the third operation B3 will be omitted.

As shown in FIG. 7, when the second operation B2 is shifted to the fourth operation B4, the voltage level of the second control signal 2S is switched from the low level to the high level. The bidirectional switching element 31 shifts from the off state to the on state when the second control signal 2S rises. As a result, the capacitor 23 is electrically connected to the first gate electrode G1 of the first switching element Q1. Since the first drive voltage of positive voltage + V1 is applied to the first gate electrode G1 of the first switching element Q1, a positive voltage is applied to the capacitor 23. After that, the switching circuit 1 repeats the first switching element Q1 and bidirectional switching in the order of "first operation B1 → third operation B3 → second operation B2 → fourth operation B4 → first operation B1 → ...". Drives the element 31.

As described above, the switching circuit 1 according to this modification can improve the switching speed of the switching element and suppress malfunction. Further, the switching circuit 1 according to the present modification can improve the suppression of malfunction when the first switching element Q1 is on.

[Second Embodiment]
FIG. 9 is a circuit diagram showing a switching circuit according to the second embodiment. The switching circuit 2 according to the present embodiment is characterized in that the configuration of the bidirectional switching element is different from the switching circuit 1 according to the first embodiment. The same reference numerals are given to the components having the same functions and functions as those of the switching circuit 1 according to the first embodiment, and the description thereof will be omitted.

As shown in FIG. 9, the bidirectional switching element 32 provided in the switching circuit 2 according to the present embodiment is a fourth switching element Q4 composed of an N-type reverse blocking IGBT and a P-type reverse blocking IGBT. It has a configured fifth switching element Q5. The fourth switching element Q4 and the fifth switching element Q5 are connected in antiparallel. That is, the bidirectional switching element 32 is configured by connecting the fourth switching element Q4 composed of the IGBT and the fifth switching element Q5 composed of the IGBT in antiparallel connection.

The fourth switching element Q4 and the fifth switching element Q5 may each be composed of a diode or a MOSFET instead of an IGBT. That is, the bidirectional switching element 32 may be configured by connecting at least two of a diode, a MOSFET, and an IGBT in antiparallel connection. Here, these MOSFETs may be, for example, Si-PWMs, these diodes may be, for example, Si diodes, and these IGBTs may be, for example, Si-IGBTs.

The switching circuit 2 includes an inverting circuit (NOT gate) 24 having an input terminal connected to an output terminal of the second control unit SG2. The output terminal of the inverting circuit 24 is connected to the input terminal of the second output unit P2. Therefore, a signal in which the polarity of the second control signal 2S output by the second control unit SG2 is inverted is input to the second output unit P2. The second output unit P2 outputs the second drive signal of the second drive voltage based on the input signal to the gate electrode of the fourth switching element Q4.

The switching circuit 2 includes a third output unit P3 having an input terminal connected to the output terminal of the second control unit SG2. Further, the switching circuit 2 includes a third gate resistor R3 having one terminal connected to the output terminal of the third output unit P3 and another terminal connected to the gate electrode of the fifth switching element Q5.

The switching circuit 2 having such a configuration turns off the bidirectional switching element 32 in the first operation B1 and the second operation B2 in the first embodiment, and bidirectional switching in the third operation B3 and the fourth operation B4. The element 32 can be controlled to be on.

As a result, the switching circuit 2 according to the present embodiment has the same effect as the switching circuit 1 according to the first embodiment and the switching circuit 1 according to the modification of the first embodiment.

[Third Embodiment]
FIG. 10 is a circuit diagram showing a switching circuit according to the third embodiment. The switching circuit 3 according to the present embodiment is characterized in that the configuration of the bidirectional switching element is different from the switching circuit 1 according to the first embodiment and the switching circuit 2 according to the second embodiment. The same reference numerals are given to the components having the same functions and functions as those of the switching circuit 1 according to the first embodiment, and the description thereof will be omitted.

As shown in FIG. 10, the bidirectional switching element 33 provided in the switching circuit 3 according to the present embodiment reverses the IGBT and the diode with the sixth switching element Q6 configured by connecting the IGBT and the diode in antiparallel connection. It has a seventh switching element Q7 configured by connecting in parallel. The sixth switching element Q6 and the seventh switching element Q7 are connected in anti-series.

The sixth collector electrode C6 of the sixth switching element Q6 is connected to the first gate electrode G1 (more specifically, the connection node 21) of the first switching element Q1. The sixth emitter electrode E6 of the sixth switching element Q6 is connected to the seventh emitter electrode E7 of the seventh switching element Q7. The sixth gate electrode G6 of the sixth switching element Q6 is connected to the seventh gate electrode G7 of the seventh switching element Q7. The seventh collector electrode C7 of the seventh switching element Q7 is connected to one electrode of the capacitor 23. The sixth collector electrode C6 corresponds to the input / output electrode of the bidirectional switching element 33. The seventh collector electrode C7 corresponds to the input / output electrode of the bidirectional switching element 33. The gate connection node to which the sixth gate electrode G6 and the seventh gate electrode G7 are connected corresponds to the control signal input electrode of the bidirectional switching element 33.

The switching circuit 3 having such a configuration turns off the bidirectional switching element 33 in the first operation B1 and the second operation B2 in the first embodiment, and bidirectional switching in the third operation B3 and the fourth operation B4. The element 33 can be controlled to be on.

As a result, the switching circuit 3 according to the present embodiment has the same effect as the switching circuit 1 according to the first embodiment and the switching circuit 1 according to the modification of the first embodiment.

[Fourth Embodiment]
FIG. 11 is a circuit diagram showing a switching circuit according to the fourth embodiment. The switching circuit 4 according to the present embodiment is characterized in that it includes a bidirectional analog switch element 34 instead of the bidirectional switching element. The same reference numerals are given to the components having the same functions and functions as those of the switching circuit 1 according to the first embodiment, and the description thereof will be omitted.

As shown in FIG. 11, the switching circuit 4 according to the present embodiment includes a bidirectional analog switch element 34 connected between the first gate electrode G1 of the first switching element Q1 and the capacitor 23. The on / off state of the bidirectional analog switch element 34 is controlled by the second drive signal of the second drive voltage output from the second output unit P2. The bidirectional analog switch element 34 is configured to be turned off in the first operation B1 and the second operation B2 in the first embodiment, and turned on in the third operation B3 and the fourth operation B4. As a result, the switching circuit 4 can operate in the same manner as the switching circuit 1 according to the first embodiment and the switching circuit 1 according to the modification of the first embodiment.

As a result, the switching circuit 4 according to the present embodiment is the same as the switching circuits 1, 2, and 3 according to the first embodiment, the modification of the first embodiment, the second embodiment, and the third embodiment. The effect of is obtained.

1,1Un, 1Up, 1Vn, 1Vp, 1Wn, 1Wp, 2,3,4 Switching circuit 1S First control signal 2S Second control signal 10 Power conversion device 11 Three-phase AC power supply 12 Rectification circuit 13 Smoothing capacitor 14 Inverter circuit 15 Three-phase AC motor 16U U-phase output arm 16V V-phase output arm 16W W-phase output arm 17 Control device 21 Connection node 22 Gate electrode Connection node 23 Condenser 24 Inverting circuit 31, 32, 33 Bidirectional switching element 34 Bidirectional analog switch Element 311 Input / output electrode 313 Input / output electrode 315 Control signal input electrode B1 First operation B2 Second operation B3 Third operation B4 Fourth operation C6 Sixth collector electrode C7 Seventh collector electrode D1 First drain electrode D2 Second drain electrode D3 Third drain electrode E6 Sixth emitter electrode E7 Seventh emitter electrode G1 First gate electrode G2 Second gate electrode G3 Third gate electrode G6 Sixth gate electrode G7 Seventh gate electrode Ln Negative electrode side line Lp Positive electrode side line P1 First 1 Output unit P2 2nd output unit P3 3rd output unit PD2 2nd parasitic diode PD3 3rd parasitic diode Q1 1st switching element Q2 2nd switching element Q3 3rd switching element Q4 4th switching element Q5 5th switching element Q6 6 Switching element Q7 7th switching element R0 Gate resistance R1 1st gate resistance R2 2nd gate resistance R3 3rd gate resistance S1 1st source electrode S2 2nd source electrode S3 3rd source electrode SG1 1st control unit SG2 2nd control Department

Claims (8)

A first switching element having a first drain electrode, a first gate electrode and a first source electrode,
An input / output electrode connected to the first gate electrode, a bidirectional switching element having a control signal input electrode and an input / output electrode into which a control signal for controlling switching is input, and a bidirectional switching element.
A switching circuit including a capacitor connected between the first source electrode and the input / output electrode. The first output unit that outputs the first control signal to the first gate electrode,
The switching circuit according to claim 1, further comprising a second output unit that outputs a second control signal to the control signal input electrode. The first output unit is connected to a power source that outputs positive and negative voltages, and outputs the first control signal having a low voltage level of negative voltage and a high voltage level of positive voltage to the first gate electrode. Item 2. The switching circuit according to Item 2. The first output unit and the second output unit repeat the first operation, the third operation, and the second operation in this order to drive the first switching element.
In the first operation, the first output unit turns the bidirectional switching element off before the first output unit turns the first switching element from the on state to the off state, and then the first operation. This is an operation in which the output unit changes the first switching element from the off state to the on state.
In the second operation, the first output unit turns the bidirectional switching element off before the first output unit turns the first switching element from the off state to the on state, and then the first operation. This is an operation in which the output unit changes the first switching element from the off state to the on state.
The third operation is an operation in which the second output unit turns the bidirectional switching element on while the first output unit is in the off state of the first switching element. The switching circuit described in. A fourth operation is set between the second operation and the third operation, and the first output unit and the second output unit are the first operation, the third operation, the second operation, and the second operation. The fourth operation is repeated in this order to drive the first switching element.
The fourth operation is the operation in which the second output unit turns on the bidirectional switching element while the first output unit is in the on state of the first switching element. Switching circuit. The period of the first operation is set to be equal to or longer than the turn-off time of the first switching element.
The switching circuit according to claim 4 or 5, wherein the period of the second operation is set to be equal to or longer than the turn-on time of the first switching element. The switching circuit according to any one of claims 1 to 6, wherein the first switching element is a semiconductor element formed by using at least one of Si, SiC, a GaN-based material, and diamond. The switching circuit according to claim 1, wherein the bidirectional switching element is configured by connecting at least two diodes, MOSFETs, and IGBTs in anti-series or anti-parallel connection.

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