JP2015092525A - Wafer processing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a wafer processing method capable of reducing possibility of damaging chips even when the chips are subjected to a temperature change.SOLUTION: A wafer processing method processes a wafer in which a surface of a device wafer is sealed by a sealing material, on the device wafer, devices are formed in each of chip regions defined by a plurality of predetermined division lines. The wafer processing method comprises the steps of: dividing the wafer along the predetermined division lines to form a plurality of chips; thinning the sealing material on an outer peripheral edge of each chip either before or after performing the dividing step; and changing temperature of the chips formed in the dividing step after performing the dividing step and the thinning step. Stress in the sealing material is released by thinning the sealing material in the thinning step, thereby preventing chip from being broken due to difference in coefficients of thermal expansion between the chips and the sealing material in the temperature-changing step.

Description

  The present invention relates to a method for processing a wafer such as a WL-CSP wafer.

  WL-CSP (Wafer-level Chip Size Package) wafer is a technology that forms a rewiring layer and electrodes (metal posts) in the wafer state, then encapsulates the surface side with resin and divides it into packages with a cutting blade or the like Since the size of the package obtained by dividing the wafer into pieces becomes the size of the semiconductor device chip, it is widely adopted from the viewpoint of miniaturization and weight reduction.

  In the manufacturing process of a WL-CSP wafer, after forming a rewiring layer on the device surface side of a device wafer on which a plurality of devices are formed, and further forming a metal post connected to an electrode in the device via the rewiring layer The metal post and the device are sealed with resin.

  Next, after the sealing material is thinned and the metal posts are exposed on the surface of the sealing material, external terminals called electrode bumps are formed on the end faces of the metal posts. Then, it cuts with a cutting device etc. and divides | segments into each CSP. In order to protect the semiconductor device from impact, moisture and the like, it is important to seal with a sealing material.

  WL-CSP wafers are generally divided into individual CSPs using a cutting machine. In this case, the WL-CSP wafer cannot detect the target pattern of the device from the front side because the device used for detecting the division line is covered with resin.

  Therefore, alignment of the planned dividing line and the cutting blade is performed by, for example, indexing the planned dividing line by using the electrode bump formed on the resin of the WL-CSP wafer as a target, or printing the alignment target on the upper surface of the resin. Is doing.

JP2013-74021A

  After dividing a wafer such as a WL-CSP wafer into individual chips, a temperature cycle test may be performed in order to evaluate the resistance of the device to high temperature, low temperature, and temperature change. When such a temperature cycle test is performed, a crack may occur at the interface between the chip and the sealing material during the temperature cycle test due to a difference in thermal expansion coefficient between the chip and the sealing material, and the chip may be damaged. .

  The present invention has been made in view of these points, and an object of the present invention is to provide a wafer processing method capable of reducing the risk of breakage even if a chip is exposed to a temperature change.

  According to the present invention, there is provided a wafer processing method for processing a wafer in which a surface of a device wafer in which a device is formed in each of chip regions defined by a plurality of division lines formed on the surface is sealed with a sealing material. A dividing step of dividing the wafer along the scheduled dividing line to form a plurality of chips, and a thinning for thinning the sealing material on the outer peripheral edge of each chip before or after performing the dividing step. And a temperature changing step for causing a temperature change in the chip formed in the dividing step after performing the dividing step and the thinning step, and the sealing material is removed in the thinning step. Wafer characterized by releasing stress of sealing material by thinning and preventing chip breakage due to difference in thermal expansion coefficient between chip and sealing material in temperature change step Processing method is provided.

  According to the processing method of the present invention, since the sealing material at the outer peripheral edge of the chip is thinned, the stress of the sealing material at the thinned portion can be released, and heat is applied to the chip and the sealing material. Even if there is a difference in expansion coefficient, it is possible to reduce the possibility of the chip being damaged according to the temperature change.

FIG. 1A is an exploded perspective view of a WL-CSP wafer, and FIG. 1B is a perspective view of the WL-CSP wafer. It is an expanded sectional view of a WL-CSP wafer. It is a perspective view which shows a mode that a WL-CSP wafer is stuck on the dicing tape with which the outer peripheral part was mounted | worn with the annular frame. It is a perspective view of a cutting device. It is sectional drawing explaining a thinning step. It is sectional drawing explaining the division | segmentation step by dicing. It is sectional drawing explaining the modified layer formation step as a division | segmentation starting point. It is sectional drawing of the state which provided the external force to the wafer and was divided | segmented into the chip | tip using the modified layer as a division | segmentation starting point.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Referring to FIG. 1A, an exploded perspective view of the WL-CSP wafer 27 is shown. FIG. 1B is a perspective view of the WL-CSP wafer 27.

  As shown in FIG. 1A, devices 15 such as LSIs are formed on the surface 11a of the device wafer 11 in each region defined by a plurality of division lines (streets) 13 formed in a lattice pattern. Has been.

  As shown in FIG. 2, the device wafer 11 (hereinafter sometimes simply referred to as “wafer”) 11 has a back surface 11b ground in advance and thinned to a predetermined thickness (about 200 to 300 μm). After forming a plurality of metal posts 21 electrically connected to the electrode 17, the surface 11 a side of the wafer 11 is sealed with a sealing material so that the metal posts 21 are embedded. As the sealing material 23, it is preferable to use a resin such as an epoxy resin.

  As another embodiment, after the rewiring layer is formed on the surface 11a of the device wafer 11, the metal post 21 electrically connected to the electrode 17 in the device 15 is formed on the rewiring layer. good.

  Next, the resin sealing material 23 is thinned using a plane cutting device (surface planar) having a cutting tool made of single crystal diamond or a grinding device called a grinder. After thinning the resin sealing material 23, the end face of the metal post 21 is exposed by, for example, plasma etching.

  Next, a metal bump 25 such as solder is formed on the exposed end face of the metal post 21 by a well-known method, and the WL-CSP wafer 27 is completed. In the WL-CSP wafer 27 of this embodiment, the thickness of the resin sealing material 23 is about 100 μm.

  When the WL-CSP wafer 27 is cut with a cutting device, preferably, the WL-CSP wafer 27 is affixed to a dicing tape T as an adhesive tape having an outer peripheral portion affixed to an annular frame F as shown in FIG. To wear. As a result, the WL-CSP wafer 27 is supported by the annular frame F via the dicing tape T.

  However, when cutting the WL-CSP wafer 27 with a cutting device, an adhesive tape may be attached to the back surface of the WL-CSP wafer 27 without using the annular frame F.

  Referring to FIG. 4, a perspective view of a cutting device 2 suitable for cutting the WL-CSP wafer 27 is shown. Reference numeral 4 denotes a base of the cutting apparatus 2. On the base 4, a chuck table 6 is disposed so as to be rotatable and reciprocally movable in the X-axis direction by a cutting feed mechanism (not shown). A plurality of clamps 8 for clamping the annular frame F are attached to the chuck table 6. Reference numeral 10 denotes a bellows for protecting the cutting feed mechanism.

  A gate-shaped column 12 is erected on the base 4. A pair of guide rails 14 extending in the Y-axis direction are fixed to the column 12. A Y-axis moving block 16 is mounted on the column 12 so as to be movable in the Y-axis direction along the guide rail 14 by an index feed mechanism 20 including a ball screw 18 and a pulse motor (not shown).

  A pair of guide rails 22 extending in the Z-axis direction are fixed to the Y-axis moving block 16. A Z-axis moving block 24 is mounted on the Y-axis moving block 16 so as to be movable in the Z-axis direction by being guided by the guide rail 22 by a Z-axis moving mechanism 30 including a ball screw 26 and a pulse motor 28. .

  A cutting unit 32 and an alignment unit 36 are attached to the Z-axis moving block 24. A spindle (not shown) is rotatably accommodated in the spindle housing of the cutting unit 32, and a cutting blade 34 is attached to the tip of the spindle.

  The alignment unit 36 includes a first imaging unit 38 that includes a macro microscope and a standard camera that captures visible light, and a second imaging unit 40 that includes a micro microscope, a standard camera, and an infrared camera.

  Next, a method for processing the WL-CSP wafer 27 using the cutting device 2 will be described. First, the WL-CSP wafer 27 supported by the annular frame F via the dicing tape T is placed on the holding surface of the chuck table 6 and sucked and held by the chuck table 6, and the annular frame F is clamped by the clamp 8. And fix.

  Next, the first imaging unit 38 and the second imaging unit 40 are used to image the surface of the WL-CSP wafer 27, and alignment for detecting a cutting area between the metal bumps 25 based on the metal bumps 25 is performed.

  And based on this alignment, the thinning step which thins the sealing material 23 of the outer periphery of the device (chip) 15 is implemented. That is, the groove 29 having a depth not reaching the surface 11a of the device wafer 11 is formed by using the cutting blade 34 having a width wider than the width t1 of the planned dividing line 13 on the resin sealing material 23 on the planned dividing line 13. Then, the resin sealing material 23 on the outer peripheral edge of the device 15 is thinned.

  By performing the thinning step, the uncut portion 31 having a predetermined thickness t2 remains in the resin sealing material 23. The width of the groove 29 is appropriately set according to the distance between the bumps and the width of the division planned line 13. It is preferable to provide a margin width of, for example, 100 μm or more between the bump 25 and the groove 29.

  The width t <b> 1 of the planned division line 13 is about 80 μm, and the thickness t <b> 2 of the uncut portion 31 is appropriately set according to the type of the resin sealing material 23. For example, the thickness t2 of the uncut portion 31 is set to 100 μm or less, preferably 70 μm or less. By performing the thinning step, the stress of the resin sealing material 23 at the thinned portion is released.

  Next, as shown in FIG. 6, a division step is performed in which the bottom of the groove 29 is diced to divide the WL-CSP wafer 27 into individual chips along the division line 13. The cutting blade used for this dicing uses a narrower cutting blade compared to the cutting blade 34 used in the thinning step to form a cutting groove 33 reaching the dicing tape T, and the WL-CSP wafer 27 is formed. Divide into individual chips. In this division step, the WL-CSP wafer 27 may be fully cut by ablation processing using a laser beam instead of dicing.

  Next, another embodiment of the division step will be described with reference to FIGS. In this embodiment, a division starting point is first formed on the device wafer 11, and then an external force is applied to the WL-CSP wafer 27 to divide the WL-CSP wafer 27 into individual chips.

  With reference to FIG. 7, an embodiment of the division starting point forming step will be described. In this embodiment, the groove 29A formed in the thinning step is deeply formed, and the uncut portion 31A is formed to be thin enough to be divided when an external force is applied to the wafer, for example, about 10 μm.

  Then, a laser beam 43 having a wavelength (for example, 1064 nm) having transparency to the device wafer 11 is irradiated from the laser beam irradiation head 42 to form a modified layer 35 as a division starting point inside the device wafer 11. When this modified layer is formed, the condensing point of the laser beam 43 is set inside the wafer 11, and the device wafer 11 is irradiated with the laser beam 43 through the uncut portion 31A.

  The modified layer 35 is formed inside the device wafer 11 along the division line 13 that extends in the first direction while indexing and feeding the chuck table of the laser processing apparatus that sucks and holds the WL-CSP wafer 27.

  After forming the modified layer 35 along all the planned dividing lines 13 extending in the first direction, the chuck table is rotated by 90 °, and all the dividing extending in the second direction orthogonal to the first direction is performed. A similar modified layer 35 is formed along the planned line 13.

  The formation of the division starting point is not limited to the formation of the modified layer 35 by laser beam irradiation, but a groove formed by ablation processing by laser beam irradiation or a groove formed by a cutting blade is used as the division starting point. You may do it.

  After the division starting point is formed, as shown in FIG. 8, the dicing tape T is expanded in the direction of arrow A to apply an external force to the WL-CSP wafer 27, and the WL-CSP wafer 27 is individually separated from the modified layer 35 as the division starting point. Divide into chips. Reference numeral 37 denotes a dividing groove.

  In the above-described embodiment, the dividing step is performed after the thinning step is performed. However, the thinning step may be performed after the dividing step is performed.

  In the wafer processing method of the present invention, after the thinning step and the dividing step, the temperature change step is performed in order to evaluate the resistance of the device 15 to high temperature, low temperature, and temperature change. This temperature change step is performed by, for example, a temperature cycle test in which the temperature of the device chip 15 is changed in a predetermined cycle. The temperature of the atmosphere around the device chip 15 may be changed.

  According to the wafer processing method of the above-described embodiment, since the stress of the resin sealing material 23 in the thinned portion is released by thinning the resin sealing material 23 on the outer peripheral edge of the device chip 15, Even if the changing step is performed, the device chip 15 can be prevented from being damaged due to the difference in coefficient of thermal expansion between the device chip 15 and the resin sealing material 23.

11 Device wafer 13 Scheduled division line 15 Device 21 Metal post 23 Sealing resin 25 Bump 27 WL-CSP wafer 29 Groove 31 Uncut portion 33 Cutting groove 35 Modified layer 42 Laser beam irradiation head

Claims (1)

A wafer processing method for processing a wafer in which a surface of a device wafer in which a device is formed in each chip region defined by a plurality of division lines formed on the surface is sealed with a sealing material,
A dividing step of dividing the wafer along the division line to form a plurality of chips;
Before or after performing the dividing step, a thinning step of thinning the sealing material at the outer peripheral edge of each chip;
A temperature change step for causing a temperature change in the chip formed in the division step after performing the division step and the thinning step; and
The sealing material is thinned in the thinning step to release the stress of the sealing material, and chip breakage due to the difference in thermal expansion coefficient between the chip and the sealing material in the temperature change step is prevented. A wafer processing method characterized by:

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