JP2014203356A - Reactive power compensation device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a reactive power compensation device that balances capacitor voltages without any additional circuit, and suppresses current distortion in restarting reactive power outputting for system voltage stabilization.SOLUTION: A reactive power compensation device includes: multistage inverter circuits which are configured for respective three phases; a filter circuit which is connected between a system interconnection end and output ends of the respective multistage inverter circuits and reduces harmonics; and a control unit which controls the respective multistage inverter circuits so as to output a predetermined three-phase AC voltage. The multistage inverter circuits are each constituted by connecting a plurality of inverters, which each convert a DC voltage by a capacitor into a pulse voltage corresponding to a voltage command value, in series, and the opposite-side ends of systems of the respective multistage inverters are connected together to form an all-phase connection as the neutral point. The control unit performs reactive power output control for maintaining voltage balance among the capacitors during a stop of reactive power output operation for system voltage stabilization so as to charge the capacitors.

Description

  The present invention relates to a reactive power compensator that stabilizes a system voltage by injecting reactive power into the system.

  The number of cases where distributed power sources such as solar power generation, wind power generation, and fuel cells are connected to the system is increasing, and accordingly, fluctuations in system voltage are concerned. In particular, residential solar power generation is expected to increase further in the future, and when the amount of power generation is large and the load is small, a large reverse power flow will occur and the voltage of the distribution network will rise and deviate from the system voltage regulation value . Conventionally, in such a case, the voltage rise is suppressed by reducing the generated power. However, with this method, the power that is supposed to be generated is limited and energy is wasted. If a reactive power compensator that injects reactive power into the system is used, the system voltage can be lowered without wasting energy, and a distributed power source such as sunlight can also generate power. For example, when the system voltage is higher than a voltage within a specified range, the reactive power compensator can be operated so that the reactive current whose phase is delayed by 90 ° with respect to the system voltage flows to the reactive power compensator, thereby reducing the system voltage. At this time, the reactive power compensator acts like a reactor. Note that during such reactive power output control, the active power is also controlled.

  However, the conventional reactive power compensator has a large weight and volume, and is often installed on the power transmission end side of a substation or the like. In order to cope with an increase in the system voltage of a distribution network using a distributed power source such as residential solar power generation, a small reactive power compensator that can be installed in a small residential area is required.

  As a means to reduce the reactive power compensator, the voltage waveform output from the semiconductor power converter (inverter) part is made a waveform that is closer to a sine wave and has less harmonics, thereby reducing the size of the interconnection filter reactor. There is. In order to output a voltage waveform with few harmonics, a PWM inverter that outputs a voltage waveform obtained by modulating the pulse width of a DC capacitor as a voltage source is connected in multiple stages in series for each phase, and the interconnection voltage with a fine voltage pulse width There is a way to create a waveform close to. By superimposing fine voltage pulse outputs, the harmonics of the output voltage can be reduced, and the interconnection filter reactor can be made smaller. Further, by increasing the number of multi-stage PWM inverters connected in series to obtain sufficient withstand voltage, the system can be reduced in size without using a transformer.

  In this way, in the Y-connection reactive power compensator that includes an inverter in each phase and connects a neutral point, it is necessary to balance the voltage of the DC capacitors provided in each inverter. As the balance control, there is a method of superimposing a control amount in the same phase as the reactive current on the voltage command value of each phase. When the same control amount is superimposed on all phases, that is, when the zero-phase voltage control amount is superimposed, the DC capacitor voltage balance between the phases is controlled. Also, when multiple inverters are connected in series in each phase, by superimposing a control amount that is the same phase as the reactive current and adding zero between the stages to the voltage command value of each stage, The DC capacitor voltage balance between stages is controlled.

"6.6kV Transformerless Cascade PWM STATCOM-Operation Verification with Three-phase 200V 10kVA Mini Model" (Institute of Electrical Engineers, Industrial Applications Division 2007, Vol. 127, No. 8, p. 781-788) "6.6kV transformerless power storage system using cascade PWM converter and secondary battery" (The Institute of Electrical Engineers of Japan, 2009, Vol.129, No.1, p.67-76)

Japanese Patent No. 324483 JP-A-9-56072

  Thus, when controlling the balance of the DC capacitor voltage with the reactive power compensator of the Y-connection method, it is premised that reactive current is flowing. Therefore, the balance cannot be controlled when reactive power is not output. For this reason, when the reactive power output is restarted after the reactive power output operation is stopped, when the reactive power output is restarted, the DC capacitor voltage is unbalanced. However, there is a problem that the current waveform is distorted until a balance is achieved. For controlling the DC capacitor voltage during the stop, there is a method of charging from an external power source. This is a technique in which the power obtained from the AC power supply 9 via the transformer 72 is charged to the DC capacitor 12 of the inverter 13 by the charging circuit 8 as shown in FIG. In such a method, additional circuits such as a power source 9, a transformer 72, and a charging circuit 8 are separately required.

  Therefore, an object of the embodiment is to balance the capacitor voltage without an additional circuit and suppress current distortion when restarting reactive power output for system voltage stabilization.

  A reactive power compensator according to an embodiment is connected between a multistage inverter circuit configured for each of three phases, and between a grid connection end and an output end of each multistage inverter circuit, for reducing harmonics. A filter circuit; and a control device that controls each of the multi-stage inverter circuits to output a predetermined three-phase AC voltage. Each multi-stage inverter circuit is configured by connecting in series a plurality of inverters that convert a DC voltage by a capacitor into a pulse voltage corresponding to a voltage command value, and the opposite end of the system of each multi-stage inverter circuit is a neutral point. All phases are connected, and the control device performs reactive power output control for maintaining the voltage balance of the capacitor when the reactive power output operation for stabilizing the system voltage is stopped, and the capacitor is Charge.

It is a block diagram of the reactive power compensation apparatus in 1st Embodiment. It is a figure which shows the change of the DC capacitor voltage by the DC capacitor voltage monitoring in 2nd Embodiment. It is a figure which shows control of the DC capacitor voltage by the DC capacitor voltage monitoring in 2nd Embodiment. It is a figure which shows the relationship between system phase voltage, the threshold value Vc_th of a DC capacitor, and the voltage drop Vf in a connection filter. It is a figure which shows the change of the DC capacitor voltage by stop time monitoring in 3rd Embodiment. It is a figure which shows control of the DC capacitor voltage by stop time monitoring in 3rd Embodiment. It is a figure which shows the soft start of the reactive power command in 4th Embodiment. It is a figure which shows the charging method of the capacitor | condenser in the past.

  Hereinafter, a reactive power compensator according to an embodiment will be described with reference to the drawings.

[First Embodiment]
FIG. 1 is a diagram illustrating a configuration of a reactive power compensator 10 according to the first embodiment.

  The reactive power compensator 10 includes a single-phase full-bridge inverter 1 composed of four semiconductor switching elements 11 and a DC capacitor 12 in a plurality of stages for each phase of UVW, and a grid connection end 7 as a grid filter 2. And reactor 21 connected to each phase. A plurality of inverters 1 and reactors 21 of each phase are connected in series, and each phase is connected to the plurality of inverters 1 at a neutral point 3 at the opposite end of the system. A control device 4 is also provided. The reactive power compensator 10 is linked to a distribution line 6 that is supplied with power from the system power supply 5. The control device 4 calculates a reactive current command value, an output voltage command value, and the like based on the system voltage Vs and the output current Io, and controls the reactive power compensator 10 shown in FIG. 1 as a whole. Each inverter 1 operates under PWM or one pulse under the control of the control device 4.

  FIG. 1 representatively shows a block of the control device 4 using the voltage of one DC capacitor 12 as an input signal. The control device 4 actually monitors the voltage of the DC capacitor 12 of all inverters, and in order to prevent the voltage balance of the DC capacitor voltage 12 from being significantly lowered and the voltage balance being lost while the reactive power output is stopped, the DC capacitor Reactive power command value for charging 12 and balancing is output. Actually, the control gate signal of the semiconductor switching element 11 corresponding to the reactive power command value is output. By outputting reactive power, each DC capacitor 12 is charged, and voltage balance is achieved between the phases of UVW and the stages of inverters 1a to 1c. Therefore, the current when restarting reactive power output for system voltage stabilization is resumed. Distortion can be suppressed.

In FIG. 1, three stages of inverters 1 are connected in series for each phase, but one stage, two stages, five stages, six stages, and the like may be used. In FIG. 1, the interconnection filter 2 includes only the reactor 21, but an LCL configuration using a capacitor connected from each phase to the neutral point or a capacitor connecting between the phases may be used. The reactive power command value may be a reactive current command value in the internal control operation.
[Second Embodiment]
FIG. 2 is a diagram illustrating an operation of the reactive power compensator 10 according to the second embodiment, and FIG. 3 is a diagram illustrating a control configuration thereof. In the following description, the same or equivalent components as those of the reactive power compensator 10 illustrated in FIG. 1 are denoted by the same reference numerals as those used in FIG.

  FIG. 2 representatively shows changes in the capacitor voltage of the DC capacitor 12 included in the reactive power compensator 10. When the reactive power compensator 10 having the configuration of the first embodiment stops the reactive power output operation (reactive power compensation), the voltage Vc of the DC capacitor 12 decreases from the rated value Vc_ref due to natural discharge as shown in FIG. The balance between phases and steps will be lost. In the present embodiment, even after the reactive power output operation is stopped, the voltage Vc of the DC capacitor 12 is monitored, and when the voltage falls below a predetermined threshold value Vc_th, the minimum reactive power command value Q_min is output to output the DC. The capacitor 12 is charged. As a result, the DC capacitor 12 is charged and balanced (controlled) between phases and stages. That is, the added value of each phase of the voltage of the DC capacitor 12 provided in each phase of UVW is equal, and the voltage of the capacitor 12 in each stage is also equal. For this reason, the current distortion at the time of restarting the reactive power output for system voltage stabilization can be suppressed.

  The minimum reactive power command value Q_min is the minimum value of reactive power necessary for balancing the voltage of the DC capacitor 12 between phases and stages. In order to control the interphase and interstage balance of the DC capacitor voltage, it is necessary to output reactive power. If it is too small, balance control cannot be established. Therefore, when the DC capacitor 12 is charged, the minimum reactive power Q_min necessary for balancing is output. When giving this minimum reactive power command, the command value gradually changes from zero to Q_min, so that a rapid change in current can be suppressed and the influence on the system can be suppressed. It is desirable that the minimum reactive power Q_min is gradually changed from zero, for example, one period or more of the system voltage.

  FIG. 3 is a block diagram showing the control configuration of this embodiment. The DC capacitor voltage Vc is compared with the threshold value Vc_th, and if it is below the threshold value, the minimum reactive power command value Q_min is given to the control calculation / gate pulse generating device 41, and the gate pulse corresponding to the command value is output to each inverter 1. This control determination is performed for the DC capacitors 12 of all inverters 1 provided in each stage of each phase.

  As shown in FIG. 2, the minimum reactive power command value Q_min generated to balance the capacitor voltage is a fixed value obtained experimentally, for example. The minimum reactive power command value Q_min is converted into a minimum reactive current command value in the control calculation / gate pulse generating device 41, and a gate pulse to be given to each semiconductor switching element is generated based on the minimum reactive current command value. At this time, the minimum reactive power command value Q_min is a value obtained by multiplying the system voltage by the minimum reactive current command value. For example, if the command value given to the control calculation / gate pulse generator 41 is the minimum reactive current command value, the minimum reactive current command value also changes when the system voltage slightly changes. However, when the reactive power output for stabilizing the system voltage is stopped, the system voltage is almost at the rated system voltage and is stable, so the minimum reactive power command value Q_min does not change substantially. Therefore, in order to simplify the explanation in the present application, the minimum command value for charging the capacitor 12 is set as the minimum reactive power command value Q_min so as not to cause distortion in the output current Io.

  The threshold value Vc_th is determined from the lower limit value of the DC capacitor voltage that can output current without significant distortion. The threshold value Vc_th is the lower limit value of the DC capacitor voltage that does not cause distortion in the output voltage, and corresponds to the case where the phase of each inverter 1 is 100% in a certain phase. That is, the value obtained by adding the voltage drop Vf at the interconnection filter when the minimum reactive power command value Q_min is output to the value obtained by summing the voltage Vc of the DC capacitor 12 of the inverter 1 provided for each phase in each phase, The time when the voltage coincides with the phase voltage peak value is the limit point at which a current without distortion can be output.

  Therefore, as shown in FIG. 4, the voltage drop value Vf at the interconnection filter (reactor 21) when the minimum reactive power command value Q_min is output from the phase voltage peak value Vsp of the system voltage is subtracted, and the remaining voltage is obtained for each phase. The threshold Vc_th is obtained by dividing by the number of inverter stages provided. That is, the threshold value Vc_th is obtained by dividing the value obtained by subtracting the voltage drop of the reactor 21 caused by the output current corresponding to the minimum reactive power command value Q_min from the peak value of the phase voltage of the system voltage by the number of stages of the multistage inverter. Value. The voltage drop value Vf at the interconnection filter is opposite to the above depending on the reactive power direction, and in this case, it is added to Vsp.

  When a plurality of DC voltage inverters having different rated voltages are provided for each phase in multiple stages, each threshold Vc_th proportional to the ratio of the rated voltages is calculated.

  The minimum reactive power command value may be the minimum reactive current command value in the internal control operation.

[Third Embodiment]
FIG. 5 is a diagram illustrating an operation of the reactive power compensator 10 according to the third embodiment, and FIG. 6 is a diagram illustrating a control configuration thereof. In the following description, the same or corresponding components as those of the reactive power compensator 10 shown in FIGS. 1 to 3 are denoted by the same reference numerals as those used in FIGS.

  FIG. 5 representatively shows changes in the capacitor voltage of the DC capacitor 12 included in the reactive power compensator 10. When the reactive power compensator 10 having the configuration of the first embodiment stops the reactive power output operation, the voltage Vc of the DC capacitor 12 decreases from the rated value Vc_ref due to natural discharge as shown in FIG. The balance will be lost. The time t0 after the reactive power output operation is stopped is monitored, and when the predetermined time threshold t_th is exceeded, the minimum reactive power command value Q_min is output as in the second embodiment. As a result, the DC capacitor 12 is charged and balanced (controlled) between phases and stages, so that current distortion when restarting reactive power output for system voltage stabilization can be suppressed. As long as reactive power output for stabilizing the system voltage is stopped, the waveform (operation) shown in FIG. 5 is repeated.

  FIG. 6 is a block diagram showing the control configuration of this embodiment. The time t0 after the reactive power output operation is stopped is compared with the time threshold value t_th, and if t_th is exceeded, the minimum reactive power command value Q_min is given to the control calculation / gate pulse generation device 41 and the gate pulse is output to each inverter 1 To do.

  The time threshold t_th is determined by the time during which natural discharge is performed from the rated voltage Vc_ref of the DC capacitor 12 during the reactive power compensation operation to the threshold Vc_th determined as in the second embodiment.

  The minimum reactive power command value may be the minimum reactive current command value in the internal control operation.

[Fourth Embodiment]
FIG. 7 is a diagram illustrating the operation of the reactive power compensator 10 according to the fourth embodiment. In the following description, the same or equivalent components as those of the reactive power compensator 10 illustrated in FIGS. 1 to 5 are denoted by the same reference numerals as those used in FIGS.

  FIG. 7 representatively shows changes in the capacitor voltage of the DC capacitor 12 included in the reactive power compensator 10. When the reactive power compensator 10 having the configuration of the first embodiment resumes the reactive power output operation for system stabilization from the stopped state, the first t_ss time gives the minimum reactive power command value Q_min, and the DC capacitor 12 Charging is performed to control the DC capacitor voltage balance between phases and stages, and then the reactive power command value is changed from Q_min to the original command value Q_ref (system voltage rating value). Thereby, the current distortion at the time of restarting the reactive power output can be sufficiently suppressed.

  The method of determining the period t_ss includes a method of determining that all the voltages of the DC capacitors 12 have reached the rated value Vc_ref and ending, or the DC capacitor voltage is changed from the threshold value Vc_th to Vc_ref at the minimum reactive power command value Q_min. There is a method in which the reaching time is t_ss and a corresponding period Q_min is output.

  The minimum reactive power command value may be the minimum reactive current command value in the internal control operation.

  Although several embodiments of the present invention have been described, these embodiments are presented by way of example and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the scope of the invention. These embodiments and modifications thereof are included in the scope and gist of the invention, and are included in the invention described in the claims and the equivalents thereof.

  DESCRIPTION OF SYMBOLS 1 ... Single phase inverter, 2 ... Connection filter, 3 ... Neutral point, 4 ... Control apparatus, 5 ... System power supply, 6 ... Distribution line, 8 ... Charging circuit, 9 ... Power supply, 11 ... Semiconductor switching element, 12 ... DC capacitor, 13 ... inverter, 21 ... reactor, 41 ... command value calculation / gate pulse generator, 71, 72 ... transformer.

Claims (8)

A multi-stage inverter circuit configured for each of the three phases;
A filter circuit connected between the grid connection end and the output end of each multi-stage inverter circuit to reduce harmonics;
A control device for controlling each of the multi-stage inverter circuits and outputting a predetermined three-phase AC voltage; and
Each of the multi-stage inverter circuits is configured by connecting in series a plurality of inverters that convert a DC voltage by a capacitor into a pulse voltage corresponding to a voltage command value,
The opposite end of the system of each multi-stage inverter circuit is connected to all phases as a neutral point,
The control device performs a reactive power output control for maintaining a voltage balance of the capacitor when the reactive power output operation for stabilizing the system voltage is stopped, and charges the capacitor. Reactive power compensator.   The reactive power command value output to maintain the voltage balance of each capacitor when the reactive power output operation for stabilizing the system voltage is stopped is balanced between the phases and stages of the capacitor voltage. The reactive power compensator according to claim 1, wherein the reactive power compensation value is a minimum reactive power command value.   When the reactive power output operation for stabilizing the system voltage is stopped, the control device performs reactive power output control for maintaining the voltage balance of the capacitor when the voltage of the capacitor falls below a predetermined threshold voltage. The reactive power compensator according to claim 1 or 2.   The predetermined threshold voltage is a value obtained by subtracting the voltage drop of the reactor caused by the output current corresponding to the minimum reactive power command value from the peak value of the phase voltage of the system voltage, as the number of stages of the multistage inverter. 4. The reactive power compensator according to claim 3, wherein the reactive power compensator is a divided value.   The control device, when the reactive power output operation for stabilizing the system voltage is stopped, when the time when the reactive power output operation is stopped reaches a predetermined time, the reactive power for maintaining the voltage balance of the capacitor 3. The reactive power compensator according to claim 1, wherein output control is performed. The predetermined time is a time from when the reactive power output operation for stabilizing the system voltage is stopped until the capacitor spontaneously discharges and the capacitor voltage reaches a predetermined threshold voltage. The reactive power compensator according to claim 5.   The reactive power command value output to balance the capacitor voltage when the reactive power output operation for stabilizing the system voltage is stopped by the control device gradually changes from zero to the reactive power command value. The reactive power compensator according to claim 1.   When the control device restarts the output from the state where the reactive power output for stabilizing the system voltage is stopped, until the capacitor voltage is charged to a predetermined rated value, the phase and stage of the capacitor voltage are increased. The reactive power compensator according to claim 1, wherein a minimum reactive power command value that balances between the two is output.

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