JP2014042396A - Self-excited power conversion device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a self-excited power conversion device that comprises a plurality of unit converters and can suppress output voltage unbalance even if part of the unit converters fail.SOLUTION: A self-excited power conversion device 1 includes: a plurality of arms 4up-4wm comprising a plurality of cells CL11-CL64 connected in series; and a control device 3 for, if an anomaly occurs in the cells CL11-CL64, stopping the unit converter cells CL11-CL64 such that the arms 4up-4wm have the same number of operating cells CL11-CL64.

Description

  The present invention relates to a self-excited power conversion device.

  In general, an MMC (modular multilevel converter) is known as a self-excited power converter (see, for example, Patent Document 1). The MMC is a power conversion device configured with a plurality of cells (unit converters).

JP 2011-24393 A

  However, in the self-excited power converter as described above, when a failure occurs in some cells, the output voltage tends to be unbalanced. The output voltage unbalance causes the output harmonics to increase.

  SUMMARY OF THE INVENTION An object of the present invention is to provide a self-excited power conversion device that is composed of a plurality of unit converters and that can suppress harmonics generated when some of the unit converters fail.

  A self-excited power conversion device according to an aspect of the present invention includes a plurality of arms in which a plurality of unit converters are connected in series, and the unit conversion that is operated in each arm when an abnormality occurs in the unit converter. And an abnormal time unit converter stopping means for stopping the unit converters so that the number of converters is the same.

  According to the present invention, it is possible to provide a self-excited power converter that includes a plurality of unit converters and that can suppress harmonics generated when some of the unit converters fail.

The block diagram which shows the structure of the self-excitation power converter device which concerns on embodiment of this invention. The block diagram which shows the structure of the cell which concerns on this embodiment. The wave form diagram which shows the output voltage of the arm before the cell which concerns on this embodiment fails. The wave form diagram which shows the output voltage of the arm after the cell which concerns on this embodiment fails.

  Embodiments of the present invention will be described below with reference to the drawings.

(Embodiment)
FIG. 1 is a configuration diagram illustrating a configuration of a self-excited power conversion device 1 according to an embodiment of the present invention. In addition, the same code | symbol is attached | subjected to the same part in drawing, the detailed description is abbreviate | omitted, and a different part is mainly described.

  The self-excited power converter 1 includes a DC power source 2, a control device 3, six arms 4up, 4um, 4vp, 4vm, 4wp, 4wm, three-phase reactors 5u, 5v, 5w, and a three-phase interconnected reactor. 6u, 6v, 6w are provided. The self-excited power conversion device 1 supplies three-phase AC power to AC systems 7u, 7v, and 7w having an AC power source and an AC load.

  The DC power supply 2 supplies the generated DC power to a power conversion circuit composed of six arms 4up to 4wm. The DC power source 2 is not limited to a device that generates power by itself, but may be a converter or a secondary battery that converts AC power into DC power.

  The control device 3 outputs a gate signal Sg to each cell (unit converter) CL11 to CL64 configuring the arms 4up to 4wm to control the power conversion circuit. Note that the configuration of the transmission path (such as an optical fiber cable) through which the control device 3 transmits the gate signal Sg to each of the cells CL11 to CL64 may be configured in any manner. For example, the control device 3 may be configured to transmit the gate signal Sg to each of the cells CL11 to CL64 through an individual transmission path, or transmit the serial signal to all the cells CL11 to CL64 through a common transmission path. You may comprise as follows.

  The six arms 4up to 4wm constitute a power conversion circuit that converts DC power into three-phase AC power. The arm 4up is composed of four cells CL11, CL12, CL13, and CL14 connected in series to constitute the positive side of the U phase of the power conversion circuit. The arm 4um is composed of four series-connected cells CL21, CL22, CL23, and CL24 that constitute the negative phase side of the U phase of the power conversion circuit. The arm 4vp is composed of four series-connected cells CL31, CL32, CL33, and CL34 and constitutes the V-phase positive side of the power conversion circuit. The arm 4vm is composed of four cells CL41, CL42, CL43, and CL44 connected in series to constitute the negative side of the V phase of the power conversion circuit. The arm 4wp is composed of four cells CL51, CL52, CL53, and CL54 connected in series to constitute the positive side of the W phase of the power conversion circuit. The arm 4wm is composed of four series-connected cells CL61, CL62, CL63, and CL64, which constitute the W-phase negative electrode side of the power conversion circuit. Here, a circuit in which each arm 4up to 4wm is configured by four cells CL11 to CL64 will be described, but each arm 4up to 4wm may be configured by any number of cells CL11 to CL64.

  FIG. 2 is a circuit diagram showing a circuit of the cell CL according to the present embodiment. All the cells CL11 to CL64 have the same configuration as the cell CL shown in FIG.

  Cell CL is a double star chopper. The cell CL is a circuit composed of two switching elements SW1 and SW2, two antiparallel diodes D1 and D2, and a capacitor CD. The cell CL is driven when the two switching elements SW1 and SW2 are switched by the gate signal Sg transmitted from the control device 3.

  The two switching elements SW1 and SW2 are connected in series. Antiparallel diodes D1 and D2 are connected to the two switching elements SW1 and SW2, respectively. The capacitor CD is connected in parallel with the two switching elements SW1 and SW2 connected in series. A connection point between the two switching elements SW1 and SW2 is connected to a terminal on the negative electrode side of the cell CL adjacent to the positive electrode side or the positive electrode side of the DC power supply 2. A terminal (emitter) on the negative electrode side of the switching element SW2 located on the negative electrode side is connected to a terminal on the positive electrode side of the cell CL adjacent to the negative electrode side or the negative electrode side of the DC power supply 2.

  The U-phase reactor 5u is provided between the U-phase positive-side arm 4up and the U-phase negative-side arm 4um. An intermediate point of reactor 5u is a U-phase output point of AC power. The intermediate point of reactor 5u is connected to the U phase of AC system 7u via interconnection reactor 6u. Reactor 5u is provided to suppress a direct current component of the circulating current flowing through U-phase positive arm 4up and U-phase negative arm 4um.

  The V-phase reactor 5v is provided between the V-phase positive arm 4vp and the V-phase negative arm 4vm. An intermediate point of reactor 5v is a V-phase output point of AC power. The midpoint of reactor 5v is connected to the V phase of AC system 7v via interconnection reactor 6v. Reactor 5v is provided to suppress a direct current component of the circulating current flowing through arm 4vp on the positive side of V phase and arm 4vm on the negative side of V phase.

  The W-phase reactor 5w is provided between the W-phase positive arm 4wp and the W-phase negative arm 4wm. An intermediate point of reactor 5w is a W-phase output point of AC power. The midpoint of reactor 5w is connected to the W phase of AC system 7w via interconnection reactor 6w. Reactor 5w is provided to suppress the DC component of the circulating current flowing through W-phase positive arm 4wp and W-phase negative arm 4wm.

  The interconnecting reactors 6u, 6v, 6w are reactors provided for interconnecting the AC systems 7u, 7v, 7w. The U-phase interconnecting reactor 6u is provided between the U-phase AC system 7u and the midpoint of the U-phase reactor 5u. The V-phase interconnecting reactor 6v is provided between the V-phase AC system 7v and the midpoint of the V-phase reactor 5v. The W-phase interconnecting reactor 6w is provided between the W-phase AC system 7w and the midpoint of the W-phase reactor 5w. A three-phase interconnection transformer may be provided instead of the three-phase interconnection reactors 6u, 6v, 6w.

  Next, the control of the control device 3 when the cells CL11 to CL64 are abnormal will be described.

  It is assumed that the cell CL11 of the U-phase positive arm 4up has failed.

  The control device 3 selects the cells CL21 to CL64 to be stopped one by one from the other arms 4um, 4vp, 4vm, 4wp, and 4wm together with the failed cell CL11. Here, the stop means that no voltage is output from the cell by forcibly blocking the gate. Therefore, as long as the voltage is not output from the cell, it may be stopped in any way.

  Here, when the cells CL11 to CL64 fail in a plurality of arms 4up to 4wm, the cells CL11 to CL64 of each of the other arms 4up to 4wm are equal to the number of cells CL11 to CL64 that have failed most frequently in one arm 4up to 4wm. Stop. Thereby, the number of cells CL11 to CL64 operated by all the arms 4up to 4wm is made the same. The cells CL11 to CL64 to be operated are cells other than the failed cell and the cell to be forcibly stopped.

  The control device 3 generates the gate signal Sg so that the cells CL12 to CL64 to be operated output the same voltage value and frequency from the arms 4up to 4wm as before the failure of the cell CL11. The control device 3 drives each of the cells CL12 to CL64 with the generated gate signal Sg.

  With reference to FIG.3 and FIG.4, control of cell CL12-CL14 to operate | move which comprises the arm 4up when the cell CL11 fails is demonstrated.

  FIG. 3 shows a waveform diagram of the output voltage of the arm 4up before the cell CL11 fails. FIG. 4 shows a waveform diagram of the output voltage of the arm 4up after the cell CL11 has failed. The voltage Vp is a peak value of the voltage required for the arm 4up.

  The arm 4up outputs voltages V1 to V4 from the cells CL11 to CL14 so that the output voltage approximates the waveform on the positive side of the sine wave.

  Before the failure of the cell CL11, as shown in FIG. 3, the cell CL11 outputs the voltage V1 at the time t1, the cell CL12 outputs the voltage V2 at the time t2, the cell CL13 outputs the voltage V3 at the time t3, At time t4, the cell CL14 outputs the voltage V4. The output voltages V1 to V4 of the cells CL11 to CL14 are a quarter of the peak value Vp of the output voltage of the arm 4up. In the phase interval in which all the cells CL11 to CL14 output the voltages V1 to V4 simultaneously, the arm 4up outputs the peak value Vp of the required voltage. Further, the interval (that is, the phase interval) between times t1 to t4 when the cells CL11 to CL14 output the voltages V1 to V4 is determined so that the waveform of the voltage output from the arm 4up approximates a sine wave.

  A voltage cannot be output from the cell CL11 after the failure of the cell CL11. However, the arm 4up needs to output a voltage having the same voltage value and frequency as before the failure. This same voltage value means that the effective value of the voltage (fundamental wave voltage) of the fundamental wave component excluding the harmonic component is the same. In order for the arm 4up to output the same voltage as before the failure, the control device 3 controls the cells CL12 to CL14 of the arm 4up as follows.

  After the failure of the cell CL11, the cell CL12 outputs the voltage V2a at time t2a, the cell CL13 outputs the voltage V3a at time t3a, and the cell CL14 outputs the voltage V4a at time t4a. The output voltages V2a to V4a of the cells CL12 to CL14 are one third of the peak value Vp of the output voltage of the arm 4up. Therefore, the output voltages V2a to V4a of the cells CL12 to CL14 become higher so as to compensate for the output voltage V1 of the cell 11 than before the failure. The arm 4up outputs the peak value Vp of the required voltage in the phase interval in which the three cells CL12 to 14 being operated output the voltages V2a to V4a simultaneously. In addition, the interval between the times t2a to t4a when the cells CL12 to 14 output the voltages V2a to V4a (that is, the phase interval) is basically longer than that before the failure because the voltage is not output from the cell 11.

  The controller 3 changes the voltage output from the arm 4up before and after the failure of the cell CL11 from the voltage waveform shown in FIG. 3 to the voltage waveform shown in FIG. 4 as described above. The gate signal Sg to be transmitted to is changed.

  For the arms 4um to 4wm other than the arm 4up in which the cell CL11 has failed, the cells to be operated other than the cells that are forcibly stopped are controlled in the same manner as the arm 4up described above.

  As described above, after the failure of the cell CL11, the number of the cells CL11 to CL64 operated by the respective arms 4up to 4wm is made the same so that the voltage waveforms on the positive side and the negative side for each phase are targeted. Make the voltage waveform of the same. Thereby, the voltage output from the self-excited power converter 1 becomes a balanced three-phase AC voltage.

  According to the present embodiment, even if an abnormality such as a failure occurs in a part of the cells CL11 to CL64 constituting the power conversion circuit, the number of cells CL11 to CL64 operated by each arm 4up to 4wm is made the same. Thus, the voltage output from each arm 4up to 4wm can be balanced. Thereby, the harmonics produced by the imbalance of the voltage waveform between the arms 4up to 4wm can be suppressed.

  In addition, by adjusting the output voltage and phase of each cell CL11 to CL64 so that the frequency and voltage value of the AC voltage output from the power conversion circuit are the same as those before the occurrence of the abnormality, it is equivalent to that before the occurrence of the abnormality. AC power can be supplied. If the number of cells CL11 to CL64 that have not failed in each arm 4up to 4wm is more than the minimum number that can output the required output voltage, the supply of AC power as required is continued even after the occurrence of an abnormality. be able to.

  The configuration of the cell CL is not limited to that shown in FIG. Any circuit may be used as long as it is a converter including a switching element and functions as a configuration of a self-excited power converter. For example, the cell CL may be a bidirectional chopper or a full bridge converter.

  In the embodiment, the voltages output from the cells CL11 to CL14 constituting one arm 4um are all the same. However, the present invention is not limited to this. The voltages output from the cells CL11 to CL14 may all be different or some of them may be different.

  Furthermore, each arm 4up-4wm is not limited to the one constituted by the four cells CL11-CL64, and may be constituted by any number of cells. For example, each arm 4up to 4wm may include cells that are not used during one cycle of the output voltage even during normal operation in order to ensure the redundancy of the configuration. Further, the self-excited power conversion device 1 is not limited to the one configured with the six arms 4up to 4wm, and may be configured with any number of arms. For example, although the self-excited power conversion device 1 has been described as a configuration that converts DC power to three-phase AC power, a configuration that converts DC power to single-phase AC power may be used. In this case, a self-excited power converter that converts DC power into single-phase AC power with four arms can be configured.

  In the embodiment, the abnormality of the cell is not limited to the case where the cell has failed. Even if the cell itself does not fail, the cell may be determined to be abnormal if there is a situation where the cell must be stopped due to other factors.

  Furthermore, in the embodiment, control is performed so that the voltage value does not change before and after the failure of the cell, but the voltage value may be changed as long as the AC systems 7u, 7v, and 7w are within an acceptable range. Even if it is not possible to supply power as required, it is possible to supply AC power with suppressed increase in harmonics.

  Note that the present invention is not limited to the above-described embodiment as it is, and can be embodied by modifying the constituent elements without departing from the scope of the invention in the implementation stage. Moreover, various inventions can be formed by appropriately combining a plurality of constituent elements disclosed in the embodiment. For example, some components may be deleted from all the components shown in the embodiment. Furthermore, constituent elements over different embodiments may be appropriately combined.

  DESCRIPTION OF SYMBOLS 1 ... Self-excited power converter device, 2 ... DC power supply, 3 ... Control device, 4up, 4um, 4vp, 4vm, 4wp, 4wm ... Arm, 5u, 5v, 5w ... Reactor, 6u, 6v, 6w ... Interconnection reactor, 7u, 7v, 7w ... AC system, CL11-CL64 ... cell, Sg ... gate signal.

Claims (5)

A plurality of arms in which a plurality of unit converters are connected in series;
An abnormality-time unit converter stop means for stopping the unit converters so that the number of the unit converters operated by the respective arms is equal when an abnormality occurs in the unit converters. Self-excited power converter. After stopping the unit converter by the abnormal unit converter stop means, control each arm so that the fundamental component of the AC voltage output from each arm becomes the same as before stopping the unit converter. The self-excited power conversion device according to claim 1, further comprising an abnormal time control means. The self-excited power conversion device according to claim 1 or 2, wherein the plurality of arms include the unit converter for ensuring redundancy. A control method of a self-excited power conversion device including a plurality of arms in which a plurality of unit converters are connected in series,
A control method for a self-excited power converter, comprising: stopping the unit converters so that the number of unit converters operated by the arms is equal when an abnormality occurs in the unit converters . After the unit converter is stopped, each arm is controlled so that the fundamental wave component of the AC voltage output from each arm is the same as that before the unit converter is stopped. The control method of the self-excited power conversion device according to claim 4.

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