JP2014033614A - Power conversion apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a power conversion apparatus capable of supplying electric power to respective gate drive circuits without using an individual exclusive power source for each gate drive circuit.SOLUTION: A second interface circuit to a (2m-2)th interface circuit are respectively constituted of bootstrap circuits. Power is supplied from a common power source 39 to a second gate driver through the bootstrap circuit 40, and simultaneously power is supplied from the common power supply 39 to a third gate driver to an m-th gate driver through bootstrap circuits respectively constituting a third interface circuit to an m-th interface circuit. In this invention, the number of diodes to be passed when supplying power to respective gate drivers can be set to one or two independently of a level number m, so that power can be supplied from one common power supply 39 to all the gate drivers.

Description

  The present invention relates to a power conversion device, and more particularly to a power conversion device that realizes a high power density or power integrated circuit of a power converter including a plurality of switches.

  32 to 35 are configuration diagrams of a conventional two-level power conversion circuit. FIG. 32 is a three-phase inverter, FIG. 33 is a single-phase inverter, FIG. 34 is a DC / DC converter, and FIG. 1 shows a power converter. In either case, the DC power supply voltage Vdc is switched to two levels by turning on or off 6 to 4 or 2 semiconductor elements, and a passive filter is connected to the output to thereby provide a three-phase to single-phase AC output or DC output is obtained. For such a two-level power conversion circuit, the increase in power density of the conventional power converter is achieved by reducing its volume, and the method includes (1) reducing the loss of the power conversion device. The volume of the cooling device is reduced, and (2) the switching frequency is increased and the volume of the passive component such as a passive filter including an inductor and a capacitor is reduced (Non-Patent Documents 1 and 2). reference). However, since a two-level power conversion circuit always includes harmonics, a passive filter is indispensable. An increase in switching frequency increases switching loss that occurs during switching of a semiconductor element and increases the cooling device. There is a limit to power density.

  Driving the power conversion device with a high switching frequency causes an induced voltage due to the parasitic inductance of the main circuit wiring and a displacement current due to the parasitic capacitance, leading to increased semiconductor element loss and electromagnetic noise. The electromagnetic noise causes various problems such as malfunction of the gate drive circuit, deterioration of insulation of the motor connected to the power converter, and electric corrosion of the bearing. Therefore, there is a need for a high power density power conversion circuit that simultaneously achieves passive filter removal and semiconductor element loss reduction without increasing the switching frequency.

  Driving the power conversion device with a high switching frequency vibrates the common mode voltage of the power conversion circuit, which adversely affects surrounding equipment. For this reason, a noise suppression filter such as a common mode choke coil or an EMI filter is required.

  In order to realize the removal of the passive filter without increasing the switching frequency, the number m of levels of the multi-level power converter shown in FIGS. 36 to 38 is increased, and the harmonic content of the output voltage of the power converter itself is increased. The method of reducing is mentioned (refer patent document 1). The output voltage harmonic component of the multi-level power converter decreases as the number of levels increases. At 17th level, the overall distortion factor of the output phase voltage is within 5%. At 25th level, the overall distortion factor of the output phase voltage is within 3%. At the 35th level, the output phase voltage is within 2%. This eliminates the need for a passive filter by increasing the number m of levels. However, the number of semiconductor elements of the 17 level power converter is 32 per phase, the number of antiparallel diodes is 32, the number of semiconductor elements of the 25 level power converter is 48 per phase, the number of antiparallel diodes is 48, Since the number of semiconductor elements in a 35-level power converter is 68 per phase and the number of antiparallel diodes is 68, the power converter main circuit and the gate drive circuit connected to the main circuit switch become large-scale, and power conversion It becomes difficult to mount the vessel.

  36 to 38 are representative systems of multilevel power conversion circuits, respectively, FIG. 36 is a three-phase inverter of a diode clamp type multilevel power converter, and FIG. 37 is a three phase of a flying capacitor type multilevel power converter. Inverter, FIG. 38 shows a three-phase inverter of a cascade-connected multilevel power converter. Although each shows a three-phase inverter, it can also be configured and used as a three-phase AC / DC power conversion, single-phase inverter, single-phase AC / DC power conversion, DC / DC converter, AC / AC converter It is.

  The multilevel power conversion circuits shown in FIGS. 36 to 38 require a gate drive circuit for each switching semiconductor element, so that the number of levels increases and the number of gate drive circuits increases. The m-level power conversion circuits shown in FIGS. 36 to 38 require (2m−2) gate drive circuits per phase.

  FIG. 39 is a one-phase configuration diagram of a conventional multilevel power conversion circuit, showing a switch connected in series, a gate driver connected to each switch, and a dedicated power source. Since the potential on the low potential side of each switch connected in series is different for each switch, each dedicated power source needs to be insulated. For this reason, since a transformer or the like is used as the dedicated power source, integration becomes difficult.

  One-chip power ICs and intelligent power modules (IPMs) using LSI technology have been developed and applied in various fields. An integrated two-level power converter including a gate drive circuit using the above technology has been proposed, but a power integrated circuit including an isolated power source for a gate drive circuit that increases in the multi-level power converter has not been proposed.

JP 2007-325480 A

Y. Hayashi, K. Takao, K. Adachi, and H. Ohashi, “Design Consideration for High Output Power Density (OPD) Converter Based on Power-Loss Limit Analysis Method,” in Proc. CD-ROM, EPE, 2005. M. Tsukuda, I. Omura, W Saito, and T. Ogura, “Demonstration of High Output Power Density (30W / cc) Converter using 600V SiC-SBD and Low Impedance Gate Driver,” in Proc. CD-ROM, IPEC Niigata , 2005.

  Since the above-described high power density power conversion device using the two-level power converter increases the switching frequency to reduce the size of the filter, the switching loss generated during switching of the semiconductor element increases. The limit comes to high power density.

  Driving a power converter with a high switching frequency causes induced voltage due to parasitic inductance in the main circuit wiring and displacement current due to parasitic capacitance, and also causes oscillation of the common mode voltage of the power converter circuit, which generates a large amount of electromagnetic noise. . For this reason, a noise suppression filter such as a common mode choke coil or an EMI filter is required, and there is a limit to increasing the power density of the power converter.

  Driving a power conversion device with a high switching frequency generates a large amount of electromagnetic noise, so that high-speed rotation of the motor connected to the power conversion device cannot be realized, and there is a limit to increasing the output density of the motor. .

  It has been proposed to realize a high-density power converter by completely reducing the passive filter without increasing the switching frequency, that is, a technique completely different from the above technique (see Patent Document 1). However, no proposal has been made for increasing the power density of a power conversion device using a multi-level power conversion circuit including an insulated power source of a gate drive circuit or for a power integrated circuit.

  Since a dedicated power source composed of a transformer or the like is required for the insulated power source of the gate drive circuit, a power conversion device using a large number of switches is not realized when the output power capacity of the power conversion device is several tens of kVA or less. In addition, since a dedicated power source composed of a transformer or the like is required for the insulated power source of the gate drive circuit, when the output power capacity of the power converter is several tens kVA or less, the distortion factor of the phase voltage is 10% or less without a passive filter. A power converter is not realized.

  Since a dedicated power source composed of a transformer or the like is required for the insulated power source of the gate drive circuit, if the output power capacity of the power converter is several tens of kVA or less, power conversion that does not affect the surrounding electromagnetic noise without a noise suppression filter The device has not been realized.

  In order to solve such problems, an object of the present invention is to provide a power converter that realizes supply of power to each gate drive circuit without using an individual dedicated power supply for each gate drive circuit.

In order to achieve the above object, a power conversion device according to a first aspect of the present invention is a conversion level comprising (2m-2) switches connected in series, each of which includes a first switch to a (2m-2) switch. A main circuit of several m, a first gate driver to a (2m-2) gate driver connected in a one-to-one correspondence with the first switch to the (2m-2) switch, and the first switch A first interface circuit including at least one power supply terminal connected to the (2m-2) switch and the first gate driver to the (2m-2) gate driver in a one-to-one correspondence. An individual gate drive unit that does not require a dedicated power source composed of a (2m-2) th interface circuit, a common power source comprising a high voltage side terminal and a ground side terminal, and the first gate driver To ~ the second (2m-2) the gate driver, and a signal output unit supplies the signals separately taking insulation.
Here, the first interface circuit includes a single first capacitor having one end connected to one power supply terminal, and the second interface circuit to the (2m-2) th interface circuit each have a single anode power supply. A bootstrap circuit comprising a diode connected to a terminal and a capacitor having one end connected to the cathode of the diode, the mth interface circuit further comprising a cathode, a capacitor and an mth gate of the diode constituting the mth interface circuit; A connection point with the power input terminal of the driver is a power transfer terminal. The individual gate drive unit connects the other end of the first capacitor of the first interface circuit to the ground-side terminal of the shared power supply, and the individual gate drive unit includes the first interface circuit to the m-th interface circuit. One power supply terminal is connected to the high-voltage side terminal of the shared power supply, and the one power supply terminal of each of the (m + 1) th interface circuit to the (2m-2) th interface circuit is connected to the mth interface circuit. By connecting to the power supply transfer terminal, the first gate driver to the (2m-2) th connected from the shared power supply through the first interface circuit to the (2m-2) interface circuit correspondingly. The power supply is separately supplied to the gate driver, and the main circuit and the individual gate drive unit Are connected in two or three in parallel to form each phase of a single-phase or three-phase multilevel power converter, and the shared power supply is connected in two or three in parallel to the main circuit and the individual gate drive unit It is characterized by having a configuration shared with each other.

In order to achieve the above object, according to a second aspect of the present invention, the m-th interface circuit of the second interface circuit to the (2m-2) interface circuit replaces the bootstrap circuit with a signal. It is constituted by a charge pump circuit that switches a semiconductor switch by a switching signal output from a generator to charge a low-voltage side power supply or one capacitor on the other side on a high-voltage side, and has two power supply terminals and the other A power transfer terminal connected to one end of the capacitor and a power input terminal of the m-th gate driver,
The individual gate drive unit connects the one power supply terminal of each of the first interface circuit to the m-th interface circuit to the high-voltage side terminal of the shared power source, and the first capacitor of the first interface circuit And the other power supply terminal of the m-th interface circuit are connected to the ground-side terminal of the shared power supply, and the (m + 1) -th interface circuit to the (2m-2) -th interface circuit By connecting one power supply terminal to the power transfer terminal of the m-th interface circuit, each capacitor of the (m + 1) -th interface circuit to the (2m-2) -th interface circuit is connected to the m-th interface circuit. By charging with the power source output from the other capacitor, the common capacitor is used. A power supply is separately supplied from the power supply to the first gate driver to the (2m-2) gate driver connected correspondingly through the first interface circuit to the (2m-2) interface circuit; The main circuit and the individual gate drive unit are connected in two or three in parallel to form each phase of a single-phase or three-phase multilevel power converter, and the shared power supply is connected in two or three in parallel. In addition, the main circuit and the individual gate drive unit are used in common.

In order to achieve the above object, the third invention provides the second interface circuit to the (m−1) -th of the second interface circuit to the (2m−2) interface circuit in the first invention. The interface circuit further includes a connection point between the power source input terminal of the gate driver connected to the cathode of the diode and the capacitor in the bootstrap circuit in a one-to-one correspondence as a power transfer terminal.
The individual gate drive unit connects the other end of the first capacitor of the first interface circuit to the ground-side terminal of the shared power supply, and the one of each of the first interface circuit to the m-th interface circuit. The power supply terminal is connected to the high-voltage side terminal of the shared power supply, and the power transfer terminal of the kth (where k = 2 to m−1) kth interface circuit is on the (m−1) stage. By connecting to the one power supply terminal of the (k + m−1) th interface circuit, the first power supply correspondingly connected from the shared power supply through the first interface circuit to the (2m−2) interface circuit. A power supply is separately supplied to a gate driver to the (2m-2) th gate driver, and the main circuit and the individual gate drive Are connected in parallel in two or three units to form each phase of a single-phase or three-phase multi-level power converter, and the shared power supply is connected in two or three parallel to the main circuit and the individual gate It is characterized by having a configuration shared by the drive unit.

In order to achieve the above object, according to a fourth aspect of the present invention, there is provided a conversion level number m in which (2m-2) switches including the first switch to the (2m-2) th switch are connected in series. Main circuit, a first gate driver to a (2m-2) gate driver connected to the first switch to the (2m-2) switch in a one-to-one correspondence, and the first switch to A first interface circuit comprising first and second power supply terminals connected to the (2m-2) switch and the first to (2m-2) gate drivers in a one-to-one correspondence. A separate gate drive unit that does not require a dedicated power source composed of the (2m-2) th interface circuit, a common power source comprising a high-voltage side terminal and a ground side terminal, and the first gate driver To 2m-2) the gate driver, a configuration and a signal output unit supplies the signals separately taking insulation.
Here, the first interface circuit is composed of a single first capacitor, and the second interface circuit to the (2m-2) interface circuit are each composed of a charge pump circuit. The individual gate drive unit includes one end of the first capacitor, a first power supply terminal of the first interface circuit, and the charge pump that constitutes the second interface circuit to the (2m-2) interface circuit. A first power supply terminal of the circuit is connected to a high-voltage side terminal of the shared power supply, and the other end of the first capacitor, a second power supply terminal of the first interface circuit, and the second interface circuit. By connecting a second power supply terminal of the charge pump circuit constituting the (2m-2) interface circuit to a ground-side terminal of the shared power supply, the shared power supply connects the first interface circuit to the The first gate driver connected to the second gate circuit through the (2m-2) -th interface circuit to the (second) m-2) A configuration in which power is separately supplied to the gate driver, and the main circuit and the individual gate drive unit are connected in parallel or two in parallel, and each phase of the single-phase or three-phase multi-level power converter And the shared power supply is shared by the main circuit and the individual gate drive unit connected in parallel in two or three in parallel.

In order to achieve the above object, according to a fifth aspect of the present invention, there is provided a conversion level number m in which (2m-2) switches including the first switch to the (2m-2) th switch are connected in series. Main circuit, a first gate driver to a (2m-2) gate driver connected to the first switch to the (2m-2) switch in a one-to-one correspondence, and the first switch to A first interface circuit comprising first and second power supply terminals connected to the (2m-2) switch and the first to (2m-2) gate drivers in a one-to-one correspondence. A single power supply comprising an individual gate drive unit that does not require a dedicated power supply composed of the (2m-2) th interface circuit, a high-voltage side terminal, and a ground-side terminal, a signal generator, and the signal generator From It consists of a semiconductor switch that is switched by a switching signal, and insulates each of the shared circuit part that constitutes a part of the charge pump circuit and the first gate driver to the (2m-2) gate driver with insulation. And a signal output unit for supplying a signal.
Here, the first interface circuit is composed of a single first capacitor having one end connected to the high-voltage side terminal of the shared power supply, and the second interface circuit to the (2m-2) interface circuit are respectively The charge pump circuit is configured together with the shared circuit unit, and is configured from a charge pump partial circuit having first and second power supply terminals and a power transfer terminal. The individual gate drive unit connects the other end of the first capacitor of the first interface circuit to the ground side terminal of the shared power supply, and the second interface circuit to the (2m-2) interface circuit. The first power supply terminal is connected to the shared circuit section, and the second power supply terminal of the j-th (j = 3 to 2m−2) -th j-th interface circuit is connected to the (j− 1) By connecting to the power transfer terminal of the interface circuit, the first gate driver connected to the shared power supply through the first interface circuit to the (2m-2) interface circuit correspondingly (2m-2) The power supply is separately supplied to the gate driver, and the main circuit and the individual gate drive unit are connected in two or three in parallel. And each phase of a single-phase or three-phase multi-level power converter, and the shared power supply is shared by the main circuit and the individual gate drive unit connected in two or three in parallel. It is characterized by that.

In order to achieve the above object, according to a sixth aspect of the present invention, there is provided a conversion level number m in which (2m-2) switches including the first switch to the (2m-2) th switch are connected in series. Main circuit, a first gate driver to a (2m-2) gate driver connected to the first switch to the (2m-2) switch in a one-to-one correspondence, and the first switch to A first interface circuit comprising first and second power supply terminals connected to the (2m-2) switch and the first to (2m-2) gate drivers in a one-to-one correspondence. The individual gate drive unit that does not require a dedicated power source composed of the (2m-2) th interface circuit and the first gate driver to the (2m-2) gate driver are insulated from each other. And a signal output section for supplying a signal s to.
Here, the first interface circuit to the (2m-2) interface circuit in the individual gate drive unit are supplied with power to the high-voltage side terminals of the first switch to the (2m-2) switch provided correspondingly, respectively. The individual gate drive unit is configured by a self-feed circuit connected to an input terminal, and the individual gate drive unit is connected correspondingly through the first interface circuit to the (2m-2) interface circuit without having a common power source. 1 gate driver to the (2m-2) th gate driver is configured to supply power separately, and the main circuit and the individual gate drive unit are connected in two or three in parallel, and a single-phase or three-phase multi-driver Each phase of the level power converter is configured.

  The present invention realizes a power conversion device or a power integrated circuit using the above-described multilevel power converter, thereby avoiding the use of a passive filter and reducing the size of the cooling device by reducing the loss. It is possible to increase the power density of the power conversion device, which was the limit of the above.

  The present invention provides a power conversion device having a phase voltage distortion rate of 10% or less without a passive filter by realizing a power conversion device or a power integrated circuit using the multilevel power converter.

  The present invention provides a power conversion device that does not require a noise suppression filter and has very little electromagnetic noise by realizing the power conversion device or power integrated circuit using the multilevel power converter.

  The present invention eliminates electromagnetic noise due to induced voltage due to parasitic inductance of main circuit wiring and displacement current due to parasitic capacitance by providing the power conversion device or power integrated circuit using the multi-level power converter, and causes malfunction of the gate drive circuit. And a power conversion device that does not cause various problems such as deterioration of insulation of a motor connected to the power conversion device and electrolytic corrosion of a bearing.

  The present invention realizes a high-speed rotation of a motor connected to the conversion device by realizing the power conversion device or the power integrated circuit using the multilevel power converter, and provides a high output density of the motor.

It is a schematic block diagram which shows one phase of the multilevel power converter device of the conversion level number m of this invention. FIG. 2 is a configuration diagram illustrating a single-phase multilevel power conversion device in which two phases of a plurality of series switches and a gate driver unit illustrated in FIG. 1 are arranged in parallel. It is a block diagram which shows the three-phase multi-level power converter device which made three phase switches and the one phase part of the gate driver part shown in FIG. 1 parallel. It is a schematic block diagram of the 1st connection example for one phase of the single phase or three phase multi-level power converter of the present invention. FIG. 5 is a schematic configuration diagram of a main part of the present invention in which the individual gate drive unit shown in FIG. 4 provided with an interface circuit realized by parallel connection of charge pump circuits is applied to a diode clamp type multi-level power converter. FIG. 5 is a schematic configuration diagram of a main part of the present invention in which the individual gate drive unit shown in FIG. 4 provided with an interface circuit realized by parallel connection of charge pump circuits is applied to a flying capacitor type multi-level power converter. It is a schematic block diagram of the 2nd connection example for one phase of the single phase or three phase multi-level power converter of the present invention. It is a schematic block diagram of the principal part of this invention which applied the individual gate drive part shown in FIG. 7 provided with the interface circuit implement | achieved by the parallel connection and series connection of the bootstrap circuit to the diode clamp type multi-level power converter. It is a schematic block diagram of the principal part of this invention which applied the individual gate drive part shown in FIG. 7 provided with the interface circuit implement | achieved by the parallel connection and series connection of the bootstrap circuit to the flying capacitor type | mold multilevel power converter. It is a schematic block diagram of the 3rd connection example for one phase of the single phase of this invention or a three-phase multilevel power converter device. 10 is a schematic configuration diagram of the main part of the present invention in which the individual gate drive unit shown in FIG. 10 provided with an interface circuit realized by a parallel connection of a bootstrap circuit and a charge pump circuit is applied to a diode clamp type multilevel power converter. It is. 10 is a schematic configuration diagram of the main part of the present invention in which the individual gate drive unit shown in FIG. 10 provided with an interface circuit realized by a parallel connection of a bootstrap circuit and a charge pump circuit is applied to a flying capacitor type multi-level power converter. It is. It is a schematic block diagram of the 4th connection example for one phase of the single phase of this invention or a three-phase multilevel power converter device. It is a schematic block diagram of the principal part of this invention which applied the individual gate drive part shown in FIG. 13 provided with the interface circuit implement | achieved by the parallel connection and series connection of the bootstrap circuit in the diode clamp type multilevel power converter. It is a schematic block diagram of the principal part of this invention which applied the individual gate drive part shown in FIG. 13 provided with the interface circuit implement | achieved by the parallel connection and series connection of the bootstrap circuit to the flying capacitor type multilevel power converter. It is a schematic block diagram of the 5th connection example for one phase of the single phase of this invention or a three-phase multilevel power converter device. It is a schematic block diagram of the principal part of this invention which applied the individual gate drive part shown in FIG. 16 provided with the interface circuit implement | achieved by the serial connection of the charge pump circuit to the diode clamp type multilevel power converter. It is a schematic block diagram of the principal part of this invention which applied the separate gate drive part shown in FIG. 16 provided with the interface circuit implement | achieved by the serial connection of the charge pump circuit to the flying capacitor type multilevel power converter. It is a schematic block diagram of the 6th connection example for one phase of the single phase of this invention or a three-phase multilevel power converter device. It is a schematic block diagram of the principal part of this invention which applied the separate gate drive part shown in FIG. 19 provided with the interface circuit implement | achieved by parallel connection of the bootstrap circuit to the diode clamp type | mold multilevel power converter. It is a schematic block diagram of the principal part of this invention which applied the separate gate drive part shown in FIG. 19 provided with the interface circuit implement | achieved by the parallel connection of the bootstrap circuit to the flying capacitor type multilevel power converter. It is a schematic block diagram for one phase of the single phase or three phase multi-level power converter of the present invention. FIG. 23 is a schematic configuration diagram of a main part of the present invention to which the individual gate drive unit shown in FIG. 22 including an interface circuit realized by connecting a self-feed circuit to each gate drive unit of a diode clamp type multi-level power converter is applied. is there. FIG. 23 is a schematic configuration diagram of a main part of the present invention to which the individual gate drive unit shown in FIG. 22 including an interface circuit realized by connecting a self-feed circuit to each gate drive unit of a flying capacitor type multi-level power converter is applied. is there. It is a schematic block diagram of the principal part of the power converter device implement | achieved by connecting a self-feed circuit to each gate drive part of a cascade connection type multi-level power converter. It is a schematic block diagram of the principal part of the power converter which implement | achieves the signal insulation to each gate drive part of a diode clamp type multilevel power converter with a level shift circuit. It is a schematic block diagram of the principal part of the power converter device which implement | achieves the signal insulation to each gate drive part of a flying capacitor type multilevel power converter with a level shift circuit. It is a schematic block diagram of the principal part of the power converter device which implement | achieves the signal insulation to each gate drive part of a cascade connection type multilevel power converter with a level shift circuit. It is a schematic block diagram of the principal part of the power converter device which implement | achieves the signal insulation to each gate drive part of a diode clamp type multilevel power converter by magnetic coupling. It is a schematic block diagram of the principal part of the power converter device which implement | achieves the signal insulation to each gate drive part of a flying capacitor type | mold multilevel power converter by magnetic coupling. It is a schematic block diagram of the principal part of the power converter device which implement | achieves the signal insulation to each gate drive part of a cascade connection type multi-level power converter by magnetic coupling. It is a block diagram of the conventional 2 level 3 phase inverter. It is a block diagram of the conventional 2 level single phase inverter. It is a block diagram of the conventional 2 level DC / DC converter. It is a block diagram of the conventional 2 level 3 phase-3 phase power converter. It is a block diagram of the three-phase inverter of a diode clamp type multilevel power converter circuit. It is a block diagram of the three-phase inverter of a flying capacitor type multilevel power converter circuit. It is a block diagram of the three-phase inverter of a cascade connection type multilevel power converter circuit. It is a block diagram of the prior art example of the gate drive circuit of a multilevel power converter circuit.

  Hereinafter, a multi-level power conversion device using a plurality of switches will be described as an example, but the present invention is not limited to this, and any power conversion that converts DC to AC, AC to DC, DC to DC, and AC to AC The present invention can also be applied to a device, a multiplexed and multi-parallel power conversion device, and a power conversion device combining these.

(Single-phase multi-level power converter)
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. FIG. 1 shows a configuration diagram of an embodiment of a one-phase multilevel power converter that constitutes a main part of the multilevel power converter of the present invention. The one-phase multilevel power converter shown in FIG. 1 includes a main circuit 1 in which (2m−2) switches including a first switch to a (2m−2) switch (main switch) are connected in series, A first gate driver to a (2m-2) gate driver and a first interface circuit to a (2m-2) interface circuit connected to correspond to the 1 switch to the (2m-2) switch, respectively. The individual gate drive unit 2 that does not require a power source, the common power source 3 that supplies power to the individual gate drive unit 2, and insulates each signal from the signal source, from the first gate driver to the (2m−2) th gate driver A signal output unit 4 for transmitting a signal is provided.

  A single-phase multilevel power converter is realized by paralleling two single-phase multilevel power converters having a conversion level number m shown in FIG. Moreover, a three-phase multilevel power converter is realized by paralleling three single-phase multilevel power converters. Moreover, the multi-level power converter which converts from a three-phase alternating current to a three-phase alternating current is realized by arranging six parallel single-level power converters in parallel.

  As shown in FIG. 1, each interface circuit has a power supply terminal. Each interface circuit supplies power to the corresponding gate driver by connecting its power supply terminal to another power supply terminal and a common power supply, as will be described in detail later. Further, these power supply terminals are connected to the main circuit 1 constituted by connecting the first switch to the (2m-2) th switch in series, thereby supplying power to the gate driver. Further, by connecting these power supply terminals to other power supply terminals, the common power supply 3 and the main circuit 1, power is supplied to the gate driver. The shared power supply 3 supplies electric power to the gate driver section through the interface circuit by using 0, 1 or a plurality of less than (2m−2). The main circuit 1 is composed of a series connection of (2m−2) switches including a first switch to a (2m−2) switch, and handles power between input and output of a power conversion device having a conversion level number m. Part.

  The interface circuit is a circuit that includes one or a plurality of power supply terminals, and supplies power to the gate driver from the shared power supply 3 or the main circuit 1 through these connections. Details of the interface circuit will be described later. By applying a bootstrap circuit that is used even at two levels to the interface circuit, power is supplied to the gate driver. Further, by applying a charge pump circuit that is used even at two levels to the interface circuit, power is supplied to the gate driver. Further, by using a bootstrap circuit and a charge pump circuit that are also used at two levels for the interface circuit, power is supplied to the gate driver. In addition, power is supplied to the gate driver by applying a self-feeding method in which power is supplied from the main circuit 1 that is also used at two levels for the interface circuit. In addition, the gate driver is supplied with power by using a self-feeding method and a bootstrap circuit that supply power from the main circuit 1 that is also used at two levels for the interface circuit. In addition, power is supplied to the gate driver by using a self-feeding method and a charge pump circuit that supply power from the main circuit 1 that is also used at two levels for the interface circuit. Further, power is supplied to the gate driver by using a self-feeding method, a bootstrap circuit, and a charge pump circuit that supply power from the main circuit 1 that is also used at two levels for the interface circuit.

  As shown in FIG. 1, the power conversion device of the present invention includes a signal source in the signal output unit 4. The signal output unit 4 connects the signal source and the first to (2m−2) th gate drivers and transmits signal to each gate driver by providing signal insulation therebetween. This signal isolation can be obtained by a level shift circuit, magnetic coupling, or optical isolation (refer to FIGS. 26 to 31 for details).

  The power conversion device of the present invention having the multilevel power converter shown in FIG. 1 is integrated as a whole on a single chip. Also, it is divided into a plurality of chips, integrated, and mounted on a substrate. Also, a part of the power conversion device is integrated, and the integrated part and individual components are combined and mounted on the substrate. These integrations are realized by combining one material or a plurality of materials such as silicon, gallium nitride, silicon carbide, and diamond.

(Single-phase multi-level power converter)
FIG. 2 shows a single-phase multilevel power conversion device in which two multilevel power converters for one phase shown in FIG. 1 are arranged in parallel. As shown in FIG. 2, the single-phase multilevel power conversion apparatus includes main circuits 1 and 5 in which (2m−2) switches including a first switch to a (2m−2) switch are connected in series. , 5 are connected to the respective switches (2m-2), and the individual gate drive units 2 and 6 that do not require a dedicated power source constituted by the gate drivers and interface circuits, and these individual gate drive units 2 and 6 A common power source 3 for supplying power to the power source, and a signal output unit 4 for isolating each signal from the signal source and transmitting the signal to a gate driver connected to each switch of the main circuits 1 and 5 are provided. Individual gate driver units are required for each phase, but since the shared power supply 3 can be shared by the individual gate driver units 2 and 6, two series switches of the main circuits 1 and 5 are connected in parallel, and single-phase multilevel There is no need to increase the number of shared power supplies as a power converter.

(Three-phase multi-level power converter)
FIG. 3 shows a three-phase multi-level power conversion device in which three multi-level power converters for one phase shown in FIG. 1 are arranged in parallel. As shown in FIG. 3, the three-phase multilevel power conversion apparatus includes main circuits 1, 5, and 7, in which (2m−2) switches including a first switch to a (2m−2) switch are connected in series. Individual gate drive units 2, 6, and 8 that do not require a dedicated power source composed of gate drivers and interface circuits connected to the switches of circuits 1, 5, and 7, respectively, and these individual gate drive units 2, 6, and 8 A common power source 3 for supplying power to the power source, and a signal output unit 4 for isolating each signal from the signal source and transmitting the signal to a gate driver connected to each switch. An individual gate driver section is required for each phase, but since the shared power supply 3 can be shared by the gate driver sections 2, 6 and 8, three series switches of the main circuits 1, 5 and 7 are arranged in parallel. It is not necessary to increase the number of shared power supplies as a phase multilevel power converter.

  The present invention is characterized by the configuration of the individual gate drive section of each phase in the single-phase multilevel power conversion device of FIG. 2 or the three-phase multilevel power conversion device of FIG. Hereinafter, each example of power supply to the gate driver in the individual gate drive unit of each phase will be described.

(Example of power supply to the gate driver 1)
FIG. 4 shows a schematic block diagram of a first connection example (power supply example 1 to the gate driver) for one phase of the single-phase or three-phase multilevel power conversion device of the present invention. In FIG. 4, the individual gate drive unit includes a first gate driver to a (2m-2) gate driver connected to the first switch to the (2m-2) switch in a one-to-one correspondence, and the first switch. A first interface circuit connected to the (2m-2) switch and the first gate driver to the (2m-2) gate driver in a one-to-one correspondence to the (2m-2) interface circuit. .

  Here, the first interface circuit to the (2m−2) th interface circuit shown in FIG. 4 each have two power supply terminals. For example, the first interface circuit has power supply terminals 21 and 25. The second interface circuit has power supply terminals 22 and 26, and the (2m−2) interface circuit has power supply terminals 23 and 27. Each of the power supply terminal 21 of the first interface circuit, the power supply terminal 22 of the second interface circuit, the power supply terminal 23 of the (2m-2) interface circuit, and each of the third interface circuit to the (2m-1) interface circuit. The power supply terminal is connected to the ground side terminal 20 of the common power source 19. Further, the power supply terminal 25 of the first interface circuit, the power supply terminal 26 of the second interface circuit, the power supply terminal 27 of the (2m-2) interface circuit, and the third interface circuit to the (2m-1) interface circuit. Each other power supply terminal is connected to the high-voltage side terminal 24 of the common power source 19. As a result, power can be supplied from one shared power supply 19 to all of the first gate driver to the (2m-2) th gate driver via each interface circuit.

  FIG. 5 shows a schematic configuration diagram of a main part of the present invention in which the individual gate drive unit shown in FIG. 4 having an interface circuit realized by parallel connection of charge pump circuits is applied to a diode clamp type multi-level power converter. . The charge pump circuit is a circuit that charges a high-voltage side capacitor from a low-voltage side power supply or a capacitor by switching of an active element provided therein, and is composed of a diode, a capacitor, and a semiconductor switch. In FIG. 5, the second interface circuit connected to the second gate driver includes a charge pump circuit 29 having two power supply terminals. One power supply terminal of the charge pump circuit 29 is connected to the high voltage side terminal of the common power supply 28, and the other power supply terminal is connected to the ground side terminal of the common power supply 28. Similarly, the third interface circuit to the (2m−2) th interface circuit are also constituted by a charge pump circuit connected to the common power supply 28. The first interface circuit connected to the first gate driver is constituted by a single capacitor C. In FIG. 5, one shared power supply 28 (corresponding to the shared power supply 19 in FIG. 4) supplies power to the second gate driver via the charge pump circuit 29, and similarly to the other gate drivers. Supply the power through. As a result, the capacitor from the low voltage side to the high voltage side can be charged without being affected by the potential fluctuation on the low voltage side of each main switch due to switching of the main circuit, and one common power supply 28 can be charged regardless of the operation of the main circuit. Enables power supply to all gate drivers.

  FIG. 6 shows a schematic configuration diagram of a main part of the present invention in which the individual gate drive unit shown in FIG. 4 provided with an interface circuit realized by parallel connection of charge pump circuits is applied to a flying capacitor type multi-level power converter. . The multi-level power converter for one phase shown in FIG. 6 is a flying capacitor type multi-level converter with m conversion levels, the main circuit of which is different from the diode clamp type multi-level power converter with m conversion levels shown in FIG. Since the configuration is a level power converter and the connection of the other individual gate drive units is the same as that of the circuit shown in FIG. 5, the same reference numerals as those in FIG. As a result, the capacitor from the low voltage side to the high voltage side can be charged without being affected by the potential fluctuation on the low voltage side of each main switch due to switching of the main circuit, and one common power supply 28 can be charged regardless of the operation of the main circuit. It is possible to supply power to all gate drivers.

(Example of power supply to the gate driver 2)
FIG. 7 is a schematic block diagram showing a second connection example (power supply example 2 to the gate driver) for one phase of the single-phase or three-phase multilevel power conversion device of the present invention. In FIG. 7, the individual gate drive unit includes a first gate driver to a (2m−2) gate driver connected in a one-to-one correspondence with the first switch to the (2m−2) switch, and the first switch. A first interface circuit to a (2m-2) interface circuit connected to the (2m-2) switch and the first gate driver to the (2m-2) gate driver in a one-to-one correspondence. Have.

  Here, the first interface circuit shown in FIG. 7 has two power supply terminals 32 and 34, and the remaining second to (2m-2) th interface circuits have at least one power supply terminal. Yes. Further, the m-th interface circuit has one power transfer terminal. For example, the second interface circuit has a power supply terminal 35, the m-th interface circuit has a power supply terminal 36 and a power transfer terminal 37, and the (2m−2) interface circuit has a power supply terminal 38. The power supply terminal 32 of the first interface circuit is connected to the ground side terminal 31 of the common power supply 30. The power supply terminal 34 of the first interface circuit, the power supply terminal 35 of the second interface circuit, and the power supply terminal 36 of the m-th interface circuit are connected in parallel to the high-voltage side terminal 33 of the common power supply 30.

  Further, the power transfer terminal 37 of the mth interface circuit is connected in parallel to the power supply terminals of the interface circuits from the (m + 1) th interface circuit to the (2m-2) th interface circuit. The m-th interface circuit outputs the power from the common power supply 30 supplied to the power supply terminal 36 from the power transfer terminal 37 of the m-th interface circuit, and outputs the (m + 1) th interface circuit to the (2m-2) -th interface circuit. Each is input to the power supply terminal 38. Accordingly, it is possible to supply power from one shared power supply 30 to all of the first gate driver to the (2m-2) th gate driver via each interface circuit.

  FIG. 8 shows a schematic configuration diagram of a main part of the present invention in which the individual gate drive unit shown in FIG. 7 provided with an interface circuit realized by a bootstrap circuit is applied to a diode clamp type multilevel power converter. In FIG. 8, the second interface circuit connected to the second gate driver includes a bootstrap circuit 40 including a diode and a capacitor. Similarly, the third interface circuit to the (2m-2) th interface circuit are also configured by bootstrap circuits. The first interface circuit connected to the first gate driver is constituted by a single capacitor C. In FIG. 8, power is supplied from one shared power source 39 (corresponding to the shared power source 30 in FIG. 7) to the second gate driver via the bootstrap circuit 40, and similarly from the third gate driver to the m-th gate driver. Power is supplied from the common power supply 39 via bootstrap circuits that constitute the third to m-th interface circuits.

  Further, the m-th interface circuit charges the capacitor 42 with the power supply voltage supplied from the common power supply 39 to the anode of the diode in the bootstrap circuit 41 which is a power supply terminal, and the cathode and capacitor of the diode in the bootstrap circuit 41. The power is output using the connection point between 42 and the high-voltage power supply input terminal of the m-th gate driver as a power transfer terminal. The mth interface circuit supplies the output power to the (m + 1) th gate driver to the (2m-2) th gate driver via the bootstrap circuit of the (m + 1) th interface circuit to the (2m-2) th interface circuit. Thus, the number of diodes that pass when supplying power to each gate driver can be one or two regardless of the number of levels m, and power is supplied from one shared power supply 39 to all gate drivers. Enable.

  FIG. 9 is a schematic configuration diagram of the main part of the present invention in which the individual gate drive unit shown in FIG. 7 having an interface circuit realized by a bootstrap circuit is applied to a flying capacitor type multi-level power converter. The multi-level power converter for one phase shown in FIG. 9 is a flying capacitor with a conversion level number m, whose main circuit is different from the operation of the diode clamp type multi-level power converter with conversion level number m shown in FIG. The multi-level power converter is the same as the multi-level converter shown in FIG. 8 because the connection of the other individual gate drive units is the same as that of the multi-level converter shown in FIG. To do. Thus, the number of diodes that pass when supplying power to each gate driver can be one or two regardless of the number of levels m, and power is supplied from one shared power supply 39 to all gate drivers. Enable.

(Example 3 of power supply to the gate driver)
FIG. 10 shows a schematic block diagram of a third connection example (example 3 of power supply to the gate driver) for one phase of the single-phase or three-phase multilevel power conversion device of the present invention. In FIG. 10, the individual gate drive unit includes a first switch to a (2m−2) gate driver connected to the first switch to the (2m−2) switch in a one-to-one correspondence, and the first switch. A first interface circuit to a (2m-2) interface circuit connected to the (2m-2) switch and the first gate driver to the (2m-2) gate driver in a one-to-one correspondence. Have. Here, the first interface circuit shown in FIG. 10 has two power supply terminals 45 and 48, and the second interface circuit to the (m-1) th interface circuit and the (m + 1) th interface circuit to the (2m-2). The interface circuit has at least one power supply terminal, and the m-th interface circuit has two power supply terminals 46 and 50 and one power transfer terminal 51. The second interface circuit has a power supply terminal 49, and the (2m−2) interface circuit has a power supply terminal 52.

  The power supply terminal 45 of the first interface circuit and the power supply terminal 46 of the mth interface circuit are connected to the ground side terminal 44 of the common power supply 43, and the power supply terminal 48 of the first interface circuit and the power supply of the second interface circuit. The terminal 49, the power supply terminal 50 of the mth interface circuit, and the power supply terminals of the third interface circuit to the (m−1) th interface circuit are connected to the high voltage side terminal 47 of the common power supply 43. Further, the power transfer terminal 51 of the m-th interface circuit and the power supply terminals of the interface circuits from the (m + 1) -th interface circuit to the (2m-2) -th interface circuit are connected to each other. The power supply voltage input between the power supply terminals 50 and 46 is output from the power transfer terminal 51 of the mth interface circuit and input to the power supply terminals of the (m + 1) th interface circuit to the (2m-2) th interface circuit. To do. Accordingly, it is possible to supply power from one shared power supply 43 to all of the first gate driver to the (2m-2) th gate driver via each interface circuit.

  FIG. 11 shows a main part of the present invention in which the individual gate drive unit shown in FIG. 10 having an interface circuit realized by a parallel connection of a bootstrap circuit and a charge pump circuit is applied to a diode clamp type multi-level power converter. The schematic block diagram of is shown. In FIG. 11, one shared power supply 53 (corresponding to the shared power supply 43 in FIG. 10) supplies power to the first gate driver via the first interface circuit made up of a single capacitor C, and the bootstrap circuit 54. A power supply is supplied to the second gate driver via the first and second bootstrap circuits that respectively constitute the third interface circuit to the (m−1) th interface circuit from the third gate driver to the (m−1) th gate driver. Supply power through. The charge pump circuit 55 constituting the m-th interface circuit includes two power supply terminals respectively connected to the high-voltage side terminal and the ground-side terminal of the common power source 53, one end of the capacitor 56, the cathode of the diode, the m-th interface. It has one power transfer terminal which is a connection point with the high voltage side power input terminal of the gate driver. The common power supply 53 supplies power to the m-th gate driver through the charge pump circuit 55 independently of the switching of the main circuit. Further, from the (m + 1) th to the (2m-2) th gate driver, the (m + 1) th interface circuit from one end (terminal for power transfer) of the capacitor 56 in the charge pump circuit 55 connected to the mth gate driver to Power is supplied through bootstrap circuits that constitute the (2m-2) -th interface circuit.

  Accordingly, in the multi-level power converter for one phase shown in FIG. 11, the charge pump circuit 55 constituting the m-th interface circuit has three diodes inside, and the second to (2m−2) th Since the bootstrap circuit constituting each interface circuit has one diode inside, the number of diodes that pass when supplying power to each of the 2m-2 gate drivers is one regardless of the number of levels m. Or it can be three. Furthermore, power can be stably supplied to the m-th to (2m-2) gate drivers, and the first gate driver can be supplied from one shared power supply 53 via the first interface circuit to the (2m-2) -th interface circuit. The power can be supplied to all of the (2m-2) th gate drivers.

  FIG. 12 shows a schematic configuration of the main part of the present invention in which the individual gate drive unit shown in FIG. 10 provided with an interface circuit realized by the combined use of a bootstrap circuit and a charge pump circuit is applied to a flying capacitor type multilevel power converter. The figure is shown. 12, the same components as those in FIG. 11 are denoted by the same reference numerals, and the description thereof is omitted. The multi-level power converter for one phase shown in FIG. 12 is different in that the main circuit is a diode clamp type in the multi-level power converter circuit shown in FIG. 11 but a flying capacitor type. The parts are the same as in FIG. Therefore, similarly to the multilevel power converter shown in FIG. 11, the multilevel power converter shown in FIG. 12 sets the number of diodes that pass when supplying power to each gate driver to 1 regardless of the number of levels m. The charge can be stably supplied from the m-th gate driver to the (2m-2) th gate driver, and the first interface circuit to the (2m-th) can be supplied from one shared power supply 53. 2) It is possible to supply power to all of the first gate driver to the (2m-2) th gate driver via the interface circuit.

(Example 4 of power supply to gate driver)
FIG. 13 shows a schematic block diagram of a fourth connection example (example 4 of power supply to the gate driver) for one phase of the single-phase or three-phase multilevel power conversion device of the present invention. In FIG. 13, the individual gate drive unit includes a first switch to a (2m-2) gate driver connected to the first switch to the (2m-2) switch in a one-to-one correspondence, and the first switch. A first interface circuit to a (2m-2) interface circuit connected to the (2m-2) switch and the first gate driver to the (2m-2) gate driver in a one-to-one correspondence. Have. Here, the first interface circuit shown in FIG. 13 has two power supply terminals 59 and 61, and the second to (m-1) th interface circuits each have a power supply terminal and a power transfer terminal. The m-th interface circuit to the (2m-2) -th interface circuit have at least one power supply terminal.

  The power supply terminal 59 of the first interface circuit is connected to the ground side terminal 58 of the common power supply 57, the power supply terminal 61 of the first interface circuit, the power supply terminal 62 of the second interface circuit, and the power supply terminal of the mth interface circuit. The power supply terminals 63 and the third interface circuit to the (m−1) th interface circuit are connected to the high-voltage side terminal 60 of the common power source 57. Further, the power transfer terminals of the (m−1) th interface circuit from the second interface circuit are respectively connected to the power supply terminals of the (m + 1) th interface circuit to the (2m−2) th interface circuit on the (m−1) stage. Connected separately.

  Thus, power is supplied from one shared power source 57 to the first gate driver to the m-th gate driver through the first interface circuit to the m-th interface circuit. The power supplied from the common power source 57 to each of the second interface circuit to the (m−1) th interface circuit is output from the power transfer terminal of each interface circuit, and the (m−1) th stage on the (m−1) th stage. Since it is supplied to the (m + 1) interface circuit to the (2m-2) interface circuit, the (m + 1) gate driver to the (2m-2) gate through the (m + 1) interface circuit to the (2m-2) interface circuit. Power is supplied from the common power source 57 to the driver. In this way, it is possible to supply power from one shared power supply 57 to all of the first gate driver to the (2m-2) th gate driver via each interface circuit.

  FIG. 14 shows a schematic configuration diagram of a main part of the present invention in which the individual gate drive unit shown in FIG. 13 including an interface circuit realized by a bootstrap circuit is applied to a diode clamp type multilevel power converter. In FIG. 14, one shared power supply 64 (corresponding to the shared power supply 57 in FIG. 13) supplies power to the first gate driver via the first interface circuit composed of a single capacitor C, and the bootstrap circuit 65. The power is supplied to the second gate driver via the second gate driver, and similarly, the power is supplied from the third gate driver to the m-th gate driver via the bootstrap circuits constituting the third to m-th interface circuits.

  In addition, each connection point between a capacitor such as capacitors 66 and 67 and a cathode of a diode in the bootstrap circuit constituting each of the second interface circuit to the (m−1) th interface circuit is a power transfer terminal. The power input to each bootstrap circuit is transferred and supplied from the power transfer terminal to each bootstrap circuit of the (m + 1) -th to (2m-2) -th interface circuits on the (m−1) -th stage. The Thus, the number of diodes that pass when supplying power to each gate driver can be one or two irrespective of the number m of levels, and the first interface circuit to the second (2m) can be obtained from one shared power supply 64. -2) It is possible to supply power to all the gate drivers via the interface circuit.

  FIG. 15 shows a schematic configuration diagram of a main part of the present invention in which the individual gate drive unit shown in FIG. 13 having an interface circuit realized by a bootstrap circuit is applied to a flying capacitor type multi-level power converter. The multi-level power converter for one phase shown in FIG. 15 is different from the diode-clamped multi-level power converter with the number m of conversion levels shown in FIG. Since the configuration is a level power converter and the connection of the other individual gate drive units is the same as that of the circuit shown in FIG. 14, the same reference numerals as those in FIG. As a result, the number of diodes that pass when supplying power to each gate driver can be one or two regardless of the level number m, and power is supplied from one shared power supply 64 to all gate drivers. Can be made possible.

(Example 5 of power supply to gate driver)
FIG. 16 shows a schematic block diagram of a connection example (Example 5 of power supply to the gate driver) for one phase of the single-phase or three-phase multilevel power conversion device of the present invention. In FIG. 16, the individual gate drive unit includes a first gate driver to a (2m-2) gate driver connected in a one-to-one correspondence with the first switch to the (2m-2) switch, and the first switch. A first interface circuit to a (2m-2) interface circuit connected to the (2m-2) switch and the first gate driver to the (2m-2) gate driver in a one-to-one correspondence. Have. Here, the first interface circuit shown in FIG. 16 has two power supply terminals 70 and 75, and each of the second interface circuit to the (2m-1) th interface circuit outputs two power supply terminals and power 1 respectively. The (2m-2) -th interface circuit has at least two power supply terminals.

  The common power source 68 includes three terminals 69, 71 and 74. 74 is a high-voltage side terminal of the power source, 69 is a ground-side terminal of the power source, and 71 is a control terminal connected to the high-voltage side of the switching element that controls charging / discharging in the interface circuit. The low voltage side of the switching element has a common potential with the ground side terminal 69. Each interface circuit from the power supply terminal 72 of the second interface circuit to the power supply terminal 73 of the (2m-2) th interface circuit is connected to the power supply terminal 70 of the first interface circuit and the ground side terminal 69 of the common power supply 68. Are connected to the control terminal 71 of the common power source 68. Further, the power supply terminal 75 of the first interface circuit, the other power supply terminal 76 of the second interface circuit, and the high voltage side terminal 74 of the common power supply 68 are connected. Further, from the second interface circuit to the (2m−2) th interface circuit, the power transfer terminal of the lower interface circuit is connected to the other power supply terminal of the upper interface circuit among the adjacent upper and lower two stage interface circuits. Connect to.

  As a result, power is supplied from one shared power supply 68 to the first gate driver and the second gate driver through the first interface circuit and the second interface circuit separately. In the (2m-2) -th interface circuit from the second interface circuit, the power supplied from the common power source 68 to the second interface circuit is successively supplied to the upper interface circuit, and the third interface circuit to the second interface circuit The power from the common power supply 68 is supplied to the third gate driver to the (2m-2) th gate driver through the (2m-2) interface circuit. In this way, it is possible to supply power from one shared power supply 68 to all the gate drivers via each interface circuit.

  FIG. 17 shows a schematic configuration diagram of a main part of the present invention in which the individual gate drive unit shown in FIG. 16 provided with an interface circuit realized by a charge pump circuit is applied to a diode clamp type multi-level power converter. In FIG. 17, one shared power supply 78 (corresponding to the shared power supply 68 in FIG. 16) supplies power to the first gate driver via the first interface circuit composed of a single capacitor C, and the second interface circuit. 79, power is supplied to the second gate driver through 79, and power is similarly supplied from the third gate driver to the (2m-2) gate driver via the third interface circuit to the (2m-2) interface circuit. To do. The second interface circuit to the (2m-2) th interface circuit constitute a charge pump circuit by using the semiconductor switch 80 and the signal generator 81 installed together with the shared power supply 78 inside the shared power supply unit 77. It consists of a charge pump partial circuit.

  A predetermined terminal (corresponding to the control terminal 71 in FIG. 16) of the semiconductor switch 80 switched by a signal from the signal generator 81 is connected to the gate of the semiconductor switch in the second interface circuit to the (2m-2) interface circuit. Are respectively connected to the cathodes of the diodes (corresponding to the power supply terminal 72 and the like in FIG. 16). As a result, in the multilevel power conversion device shown in FIG. 17, the first interface circuit to the (2m-2) th interface circuit do not require a signal generator, the configuration of each interface circuit is simplified, and one shared power supply Power can be supplied from 78 to all gate drivers. Note that the anode of the diode D whose anode is connected to the positive terminal (corresponding to the high-voltage terminal 74 in FIG. 16) of the common power supply 78 in the second interface circuit 79 corresponds to the power supply terminal 76 in FIG. The cathode of the diode D corresponds to the power transfer terminal shown in FIG.

  FIG. 18 is a schematic configuration diagram of a main part of the present invention in which the individual gate drive unit shown in FIG. 16 having an interface circuit realized by a charge pump circuit is applied to a flying capacitor type multi-level power converter. The multi-level power converter for one phase shown in FIG. 18 is different from the configuration of the diode-clamped multi-level power converter with the number of conversion levels m shown in FIG. Since the configuration is a level power converter and the connection of the other individual gate drive units is the same as that of the circuit shown in FIG. 17, the same reference numerals as those in FIG. As a result, the multilevel converter shown in FIG. 18 does not require a signal generator in the interface circuit independently from the switching of the main circuit, and the configuration of each interface circuit is simplified. It is possible to supply power to the gate driver.

(Example 6 of power supply to gate driver)
FIG. 19 shows a schematic block diagram of a sixth connection example (example 6 of power supply to the gate driver) for one phase of the single-phase or three-phase multilevel power conversion device of the present invention. In FIG. 19, the individual gate drive unit includes a first switch to a (2m−2) gate driver connected to the first switch to the (2m−2) switch in a one-to-one correspondence, and the first switch. A first interface circuit to a (2m-2) interface circuit connected to the (2m-2) switch and the first gate driver to the (2m-2) gate driver in a one-to-one correspondence. Have. Here, the first interface circuit shown in FIG. 19 has two power supply terminals 85 and 87, and the mth interface circuit has two power supply terminals 91 and 93. Each of the second interface circuit to the (m−1) th interface circuit and the (m + 1) th interface circuit to the (2m−2) th interface circuit has at least one power supply terminal. Two shared power supplies 82 and 83 are provided.

  The power supply terminal 85 of the first interface circuit and the ground side terminal 84 of the common power supply 82 are connected, the power supply terminal 87 of the first interface circuit, the power supply terminal 88 of the second interface circuit, and the (m−1) th interface circuit. Each of the power supply terminals from the first interface circuit to the (m−1) th interface circuit such as the power supply terminal 89 is connected to the high-voltage side terminal 86 of the common power supply 82. Further, the power supply terminal 91 of the mth interface circuit and the ground side terminal 90 of the common power supply 83 are connected, and the power supply terminal 93 of the mth interface circuit and the (2m−2) th interface circuit from the (m + 1) th interface circuit. The power supply terminals up to and the high voltage side terminal 92 of the common power supply 83 are connected. As a result, power is supplied from the shared power supply 82 to the first gate driver to the (m−1) th gate driver separately through the first interface circuit to the (m−1) th interface circuit, and the shared power supply 83 supplies the mth Power is supplied to the m-th gate driver to the (2m-2) gate driver through the interface circuit to the (2m-2) -th interface circuit separately.

  FIG. 20 shows a schematic configuration diagram of a main part of the present invention in which the individual gate drive unit shown in FIG. 19 including an interface circuit realized by parallel connection of bootstrap circuits is applied to a diode clamp type multilevel power converter. . In FIG. 20, power is supplied from the shared power supply 95 to the first gate driver via the first interface circuit made up of a single capacitor C1, and the bootstrap circuit constituting the second interface circuit from the shared power supply 95. Power is supplied to the second gate driver via 96. Similarly, power is supplied to the third gate driver to the (m−1) th gate driver via a bootstrap circuit constituting the third interface circuit to the (m−1) th interface circuit. Further, power is supplied from the common power source 97 to the m-th gate driver via the m-th interface circuit composed of a single capacitor C2, and from the common power source 97 to the (m + 1) th interface circuit to the (2m-2) th. ) Power is supplied to the (m + 1) -th gate driver to the (2m-2) -th gate driver through bootstrap circuits constituting the interface circuits. As a result, one diode can be passed through when supplying power to the gate driver regardless of the number m of levels, and power can be supplied from the two shared power supplies 95 and 97 to all gate drivers. be able to.

  FIG. 21 is a schematic configuration diagram in which the individual gate drive unit shown in FIG. 19 including an interface circuit realized by a bootstrap circuit is applied to a flying capacitor type multilevel power converter. The multi-level power converter for one phase shown in FIG. 21 is different from the configuration of the diode clamp type multi-level power converter with a main circuit of m conversion levels shown in FIG. The configuration is a level power converter, and the connection of the other individual gate drive units is the same as that of the multi-level power converter shown in FIG. 20, and therefore the same reference numerals as those in FIG. As a result, one diode can be passed through when supplying power to the gate driver regardless of the number m of levels, and power can be supplied from the two shared power supplies 95 and 97 to all gate drivers. be able to.

(Example 7 of power supply to gate driver)
FIG. 22 is a schematic block diagram of a seventh connection example (example 7 of power supply to the gate driver) with the shared power supply of the individual gate drive unit of each phase of the single-phase or three-phase multilevel power conversion device of the present invention. Show. In FIG. 22, the individual gate drive unit includes a first switch to a (2m-2) gate driver connected to the first switch to the (2m-2) switch in a one-to-one correspondence, and the first switch. A first interface circuit to a (2m-2) interface circuit connected to the (2m-2) switch and the first gate driver to the (2m-2) gate driver in a one-to-one correspondence. Have. Here, the multilevel power converter shown in FIG. 22 connects the power supply terminal of each interface circuit to the high voltage side of each corresponding switch constituting the main circuit, thereby supplying power to the gate driver without a common power supply. It is the structure which supplies. The power supply terminal 98 of the first interface circuit is connected to the high voltage side 99 of the first switch, the power supply terminal 100 of the second interface circuit is connected to the high voltage side 101 of the second switch, and so on. The power supply terminals of the circuit to the (2m-2) th interface circuit are respectively connected to the high voltage side of the corresponding third switch to (2m-2) switch. Reference numeral 102 denotes a power supply terminal of the (2m-2) interface circuit, and 103 denotes a high voltage side terminal of the (2m-2) switch. Thereby, it is possible to supply power to all the gate drivers via each interface circuit without using a common power source.

  FIG. 23 shows a book in which the individual gate drive unit shown in FIG. 22 is applied to a diode clamp type multi-level power converter including an interface circuit realized by a self-feed circuit composed of a diode, a Zener diode, a capacitor, and a semiconductor switch. The schematic block diagram of the principal part of invention is shown. A self-feeding circuit is a circuit that charges an internal capacitor without using a dedicated power source and supplies power to a gate driver due to potential fluctuations accompanying switching of a semiconductor switch of a main circuit. In FIG. 23, the high-voltage side 104 of the semiconductor switch as the first switch is connected to the power input terminal of the self-feed circuit 105 as the first interface circuit, and all the corresponding high-voltage sides of all the semiconductor switches are connected in the same manner. Connects to the power supply input terminal of the self-feeding circuit constituting the interface circuit. As a result, it is possible to supply power to all the gate drivers by using switching of the semiconductor switch of the main circuit without using a common power supply.

  FIG. 24 shows a book in which the individual gate drive unit shown in FIG. 22 including an interface circuit realized by a self-feed circuit composed of a diode, a Zener diode, a capacitor, and a semiconductor switch is applied to a flying capacitor type multi-level power converter. The schematic block diagram of invention is shown. The multi-level power converter for one phase shown in FIG. 24 is different from the configuration of the diode-clamped multi-level power converter with the number of conversion levels m shown in FIG. Since the configuration is a level power converter and the connection of the other individual gate drive units is the same as that of the multi-level power converter shown in FIG. 23, the same reference numerals as those in FIG. As a result, the multilevel power converter of FIG. 24 uses the switching of the semiconductor switch of the main circuit similarly to the multilevel power converter of FIG. 23 to supply power to all gate drivers without using a shared power supply. Can be possible.

  FIG. 25 shows a book in which the individual gate drive unit shown in FIG. 22 is provided with an interface circuit realized by a self-feed circuit composed of a diode, a Zener diode, a capacitor, and a semiconductor switch, in a cascade-connected multilevel power converter. The schematic block diagram of the principal part of invention is shown. A cascade connection type multilevel power converter is a multilevel power conversion circuit realized by connecting output terminals of a single-phase full-bridge circuit composed of two phases in series. The high-voltage side 104 of the semiconductor switch and the self-feed circuit 105 are connected, and the high-voltage side of all the semiconductor switches and the self-feed circuit are connected in the same manner. As a result, it is possible to supply power to all the gate drivers by using switching of the semiconductor switch of the main circuit without using a common power supply.

(Signal insulation example 1)
FIG. 26 shows an application example in which the main circuit 1 in the multilevel power converter shown in FIG. 1 is a diode clamp type multilevel circuit. At this time, as shown in FIG. 26, the signal output from the signal source 106 with a common potential is insulated by the level shift circuit, thereby enabling switching by each gate driver.

  FIG. 27 shows an application example in which the main circuit 1 in the multilevel power converter shown in FIG. 1 is a flying capacitor type multilevel circuit. At this time, as shown in FIG. 27, the signal output from the signal source 106 with a common potential is insulated by the level shift circuit, thereby enabling switching by each gate driver.

  FIG. 28 shows an application example in which the main circuit 1 in the multilevel power converter shown in FIG. 1 is a cascade connection type multilevel circuit. At this time, as shown in FIG. 28, the signal output from the signal source 106 with a common potential is insulated by the level shift circuit, thereby enabling switching by each gate driver.

(Signal insulation example 2)
FIG. 29 shows an application example in which the main circuit 1 in the multilevel power converter shown in FIG. 1 is a diode clamp type multilevel circuit. At this time, as shown in FIG. 29, the signals output from the signal source 106 at a common potential are insulated by magnetic coupling, thereby enabling switching by each gate driver.

  FIG. 30 shows an application example in which the main circuit 1 in the multilevel power converter shown in FIG. 1 is a flying capacitor type multilevel circuit. At this time, as shown in FIG. 30, the signals output from the signal source 106 with a common potential are insulated by magnetic coupling, thereby enabling switching by each gate driver.

  FIG. 31 shows an application example in which the main circuit 1 in the multilevel power converter shown in FIG. 1 is a cascade connection type multilevel circuit. At this time, as shown in FIG. 28, the signals output from the signal source 106 at a common potential are each insulated by magnetic coupling, thereby enabling switching by each gate driver.

1 Series connection (main circuit)
2 Individual gate drive unit 3, 9, 16, 19, 28, 30, 39, 43, 53, 57, 64, 68, 78, 82, 83, 95, 97 Shared power supply 4 Signal output unit 10, 13-15, 21-23, 25-27, 32, 34-38, 45, 46, 48-52, 59, 61-63, 70, 72, 73, 75, 76, 85, 87-89, 91, 93, 94, 98, 100, 102 Power supply terminal 11, 20, 31, 44, 58, 69, 71, 84, 90 Ground side terminal 12, 24, 33, 47, 60, 74, 86, 92 High voltage side terminal 17 Diode 18, 66, 67 Capacitors 29, 55, 79 Charge pump circuits 40, 54, 65, 96 Bootstrap circuit 80 Semiconductor switch 81 Signal generator 105 Self-feeding circuit 106 Signal source

Claims (8)

A main circuit having m conversion levels, which is configured by connecting in series (2m-2) switches including a first switch to a (2m-2) switch;
A first gate driver to a (2m-2) gate driver connected to the first switch to the (2m-2) switch in a one-to-one correspondence, and the first switch to the (2m-2) ) A first interface circuit having at least one power supply terminal connected to the switch and the first gate driver to the (2m-2) gate driver in a one-to-one correspondence to the (2m-2) interface. An individual gate drive unit that does not require a dedicated power source composed of a circuit,
One common power source comprising a high-voltage side terminal and a ground-side terminal;
A signal output unit for supplying signals separately to each of the first gate driver to the (2m-2) gate driver;
The first interface circuit includes a single first capacitor having one end connected to one power supply terminal, and each of the second interface circuit to the (2m-2) interface circuit has an anode connected to one power supply terminal. And a capacitor having one end connected to the cathode of the diode, and the mth interface circuit further includes a diode cathode and a capacitor constituting the mth interface circuit, and a power supply for the mth gate driver. The connection point with the input terminal is the power transfer terminal.
The individual gate drive unit is
The other end of the first capacitor of the first interface circuit is connected to the ground side terminal of the shared power supply, and the one power supply terminal of each of the first interface circuit to the mth interface circuit is connected to the shared power supply. The one power supply terminal of each of the (m + 1) -th interface circuit to the (2m-2) -th interface circuit is connected to the power transfer terminal of the m-th interface circuit. Accordingly, power is separately supplied from the shared power supply to the first gate driver to the (2m-2) gate driver connected correspondingly through the first interface circuit to the (2m-2) interface circuit. Configuration,
The main circuit and the individual gate drive unit are connected in two or three in parallel to form each phase of a single-phase or three-phase multilevel power converter, and the shared power supply is connected in two or three in parallel. In addition, the power converter is configured to be shared by the main circuit and the individual gate drive unit. Of the second interface circuit to the (2m−2) th interface circuit, the mth interface circuit switches the semiconductor switch by a switching signal output from a signal generator instead of the bootstrap circuit, and reduces the voltage. A power pump on one side or a charge pump circuit for charging the other capacitor on the high voltage side from one capacitor, and two power supply terminals, one end of the other capacitor, and a power input terminal of the m-th gate driver. A power supply transfer terminal connected to
The individual gate drive unit is
The one power supply terminal of each of the first interface circuit to the m-th interface circuit is connected to the high-voltage side terminal of the common power source, and the other end of the first capacitor of the first interface circuit and the m-th interface circuit. Another power supply terminal of the interface circuit is connected to the ground side terminal of the shared power supply, and the one power supply terminal of each of the (m + 1) -th interface circuit to the (2m-2) -th interface circuit is By connecting to the power transfer terminal of the mth interface circuit, each capacitor of the (m + 1) th interface circuit to the (2m-2) th interface circuit is output from the other capacitor of the mth interface circuit. The first power supply from the shared power supply by charging with a separate power supply. Over scan circuits - said first (2m-2) is correspondingly connected to said first gate driver and said second (2m-2) separately supplies constituting the power supply to the gate driver through the interface circuit,
The main circuit and the individual gate drive unit are connected in two or three in parallel to form each phase of a single-phase or three-phase multilevel power converter, and the shared power supply is connected in two or three in parallel. The power converter according to claim 1, wherein the main circuit and the individual gate drive unit are used in common. Among the second interface circuit to the (2m-2) interface circuit, the second interface circuit to the (m-1) interface circuit are in one-to-one correspondence with the cathode and the capacitor of the diode in the bootstrap circuit. The configuration further includes a connection point with the power input terminal of the gate driver connected correspondingly as a power transfer terminal,
The individual gate drive unit is
The other end of the first capacitor of the first interface circuit is connected to the ground side terminal of the shared power supply, and the one power supply terminal of each of the first interface circuit to the mth interface circuit is connected to the shared power supply. And the power transfer terminal of the k-th (k = 2 to m−1) -th k-th interface circuit is connected to the high-voltage side terminal of the (m−1) -th (k + m−1) -th interface. By connecting to the one power supply terminal of the circuit, the first gate driver to the (2m) connected correspondingly from the shared power supply through the first interface circuit to the (2m-2) interface circuit. -2) The power supply is separately supplied to the gate driver.
The main circuit and the individual gate drive unit are connected in two or three in parallel to form each phase of a single-phase or three-phase multilevel power converter, and the shared power supply is connected in two or three in parallel. The power converter according to claim 1, wherein the main circuit and the individual gate drive unit are used in common. A main circuit having m conversion levels, which is configured by connecting in series (2m-2) switches including a first switch to a (2m-2) switch;
A first gate driver to a (2m-2) gate driver connected to the first switch to the (2m-2) switch in a one-to-one correspondence, and the first switch to the (2m-2) ) The first interface circuit having the first and second power supply terminals connected to the switch and the first gate driver to the (2m-2) gate driver in a one-to-one correspondence with each other. 2) An individual gate drive unit that does not require a dedicated power source composed of an interface circuit;
One common power source comprising a high-voltage side terminal and a ground-side terminal;
A signal output unit for supplying signals separately to each of the first gate driver to the (2m-2) gate driver;
The first interface circuit is composed of a single first capacitor, and the second interface circuit to the (2m-2) interface circuit are each composed of a charge pump circuit,
The individual gate drive unit is
One end of the first capacitor, a first power supply terminal of the first interface circuit, a first power supply terminal of the charge pump circuit constituting the second interface circuit to the (2m-2) interface circuit, Are connected to the high-voltage side terminal of the common power source, and the other end of the first capacitor, the second power supply terminal of the first interface circuit, and the second interface circuit to the (2m-2) interface. By connecting a second power supply terminal of the charge pump circuit constituting the circuit to a ground side terminal of the shared power supply, the shared power supply passes through the first interface circuit to the (2m-2) interface circuit. Separately supply power to the first to (2m-2) gate drivers connected correspondingly Is configured to supply
The main circuit and the individual gate drive unit are connected in two or three in parallel to form each phase of a single-phase or three-phase multilevel power converter, and the shared power supply is connected in two or three in parallel. In addition, the power converter is configured to be shared by the main circuit and the individual gate drive unit. A main circuit having m conversion levels, which is configured by connecting in series (2m-2) switches including a first switch to a (2m-2) switch;
A first gate driver to a (2m-2) gate driver connected to the first switch to the (2m-2) switch in a one-to-one correspondence, and the first switch to the (2m-2) ) The first interface circuit having the first and second power supply terminals connected to the switch and the first gate driver to the (2m-2) gate driver in a one-to-one correspondence with each other. 2) An individual gate drive unit that does not require a dedicated power source composed of an interface circuit;
One common power source comprising a high-voltage side terminal and a ground-side terminal;
A signal generator and a semiconductor switch that is switched by a switching signal from the signal generator, and a shared circuit part that constitutes a part of the charge pump circuit;
A signal output unit for supplying signals separately to each of the first gate driver to the (2m-2) gate driver;
The first interface circuit is composed of a single first capacitor having one end connected to the high-voltage side terminal of the shared power source, and the second interface circuit to the (2m-2) interface circuit are each the shared circuit section. A charge pump circuit, and a charge pump partial circuit having first and second power supply terminals and a power transfer terminal,
The individual gate drive unit is
The other end of the first capacitor of the first interface circuit is connected to the ground-side terminal of the shared power supply, and the first power supply of each of the second interface circuit to the (2m-2) interface circuit The terminal is connected to the shared circuit section, and the second power supply terminal of the j-th (j = 3 to 2m−2) j-th interface circuit is used for the power transfer of the (j−1) -th interface circuit. By connecting to a terminal, power is supplied from the shared power supply to the first gate driver to the (2m-2) gate driver connected correspondingly through the first interface circuit to the (2m-2) interface circuit. Are supplied separately,
The main circuit and the individual gate drive unit are connected in two or three in parallel to form each phase of a single-phase or three-phase multilevel power converter, and the shared power supply is connected in two or three in parallel. In addition, the power converter is configured to be shared by the main circuit and the individual gate drive unit. A main circuit having m conversion levels, which is configured by connecting in series (2m-2) switches including a first switch to a (2m-2) switch;
A first gate driver to a (2m-2) gate driver connected to the first switch to the (2m-2) switch in a one-to-one correspondence, and the first switch to the (2m-2) ) The first interface circuit having the first and second power supply terminals connected to the switch and the first gate driver to the (2m-2) gate driver in a one-to-one correspondence with each other. 2) An individual gate drive unit that does not require a dedicated power source composed of an interface circuit;
A signal output unit for supplying signals separately to each of the first gate driver to the (2m-2) gate driver;
The first interface circuit to the (2m-2) interface circuit in the individual gate drive unit have a power input terminal connected to a high-voltage side terminal of the first switch to the (2m-2) switch provided correspondingly, respectively. The first gate driver configured by a connected self-feeding circuit, wherein the individual gate drive unit is connected correspondingly through the first interface circuit to the (2m-2) interface circuit without having a common power source. The power supply is separately supplied to the (2m-2) th gate driver.
2. The power conversion device according to claim 1, wherein the main circuit and the individual gate drive unit are connected in two or three in parallel to constitute each phase of a single-phase or three-phase multilevel power converter.   The power converter according to any one of claims 1 to 6, wherein the main circuit is a diode clamp multi-level power converter circuit. The power converter according to any one of claims 1 to 6, wherein the main circuit is a flying capacitor type multi-level power converter circuit.

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