JP2010017047A - Three-phase power factor improving circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To materialize improvement in performance, downsizing, and low cost by standardizing a driving system and a controlling system for improving a power factor when converting multiphase alternate current to direct current. <P>SOLUTION: Output transformers 10-1 to 10-3 for three phases have input diodes 16-11, 16-21, 16-31 connected in series at positive sides of primary windings 12-11, 12-21, 12-31; and input diodes 16-12, 16-22, 16-32 connected in series at negative sides of primary windings 12-12, 12-22, 12-32. An inverter element 18 is connected between combined connecting points at the secondary side of the output transformer to constitute an inverter circuit. Output currents of secondary windings 14-1 to 14-3 by a flyback operation of the inverter circuit are smoothed after being rectified and combined. A controlling IC 24 serves the inverter 18 as a constant resistor for improving the power factor by driving it at an discontinuous mode, constant frequency, and duty cycle with less variation in one cycle of an AC frequency. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

The present invention relates to a multiphase AC power factor correction circuit that improves a power factor when converting multiphase AC power to DC power.

  Conventionally, as a power factor correction circuit known as an active filter circuit that converts input three-phase AC power to DC power by controlling it to a high power factor, for example, one shown in FIG.

  In FIG. 10, R, S and T are AC input terminals, P and N are DC output terminals, L1, L2 and L3 are reactors, D1 to D18 are diodes, S1 to S3 are switching elements for each phase, and C1 and C2 are It is a capacitor. Here, the inverter constituted by reactors L1, L2, and L3, diodes D1 to D18, switching elements S1 to S3, and capacitors C1 and C2 constitutes a boost chopper circuit.

  The operation of the conventional circuit of FIG. 10 is as follows. For example, when switching elements S1 and S2 are turned on, current flows through a path of R → L1 → D1 → S1 → D8 → D9 → S2 → D4 → L2 → S → R, and energy is stored in reactors L1 and L2. . Further, when S1 is turned off while S2 is on, the energy of reactors L1 and L2 is charged to capacitor C1 through the route of R → L1 → D1 → D13 → C1 → D9 → S2 → D4 → L2 → S → R. .

  On the other hand, when S2 is turned off while S1 is on, current flows through a path of R → L1 → D1 → S1 → D8 → C2 → D16 → D4 → L2 → S → R, and the energy of reactors L1 and L2 is stored in capacitor C2. Is charged.

  Further, when both S1 and S2 are turned off, current flows through a path of R → L1 → D1 → D13 → C1 → C2 → D16 → D4 → L2 → S → R, and the energy of the reactors L1 and L2 is stored in the capacitor C1. , C2 are charged.

  By repeating such a switching operation, the AC input current waveform can be made similar to the AC input voltage waveform, and AC power can be converted to DC power while controlling the input current at a high power factor. Further, the voltages of the two capacitors C1 and C2 can be individually adjusted by adjusting the ON times of the switching elements S1 to S3.

  However, in the conventional circuit of FIG. 10, the number of passing semiconductor elements (switching elements and diodes) is six when energy is stored in the reactor, and five when the capacitors C1 or C2 are individually charged. When both C1 and C2 are charged simultaneously, the number is four.

  For this reason, the number of elements through which current passes is large, and the energy loss in the semiconductor element also increases. Therefore, in order to improve this, the conventional circuit of FIG. 11 has been proposed (Patent Document 2).

  In the three-phase AC power factor correction circuit of FIG. 11, R, S, and T are AC input terminals, P and N are DC output terminals, L1, L2, and L3 are reactors, S1 to S6 are switching elements made of MOSFETs, D1 to D1. D12 is a diode, and C1 and C2 are capacitors.

  The operation of the conventional circuit of FIG. 11 is as follows. For example, when the switching elements S2 and S3 are turned on, current flows through a path of R → L1 → S2 → D2 → D3 → S3 → L2 → S → R, and energy is accumulated in the reactors L1 and L2.

  When S2 is turned off while S3 is on, a current flows through a path of R → L1 → S1 parasitic diode → D7 → C1 → D3 → S3 → L2 → S → R, and the capacitor C1 is charged.

  Further, when S3 is turned off while S2 is on, a current flows through a path of R → L1 → S2 → D2 → C2 → D10 → S4 parasitic diode → L2 → S → R, and the capacitor C2 is charged.

  Further, when S2 and S3 are turned off at the same time, a current flows in a path of R → L1 → S1 parasitic diode → D7 → C1 → C2 → D10 → S4 parasitic diode → L2 → S → R, and capacitors C1 and C2 are simultaneously turned on. Charged.

By repeating such a switching operation, the AC input current waveform can be made similar to the AC input voltage waveform, and AC power can be converted to DC power while controlling the input current at a high power factor. Here, the number of semiconductor elements through which the current passes is four when energy is stored in the reactor, and four when the capacitor C1 or C2 is charged, and can be smaller than the circuit of FIG.
Japanese Patent No. 2857094 Japanese Patent No. 4051875

  However, in such a conventional three-phase AC power factor correction circuit, three systems of single-phase AC power factor correction circuits using a step-up chopper as an inverter are provided so that the three-phase AC power has a high power factor. Since it is controlled and converted to DC power, there are the following problems.

  First, because the boost chopper is configured as an inverter circuit, the output voltage is set to a boost voltage that is greater than or equal to the input voltage, and the output voltage cannot be made smaller than the peak value of the input voltage. It is necessary to provide a DC-DC converter to step down the voltage, resulting in a complicated apparatus configuration and increased cost.

  Also, the conventional three-phase AC power factor correction circuit is difficult to drive because the potential of each inverter element is different. In addition, three power systems are required for the power factor improvement operation that makes the input current of each phase similar to the input voltage, and a circuit that balances the current of each phase and the upper and lower of the boost voltage is also required.

  Further, in order to operate with the virtual midpoint of the three-phase alternating current as a reference, it is necessary to prepare two sets of upper and lower smoothing electrolytic capacitors. In addition, because it constitutes a step-up chopper in which the AC input terminal is directly connected to the smoothing electrolytic capacitor via a diode and a reactor, in order to prevent a charging current (inrush current) to the electrolytic capacitor when the power is turned on, An inrush current prevention circuit must be provided for each phase.

  Furthermore, it is necessary to detect the input current waveform for power factor correction control, and therefore a large current transformer that does not saturate at an AC frequency is required.

  For this reason, the conventional three-phase AC power factor correction circuit using a boost chopper has a complicated circuit configuration, which increases the number of components and the circuit device, and increases the cost. There was a problem.

The present invention provides a multi-phase AC power factor improvement circuit in which a drive system and a control system for power factor improvement when DC-converting multi-phase AC are shared to improve performance, reduce size, and reduce costs. For the purpose.

The present invention provides a power factor correction circuit that converts input polyphase AC power to DC power by controlling it to a high power factor.
Output transformers for the number of phases including a positive primary winding, a negative primary winding and a single secondary winding wound in opposite directions;
A positive input rectifier connected in series with the positive primary winding of each phase;
A negative input rectifier connected in series to the negative primary winding of each phase;
Inverter element between the secondary side composite connection point of the series circuit of the positive side input rectifier and the positive side primary winding and the secondary side composite connection point of the series circuit of the negative side input rectifier and the negative side primary winding A flyback inverter circuit connected to the
A rectifying / smoothing circuit that rectifies and synthesizes a flyback current output from the secondary winding of the output transformer of each phase by a flyback operation of the inverter circuit and then outputs DC power;
In order to maintain the predetermined voltage by inputting the DC output voltage obtained from the rectifying / smoothing circuit, the inverter element is maintained at a constant frequency while maintaining a discontinuous mode, and with a duty ratio with little variation with respect to one cycle of the AC frequency. A control circuit that operates as a constant resistance by driving;
Is provided.

  Here, the control circuit includes an overcurrent protection circuit, and a current detection signal is input to the overcurrent protection circuit by a current detection resistor connected in series with the inverter element to perform an overcurrent protection operation including inrush current prevention.

Each of the positive rectifier, negative rectifier, and inverter element of each phase is provided with a snubber circuit that absorbs the spike voltage generated at the time of each off,
Each of the snubber circuits is a series circuit of a capacitor and a resistor. One end of the series circuit is connected to each of the positive rectifier, the negative rectifier, and the inverter element of each phase, and the other end of the series circuit is connected to the multiphase AC. Connects to the virtual midpoint.

  As the output transformer for the number of phases, the primary winding and the secondary winding of each phase are wound around a single core. For example, a pair of comb-like cores having legs corresponding to the number of phases is combined with the leg sides facing each other with a gap material interposed therebetween, and each leg has a positive primary winding for each phase, A negative primary winding and a secondary winding are arranged.

  The control circuit may be an insulating type in which the primary side and the secondary side are electrically separated.

  A plurality of secondary windings are provided in each phase of the output transformer, and a rectifying / smoothing circuit is provided for each of the plurality of secondary windings to output multiple DC power.

  In another embodiment of the present invention, N sets of multi-phase inverter circuits are provided so as to cancel the ripple current by switching having a phase difference of 360 ° / N.

That is, the present invention is a power factor improvement circuit that inputs multiphase AC power, controls it to a high power factor, and converts it into DC power.
Output transformers corresponding to the number of phases of the polyphase AC, each including a positive primary winding, a negative primary winding and a single secondary winding wound in opposite directions;
A positive-side input rectifier connected in series with each positive-side primary winding of each phase;
A negative side input rectifier connected in series to each negative side primary winding of each phase;
Inverter element between the secondary composite connection point of the series circuit of the positive primary winding and the positive input rectifier and the secondary composite connection point of the series circuit of the negative primary winding and the negative input rectifier A flyback inverter circuit connected to the
An output rectifier that rectifies the flyback current output from the secondary winding of each phase by the flyback operation of the inverter circuit;
N sets,
Furthermore,
A smoothing capacitor that outputs DC power after smoothing the rectified output of each phase output rectifier provided for each N sets;
A plurality of switching elements having a phase difference (360 ° / N) obtained by dividing N sets of switching elements by the number N of sets so that the DC output voltage obtained from the smoothing capacitor is input and the predetermined voltage is maintained. A control circuit that operates as a constant resistance by driving at a constant frequency and a duty ratio with little fluctuation with respect to one cycle of the AC frequency while maintaining a discontinuous mode by a signal;
Is provided.

  In another embodiment of the present invention, one output transformer is provided for each of the positive side and negative side input rectifiers of each phase to achieve overall miniaturization.

That is, the present invention is a multiphase AC power factor correction circuit that inputs multiphase AC power, controls it to a high power factor, and converts it into DC power.
A positive-side output transformer for the number of phases of the multi-phase AC provided with a positive-side primary winding and a secondary winding;
A negative output transformer corresponding to the number of phases of the polyphase alternating current, comprising a negative primary winding and a secondary winding wound in the opposite direction to the positive primary winding;
A positive-side input rectifier connected in series with each positive-side primary winding of each phase;
A negative side input rectifier connected in series to each negative side primary winding of each phase;
A flyback type with an inverter element connected between the secondary side composite connection point of the positive side input rectifier and the series circuit and the secondary side composite connection point of the negative side primary winding and the series circuit of the negative side input rectifier An inverter circuit;
A rectifying / smoothing circuit that rectifies and synthesizes the flyback current output from each secondary winding of the positive output transformer and the negative output transformer of each phase by the flyback operation of the inverter circuit, and then outputs the DC power by smoothing it. When,
In order to maintain the predetermined voltage by inputting the DC output voltage obtained from the rectifying / smoothing circuit, the inverter element is maintained at a constant frequency while maintaining a discontinuous mode, and with a duty ratio with little variation with respect to one cycle of the AC frequency. A control circuit that operates as a constant resistance by driving;
Is provided.

In another aspect of the present invention, a single-phase AC power factor correction circuit is provided. That is, the present invention is a single-phase AC power factor correction circuit that inputs single-phase AC power, converts it to DC power by controlling it to a high power factor,
An output transformer comprising a positive primary winding, a negative primary winding and a single secondary winding wound in opposite directions;
A diode bridge that connects the positive output to the positive primary winding and the negative output to the negative primary winding to rectify the single-phase AC input;
A flyback type inverter circuit in which an inverter element is connected between the positive primary winding and the negative primary winding;
A rectifying / smoothing circuit that rectifies the flyback current output from the secondary winding of the output transformer of each phase by the flyback operation of the inverter circuit and then outputs the DC power by smoothing;
In order to maintain the predetermined voltage by inputting the DC output voltage obtained from the rectifying / smoothing circuit, the switching element is maintained at a constant frequency while maintaining a discontinuous mode, and with a duty ratio with little variation with respect to one cycle of the AC frequency. A control circuit that operates as a constant resistance by driving;
Is provided.

  According to the present invention, for example, taking a three-phase alternating current as an example, as a separately-excited flyback type inverter circuit, three systems are provided for the input rectifier and the output transformer, but the inverter element is commonly used for each phase. A system and a control system at the same time, this inverter circuit is operated as a constant resistance by driving the inverter circuit at a constant frequency and a duty ratio with a small fluctuation with respect to one cycle of the AC frequency while maintaining the discontinuous mode, As a result, an input current proportional to the input voltage flows, and the power factor can be improved.

That is, when a separately-excited flyback inverter circuit is driven at a constant frequency while maintaining a discontinuous mode and with a duty ratio with little fluctuation with respect to one cycle of the AC frequency, the peak current is I and the input voltage is V When the on-duty time Ton and the inductance of the output transformer are L,
I = V × (Ton / L)
Since (Ton / L) is constant, an input current I proportional to the input voltage V flows, and the same operation as the constant resistance is performed, thereby improving the power factor.

  In addition, since the input rectifier, output transformer and output rectifier corresponding to the number of phases are controlled by common switching with a single inverter element, there is no interference between the phases, and the drive system and control system can be simplified. The internal power supply (sub power supply) for driving the control system may be one system, and the circuit can be reduced in size and cost.

  Also, since the flyback current output from the secondary winding of the output transformer of each phase is rectified and then synthesized into one and smoothed, the low frequency ripple of each phase is canceled by synthesis, and the low frequency ripple Can be reduced.

  In addition, since the isolated flyback method is used as the inverter, there is no restriction that the power factor correction operation does not occur unless the output voltage is always higher than the input voltage in the case of the boost chopper, and the DC output voltage can be set arbitrarily. .

  In addition, the inverter current of each phase is detected by a current detection resistor connected in series with the inverter element, and the overcurrent protection operation is performed by the overcurrent protection circuit provided in the control circuit. Therefore, it is not necessary to provide an inrush current protection circuit for each phase individually.

Furthermore, N sets of input rectifiers, output transformers and output rectifiers corresponding to each phase and inverter circuits composed of a single inverter element, for example, two sets are provided, and the phase of the switching signal is set to 360 ° / N for each set of inverter elements, For example, when N = 2, driving with a shift of 360 ° / 2 = 180 ° can reduce high-frequency ripple components by cancellation by phase shift.

  FIG. 1 is a circuit block diagram showing a first embodiment of a power factor correction circuit for multiphase alternating current according to the present invention. In the following embodiments, a power factor improvement circuit for three-phase alternating current is taken as an example. Is taking.

  In FIG. 1, the power factor correction circuit according to the present embodiment includes a positive input diode 16-11, 16-21, 16-31 and a negative input diode following the three-phase AC input terminals R, S, and T. 16-12, 16-22, and 16-32 are branched and connected, and these output diodes are followed by three output transformers 10-1, 10-2, and 10-3.

  The output transformers 10-1, 10-2, and 10-3 include plus-side primary windings 12-11, 12-21, and 12-31 and minus-side primary windings 12-12 and 12 wound in opposite directions. -22, 12-32 and a single secondary winding 14-1, 14-2, 14-3.

  For example, taking the AC input terminal R as an example, the positive primary winding 12-11 of the output transformer 10-1 is connected in series with the positive input diode 16-11, and the negative primary winding 12-12 is A negative input diode 16-12 is connected in series to form a current flow path and a current flow path from the AC input terminal R.

  The same applies to the AC input terminals S and T. The positive side primary windings 12-21 and 12-31 are connected in series with the positive side input diodes 16-21 and 16-31, and the negative side. Input diodes 16-22 and 16-32 and negative primary windings 12-22 and 12-32 are connected in series.

  The output sides of the positive side primary windings 12-11, 12-21, 12-31 corresponding to the AC input terminals R, S, T are combined and connected to the drain D of the inverter element 18 using a MOS-FET. is doing. Also, the output sides of the negative primary windings 12-12, 12-22, 12-32 corresponding to the AC input terminals R, S, T are combined and connected, and the source S side of the MOS-FET constituting the inverter element 18 is connected. Connected to.

  That is, the inverter element 18 includes the secondary side composite connection point of the positive side primary windings 12-11, 12-21, and 12-31 corresponding to the AC input terminals R, S, and T, and the negative side primary winding 12. -12, 12-22, and 12-32 are connected to the secondary side combination connection point to perform a switching operation.

  Following the secondary windings 14-1 to 14-3 of the output transformers 10-1 to 10-3, rectification including output diodes 20-1 to 20-3 as an output rectifier and a single smoothing capacitor 22 is provided. A smoothing circuit is provided.

  A control IC 24 constituting a control circuit is provided for the gate of the inverter element 18, and the control IC 24 divides the DC output voltage output from the smoothing capacitor 22 by the resistors 26 and 28 and inputs it to the input terminal IN. The switching signal is output from the output terminal OUT to the gate of the inverter element 18 so as to maintain a predetermined voltage, and the inverter element 18 is switched.

  Here, the inverter circuit composed of circuit elements provided in the path from the AC input terminals R, S, T to the DC output terminals + V, GND constitutes a multi-excitation flyback type inverter circuit.

  When the inverter element 18 is turned on, the flyback type inverter circuit charges the energy by passing a current through, for example, the positive primary winding 12-11 on the input side, and then when the inverter element 18 is turned off. The energy of the positive side primary winding 12-11 is transmitted to the secondary winding 14-1, the flyback current Id1 is rectified and output by turning on the output diode 20-1, and is smoothed by the smoothing capacitor 22 and converted to DC power. To do.

  The flyback operation in the inverter circuit of the present embodiment is performed by turning on the single inverter element 18 and providing the positive primary windings 12-11, 12-21 provided at the AC input terminals R, S, T, respectively. 12-31 and negative primary windings 12-12, 12-22, 12-32 are supplied with current corresponding to the magnitude relationship of the AC input voltage applied to the AC input terminals R, S, T at that time. To save energy.

  Subsequently, by turning off the inverter element 18, energy is transmitted from the primary winding storing energy to the secondary windings 14-1 to 14-3, and flyback is performed from the output diodes 20-1 to 20-3. The currents Id1, Id2, and Id3 are rectified and output, supplied to the smoothing capacitor 22 as a combined flyback current Id, smoothed, and converted to DC power.

  In the embodiment of FIG. 1, a current detection resistor 30 is connected in series with the inverter element 18, and the current detection signal detected by the current detection resistor 30 when the inverter element 18 is turned on is an excess of the control IC 24. It is input to the current protection terminal OCP. The control IC 24 has a built-in overcurrent protection, and when a current detection signal exceeding the threshold set in the overcurrent protection circuit is input, the overduty of the inverter element 18 is controlled to be reduced to prevent overcurrent. To do.

  In particular, in the present embodiment, an inrush current flows with the switching of the inverter element 18 when the power is turned on. With respect to such an inrush current as well, the control IC 24 receives the input of the current detection voltage by the current detection resistor 30. The overcurrent protection circuit reduces the on-duty of the inverter element 18 and thereby functions to prevent inrush current.

  In the embodiment of FIG. 1, the positive side input diodes 16-11, 16-21, 16-31 and the negative side input diodes 16-22, 16-32 corresponding to the AC input terminals R, S, T are provided. Snubber circuits 32-1, 32-2, and 32-3 for absorbing spike voltages are provided between the secondary sides. Further, a snubber circuit 30 is provided between the source S and the drain D using the MOS-FET so as to prevent element destruction due to the spike voltage.

  Further, the control IC 24 operates by receiving a power supply voltage Vcc from a sub power supply (not shown), and since only one control system is required, only one sub power supply can be used.

Next, a basic operation function as a power factor correction circuit in the embodiment of FIG. 1 will be described. In the control IC 24 of the present embodiment, the separately-excited flyback inverter circuit is subjected to switching control so as to stabilize the DC output voltage at a constant voltage under the following three conditions.
(1) The operation is performed while maintaining the current discontinuous mode by reducing the on-duty of the switching control.
(2) Drive at a constant frequency.
(3) Drive with a duty ratio with little fluctuation (the duty ratio is not changed within the period) for one period of the AC frequency (50 Hz or 60 Hz).

  When the control IC 24 performs switching control of the inverter element 18 under the conditions (1) to (3), the inverter circuit can be operated as a constant resistance.

That is, when the peak current in the inverter circuit is I, the input voltage is V, the on-duty time T _ON , and the inductance of the output transformers 10-1 to 10-3 is L, the following relationship is obtained.
I = V (T _ON / L) (1)
When switching control is performed so that (T _ON / L) is kept constant according to the conditions (1) to (3) from the equation (1), an input current I proportional to the input voltage V flows, which is an inverter As a result, the circuit operates in the same manner as a constant resistance. As a result, in switching control when converting three-phase AC power to DC power, the input voltage waveform and the input current waveform are similar to each other, and the power factor approaches 1 Rate improvement can be made.

  Furthermore, in this embodiment, if the discontinuous mode operation is performed with an equal duty over one cycle of the input current, the operation condition as a constant resistance is satisfied, so that the burst that changes the output voltage and output current abruptly. Also in the mode, if the duty is changed stepwise so that the duty becomes equal over one period of the input current, the operation condition as a constant resistance is established even when operating in the burst mode, and the input current is changed to the input voltage. The power factor can be improved as a sine wave proportional to.

  Next, the flyback operation accompanying the switching control of the inverter element 18 in the embodiment of FIG. 1 will be described. The AC voltage of each phase applied to the AC input terminals R, S, T has a phase difference of 120 °.

The 3-phase AC input voltage E _R, E _S, between the _{E T, E R> E S} > E T at a certain timing
Suppose that there is a relationship. When the inverter element 18 is turned on at this timing, an input current flows from the three-phase AC terminal R having a peak voltage to each of the three-phase ACs S and T having a lower voltage. When the path of this input current is indicated by the symbol of each element, (R) → (16-11) → (12-11) → (18) → (12-22) → (16-22) → S
And (R) → (16-11) → (12-11) → (18) → (12-32) → (16-32) → T
It becomes. At this time, the ratio of the current flowing out to the AC input terminals S and T depends on the magnitude of each AC voltage.

  Thus, when the inverter element 18 is turned on, current flows from the AC input terminal R to each of the AC input terminals S and T, so that the positive side primary winding 12-11 and the negative side primary winding 12-22 and 12 are supplied. -32 is charged with energy.

  Subsequently, when the inverter element 18 is turned off, the energy charged in the plus-side primary winding 12-11 and the minus-side primary windings 12-22 and 12-32 is output from the output transformers 10-1 to 10-3. It is transmitted to the secondary windings 14-1 to 14-3 on the secondary side, turns on each of the output diodes 20-1 to 20-3, rectifies and outputs the flyback currents Id1, Id2, and Id3, and combines them. A flyback current Id = (Id1 + Id2 + Id3), which is a current, is smoothed by the smoothing capacitor 22 and converted into DC power, and is supplied from the output terminals + V and GND to a load (not shown).

  Here, since the flyback currents Id1 to Id3 rectified and output from the output diodes 20-1 to 20-3 are synthesized and then smoothed by the smoothing capacitor 22, an operation for canceling out the low frequency ripple is performed. A sufficiently small direct current can be obtained.

  At another timing, if the AC input terminal S has a peak voltage, current flows from S to R and T by switching of the inverter element, and at some timing, if the AC input terminal T has a peak voltage, the inverter When the element is turned on, current flows through R and S, and can be converted to DC power by a flyback operation associated with the inverter element 18 being turned off.

FIG. 2 is a waveform explanatory diagram showing operation waveforms for each phase input current, combined flyback current, and voltage across the inverter element in the embodiment of FIG. 2 (A) is AC input terminal R of Figure 1, S, input current I _R flowing through the T, I _S, indicates the I _T, with respect to the AC input voltage having a phase difference of 120 °, the inverter device By switching all three systems at the same time in 18, current flows in a pulse manner.

Here, between the three input currents I _R , I _S and I _T , I _R + I _S + I _T = 0
There is a relationship.

For example, when viewing the timing at time t1 in FIG. 2A, the input current I _R is the largest and positive, and the input current I _S is also positive, but at this stage it is small, while the input current I _T is negative. Yes,
(I _R + I _S ) = − I _T
It has become. That is, currents I _R and I _S flow from the AC input terminals R and S, and current I _T flows from the AC input terminal T.

  FIG. 2B shows a combined flyback current Id flowing through the secondary smoothing capacitor 22 of the output transformer 10-1 of FIG. The combined flyback current Id is transmitted to the secondary windings 14-1 to 14-3 by the energy stored on the plus side or minus side of the three-phase AC terminals R, S, T when the inverter element 18 in FIG. 1 is turned off. The flyback currents Id1 to Id3 rectified and output from the output diodes 20-1 to 20-3 are combined, and the inverter 18 is operated under the conditions (1) to (3) by the control IC 24. Thus, a current waveform having a substantially constant peak current is obtained. By smoothing the combined flyback current Id by the smoothing capacitor 22, a substantially constant DC current can be output.

  FIG. 2C shows the source-drain voltage Vds of the MOS-FET constituting the inverter element 18 of FIG. The source-drain voltage Vds becomes 0 volt when the inverter element 18 is turned on, and rises to a peak voltage when the inverter element 18 is turned off. At this time, energy stored in the primary winding side is transmitted to the secondary side. The rectified output of the combined flyback current Id shown in FIG.

  The peak value of the source-drain voltage Vds in the inverter element 18 is a pulse waveform of a constant voltage having a value corresponding to the peak voltage applied to the AC input terminals R, S, T.

  In addition, it can be seen that the inverter element 18 performs switching with reduced on-duty in which the currents of the output transformers 10-1 to 10-3 are discontinuous, that is, switching at a constant frequency of on-duty in a discontinuous mode.

  In the first embodiment of FIG. 1, since the separately excited flyback type inverter circuit is used as the inverter circuit, the output voltage is larger than the input voltage as in the conventional boost chopper. There is no restriction, and the output voltage can be arbitrarily set high or low as required with respect to the input voltage.

  Also, the primary winding that charges energy when the switch is turned on, the secondary winding that transfers energy when the switch is turned off, and the rectifying / smoothing circuit corresponding to the secondary winding are compatible with the AC input terminals R, S, and T. The inverter element 18 that performs switching is switched as one system by combining and connecting the three systems on the input / output side of the inverter circuit, so that the drive system and the control system are one system. Since the circuit configuration is simplified and the number of circuit elements to be used can be reduced, the circuit scale can be reduced, and the loss can be reduced by reducing the number of circuit elements.

  FIG. 3 is a circuit block diagram showing a second embodiment of a power factor correction circuit according to the present invention, showing a specific example of a snubber circuit that absorbs spike voltages of a diode and an inverter element, and a secondary side rectifying and smoothing circuit. As a feature, a synchronous rectifier circuit is used.

  3, the configurations of the input diodes provided corresponding to the AC input terminals R, S, and T, and the primary windings and secondary windings of the output transformers 10-1 to 10-3 are the same as those in the embodiment of FIG. Further, the inverter element 18 constituting the separately-excited flyback inverter circuit and its control IC 24 are also subjected to the power factor improving operation under the conditions (1) to (3) as in the embodiment of FIG. Yes.

  In addition, in the embodiment of FIG. 3, plus side input diodes 16-11, 16-21, 16-31 provided subsequent to the AC input terminals R, S, T, and minus side input diode 16-12. , 16-22, 16-32 as snubber circuits 32-1, 32-2, and 32-3, a circuit in which a snubber capacitor 38 and a snubber resistor 40 are connected in series is provided. It is commonly connected to the virtual midpoint 36 in the phase alternating current.

  Similarly, the snubber circuit 34 provided for the inverter element 18 is also a series circuit of a snubber capacitor 38 and a snubber resistor 40, and the snubber resistor 40 side is connected to a virtual midpoint 36 of a three-phase alternating current.

  Thus, by connecting one end of the snubber circuits 32-1 to 32-3 and 34, that is, the snubber resistor 40 side, to the virtual midpoint 36 of the three-phase AC, the virtual midpoint 36 of the three-phase AC is connected to the ground GND. Since the potential is always high, the voltage applied to the snubber capacitor 38 can be reduced, and the voltage applied to both ends of the snubber circuit is reduced, so that the loss can be reduced.

  Also, snubber circuits 46-1 to 46-3 are provided for the secondary windings 14-1 to 14-3 of the output transformers 10-1 to 10-3, respectively. For 46-3, a series circuit of a snubber capacitor and a snubber resistor may be used.

  Each of the secondary windings 14-1 to 14-3 is provided with synchronous rectification switching elements 42-1 to 42-3 using MOS-FETs functioning as output rectifiers, and synchronous rectification control circuits 44- The flyback current is rectified and output by ON control synchronized with the OFF timing of the inverter element 18 by switching according to 1-44-3.

  Each of the synchronous rectification switching elements 42-1 to 42-3 is also connected in parallel with the snubber field circuits 48-1 to 48-3 so as to absorb the spike voltage applied to the switching elements.

  By using a synchronous rectifier circuit as the secondary side rectifier circuit in this manner, the loss of the rectifier circuit can be reduced. However, it is necessary to control the secondary side synchronous rectifier circuit so that no current flows in the reverse direction. As the synchronous rectification control circuits 44-1 to 44-3, a dedicated IC may be used or a discrete component may be used.

  Further, in the embodiment of FIG. 3, the current detection resistor 30 connected in series to the inverter element 18 is connected to the negative side with respect to the ground GND. On the other hand, in the embodiment of FIG. 1, the current detection resistor 30 is connected to the plus side with respect to the ground GND.

  When the current detection resistor 30 is connected to the negative side with respect to the ground GND as shown in FIG. 3, the current detection resistor 30 inputs a negative current detection signal to the control IC 24 due to the current that flows when the inverter element 18 is turned on. Overcurrent protection will be performed.

  FIG. 4 is an explanatory diagram showing a transformer structure used in the multiphase AC power factor correction circuit of the present invention in which three transformers are configured by one core. FIG. 4A is a circuit diagram of the output transformer 10 composed of one core, and the core 50 is provided with a primary winding and a secondary winding in which three transformers are combined.

  That is, two output transformers are constituted by the plus side primary windings 12-11 and 12-12 and the secondary winding 14-1, and the next plus side primary winding 12-21 and the minus side primary winding. 12-22 and secondary winding 14-2 constitute the next output transformer, and the remaining positive primary winding 12-31, negative primary winding 12-32 and secondary winding 14-3 A third output transformer is configured.

  FIG. 4B is a structural explanatory diagram of the output transformer 10 with one core 50. In FIG. 4B, the output transformer 10 includes comb-shaped (E-type) cores 50-1 and 50-2 each having three legs, with the legs facing each other, and between the legs on both sides. A gap material 52 is interposed between the two.

  Each of the three legs combined with the cores 50-1 and 50-2 has primary windings 12-11 to 12-32 and secondary windings 14-1 to 14- constituting three output transformers. 3 is wound around each transformer.

Here, I _R + I _S + I _T = 0 between the input currents I _R , I _S , I _T flowing in the AC input terminals R, S, T when the inverter element 18 of FIG. 1 is turned on.
There is a relationship. Therefore, the magnetic flux .phi.1 in the output transformer 10 in FIG. 4 (B), .phi.2, and .phi.3, inductance L _1, L _2, L ₃ between _{φ1 + φ2 + φ3 = L 1} I R + L 2 I S + L 3 I T = 0
It is sufficient if the relationship is established.

To establish this relationship,
L ₁ = L ₂ = L ₃
It is necessary to have a transformer structure that establishes this relationship. Therefore, by sandwiching the gap material 52 of the same thickness between the leg portions on both sides of the cores 50-1, 50-2,
L ₁ = L ₂ = L ₃
This relationship can be easily realized.

  FIG. 5 is a circuit block diagram showing a third embodiment of the power factor correction circuit according to the present invention in which the control system is an insulation type. In FIG. 5, the system from the AC input terminals R, S, T to the rectifying / smoothing circuit through the input diode and the output transformers 10-1 to 10-3 is basically the same as the embodiment of FIG. In the embodiment, the control system including the control IC 24 also has an insulating circuit configuration.

  That is, a drive circuit 54, a drive transformer 56, and a drive circuit 56 are provided in a system that supplies a switching signal from the output OUT of the control IC 24 to the inverter element 18, and the primary side and the secondary side are electrically insulated and separated. .

  Also for the system for detecting the current of the inverter element 18, the primary winding of the current transformer 58 is connected in series to the inverter element 18, and a rectifier circuit including a diode 60 and a resistor 62 is provided in the secondary winding to provide a primary side. And the secondary side are electrically insulated, and a current detection signal is input to the overcurrent protection circuit of the control IC 24.

  According to the power factor correction circuit of the present embodiment that is also an insulation type for such a control system, a load that does not cause a problem with respect to holding time and output ripple does not require a DC-DC converter to be connected to the subsequent stage. Direct power can be supplied directly.

  Also, in the case of the control system of FIG. 5, when the output voltage in the isolated power factor correction circuit is a safety voltage of 60 volts or less, when the DC-DC converter is connected in the subsequent stage, the DC-DC converter is not insulated. Even molds can comply with safety standards.

  FIG. 6 is a circuit block diagram showing a fourth embodiment of the power factor correction circuit according to the present invention in which the position of the input rectifier is changed with respect to FIG. Further, in FIG. 6, a plus / minus power source is configured as a terminal output configuration on the DC output side.

  In FIG. 6, following the AC input terminals R, S, T, the positive side primary windings 12-11, 12-21, 12-31 of the output transformers 10-1, 10-3 are connected, and then the plus The side input diodes 16-11, 16-21, and 16-31 are connected to each other by DC, the cathodes are connected in common, and are connected to the drain D of the inverter element 18.

  Also, the negative side primary windings 12-12, 12-22, and 12-32 of the output transformers 10-1 and 10-3 are connected at one end to the AC input terminals R, S, and T, and the other end is at the negative side. After being connected to the input diodes 16-12, 16-22 and 16-32, they are combined and connected to the source S of the inverter element 18.

  The connection relationship between the primary winding on the input side and the input diode is opposite to that in the embodiment shown in FIG. 1, but even in such a reverse relationship, the control IC 24 causes FIG. As in the case of, the power factor can be improved by operating the inverter circuit as a low resistance by switching the inverter element 18 under the conditions (1) to (3) and performing the flyback operation.

  Further, for the secondary side of the output transformers 10-1 to 10-3, a pair of secondary windings 14-11 and 14-12, 14-21 and 14-22, 14-31 and 14 having a midpoint tap are provided. -32 is provided, and each midpoint tap is connected to the ground GND. For the secondary windings 14-11, 14-21, and 14-31, the flyback currents rectified by the output diodes 20-11, 20-21, and 20-31 are combined and then smoothed by the smoothing capacitor 22-1 and added. Outputs DC voltage + V.

  For the secondary windings 14-12, 14-22, and 14-32, the flyback current rectified by the output diodes 20-12, 20-22, and 20-32 is synthesized, and then smoothed by the smoothing capacitor 22 to be negative DC. Outputs voltage -V. This achieves two outputs, plus and minus.

  Although FIG. 6 shows two outputs, plus and minus, multiple outputs can be obtained by adding a secondary winding and a rectifying / smoothing circuit.

  FIG. 7 is a circuit block diagram showing a fifth embodiment of the present invention in which ripple current is reduced by phase-shifted switching. 7, in the present embodiment, the flyback type inverter circuit shown in FIG. 1 is connected to the AC input terminals R, S, T between the AC input terminals R, S, T and the DC output terminals + V, GND. Two systems are provided in parallel for each T.

  That is, the inverter circuit of the first system includes plus side input diodes 16-11, 16-21, 16-31, minus side input diodes 16-12, 16-22, 16-32, and output transformers 10-11, 10-21. 10-31 (including two primary windings and one secondary winding), output diodes 20-11, 20-21, 20-31, and an inverter element 18-1.

  The second-system inverter circuit includes positive input diodes 16-13, 16-23, 16-33, negative input diodes 16-14, 16-24, 16-34, and three output transformers 10-12, 10-. 22, 10-32 (including two primary windings and one secondary winding), output diodes 20-12, 20-22, 20-32, and an inverter element 18-2. Furthermore, current detection resistors 30-1 and 30-2 are provided in series with the inverter elements 18-1 and 18-2, respectively.

  The control IC 24 performs a flyback operation by switching the inverter elements 18-1 and 18-2 in accordance with the conditions (1) to (3) in the embodiment of FIG. 1, and further performs a switching signal for the inverter element 18-1. On the other hand, the phase of the switching signal applied to the inverter element 18-2 is shifted by 180 °.

  Thus, the flyback output from the output diodes 20-1 to 20-32 is driven by shifting the phase of the switching signal applied to the inverter element 18-2 by 180 ° with respect to the switching signal for the inverter element 18-1. When the currents are combined, the ripple currents are combined into one in a state of being shifted by 180 °, and the high-frequency ripple current can be reduced by cancellation.

  Here, in the embodiment of FIG. 7, the case where two sets of flyback type inverter circuits are provided is taken as an example, but as a general system, N sets of flyback type inverter circuits are provided.

  In this case, the phase of the switching signal applied to each inverter element is driven by shifting by 360 ° / N, and the ripple current shifted by 360 ° / N when the flyback current is combined into one on the output side. The ripple current can be reduced by canceling.

  FIG. 8 is a circuit block diagram showing a sixth embodiment of the power factor correction circuit according to the present invention in which the output transformer is divided for each input rectifier. In FIG. 8, two systems are branched corresponding to each of the AC input terminals R, S, and T, and plus side input diodes 16-11, 16-21, 16-31 and minus side input diodes 16-12, 16-. Although the points 22 and 16-32 are the same as those in the embodiment of FIG. 1, they are divided into six output transformers 10-11 to 10-32 corresponding to the six input diodes.

  Each of the output transformers 10-11 to 10-32 includes a single primary winding and a secondary winding. For example, when the AC input terminal R is taken as an example, in the output transformers 10-11 and 10-12, Primary windings 12-11 and 12-12 are wound in opposite directions.

  Also, output diodes 20-11 to 20-32 are connected to the secondary windings 14-11 to 14-32 of the six output transformers 10-11 to 10-32, and the flyback current due to switching of the inverter element 18 is rectified and output. is doing.

  Further, the smoothing capacitors 64-11 to 64-32 are provided and smoothed before synthesizing the flyback currents output to the secondary sides of the six output transformers 10-11 to 10-32, thereby smoothing the smoothing capacitors after synthesis. By reducing the high-frequency loop until smoothing at 22 and reducing the high-frequency leakage magnetic flux, the flyback voltage when switching the inverter element 18 from on to off, the reduction of various noises, and further the reduction of malfunction and loss Reduction can be achieved.

  Furthermore, by dividing the output transformer into six, the size per output transformer can be reduced, which is advantageous when a thin power source is configured. Also, when the circuit is constituted by a substrate transformer, the output transformer is divided into six, which is advantageous in that the loss per one can be reduced as the size is reduced.

  FIG. 9 is a circuit block diagram showing a seventh embodiment of the power factor correction circuit according to the present invention for single-phase alternating current. In FIG. 9, following the single-phase AC input terminals AC1 and AC2, a diode bridge composed of input diodes 16-2 and 16-1 and 16-3 and 16-4 is provided, The plus side primary winding 12-1 and the minus side primary winding 12-2, in which the minus side is wound in the opposite directions of the output transformer 10, are connected, and the inverter element 18 is connected therebetween.

  A rectifying output diode 20 is connected to the secondary winding 14 of the output transformer 10, followed by a smoothing capacitor 22. The inverter element 18 is switched by the control IC 24 to perform a flyback operation.

  The conditions for switching the inverter element 18 by the control IC 24 are the conditions (1) to (3) shown in the embodiment of FIG. 1, whereby the flyback type inverter circuit is regarded as a constant resistance, Power factor can be improved.

  A current detection resistor 30 is connected in series to the inverter element 18, and a current detection signal detected by the current detection resistor 30 is input to an overcurrent protection circuit built in the control IC 24 to perform an overcurrent protection operation. This inrush current is also suppressed by duty control of the inverter element 18.

  A snubber circuit 32 is provided for the diode bridge on the input side, and a snubber circuit 34 is provided for the inverter element 18.

  Even in the power factor correction circuit for single-phase alternating current shown in FIG. 9, the power factor improvement operation that stably maintains the power factor at about 1 can be realized by operating the inverter circuit as a constant resistance. Can do.

  In the above embodiment, a three-phase alternating current is taken as an example of the multi-phase alternating current, but a multi-phase alternating current other than the three-phase alternating current can be configured similarly.

  In the above embodiment, the MOS-FET is taken as an example of the inverter element, but other appropriate switching elements such as transistors can be used.

  In the above embodiment, a snubber capacitor and a snubber resistor DC circuit are taken as examples of the snubber circuit. However, the present invention is not limited to this, and an appropriate snubber circuit can be used. .

Further, the present invention includes appropriate modifications that do not impair the object and advantages thereof, and is not limited by the numerical values shown in the above embodiments.

The circuit block diagram which showed 1st Embodiment of the power factor improvement circuit by this invention Waveform explanatory diagram showing operation waveforms for each phase input current, combined flyback current, and voltage across the inverter element in the embodiment of FIG. The circuit block diagram which showed 2nd Embodiment of the power factor improvement circuit by this invention Explanatory drawing which showed the transformer structure used for the polyphase alternating current power factor improvement circuit of this invention which comprises three transformers by one core. A circuit block diagram showing a third embodiment of the power factor correction circuit according to the present invention in which the control system is an insulation type. The circuit block diagram which showed 4th Embodiment of the power factor improvement circuit by this invention which replaced the position of the input rectifier with respect to FIG. A circuit block diagram showing a fifth embodiment of a power factor correction circuit according to the present invention that reduces ripple current by phase-shifted switching. The circuit block diagram which showed 6th Embodiment of the power factor improvement circuit by this invention which divided | segmented the output transformer for every input rectifier Circuit block diagram showing a seventh embodiment of the power factor correction circuit according to the present invention for single-phase alternating current Block diagram showing a conventional three-phase AC power factor correction circuit using a boost chopper Block diagram showing another example of a conventional three-phase AC power factor correction circuit using a boost chopper

Explanation of symbols

10, 10-1 to 10-3, 10-11 to 10-32: Output transformer 12-11, 12-21, 12-31: Positive side primary winding 12-12, 12-22, 12-32: Minus side primary windings 14-1 to 14-3: Secondary windings 16-11 to 16-32: Input diode 18: Inverter elements 20-1 to 20-3: Output diodes 22, 64-11 to 64- 32: Smoothing capacitor 24: Control IC
26, 28, 62: Resistor 30: Current detection resistors 32-1-22, 34, 46-1 to 46-3, 48-1 to 48-3: Snubber circuit 36: Virtual middle point 38: Snubber capacitor 40 : Snubber resistors 42-1 to 42-3: Synchronous rectification switching elements 44-1 to 44-3: Synchronous rectification control circuits 50, 50-1, 50-2: Core 52: Gap material 54, 56: Drive circuit 58: Current transformer

Claims (10)

In the power factor improvement circuit that converts the input polyphase AC power to DC power by controlling it to a high power factor,
Output transformers for the number of phases including a positive primary winding, a negative primary winding and a single secondary winding wound in opposite directions;
A positive input rectifier connected in series with the positive primary winding of each phase;
A negative input rectifier connected in series with the negative primary winding of each phase;
Secondary combined connection point of the series circuit of the positive input rectifier and positive primary winding of each phase, and secondary combined connection of the series circuit of the negative input rectifier and negative primary winding of each phase A flyback inverter circuit in which an inverter element is connected between the point and
A rectifying / smoothing circuit that rectifies and synthesizes a flyback current output from a secondary winding of the output transformer of each phase by a flyback operation of the inverter circuit and outputs DC power;
In order to maintain the predetermined voltage by inputting the DC output voltage obtained from the rectifying and smoothing circuit, the switching element is configured to maintain a discontinuous mode and a duty having a small fluctuation with respect to one cycle of the AC frequency. A control circuit that operates as a constant resistance by driving at a ratio;
A multi-phase AC power factor correction circuit characterized by comprising
2. The multiphase AC power factor correction circuit according to claim 1, wherein the control circuit further includes an overcurrent protection circuit, and a current detection signal is connected to the overcurrent protection circuit by a current detection resistor connected in series to the inverter element. A multi-phase AC power factor correction circuit configured to perform an overcurrent protection operation including an inrush current prevention by inputting.
2. The multiphase AC power factor correction circuit according to claim 1, wherein each of the positive side input rectifier, the negative side input rectifier, and the inverter element of each phase absorbs a spike voltage generated at the time of turning off. Provided,
Each of the snubber circuits is a series circuit of a capacitor and a resistor, and one end of the series circuit is connected to each of the positive rectifier, the negative rectifier, and the inverter element of each phase, and the other end of the series circuit is connected. A multiphase AC power factor correction circuit characterized by being connected to a virtual midpoint of a multiphase AC.
2. The multiphase AC power factor correction circuit according to claim 1, wherein a primary winding and a secondary winding of each phase are wound around a single core as output transformers for the number of phases. A multiphase AC power factor correction circuit.
5. The multiphase AC power factor correction circuit according to claim 4, wherein a pair of comb-like cores having legs corresponding to the number of phases is combined with the leg parts facing each other with a gap material interposed therebetween, and the leg parts A multi-phase AC power factor correction circuit, wherein a positive primary winding, a negative primary winding, and a secondary winding for each phase are arranged in each of the two.
(Figure 6: Insulation type)
2. The multiphase AC power factor correction circuit according to claim 1, wherein the control circuit is an insulating type in which the primary side and the secondary side are electrically separated.
The multiphase AC power factor correction circuit according to claim 1,
A multiphase AC power factor correction circuit characterized in that a plurality of secondary windings are provided in the output transformer of each phase, and the rectifying / smoothing circuit is provided for each of the plurality of secondary windings to output multiple DC power.
In the power factor improvement circuit that inputs multi-phase AC power, controls it to high power factor and converts it to DC power,
Output transformers corresponding to the number of phases of the polyphase AC, each including a positive primary winding, a negative primary winding and a single secondary winding wound in opposite directions;
A positive input rectifier connected in series to each of the positive primary windings of each phase;
A negative input rectifier connected in series to each of the negative primary windings of each phase;
A secondary composite connection point of a series circuit of the positive primary winding and the positive input rectifier;
A flyback type inverter circuit in which an inverter element is connected between the negative side primary winding and the secondary side composite connection point of the series circuit of the negative side input rectifier;
An output rectifier that rectifies a flyback current output from the secondary winding of each phase by a flyback operation of the inverter circuit;
N sets,
Furthermore,
A smoothing capacitor that outputs the DC power by smoothing the rectified output of each phase output rectifier provided for each of the N sets; and
In order to maintain the predetermined voltage by inputting the DC output voltage obtained from the smoothing capacitor, the N switching elements are not subjected to a plurality of switching signals having a phase difference obtained by dividing 360 ° by the number N of sets. A control circuit that operates as a constant resistance by driving at a constant frequency and a duty ratio with little variation with respect to one cycle of the AC frequency while maintaining a continuous mode;
A multi-phase AC power factor correction circuit characterized by comprising
In the power factor improvement circuit that inputs multi-phase AC power, controls it to high power factor and converts it to DC power,
A positive-side output transformer for the number of phases of the multi-phase AC provided with a positive-side primary winding and a secondary winding;
A negative output transformer corresponding to the number of phases of the polyphase alternating current, comprising a negative primary winding and a secondary winding wound in the opposite direction to the positive primary winding;
A positive input rectifier connected in series to each of the positive primary windings of each phase;
A negative input rectifier connected in series to each of the negative primary windings of each phase;
A flyback in which an inverter element is connected between the positive side input rectifier and the secondary side composite connection point of the series circuit, and the secondary side composite connection point of the negative side primary winding and the series circuit of the negative side input rectifier. Type inverter circuit,
Rectifying and smoothing that outputs DC power after smoothing and synthesizing flyback currents output from the secondary windings of the plus-side transformer and minus-side output transformer of each phase by flyback operation of the inverter circuit Circuit,
In order to maintain the predetermined voltage by inputting the DC output voltage obtained from the rectifying and smoothing circuit, the switching element is configured to maintain a discontinuous mode and a duty having a small fluctuation with respect to one cycle of the AC frequency. A control circuit that operates as a constant resistance by driving at a ratio;
A multi-phase AC power factor correction circuit characterized by comprising
In a single-phase AC power factor correction circuit that inputs single-phase AC power, controls it to high power factor and converts it to DC power,
An output transformer comprising a positive primary winding, a negative primary winding and a single secondary winding wound in opposite directions;
A diode bridge for connecting a plus side output to the plus side primary winding and a minus side output to the minus side primary winding to rectify a single-phase AC input;
A flyback type inverter circuit in which an inverter element is connected between the plus side primary winding and the minus side primary winding;
A rectifying / smoothing circuit for smoothing and outputting DC power after rectifying the flyback current output from the secondary winding of the output transformer of each phase by the flashback operation of the inverter circuit;
In order to maintain the predetermined voltage by inputting the DC output voltage obtained from the rectifying and smoothing circuit, the switching element is configured to maintain a discontinuous mode and a duty having a small fluctuation with respect to one cycle of the AC frequency. A control circuit that operates as a constant resistance by driving at a ratio;
A single-phase AC power factor correction circuit characterized by comprising:

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