JP2007178256A - Pressure sensor - Google Patents

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JP2007178256A
JP2007178256A JP2005377071A JP2005377071A JP2007178256A JP 2007178256 A JP2007178256 A JP 2007178256A JP 2005377071 A JP2005377071 A JP 2005377071A JP 2005377071 A JP2005377071 A JP 2005377071A JP 2007178256 A JP2007178256 A JP 2007178256A
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pressure sensor
insulating layer
layer
gate insulating
pressure
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Taira Nakagawa
平 中川
Katsumi Abe
勝美 安部
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Canon Inc
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a new pressure sensor device which is manufactured onto plastic substrates, reduced in weight, simplified in structure the process, and flexibile and upsized. <P>SOLUTION: The pressure sensor has at least a source electrode, a drain electrodes, a gate electrode, an organic semiconductor layer, and a gate insulating layer, on an insulating substrate, at least one layer of the gate insulating layer is of an elastic layer having rubber elasticity. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は、電界効果型有機トランジスタを用いた圧力センサに関する。   The present invention relates to a pressure sensor using a field effect organic transistor.

従来、圧力センサは、無機半導体を用いるため、重い、フレキシブル基板上での作製は難しい、大面積化も難しいことが容易に予想される。そのため、指紋等の微小な面積を読み取るセンサは可能であるが（特許文献１）、それ以上の大面積センサに適用することは困難である。   Conventionally, since the pressure sensor uses an inorganic semiconductor, it is easily expected that it is heavy, difficult to manufacture on a flexible substrate, and difficult to increase in area. Therefore, a sensor that reads a minute area such as a fingerprint is possible (Patent Document 1), but it is difficult to apply to a larger area sensor.

特許第３０５３００７号公報Japanese Patent No. 3053007

本発明は、プラスチック基板上への製造や、軽量化、構造・プロセスの簡素化が可能であり、フレキシブルで、大面積化が可能な新しい圧力センサデバイスを提供することを目的とする。   An object of the present invention is to provide a new pressure sensor device that can be manufactured on a plastic substrate, can be reduced in weight, can be simplified in structure and process, is flexible, and can have a large area.

すなわち、本発明の圧力センサは、絶縁性基板上に、少なくともソース電極、ドレイン電極、ゲート電極、有機半導体層及びゲート絶縁層を有し、該ゲート絶縁層の少なくとも一層がゴム弾性を示す弾性層であることを特徴とする。   That is, the pressure sensor of the present invention has at least a source electrode, a drain electrode, a gate electrode, an organic semiconductor layer, and a gate insulating layer on an insulating substrate, and at least one of the gate insulating layers exhibits rubber elasticity. It is characterized by being.

本発明の圧力センサは、フレキシブル基板上への形成が可能、かつ大面積化が可能である。そのため、携帯性に優れた大面積圧力センサを提供することができる。   The pressure sensor of the present invention can be formed on a flexible substrate and can have a large area. Therefore, a large area pressure sensor excellent in portability can be provided.

図１は、本発明の圧力センサの一例を示す図である。図１（ａ）に示す様に、本発明の圧力センサは、基板１０１上に、ソース・ドレイン電極１０２、有機半導体１０３、ゴム弾性を示すゲート絶縁層（弾性層）１０４、ゲート電極１０５及び保護層１０６を有する。   FIG. 1 is a diagram showing an example of a pressure sensor of the present invention. As shown in FIG. 1A, a pressure sensor of the present invention includes a source / drain electrode 102, an organic semiconductor 103, a gate insulating layer (elastic layer) 104 showing rubber elasticity, a gate electrode 105, and a protection on a substrate 101. It has a layer 106.

本発明の圧力センサは、図１（ｂ）に示す様に、外部から圧力が加わると、ゲート絶縁層１０４の厚さが変化しゲート絶縁層１０４の容量が変化することを利用している。そして、電界効果型有機トランジスタのドレイン電流の変化を読み取ることで、外部圧力を検出する圧力センサを構成する。   As shown in FIG. 1B, the pressure sensor of the present invention utilizes the fact that the thickness of the gate insulating layer 104 changes and the capacitance of the gate insulating layer 104 changes when pressure is applied from the outside. And the pressure sensor which detects an external pressure is comprised by reading the change of the drain current of a field effect type organic transistor.

本発明の圧力センサの原理について図１を用いて説明する。   The principle of the pressure sensor of the present invention will be described with reference to FIG.

有機半導体１０３の移動度をμ［ｃｍ2／Ｖｓ］、ドレイン電流をＩｄ［Ａ］、チャネル長をＬ［ｃｍ］、チャネル幅をＷ［ｃｍ］、ゲート容量をＣｉ［Ｆ／ｃｍ2］、ゲート電圧をＶｇ［Ｖ］、閾値電圧をＶｔｈ［Ｖ］とすると、
Ｉｄ＝（１／２）×μ×（Ｗ／Ｌ）×Ｃｉ×（Ｖｇ−Ｖｔｈ）2 （１）
と表すことが出来る。 The mobility of the organic semiconductor 103 is μ [cm 2 / Vs], the drain current is Id [A], the channel length is L [cm], the channel width is W [cm], the gate capacitance is Ci [F / cm 2 ], When the gate voltage is Vg [V] and the threshold voltage is Vth [V],
Id = (1/2) × μ × (W / L) × Ci × (Vg−Vth) 2 (1)
Can be expressed as

また、ゲート絶縁層１０４の誘電率をε、ゲート絶縁層１０４の膜厚をｄ［ｃｍ］とすると、単位面積当たりのゲート容量をＣｉ＝ε／ｄと表すことが出来、式（１）に代入すると
Ｉｄ＝（１／２）×μ×（Ｗ／Ｌ）×（ε／ｄ）×（Ｖｇ−Ｖｔｈ）2 （２）
と表すことが出来る。 Further, when the dielectric constant of the gate insulating layer 104 is ε and the film thickness of the gate insulating layer 104 is d [cm], the gate capacitance per unit area can be expressed as Ci = ε / d, and the equation (1) When substituted, Id = (1/2) × μ × (W / L) × (ε / d) × (Vg−Vth) 2 (2)
Can be expressed as

よって、ドレイン電圧Ｉｄはゲート絶縁層１０４の膜厚ｄに反比例する。   Therefore, the drain voltage Id is inversely proportional to the film thickness d of the gate insulating layer 104.

次に、圧力を加えない図１（ａ）の状態のゲート絶縁層１０４の膜厚をｄ1したときのドレイン電流をＩｄ1［Ａ］とする。ここで、図１（ｂ）に示す圧力Ｘ［Ｐａ］加えたときのゲート絶縁層１０４の膜厚ｄ2、このときのドレイン電流をＩｄ2［Ａ］とすると、Ｉｄ2＝（ｄ1／ｄ2）Ｉｄ1［Ａ］となる。 Then, the drain current when the thickness of the gate insulating layer 104 in the state of FIG. 1 without the addition of pressure (a) and d 1 and Id 1 [A]. Here, when the film thickness d 2 of the gate insulating layer 104 when the pressure X [Pa] shown in FIG. 1B is applied and the drain current at this time is Id 2 [A], Id 2 = (d 1 / d 2 ) Id 1 [A].

このときの電流値を読み取ることで圧力を検知することが出来、また読み取った電流値からどの程度の圧力が加えられたかを知ることが出来る。   By reading the current value at this time, the pressure can be detected, and it is possible to know how much pressure has been applied from the read current value.

ゲート絶縁層１０４は、少なくとも一層がゴム弾性を示す弾性層である。ゴム弾性を示す弾性層としては特に限定されないが、例えば天然ゴム、ポリイソプレンゴム、スチレン・ブタジエン共重合体ゴム、ポリブタジエンゴム、ブチルゴム、エチレン・プロピレン・ジエン共重合ゴムクロロプレンゴムの他、ジエン系、オレフィン系、アクリル酸アルキルエステル系、エチレンアクリル系、ポリエーテル系、ウレタン系、多硫化物系材料を用いることもできる。   The gate insulating layer 104 is an elastic layer in which at least one layer exhibits rubber elasticity. The elastic layer exhibiting rubber elasticity is not particularly limited.For example, natural rubber, polyisoprene rubber, styrene / butadiene copolymer rubber, polybutadiene rubber, butyl rubber, ethylene / propylene / diene copolymer rubber, chloroprene rubber, diene series, Olefin-based, acrylic acid alkyl ester-based, ethylene acrylic-based, polyether-based, urethane-based and polysulfide-based materials can also be used.

ゴム弾性を示す弾性層のヤング率は、０．１ＭＰａ以上５０ＭＰａ以下であることが好ましく、より好ましくは１ＭＰａ以上２０ＭＰａ以下である。また、圧力を加えた時の変化する領域の９０％以上がゴム弾性を示す弾性層であることが好ましいため、ゴム弾性を示す弾性層のヤング率は有機半導体のヤング率の１０％以下であることが好ましい。更に、ゴム弾性を示す弾性層のガラス転移点が０℃以下であること、電気絶縁性が１×１０10［Ω・ｃｍ］以上であることがより好ましい。 The Young's modulus of the elastic layer exhibiting rubber elasticity is preferably from 0.1 MPa to 50 MPa, more preferably from 1 MPa to 20 MPa. Moreover, since it is preferable that 90% or more of the region that changes when pressure is applied is an elastic layer exhibiting rubber elasticity, the Young's modulus of the elastic layer exhibiting rubber elasticity is 10% or less of the Young's modulus of the organic semiconductor. It is preferable. Furthermore, it is more preferable that the glass transition point of the elastic layer exhibiting rubber elasticity is 0 ° C. or less, and the electrical insulation is 1 × 10 10 [Ω · cm] or more.

ゲート絶縁層１０４は、絶縁耐性を上げる目的、有機半導体１０３と良好な界面を形成させる目的で、２層以上積層させることが出来る。ゴム弾性を示す弾性層以外の絶縁層としては特に限定はされないが、ＳｉＯ2、ＳｉＮｘ、Ａｌ2Ｏ3、Ｔａ2Ｏ5等の無機材料、ポリイミド、ポリアクリロニトリル、ポリテトラフルオロエチレン、ポリビニルアルコール、ポリビニルフェノール、ポリエチレンテレフタレート、ポリフッ化ビニリデン等の有機材料および有機無機ハイブリッド材料を用いることができる。これらのうちでも、低コストにつながる液相プロセスを利用できるという観点から有機化合物が好ましい。また、トランジスタ特性向上のためゴム弾性を示す弾性層以外の絶縁層の誘電率は４以上であることが望ましい。 Two or more gate insulating layers 104 can be stacked for the purpose of increasing the insulation resistance and for forming a good interface with the organic semiconductor 103. There are no particular limitations on the insulating layer other than the elastic layer exhibiting rubber elasticity, SiO 2, SiNx, Al 2 O 3, Ta 2 O 5 or the like of inorganic materials, polyimide, polyacrylonitrile, polytetrafluoroethylene, polyvinyl alcohol, Organic materials such as polyvinylphenol, polyethylene terephthalate, and polyvinylidene fluoride, and organic-inorganic hybrid materials can be used. Among these, an organic compound is preferable from the viewpoint that a liquid phase process leading to low cost can be used. Further, in order to improve the transistor characteristics, it is desirable that the dielectric constant of the insulating layer other than the elastic layer exhibiting rubber elasticity is 4 or more.

基板１０１、保護層１０６としては特に限定はされないが、例えばシリコン、ガラス、石英等の無機材料のほか、アクリル系、ビニル系、エステル系、イミド系、ウレタン系、ジアゾ系、シンナモイル系等の高分子化合物、ポリフッ化ビニリデン、ポリエチレンテレフタレート、ポリエチレン等の有機材料、有機無機ハイブリッド材料を用いることができる。また、これらの材料を２層以上積層させて用いることもでき、絶縁耐圧を上げる目的で効果がある。基板１０１の平坦性としてはＲａ≦１０ｎｍであることが望ましく、また、基板上に形成する有機半導体１０３が良好な秩序構造を形成する材料が好ましい。   Although it does not specifically limit as the board | substrate 101 and the protective layer 106, For example, in addition to inorganic materials, such as a silicon | silicone, glass, quartz, acrylic, vinyl type, ester type, imide type, urethane type, diazo type, cinnamoyl type etc. An organic material such as a molecular compound, polyvinylidene fluoride, polyethylene terephthalate, or polyethylene, or an organic-inorganic hybrid material can be used. In addition, two or more layers of these materials can be used, which is effective for increasing the withstand voltage. The flatness of the substrate 101 is preferably Ra ≦ 10 nm, and a material in which the organic semiconductor 103 formed on the substrate forms a good ordered structure is preferable.

有機半導体１０３を構成する化合物は特には限定されないが、例えばポリアセチレン誘導体、チオフェン環を有するポリチオフェン誘導体、ポリ（３−アルキルチオフェン）誘導体、ポリ（３，４−エチレンジオキシチオフェン）誘導体、ポリチエニレンビニレン誘導体、ベンゼン環を有するポリフェニレン誘導体、ポリフェニレンビニレン誘導体、窒素原子を有するポリピリジン誘導体、ポリピロール誘導体、ポリアニリン誘導体、ポリキノリン誘導体等の共役高分子化合物、ジメチルセクシチオフェン、クオータチオフェンに代表されるオリゴマー、ペリレン、テトラセン、ペンタセンに代表されるアセン類、銅フタロシアニン誘導体に代表される堆積有機分子、トリフェニレン誘導体に代表されるディスコチック液晶、フェニルナフタレン誘導体、ベンゾチアゾール誘導体に代表されるスメクチック液晶、ポリ（９，９−ジアルキルフルオレン−ビチオフェン）共重合体に代表される液晶ポリマー等が挙げられるがこれらに限定されるものではない。   Although the compound which comprises the organic semiconductor 103 is not specifically limited, For example, a polyacetylene derivative, a polythiophene derivative having a thiophene ring, a poly (3-alkylthiophene) derivative, a poly (3,4-ethylenedioxythiophene) derivative, a polythienylene Vinylene derivatives, polyphenylene derivatives having a benzene ring, polyphenylene vinylene derivatives, polypyridine derivatives having a nitrogen atom, conjugated polymer compounds such as polypyrrole derivatives, polyaniline derivatives, polyquinoline derivatives, oligomers typified by dimethylsecthiophene, quarterthiophene, perylene, Acenes typified by tetracene and pentacene, deposited organic molecules typified by copper phthalocyanine derivatives, discotic liquid crystals typified by triphenylene derivatives, phenyl naphtha Emissions derivatives, smectic liquid crystals typified by benzothiazole derivatives, poly (9,9-dialkyl fluorene - bithiophene) is a liquid crystal polymer and the like typified by a copolymer is not limited thereto.

好ましくは高分子化合物、より好ましくは共役高分子化合物であり、ポリチオフェン誘導体が特に好ましい。共役高分子化合物としては、例えば以下に示す構造の化合物が挙げられる。   Preferred are polymer compounds, more preferred are conjugated polymer compounds, and polythiophene derivatives are particularly preferred. Examples of the conjugated polymer compound include compounds having the following structures.

Figure 2007178256
Figure 2007178256

（式中、Ｒ1、Ｒ2、Ｒ3、Ｒ4、Ｒ5、Ｒ6、Ｒ7、Ｒ8は、Ｈ、Ｆまたは炭素原子数が１乃至２０の直鎖状または分岐状、環状のアルキル基またはアルコキシ基、パーフルオロアルキル基を示す。ｎは正の整数を示す。）
これらの共役高分子化合物の分子量は特に限定はされないが、溶媒に対する可溶性、成膜性等を考慮すると、重量平均分子量が５，０００から１００，０００が好ましい。 (In the formula, R 1 , R 2 , R 3 , R 4 , R 5 , R 6 , R 7 , R 8 are H, F or linear or branched, cyclic having 1 to 20 carbon atoms, cyclic An alkyl group, an alkoxy group, or a perfluoroalkyl group, and n represents a positive integer.)
Although the molecular weight of these conjugated polymer compounds is not particularly limited, the weight average molecular weight is preferably from 5,000 to 100,000 in consideration of solubility in a solvent, film formability, and the like.

本発明で用いられる素子構造において、ソース電極及びドレイン電極を形成する位置は、有機半導体１０３に電荷を注入できれば特に限定されず、例えばトップコンタクト、ボトムコンタクトが挙げられるが、これらに限定されるものではない。   In the element structure used in the present invention, the position where the source electrode and the drain electrode are formed is not particularly limited as long as charge can be injected into the organic semiconductor 103, and examples thereof include a top contact and a bottom contact. is not.

以下、実施例により本発明について更に詳細に説明するが、本発明はこれらの実施例に限定されるものではない。   EXAMPLES Hereinafter, although an Example demonstrates this invention further in detail, this invention is not limited to these Examples.

＜実施例１＞
図１に本実施例の圧力センサの断面図を示す。 <Example 1>
FIG. 1 shows a cross-sectional view of the pressure sensor of this embodiment.

ガラス基板１０１上にレジストを塗布しフォトリソグラフィを行い、金を５０ｎｍ蒸着する。その後、リフトオフ法により、チャネル長１０ｃｍ、チャネル幅１００μｍのソース・ドレイン電極１０２を形成する。次に、ポリ−３−ヘキシルチオフェンのクロロホルム溶液（０．０１ｇ／ｍｌ）をスピンコート法により塗布した後、窒素雰囲気下において２００℃で３０分乾燥し、有機半導体１０３を１００ｎｍする。   A resist is applied on the glass substrate 101, photolithography is performed, and gold is deposited by 50 nm. Thereafter, a source / drain electrode 102 having a channel length of 10 cm and a channel width of 100 μm is formed by a lift-off method. Next, a chloroform solution of poly-3-hexylthiophene (0.01 g / ml) is applied by spin coating, and then dried at 200 ° C. for 30 minutes in a nitrogen atmosphere, so that the organic semiconductor 103 has a thickness of 100 nm.

次に、ゴム弾性を示すエチレン・プロピレンゴムを、混合過程、圧延過程、成形工程、加硫工程を経て、有機半導体１０３上に、厚さ３００ｎｍ、ヤング率１０ＭＰａのゲート絶縁層１０４を積層する。   Next, a gate insulating layer 104 having a thickness of 300 nm and a Young's modulus of 10 MPa is laminated on the organic semiconductor 103 through a mixing process, a rolling process, a molding process, and a vulcanization process.

次に、金属マスクを用いて金を５０ｎｍ蒸着し、ゲート電極１０５を形成する。その後、ポリビニルフェノールをスピンコート法により塗布し、保護層１０６を形成する。最後に、ゲート電極、ドレイン電極、ソース電極の各電極に０．１ｍｍφの銀ペーストで配線し、圧力センサを作製する。   Next, gold is deposited by 50 nm using a metal mask to form the gate electrode 105. Thereafter, polyvinyl phenol is applied by a spin coating method to form the protective layer 106. Finally, wiring is made to each electrode of the gate electrode, the drain electrode, and the source electrode with a silver paste of 0.1 mmφ to produce a pressure sensor.

圧力を加えない図１（ａ）の状態でゲート電極に−５０Ｖ、ドレイン電極に−５０Ｖ印加すると、５×１０-5Ａの電流値を得ることが出来る。 When -50 V is applied to the gate electrode and -50 V is applied to the drain electrode in the state of FIG. 1A without applying pressure, a current value of 5 × 10 −5 A can be obtained.

また、３．５ＭＰａの圧力を保護層１０６側から加えた図１（ｂ）の状態で、ゲート電極に−５０Ｖ、ドレイン電極に−５０Ｖ印加すると、７．７×１０-5Ａの電流値を得ることが出来る。 In addition, when -50V is applied to the gate electrode and -50V to the drain electrode in the state of FIG. 1B in which a pressure of 3.5 MPa is applied from the protective layer 106 side, a current value of 7.7 × 10 −5 A is obtained. Can be obtained.

更に、再度圧力を加えない図１（ａ）の状態に戻し、ゲート電極に−５０Ｖ、ドレイン電極に−５０Ｖ印加すると、５×１０-5Ａの電流値を得ることが出来、圧力を加えた後も同等の特性を得ることが出来る。 Furthermore, when the pressure is not applied again and the state shown in FIG. 1A is restored and -50V is applied to the gate electrode and -50V is applied to the drain electrode, a current value of 5 × 10 -5 A can be obtained. The same characteristics can be obtained later.

＜実施例２＞
図２に本実施例の圧力センサの断面図を示す。 <Example 2>
FIG. 2 shows a cross-sectional view of the pressure sensor of this embodiment.

ポリイミド基板１０１上にレジストを塗布しフォトリソグラフィを行い、金を５０ｎｍ蒸着する。その後、リフトオフ法によりゲート電極１０５を形成する。   A resist is applied on the polyimide substrate 101, photolithography is performed, and gold is deposited by 50 nm. Thereafter, the gate electrode 105 is formed by a lift-off method.

次に、スチレン・ブタジエン共重合ゴムを、混合過程、圧延過程、成形工程、加硫工程を経て、厚さ３００ｎｍ、ヤング率２ＭＰａのゲート絶縁層１０４を形成する。   Next, the gate insulating layer 104 having a thickness of 300 nm and a Young's modulus of 2 MPa is formed from the styrene / butadiene copolymer rubber through a mixing process, a rolling process, a molding process, and a vulcanization process.

次に、インクジェット法により、チャネル長１０ｃｍ、チャネル幅１００μｍのソース・ドレイン電極１０２をゲート絶縁層１０４上に形成する。次に、ポリ（９，９−ジオクチルフルオレン−コ−ビチオフェン）のキシレン溶液（０．０１ｇ／ｍｌ）をスピンコート法により塗布した後、窒素雰囲気下において１５０℃で３０分乾燥し、有機半導体１０３を１００ｎｍ形成する。その後、ポリビニルフェノールをスピンコート法により塗布し、保護層１０６を形成する。   Next, a source / drain electrode 102 having a channel length of 10 cm and a channel width of 100 μm is formed on the gate insulating layer 104 by an inkjet method. Next, a xylene solution (0.01 g / ml) of poly (9,9-dioctylfluorene-co-bithiophene) was applied by a spin coating method, and then dried at 150 ° C. for 30 minutes in a nitrogen atmosphere. To 100 nm. Thereafter, polyvinyl phenol is applied by a spin coating method to form the protective layer 106.

最後に、実施例１と同様にして各電極に配線し、圧力センサを作製する。   Finally, wiring is made to each electrode in the same manner as in Example 1 to produce a pressure sensor.

圧力を加えない状態でゲート電極に−５０Ｖ、ドレイン電極に−５０Ｖ印加すると、３×１０-5Ａの電流値を得ることが出来る。 When -50V is applied to the gate electrode and -50V to the drain electrode without applying pressure, a current value of 3 × 10 -5 A can be obtained.

また、０．５ＭＰａの圧力を保護層１０６側から加えた状態でゲート電極に−５０Ｖ、ドレイン電極に−５０Ｖそれぞれ印加すると、４×１０-5Ａの電流値を得ることが出来る。 When a pressure of 0.5 MPa is applied from the protective layer 106 side and −50 V is applied to the gate electrode and −50 V to the drain electrode, a current value of 4 × 10 −5 A can be obtained.

更に、再度圧力を加えない状態に戻し、ゲート電極に−５０Ｖ、ドレイン電極に−５０Ｖ印加すると、３×１０-5Ａの電流値を得ることが出来、圧力を加えた後も同等の特性を得ることが出来る。 Furthermore, when the pressure is not applied again and -50V is applied to the gate electrode and -50V is applied to the drain electrode, a current value of 3 × 10 -5 A can be obtained. Can be obtained.

＜実施例３＞
図３に本実施例の圧力センサの断面図を示す。 <Example 3>
FIG. 3 shows a cross-sectional view of the pressure sensor of this embodiment.

ソース・ドレイン電極１０２のチャネル幅を５０μｍとした以外は実施例１と同様にして、ガラス基板１０１上に有機半導体１０３まで形成する。   The organic semiconductor 103 is formed on the glass substrate 101 in the same manner as in Example 1 except that the channel width of the source / drain electrode 102 is set to 50 μm.

次に、ポリビニルフェノールをスピンコート法により塗布し、絶縁層１０４−２を１００ｎｍ形成する。次に、ゴム弾性を示すクロロプレンゴムを、混合過程、圧延過程、成形工程、加硫工程を経て、絶縁層１０４−２上に、厚さ２００ｎｍ、ヤング率１０ＭＰａの弾性層１０４−１を形成する。   Next, polyvinyl phenol is applied by a spin coating method to form an insulating layer 104-2 with a thickness of 100 nm. Next, an elastic layer 104-1 having a thickness of 200 nm and a Young's modulus of 10 MPa is formed on the insulating layer 104-2 through a mixing process, a rolling process, a molding process, and a vulcanization process using chloroprene rubber exhibiting rubber elasticity. .

その後、実施例１と同様にして、圧力センサを作製する。   Thereafter, a pressure sensor is fabricated in the same manner as in Example 1.

圧力を加えない状態でゲート電極に−５０Ｖ、ドレイン電極に−５０Ｖ印加すると、８×１０-5Ａの電流値を得ることが出来る。 When -50V is applied to the gate electrode and -50V to the drain electrode without applying pressure, a current value of 8 × 10 -5 A can be obtained.

また、３．５ＭＰａの圧力を保護層１０６側から加えた状態でゲート電極に−５０Ｖ、ドレイン電極に−５０Ｖ印加すると、１．０４×１０-4Ａの電流値を得ることが出来る。 In addition, when −50 V is applied to the gate electrode and −50 V is applied to the drain electrode with a pressure of 3.5 MPa applied from the protective layer 106 side, a current value of 1.04 × 10 −4 A can be obtained.

更に、再度圧力を加えない状態に戻し、ゲート電極に−５０Ｖ、ドレイン電極に−５０Ｖ印加すると、８×１０-5Ａの電流値を得ることが出来、圧力を加えた後も同等の特性を得ることが出来る。 Furthermore, if the pressure is not applied again and -50V is applied to the gate electrode and -50V is applied to the drain electrode, a current value of 8 × 10 -5 A can be obtained, and the same characteristics can be obtained after the pressure is applied. Can be obtained.

＜実施例４＞
図４に本実施例の圧力センサの断面図を示す。 <Example 4>
FIG. 4 shows a cross-sectional view of the pressure sensor of this embodiment.

実施例２と同様にして、ポリイミド基板１０１上にゲート電極１０５を形成する。   In the same manner as in Example 2, a gate electrode 105 is formed on the polyimide substrate 101.

次に、シリコンゴムを、混合過程、圧延過程、成形工程、加硫工程を経て、厚さ２００ｎｍ、ヤング率０．７ＭＰａの弾性層１０４−１を形成する。次に、弾性層１０４−１上に、パリレンを真空蒸着し、絶縁層１０４−２を１００ｎｍ形成する。   Next, silicon rubber is subjected to a mixing process, a rolling process, a molding process, and a vulcanization process to form an elastic layer 104-1 having a thickness of 200 nm and a Young's modulus of 0.7 MPa. Next, parylene is vacuum-deposited on the elastic layer 104-1 to form the insulating layer 104-2 with a thickness of 100 nm.

その後、有機半導体１０３の形成にポリ−３−ヘキシルチオフェンのクロロホルム溶液（０．０１ｇ／ｍｌ）を用いた以外は実施例２と同様にして、圧力センサを作製する。   Thereafter, a pressure sensor is produced in the same manner as in Example 2 except that a chloroform solution (0.01 g / ml) of poly-3-hexylthiophene is used for forming the organic semiconductor 103.

圧力を加えない状態でゲート電極に−５０Ｖ、ドレイン電極に−５０Ｖ印加すると、２×１０-4Ａの電流値を得ることが出来る。 When -50 V is applied to the gate electrode and -50 V is applied to the drain electrode without applying pressure, a current value of 2 × 10 -4 A can be obtained.

また、０．３５ＭＰａの圧力を保護層１０６側から加えた状態でゲート電極に−５０Ｖ、ドレイン電極に−５０Ｖそれぞれ印加すると、２．２×１０-4Ａの電流値を得ることが出来る。 When a pressure of 0.35 MPa is applied from the protective layer 106 side and −50 V is applied to the gate electrode and −50 V to the drain electrode, a current value of 2.2 × 10 −4 A can be obtained.

更に、再度圧力を加えない状態に戻し、ゲート電極に−５０Ｖ、ドレイン電極に−５０Ｖ印加すると、２×１０-4Ａの電流値を得ることが出来、圧力を加えた後も同等の特性を得ることが出来る。 Furthermore, when the pressure is not applied again and -50V is applied to the gate electrode and -50V is applied to the drain electrode, a current value of 2 × 10 -4 A can be obtained. Can be obtained.

次に、０．３５ＭＰａの圧力に基板１０１側から加えた状態でゲート電極に−５０Ｖ、ドレイン電極に−５０Ｖそれぞれ印加すると、２．１５×１０-4Ａの電流値を得ることが出来る。 Next, a current value of 2.15 × 10 −4 A can be obtained by applying −50 V to the gate electrode and −50 V to the drain electrode while applying a pressure of 0.35 MPa from the substrate 101 side.

また、再度圧力を加えない状態に戻し、ゲート電極に−５０Ｖ、ドレイン電極に−５０Ｖ印加すると、２×１０-4Ａの電流値を得ることが出来、圧力を加えた後も同等の特性を得ることが出来る。 Moreover, when the pressure is not applied again and -50V is applied to the gate electrode and -50V is applied to the drain electrode, a current value of 2 × 10 -4 A can be obtained. Can be obtained.

本発明の圧力センサの構成図の一例を示す図である。It is a figure which shows an example of the block diagram of the pressure sensor of this invention. 実施例の圧力センサの構成図を示す図である。It is a figure which shows the block diagram of the pressure sensor of an Example. 実施例の圧力センサの構成図を示す図である。It is a figure which shows the block diagram of the pressure sensor of an Example. 実施例の圧力センサの構成図を示す図である。It is a figure which shows the block diagram of the pressure sensor of an Example.

符号の説明Explanation of symbols

１０１ 基板
１０２ ソース・ドレイン電極
１０３ 有機半導体
１０４ ゲート絶縁層
１０４−１ 弾性層
１０４−２ 絶縁層
１０５ ゲート電極
１０６ 保護層 DESCRIPTION OF SYMBOLS 101 Substrate 102 Source / drain electrode 103 Organic semiconductor 104 Gate insulating layer 104-1 Elastic layer 104-2 Insulating layer 105 Gate electrode 106 Protective layer

Claims (4)

絶縁性基板上に、少なくともソース電極、ドレイン電極、ゲート電極、有機半導体層及びゲート絶縁層を有し、該ゲート絶縁層の少なくとも一層がゴム弾性を示す弾性層であることを特徴とする圧力センサ。   A pressure sensor having at least a source electrode, a drain electrode, a gate electrode, an organic semiconductor layer, and a gate insulating layer on an insulating substrate, wherein at least one of the gate insulating layers is an elastic layer exhibiting rubber elasticity . 前記弾性層のヤング率が０．１ＭＰａ以上５０ＭＰａ以下であることを特長とする請求項１記載の圧力センサ。   The pressure sensor according to claim 1, wherein Young's modulus of the elastic layer is 0.1 MPa or more and 50 MPa or less. 前記ゲート絶縁層が少なくとも２層以上よりなることを特徴とする請求項１または２記載の圧力センサ。   3. The pressure sensor according to claim 1, wherein the gate insulating layer comprises at least two layers. 前記有機半導体が高分子化合物であることを特徴とする請求項１乃至３のいずれかに記載の圧力センサ。   The pressure sensor according to claim 1, wherein the organic semiconductor is a polymer compound.
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