JP2005005611A - Semiconductor integrated circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce power consumption in an unnecessary area and obtain high performance corresponding to use when obtaining a reconfigurable circuit of which the function can be flexibly changed in a micro process. <P>SOLUTION: The semiconductor integrated circuit is comprised of a reconfigurable circuit 107 provided with a high-threshold voltage transistor area 108 and a low threshold voltage transistor area 109, a circuit development control part 105 that controls which transistor area allows a circuit to be obtained, a power voltage control part 106 to apply a power voltage only to the used transistor area, and a memory 100 to accumulate circuit information. When a high-performance circuit is obtained, the circuit is developed in the low threshold voltage transistor area 109 and the supply of power to the high threshold voltage transistor area 108 is stopped, and conversely, when a low-leak circuit is obtained, the circuit is developed in the high threshold voltage transistor area 108 and the supply of power to the low threshold voltage transistor area 109 is stopped. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to miniaturized semiconductor integrated circuits, and in particular, reconfigurable logic whose logic can be changed according to the application (re-configurable logic: logic whose circuit configuration can be changed by rewriting). The present invention relates to a technology that achieves both high performance and low leakage current.
[0002]
[Prior art]
In recent years, semiconductor manufacturing technology has been miniaturized, and the threshold voltage of a transistor and the power supply voltage applied to a semiconductor integrated circuit tend to decrease. As the threshold voltage decreases, the leakage current between the source and drain increases. Further, in order to realize a high-speed operation of the transistor, it is necessary to further lower the threshold voltage, and accordingly, a leakage current further increases. In the miniaturization process, leakage current is becoming a major cause of increase in power consumption of LSI. Therefore, in order to reduce the power consumption of the LSI in the miniaturization process, it is important not only to reduce the power during operation but also to reduce the leakage current.
[0003]
Recently, it has become possible to realize a system LSI using a reconfigurable logic circuit whose function can be changed according to the application. Although reconfigurable logic circuits place importance on the ability to change functions, efforts to improve performance are currently inadequate. When considering high performance in practice, it is essential to increase the speed of the individual transistors constituting the reconfigurable logic, but on the other hand, the leakage current increases.
[0004]
The leakage current can be reduced by increasing the threshold voltage of the transistor to reduce the leakage current, or by controlling the back gate bias as in VTCMOS to control the leakage voltage during standby. There are methods for reducing current and speeding up operation.
[0005]
In addition, there is a method of reducing leakage current by designing so that power can be turned on / off for each functional block constituting the LSI, and turning off the power when each functional block does not require operation (for example, Patent Document 1).
[0006]
Further, in the miniaturization process, not only the conventional leakage current between the source and the drain but also an increase in leakage current from the gate of the transistor becomes remarkable. This is because, in order to increase the speed of the transistor in the miniaturization process, it is essential to reduce the thickness of the gate oxide film. However, this reduction in thickness causes a large increase in gate leakage.
[0007]
[Patent Document 1]
JP-A-5-29551 (page 3-4, FIG. 2)
[0008]
[Problems to be solved by the invention]
However, when reducing the leakage current by increasing the threshold voltage of the transistor, there is a merit in terms of power reduction, but it becomes difficult to achieve high performance.
[0009]
In addition, regarding the method of controlling the back gate bias and changing the threshold voltage depending on the operation mode as in VTCMOS, if the scaling for improving the operation speed of the circuit is performed after the process of the 0.13 μm generation, the back gate bias voltage There is a tendency that the dependence of the threshold voltage on the value decreases. That is, even if the back gate bias voltage control technique is used, the effect on the reduction of the leakage current is not so much seen, and it becomes difficult to reduce the leakage current or improve the performance.
[0010]
Today, as the semiconductor manufacturing process continues to be miniaturized, the circuit scale that can be realized with reconfigurable logic has become as large as a CPU, making it possible to mount millions of transistors on a single logic. ing. In such a situation, in order to realize a high-speed logic with a large-scale reconfigurable logic, it is essential to use a high-performance transistor, and the absolute value of the leakage current is greatly increased. Further, the leakage current further increases due to the conspicuous gate leakage current. Therefore, in designing LSIs that require both high performance and low power consumption using a fine process, how to reduce the leakage current is a major issue.
[0011]
[Means for Solving the Problems]
In solving the above problem, it is most effective to cut off the power supply voltage in order to reduce the leakage current of the transistor in a fine process, and it is effective to lower the threshold voltage in order to realize high performance. Therefore, the semiconductor integrated circuit according to the present invention divides the transistor region for realizing the reconfigurable logic into a plurality of regions separated from each other by different threshold voltages, and one high threshold voltage transistor region is operated at a low speed. A logic that requires low power consumption is realized, and a logic that requires high performance is realized in the other low threshold voltage transistor region, and a power supply voltage is supplied only to the transistor region used. As a result, it is possible to reduce useless leakage current, and to achieve both low power consumption and high performance as a semiconductor integrated circuit.
[0012]
Hereafter, it can be said as follows when it develops at a more specific level.
[0013]
As a first solution, a semiconductor integrated circuit according to the present invention includes a semiconductor equipped with a reconfigurable circuit section including a high threshold voltage transistor region formed of a low leak transistor and a low threshold voltage transistor region formed of a high speed transistor. The integrated circuit includes a memory unit, a circuit development control unit, and a power supply voltage control unit, which are a plurality of components having the following functions. That is, a memory unit that stores information such as a circuit function realized by reconfigurable logic, an operating frequency, an area, and a threshold voltage, and the high threshold value based on the function or operating frequency information stored in the memory unit A circuit development control unit that determines whether a circuit is realized in a voltage transistor region or the low threshold voltage transistor region, and a power supply to the reconfigurable circuit unit based on a determination by the circuit development control unit A power supply voltage control unit that supplies power to the use transistor region and shuts off the power supply is provided to the non-use transistor region.
[0014]
The effect | action by this structure is as follows. Information such as the function, operating frequency, area, and threshold voltage of the circuit to be realized in the reconfigurable circuit section is stored in the memory section, and the circuit development control section is high based on the stored information (function or operating frequency) in the memory section. One of the threshold voltage transistor region and the low threshold voltage transistor region is selected, and the power supply voltage controller supplies power to the used transistor region, while power is cut off to the unused transistor region. When realizing high performance, the low threshold voltage transistor region is developed, and the power supply voltage is applied only to the low threshold voltage transistor region which is the used transistor region. Further, when realizing a low leak, it is expanded to the high threshold voltage transistor region, and the power supply voltage is applied only to the high threshold voltage transistor region which is the transistor region used. In either case, power supply is cut off to the unused transistor region. As a result, wasteful leakage current is reduced, and both low power consumption and high performance as a semiconductor integrated circuit are realized.
[0015]
As a second solution, a semiconductor integrated circuit according to the present invention includes a plurality of constituent elements having the following functions in a semiconductor integrated circuit including a reconfigurable circuit unit composed of a plurality of transistor regions separated from each other in power supply. A memory unit, a circuit development control unit, and a power supply voltage control unit. That is, a memory unit for storing information such as a circuit function realized by reconfigurable logic, an operating frequency, an area, a threshold voltage, and the like, and the plurality of units for realizing the circuit based on the area information stored in the memory unit. A circuit development control unit that determines which of the transistor regions to use as a minimum number of used transistor regions, and a use transistor region for supplying power to the reconfigurable circuit unit based on the determination by the circuit development control unit Is provided with a power supply voltage control section for supplying power and shutting off the power supply in the unused transistor region.
[0016]
The effect | action by this structure is as follows. Information such as circuit function, operating frequency, area, threshold voltage, etc. to be realized in the reconfigurable circuit section is stored in the memory section, and the circuit development control section has a plurality of transistor regions based on the stored information (area) in the memory section. The power supply voltage control unit supplies power to the used transistor region, while shutting off the power to the non-used transistor region. The circuit is realized while always using the minimum necessary number of transistor regions according to the area information, and the power supply voltage is applied only to the transistor region used. It is possible to achieve both low power consumption and low leakage current while minimizing the number of transistors used.
[0017]
As a third solution, a semiconductor integrated circuit according to the present invention includes a plurality of constituent elements having the following functions in a semiconductor integrated circuit including a reconfigurable circuit unit composed of a plurality of transistor regions separated from each other in power supply. A memory unit, a circuit development control unit, and a power supply voltage control unit. That is, a memory unit that stores information such as a circuit function realized by reconfigurable logic, an operating frequency, an area, a threshold voltage, and a power line connection method between transistor regions constituting the logic, and the memory unit. A circuit for determining which of the plurality of transistor regions to be used transistor regions for circuit realization based on the area information and generating wiring information based on information on a power line connection method between the transistor regions An expansion control unit and a power supply voltage control unit for wiring a power supply line only between the used transistor regions of the reconfigurable circuit unit based on matters determined by the circuit expansion control unit. In comparison with the second solving means, information on the power line connection method is used.
[0018]
The effect | action by this structure is as follows. Information such as circuit functions, operating frequency, area, threshold voltage, and power line connection method to be realized in the reconfigurable circuit section is stored in the memory section, and the circuit development control section is based on the stored information (area) in the memory section. Then, it is determined which of the plurality of transistor regions is to be used transistor region, and wiring information for connecting power source lines between the transistor regions is generated based on the power source line connection information. Then, the power supply voltage control unit performs power supply line wiring between the used transistor regions, and as a result, a circuit is realized while minimizing the used transistor regions, and the power supply voltage is applied only to the used transistor regions. . It is possible to achieve both low power consumption and low leakage current while minimizing the number of transistors used.
[0019]
As a fourth solution, a semiconductor integrated circuit according to the present invention includes a memory unit, a circuit development control unit, and a power source having a plurality of components having the following functions in a semiconductor integrated circuit including a reconfigurable circuit unit. A voltage control unit is provided. That is, a memory unit that stores information such as a function, an operating frequency, an area, and a threshold voltage of a circuit realized by reconfigurable logic, and the reconfigurable circuit for realizing the circuit based on the stored information of the memory unit A circuit development control unit that determines how to deploy the circuit to the unit, and determines a back gate bias voltage to be supplied to the reconfigurable circuit unit based on threshold voltage information stored in the memory unit, and the circuit development And a back gate bias voltage control unit that controls the supply of the back gate bias voltage to the reconfigurable circuit unit based on matters determined by the control unit.
[0020]
The effect | action by this structure is as follows. Information such as the function, operating frequency, area, and threshold voltage of the circuit to be realized in the reconfigurable circuit unit is stored in the memory unit, and the circuit development control unit is based on the stored information in the memory unit. Determines how to develop the circuit, determines a back gate bias voltage to be supplied to the reconfigurable circuit unit based on threshold voltage information stored in the memory unit, and the back gate bias voltage control unit The supply of the determined back gate bias voltage to the reconfigurable circuit unit is controlled. This achieves performance and power optimization.
[0021]
As a fifth solution, a semiconductor integrated circuit according to the present invention includes a memory unit, a circuit development control unit, a power source, and a plurality of constituent elements having the following functions in a semiconductor integrated circuit including a reconfigurable circuit unit. A voltage control unit and a back gate bias voltage control unit are provided. That is, a memory unit that stores information such as a function, an operating frequency, an area, and a threshold voltage of a circuit realized by reconfigurable logic, and the reconfigurable circuit for realizing the circuit based on the stored information of the memory unit A circuit development control unit that determines how to deploy the circuit to the unit, and determines a back gate bias voltage to be supplied to the reconfigurable circuit unit based on threshold voltage information stored in the memory unit, and the circuit development A power supply voltage control unit that controls application of a power supply voltage to the reconfigurable circuit unit based on a matter determined by the control unit, and a power supply voltage control unit that controls the application to the reconfigurable circuit unit based on a matter determined by the circuit deployment control unit. A back gate bias voltage control unit that controls supply of the back gate bias voltage.
[0022]
According to this configuration, by controlling the power supply voltage and the back gate bias voltage applied to the reconfigurable circuit unit, it is possible to realize an operation in a wide frequency range for the same function.
[0023]
As a sixth solution, a semiconductor integrated circuit according to the present invention includes a plurality of components having the following functions in a semiconductor integrated circuit equipped with a reconfigurable circuit unit composed of transistor regions in which base potentials are individually separated. The device includes a memory unit, a circuit development control unit, a power supply voltage control unit, and a back gate bias voltage control unit. That is, a memory unit that stores information such as a function, an operating frequency, an area, and a threshold voltage of a circuit realized by reconfigurable logic, and the reconfigurable circuit for realizing the circuit based on the stored information of the memory unit A circuit development control unit for determining how to deploy the circuit to the unit, and determining a power supply voltage and a back gate bias voltage to be supplied to the reconfigurable circuit unit based on threshold voltage information stored in the memory unit; Based on the items determined by the circuit development control unit, the power supply voltage control unit that individually controls the application of the power supply voltage to each transistor region of the reconfigurable circuit unit, and the items determined by the circuit development control unit Based on the back gate via for each transistor region of the reconfigurable circuit portion. And a back gate bias voltage control unit for controlling application of a voltage individually.
[0024]
According to this configuration, optimization of performance and power is realized by individually controlling the power supply voltage and the back gate bias voltage independently from each other for each transistor region.
[0025]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of a semiconductor integrated circuit according to the present invention will be described below in detail with reference to the drawings.
[0026]
(Embodiment 1)
FIG. 1 is a block diagram showing a configuration of a semiconductor integrated circuit according to the first embodiment of the present invention.
[0027]
The semiconductor integrated circuit according to the present embodiment includes a memory 100, a circuit development control unit 105, a power supply voltage control unit 106, and a reconfigurable circuit 107. The memory 100 stores information for changing the reconfigurable circuit 107 to a desired function. Among the information input and stored as circuit information input from the outside to the memory 100, the function information 101 regarding the function actually realized by the reconfigurable circuit 107, the operating frequency information 102, and the area necessary for realizing the function Information relating to the process, such as area information 103 relating to the threshold voltage information 104 necessary for realizing the operating frequency.
[0028]
The reconfigurable circuit 107 includes a high threshold voltage transistor region 108 and a low threshold voltage transistor region 109. Here, the high threshold voltage transistor region 108 is a transistor region having a high threshold voltage that can realize low leakage, while slowing in performance. On the other hand, the low threshold voltage transistor region 109 is a transistor region having a low threshold voltage, which has a large leakage current but has high transistor performance and can achieve high performance.
[0029]
In order to realize the desired function, the circuit development control unit 105 determines which region of the high threshold voltage transistor region 108 and the low threshold voltage transistor region 109 in the reconfigurable circuit 107 is good, and supplies the power supply voltage. The determination of which area is performed is performed based on the information stored in the memory 100 to realize a circuit that satisfies the required specifications (function / operation frequency).
[0030]
Further, the power supply voltage control unit 106 realizes control of the transistor region that supplies the power supply voltage according to the determination information from the circuit development control unit 105.
[0031]
That is, when realizing high performance, a circuit is developed on the low threshold voltage transistor region 109 to supply power to the low threshold voltage transistor region 109 which is a used transistor region, while on the other hand, it is a non-used transistor region. The power supply to the high threshold voltage transistor region 108 is cut off.
[0032]
Conversely, in order to realize low leakage, a circuit is developed in the high threshold voltage transistor region 108 to supply power to the high threshold voltage transistor region 108 which is a used transistor region, while on the other hand, The power supply to the threshold voltage transistor region 109 is cut off.
[0033]
The operation of the semiconductor integrated circuit of the present embodiment configured as described above will be described in detail according to the flowchart shown in FIG.
[0034]
In step 200 for inputting circuit information, information such as function information 101, operating frequency information 102, area information 103, threshold voltage information 104 and the like to be realized by the reconfigurable circuit 107 is stored in the memory 100.
[0035]
Next, in step 201 of circuit information analysis, the circuit development control unit 105 determines the high threshold voltage transistor region 108 and the low threshold value of the reconfigurable circuit 107 according to the information stored in the memory 100, particularly the threshold voltage information 107. It is determined in which region of the voltage transistor region 109 the circuit is developed.
[0036]
Based on this result, in step 202 for selecting the used transistor region, the subsequent processing is branched for the used transistor region determined in step 201 of the previous circuit information analysis.
[0037]
In order to develop the low threshold voltage transistor region 109 in order to realize high performance, the required specification circuit is developed in the low threshold voltage transistor region 109 in step 203 of circuit deployment to the low threshold voltage transistor region. . Then, in step 204 of applying power to the low threshold voltage transistor region after completion of the development, the power supply voltage control unit 106 applies the power supply voltage only to the low threshold voltage transistor region 109 to realize a circuit that satisfies the required specifications. .
[0038]
In order to develop the high threshold voltage transistor region 108 in order to realize low leakage, the circuit of the required specification is developed in the high threshold voltage transistor region 108 in step 205 of circuit deployment to the high threshold voltage transistor region. Do. Then, in step 206 of power supply to the high threshold voltage transistor region after the completion of the deployment, the power supply voltage control unit 106 applies the power supply voltage only to the high threshold voltage transistor region 108 and sets the required specifications (function / operation frequency). Realize a satisfactory circuit.
[0039]
As described above, the circuit operation is executed in a state in which the circuit satisfying the required specifications is realized.
[0040]
After that, it waits for a request to change to the next circuit. When such a new change request is received, it is accepted in step 207 of the circuit change request, and in step 208 of power shutdown, the circuit development control unit 105 determines that the power should be forcibly cut off based on the information of the change request. Then, the power supply voltage control unit 106 blocks application of all power supply voltages to the reconfigurable circuit 107. After clearing all the circuit operations on the reconfigurable circuit 107 in this way, the process proceeds to step 200 for inputting circuit information in order to develop the next circuit.
[0041]
As described above, according to the present embodiment, the transistor region for developing the circuit is selected according to the required specification (function / operation frequency) of the circuit to be realized by the reconfigurable circuit 107, and the power supply voltage of the unused transistor region is selected. Is configured so as to be shut off, it is possible to realize circuit development of reconfigurable logic while satisfying required specifications and low power consumption. That is, it is possible to reduce useless leakage current and achieve both low power consumption and high performance as a semiconductor integrated circuit.
[0042]
(Embodiment 2)
FIG. 3 is a block diagram showing a configuration of the semiconductor integrated circuit according to the second embodiment of the present invention. 3, 300 is a memory, 301 is function information, 302 is operating frequency information, 303 is area information, 304 is threshold voltage information, 305 is a circuit development control unit, 306 is a power supply voltage control unit, and 307 is a reconfigurable circuit. It is. Since these components are the same as those in the first embodiment shown in FIG. 1, detailed description thereof is omitted. The reconfigurable circuit 307 is composed of a plurality of cell rows 308 to 313 of ROW0 to ROWn that are separated from each other in power supply. In the cell columns 308 to 313 that are individually separated from each other, transistors are included in a specific number. Other configurations are the same as those in the first embodiment.
[0043]
Based on the information stored in the memory 300, the circuit development control unit 305 determines how much of the area of the reconfigurable circuit 307 should be used to realize the desired function, and which cell It is determined whether the power supply voltage is supplied to the transistors in the column, and a circuit that satisfies the required specifications is realized.
[0044]
In addition, the power supply voltage control unit 306 realizes control of the cell string that supplies the power supply voltage according to the determination information from the circuit development control unit 305. When the reconfigurable logic is actually realized, a required number of cell columns are selected in the reconfigurable circuit 307 according to the area information 303 necessary for realizing a desired function, and power is supplied only to the selected cell columns. By applying a voltage and shutting off the power supply for portions not involved in the function, leakage current in unnecessary circuit portions is reduced, and a reconfigurable logic is realized in a low power consumption state.
[0045]
The operation of the semiconductor integrated circuit of the present embodiment configured as described above will be described in detail with reference to the flowchart shown in FIG.
[0046]
In step 400 for inputting circuit information, information such as function information 301, operating frequency information 302, area information 303, threshold voltage information 304, and the like to be realized by the reconfigurable circuit 307 is stored in the memory 300.
[0047]
Next, in step 401 of circuit information analysis, the circuit development control unit 305 determines an area necessary for circuit development that realizes a desired function. Actually, based on the information stored in the memory 300, particularly the area information 303, it is determined how many cell columns in the reconfigurable circuit 307 need to be used.
[0048]
In step 402 of determining the number of used cell columns, the number of cell columns necessary for realizing a desired function is determined. Here, the area to be compared is increased by sequentially increasing the number of cell columns by incrementing the variable n, and the necessary area is confirmed by comparing with the area information 303 stored in the memory 300. This minimizes the number of transistor regions used.
[0049]
Next, in step 403 of circuit expansion to the selected cell column, the circuit expansion control unit 305 moves to the selected cell column according to the information regarding the number of cell columns selected in step 402 of determining the number of used cell columns. Perform circuit development that satisfies the required specifications.
[0050]
Next, in step 404 of applying power to the selected cell column, the power source voltage control unit 306 applies the power source voltage to the cell column selected in step 402 for determining the number of used cell columns. With respect to the cell column that has not been selected, a power supply voltage is not applied and a leak current or the like is not generated. In this way, a circuit that satisfies the required specifications is realized.
[0051]
As described above, the circuit operation is executed in a state where the circuit satisfying the required specifications (area) is realized.
[0052]
After that, it waits for a request to change to the next circuit. When such a new change request is received, it is accepted in step 405 of the circuit change request, and in step 406 of the power shutdown, the circuit development control unit 305 determines that the power should be forcibly cut off based on the information of the change request. Then, the power supply voltage control unit 306 blocks application of all power supply voltages to the reconfigurable circuit 307. After clearing all the circuit operations on the reconfigurable circuit 307 as described above, the process proceeds to step 400 for inputting circuit information in order to develop the next circuit.
[0053]
As described above, according to the present embodiment, the circuit development area is limited according to the required specification (area), and the power supply voltage in the unused area is cut off. The circuit development of reconfigurable logic can be realized under power consumption.
[0054]
(Embodiment 3)
FIG. 5 is a block diagram showing the configuration of the semiconductor integrated circuit according to the third embodiment of the present invention. 5, 500 is a memory, 501 is function information, 502 is operating frequency information, 503 is area information, 504 is threshold voltage information, 505 is a circuit development control unit, 506 is a power supply voltage control unit, and 507 is a reconfigurable circuit. , 509 to 513 are a plurality of cell columns separated from each other in power source. Since these components are the same as those of the second embodiment shown in FIG. 3, detailed description thereof is omitted. In the present embodiment, the power supply line connection information 508 regarding the connection of the power supply lines between individual cell columns in the reconfigurable circuit 507 is also stored in the memory 500. Other configurations are the same as those in the second embodiment.
[0055]
The circuit development control unit 505 determines, based on the information stored in the memory 500, how much area the transistor region of the reconfigurable circuit 507 should be used in order to realize the desired function; The power supply line connection information 508 relating to the connection of the power supply lines between the cell columns used for realizing the function is controlled to realize a circuit that satisfies the required specifications.
[0056]
Further, the power supply voltage control unit 506 controls the supply of the power supply voltage to the reconfigurable circuit 507 according to the determination information from the circuit development control unit 505. When the reconfigurable logic is actually realized, a required number of cell columns are selected in the reconfigurable circuit 507 in accordance with the area information 503 essential for realizing a desired function, and power supply lines between the selected cell columns are selected. By generating and applying the power supply voltage, the reconfigurable circuit 507 can be operated as a circuit that satisfies the required specifications (area / wiring). In addition, since the application of the power supply voltage to the unused transistor region is cut off, the leakage current in the unnecessary circuit portion is reduced, and the reconfigurable logic is realized in a low power consumption state.
[0057]
The operation of the semiconductor integrated circuit of the present embodiment configured as described above will be described in detail according to the flowchart shown in FIG.
[0058]
In step 600 for inputting circuit information, function information 501, operating frequency information 502, area information 503, threshold voltage information 504 to be realized by the reconfigurable circuit 507 in the memory 500, and a power supply line relating to a power supply line connection method between used cell columns Information such as connection information 508 is accumulated (accumulation of power line connection information 508 is different from step 400 in FIG. 4).
[0059]
Next, in step 601 of circuit information analysis, the circuit development control unit 505 determines an area necessary for circuit development that realizes a desired function. Actually, based on the information stored in the memory 500, particularly the area information 503, it is determined how many cell columns in the reconfigurable circuit 507 need to be used.
[0060]
In step 602 of determining the number of used cell columns, the number of cell columns necessary for realizing a desired function is determined. Here, the area to be compared is increased by sequentially increasing the number of cell columns by incrementing the variable n, and the necessary area is confirmed by comparing with the area information 503 stored in the memory 500. This minimizes the number of transistor regions used.
[0061]
Next, in step 603 of circuit expansion to the selected cell column, the circuit expansion control unit 505 performs the process to the selected cell column according to the information regarding the number of cell columns selected in step 602 of the previous determination of the number of used cell columns. The circuit development satisfying the required specifications is performed, and further, the connection of the power line between the cell rows is performed.
[0062]
Next, in step 604 of applying power to the reconfigurable circuit, the power supply voltage control unit 506 applies power supply voltage to the reconfigurable circuit 507. A cell string that is not connected to the power supply line in the reconfigurable circuit 507 can be left without applying a power supply voltage, and therefore, a leak current or the like does not occur. In this way, a circuit that satisfies the required specifications is realized.
[0063]
As described above, the circuit operation is executed in a state in which the circuit satisfying the required specifications (area / wiring) is realized.
[0064]
After that, it waits for a request to change to the next circuit. When such a new change request is received, it is accepted in step 605 of the circuit change request, and in step 606 of power shutdown, the circuit development control unit 505 determines that the power should be forcibly cut off based on the information of the change request. Then, the power supply voltage control unit 506 blocks application of the power supply voltage to the reconfigurable circuit 507. In this way, after all the circuit operations on the reconfigurable circuit 507 are cleared, the process proceeds to step 600 for inputting circuit information in order to develop the next circuit.
[0065]
As described above, according to the present embodiment, the circuit development area is limited according to the required specifications (area / wiring), and the power supply line connection is made on the reconfigurable circuit 507. In addition, circuit development of reconfigurable logic can be realized while satisfying the required specifications and low power consumption.
[0066]
(Embodiment 4)
FIG. 7 is a block diagram showing a configuration of a semiconductor integrated circuit according to the fourth embodiment of the present invention. In FIG. 7, 700 is a memory, 701 is function information, 702 is operating frequency information, 703 is area information, 704 is threshold voltage information, 705 is a circuit development control unit, 707 is a reconfigurable circuit, and 708 to 712 are power supplies to each other. A plurality of separated cell rows. Since these components are the same as those of the second embodiment shown in FIG. 3, detailed description thereof is omitted. However, the plurality of cell rows 708 to 712 are separated from each other. In this embodiment, a back gate bias voltage control unit 706 is provided instead of the power supply voltage control unit 306 in FIG. The back gate bias voltage control unit 706 controls the supply of the back gate bias voltage so that each cell column has a threshold voltage value satisfying the required specifications according to the setting information from the circuit development control unit 705. Other configurations are the same as those in the second embodiment.
[0067]
The circuit development control unit 705 sets the threshold voltage of each cell column necessary for satisfying the required specification in the reconfigurable circuit 707 based on the information stored in the memory 700, particularly the threshold voltage information 704. .
[0068]
Further, the back gate bias voltage control unit 706 is configured so that the back gate bias voltage is set to a threshold voltage value satisfying the required specifications for each cell column constituting the reconfigurable circuit 707 according to the setting information by the circuit development control unit 705. To control the supply. When the reconfigurable logic is actually realized, the reconfigurable circuit 707 has the required specifications by applying the back gate bias voltage to each cell column according to the threshold voltage information 704 essential for realizing the desired performance. It is possible to operate as a satisfactory circuit.
[0069]
For example, when considering which cell column to expand a cell based on information about the timing of the circuit to be expanded, place a cell related to a path with a long delay time in a specific cell column, By applying to the lower threshold voltage Vt as the back gate bias voltage to be applied, it becomes possible to increase the speed of a specific portion, particularly a circuit portion that is slow in terms of delay, and the entire circuit can be increased in speed. . Further, by not applying the back gate bias voltage more than necessary, each transistor is controlled with the optimum threshold voltage, and the occurrence of an excessive leakage current can be prevented.
[0070]
The operation of the semiconductor integrated circuit of the present embodiment configured as described above will be described in detail with reference to the flowchart shown in FIG.
[0071]
In step 800 for inputting circuit information, information such as function information 701, operating frequency information 702, area information 703, threshold voltage information 704 and the like to be realized by the reconfigurable circuit 707 is stored in the memory 700.
[0072]
Next, in step 801 of circuit information analysis, the circuit development control unit 705 determines a threshold voltage necessary for circuit development that achieves a desired performance. Actually, the back gate bias voltage value to be applied to each cell column in the reconfigurable circuit 707 is determined based on the information stored in the memory 700, particularly the threshold voltage information 704.
[0073]
Next, in step 802 of circuit expansion to the selected cell column, circuit expansion that satisfies the required specifications is performed for each cell column constituting the reconfigurable circuit 707 based on the information determined by the circuit expansion control unit 705.
[0074]
Next, in step 803 of applying the back gate bias voltage to the selected cell column, the back gate bias voltage control unit 706 applies the back gate bias voltage to each cell column.
[0075]
Further, in step 804 for applying a power supply voltage, a power supply voltage is applied to the reconfigurable circuit 707.
[0076]
As a result, the reconfigurable circuit 707 that satisfies the required specifications can be realized.
[0077]
As described above, the circuit operation is executed in a state where the circuit satisfying the required specifications (back gate bias voltage / operation timing) is realized.
[0078]
After that, it waits for a request to change to the next circuit. When the new change request is received, it is accepted in step 805 of the circuit change request, and in step 806 of the power shutdown, the circuit development control unit 705 determines that the power should be forcibly cut off based on the information of the change request. Then, application of the power supply voltage and the back gate bias voltage to the reconfigurable circuit 707 is cut off. In this way, after all the circuit operations on the reconfigurable circuit 707 are cleared, the process proceeds to step 800 for inputting circuit information in order to develop the next circuit.
[0079]
As described above, according to the present embodiment, an optimal back gate bias is set for each cell column that implements the reconfigurable circuit 707 according to the required specifications (back gate bias voltage / operation timing). Since it is configured, it is possible to realize circuit development of reconfigurable logic that satisfies the required specifications and does not generate leakage current more than necessary.
[0080]
(Embodiment 5)
FIG. 9 is a block diagram showing a configuration of a semiconductor integrated circuit according to the fifth embodiment of the present invention. 9, 900 is a memory, 901 is function information, 902 is operating frequency information, 903 is area information, 904 is threshold voltage information, 905 is a circuit development control unit, 906 is a back gate bias voltage control unit, and 907 is reconfigurable. The blue circuits 908 to 912 are a plurality of cell columns separated from each other by a base and a power source. Since these components are the same as those of the fourth embodiment shown in FIG. 7, detailed description thereof is omitted. Reference numeral 913 denotes a power supply voltage control unit, and reference numeral 914 denotes output voltage information for the power supply voltage control unit 913. These components are the same as those in the second embodiment shown in FIG. Omitted. In the present embodiment, the control of the back gate bias voltage by the back gate bias voltage control unit 906 and the control of the power supply voltage by the power supply voltage control unit 913 are performed for all the cell columns in the reconfigurable circuit 907. Are configured to be performed independently of each other. Other configurations are the same as those in the fourth embodiment.
[0081]
As described above, the semiconductor integrated circuit according to the present embodiment is a combination of the second embodiment shown in FIG. 3 and the fourth embodiment shown in FIG. 7, and has the functions according to the respective embodiments. A circuit that satisfies the required specifications (area, back gate bias voltage, operation timing) can be realized. Furthermore, since the power supply voltage and the back gate bias voltage applied to all the cell columns can be controlled independently of each other, operation in a wide frequency range can be realized for the same function.
[0082]
(Embodiment 6)
FIG. 10 is a block diagram showing a configuration of a semiconductor integrated circuit according to the sixth embodiment of the present invention. The components in FIG. 10 are the same as those in the fifth embodiment shown in FIG. In the present embodiment, the back gate bias voltage control unit 906 is configured to individually control the back gate bias voltage for each of the plurality of cell columns 908 to 912. The power supply voltage control unit 913 is also configured to individually control the power supply voltage for each of a plurality of cell columns 908 to 912. Other configurations are the same as those in the fifth embodiment.
[0083]
As described above, the semiconductor integrated circuit of the present embodiment performs individual control of the threshold voltage and the back gate bias voltage independent of each other for a plurality of cell columns, so that optimization of performance and power can be realized.
[0084]
【The invention's effect】
As described above, according to the present invention, in a semiconductor integrated circuit having a reconfigurable logic, since leakage current is suppressed while satisfying required specifications, high performance and low power consumption, which are major issues in a fine process, are achieved. Can be realized.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a configuration of a semiconductor integrated circuit according to a first embodiment of the present invention.
FIG. 2 is a flowchart showing the operation of the semiconductor integrated circuit according to the first embodiment of the present invention.
FIG. 3 is a block diagram showing a configuration of a semiconductor integrated circuit according to a second embodiment of the present invention.
FIG. 4 is a flowchart showing the operation of the semiconductor integrated circuit according to the second embodiment of the present invention.
FIG. 5 is a block diagram showing a configuration of a semiconductor integrated circuit according to a third embodiment of the present invention.
FIG. 6 is a flowchart showing the operation of the semiconductor integrated circuit according to the third embodiment of the present invention.
FIG. 7 is a block diagram showing a configuration of a semiconductor integrated circuit according to a fourth embodiment of the present invention.
FIG. 8 is a flowchart showing the operation of the semiconductor integrated circuit according to the fourth embodiment of the present invention.
FIG. 9 is a block diagram showing a configuration of a semiconductor integrated circuit according to a fifth embodiment of the present invention.
FIG. 10 is a block diagram showing a configuration of a semiconductor integrated circuit according to a sixth embodiment of the present invention.
[Explanation of symbols]
100, 300, 500, 700, 900 memory
101, 301, 501, 701, 901 Function information
102, 302, 502, 702, 902 Operating frequency information
103,303,503,703,903 Area information
104, 304, 504, 704, 904, 914 Threshold voltage information
105, 305, 505, 705, 905 Circuit development control unit
106, 306, 506, 913 Power supply voltage control unit
107,307,507,707,907 reconfigurable circuit
108 High threshold voltage transistor region
109 Low threshold voltage transistor region
308 to 313, 509 to 513, 708 to 712, 908 to 912 cell array
508 Power line connection information
706, 906 Back gate bias voltage controller

Claims (6)

A semiconductor integrated circuit equipped with a reconfigurable circuit unit composed of a high threshold voltage transistor region composed of low leak transistors and a low threshold voltage transistor region composed of high speed transistors,
A memory unit for storing information such as circuit functions realized by reconfigurable logic, operating frequency, area, threshold voltage, and the like;
A circuit development control unit that determines whether to implement a circuit in the high threshold voltage transistor region or the low threshold voltage transistor region based on information on the function or operating frequency accumulated in the memory unit;
A power supply voltage control unit that supplies power to the use transistor region and supplies power to the non-use transistor region for power supply to the reconfigurable circuit unit based on the determination by the circuit development control unit. A semiconductor integrated circuit characterized by the above. A semiconductor integrated circuit equipped with a reconfigurable circuit unit comprising a plurality of transistor regions separated from each other in power supply,
A memory unit for storing information such as circuit functions realized by reconfigurable logic, operating frequency, area, threshold voltage, and the like;
A circuit development control unit that determines which of the plurality of transistor regions to use as a minimum number of transistor regions for circuit realization based on area information stored in the memory unit;
A power supply voltage control unit that supplies power to the use transistor region and supplies power to the non-use transistor region for power supply to the reconfigurable circuit unit based on the determination by the circuit development control unit. A semiconductor integrated circuit characterized by the above. A semiconductor integrated circuit equipped with a reconfigurable circuit unit comprising a plurality of transistor regions separated from each other in power supply,
A memory unit for storing information such as a circuit function realized by reconfigurable logic, an operating frequency, an area, a threshold voltage, and a power line connection method between transistor regions constituting the logic;
Based on the area information stored in the memory unit, it is determined which of the plurality of transistor regions is to be used as a transistor region for circuit implementation, and based on information on a power line connection method between the transistor regions A circuit development control unit for generating wiring information;
A semiconductor integrated circuit, comprising: a power supply voltage control unit configured to wire a power supply line only between used transistor regions of the reconfigurable circuit unit based on a matter determined by the circuit development control unit. A semiconductor integrated circuit having a reconfigurable circuit portion,
A memory unit for storing information such as circuit functions realized by reconfigurable logic, operating frequency, area, threshold voltage, and the like;
Based on the storage information of the memory unit, it is determined how to deploy the circuit to the reconfigurable circuit unit for circuit realization, and the reconfigurable circuit unit based on threshold voltage information stored in the memory unit A circuit development control unit for determining a back gate bias voltage to be supplied to
A semiconductor integrated circuit comprising: a back gate bias voltage control unit that controls supply of a back gate bias voltage to the reconfigurable circuit unit based on a matter determined by the circuit development control unit. A semiconductor integrated circuit having a reconfigurable circuit portion,
A memory unit for storing information such as circuit functions realized by reconfigurable logic, operating frequency, area, threshold voltage, and the like;
Based on the storage information of the memory unit, it is determined how to deploy the circuit to the reconfigurable circuit unit for circuit realization, and the reconfigurable circuit unit based on threshold voltage information stored in the memory unit A circuit development control unit for determining a back gate bias voltage to be supplied to
A power supply voltage control unit that controls application of a power supply voltage to the reconfigurable circuit unit, based on a matter determined by the circuit development control unit;
A semiconductor integrated circuit comprising: a back gate bias voltage control unit that controls supply of a back gate bias voltage to the reconfigurable circuit unit based on a matter determined by the circuit development control unit. A semiconductor integrated circuit equipped with a reconfigurable circuit unit composed of transistor regions in which the substrate potential is individually separated,
A memory unit for storing information such as circuit functions realized by reconfigurable logic, operating frequency, area, threshold voltage, and the like;
Based on the storage information of the memory unit, it is determined how to deploy the circuit to the reconfigurable circuit unit for circuit realization, and the reconfigurable circuit unit based on threshold voltage information stored in the memory unit A circuit development control unit for determining a power supply voltage and a back gate bias voltage to be supplied to
Based on the items determined by the circuit development control unit, a power supply voltage control unit that individually controls the application of the power supply voltage to each transistor region of the reconfigurable circuit unit;
A back gate bias voltage control unit for individually controlling the application of a back gate bias voltage to each transistor region of the reconfigurable circuit unit based on a matter determined by the circuit development control unit. A semiconductor integrated circuit.

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