JP2002289772A - High heat resistant semiconductor device and power converter using it - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a high heat resistant semiconductor device with high reliability for suppressing the occurrence of thermal stress for use in a wide temperature range. SOLUTION: The high heat resistant semiconductor device juxtaposes and assembles one or a plurality of semiconductor chips 1 having a first main electrode on a first main face and a second main electrode on a second main face in a flat package insulated from the outside by an insulation outer cylinder 7 between a pair of common electrodes 5, 6, conductive intermediate electrodes 3, 4 are interposed every chip between at least one main electrode of the semiconductor chip and the common electrodes of a package side opposed thereto, and the intermediate electrode and the semiconductor chip are mutually positioned by a heat resistant insulation guide member 10 by making each outer periphery reference in the semiconductor device locked with an insertion structure performed on the opposite faces of them.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a highly heat-resistant semiconductor device in which one or a plurality of semiconductor chips are connected in parallel and incorporated in one package, and a power converter using the same.

[0002]

2. Description of the Related Art Power electronics technology for controlling main circuit current by making full use of Si semiconductor electronics technology has been applied in a wide range of fields along with its performance improvement, and its application is being expanded. In addition to diodes and thyristors, MOS-type field-effect transistors (hereinafter abbreviated as MOSFETs), which are MOS control devices for controlling the main current by an input signal to a MOS-structured gate, and insulated-gate bipolar transistors (hereinafter abbreviated as IGBTs) Etc. are noticed,
It is widely used as a power switching device for applications such as motor PWM control inverters.

[0003] However, in recent years, high-performance devices which have reached the limits of Si devices have been developed.
In order to further improve the performance of power devices, studies on power devices using new semiconductor materials such as SiC, GaN, and diamond instead of Si have begun.
Among them, SiC is attracting attention as the most promising device,
R & D is underway. Since SiC has a larger breakdown electric field and a wider band gap than Si, it is possible to operate a semiconductor at a high temperature, and so on. It is expected to be used at a high temperature, that is, to realize a system in which a cooling system is simplified.

[0004] In a conventional Si semiconductor power device mounting form, after mounting one chip for low power capacity on a heat sink, the whole is resin-molded, or a discrete element such as IGBT called module structure for larger capacity. Package form is the mainstream.

In the module structure, a main electrode on a second main surface of a semiconductor chip is generally soldered on a metal base also serving as a heat radiator via an insulating plate, and a main electrode (emitter electrode) on the first main surface is formed. The control electrode (gate electrode) is wire-bonded between an emitter provided in a resin case and an external lead-out terminal for a gate with a conductive wire such as aluminum, and is led out of the package. The inside of the package is filled with silicone gel in order to ensure the reliability of the chip.

On the other hand, as another mounting form of the power device, an element in which external electrodes are formed on both sides of a flat element has been developed, and a diode, a thyristor, a GTO (gate turn-on) has been developed.
offthyristor), IGBT (insulated gate bipolar trans)
istor). In particular, in the IGBT flat element, a plurality of Si chips are incorporated in a package in parallel,
A package with a pressure contact structure in which the emitter electrode and the collector electrode formed on the main surface are surface-connected to the upper and lower electrode plates provided on the package side, respectively, and pulled out, has been proposed. This is a preferred implementation.

[0007] For example, in Japanese Patent Application Laid-Open No. H08-088240, in the embodiment, 21 Si semiconductor chips (9 IGBTs and 1
A flat IGBT package having two diodes) is disclosed.

FIG. 10 shows a typical example of this package structure.

The second main surfaces (collector side) of the semiconductor chips 21 and 22 are mounted on one large electrode substrate (Mo) 24 provided on the common electrode (Cu) 23 of the package,
The first main surface (emitter side) is configured to be connected to a common electrode (Cu) 27 of a package via individual small pressure contact plates (Mo) 25 and 26 separated for each chip 21 and 22. The positioning of the semiconductor chips 21 and 22 in the package is performed collectively by using a resin chip frame 28 installed on the outer peripheral portion of each of the semiconductor chips 21 and 22 and an external frame 29 integrated therewith. . That is, the resin chip frames 28 installed on the outer peripheral portion of each semiconductor chip are abutted against each other to arrange the respective chips on the same plane, and the outermost peripheral portion of the arranged chip group is integrated with a resin-made integrated external device. At the same time as the position is determined by surrounding the frame 29, the outer frame 29 is finally positioned with reference to the outer peripheral portions of the electrode substrate (Mo) 24 or the common electrodes (Cu) 23 and 27. The structure is such that the position of the chip inside the package is determined.

The prior art relating to this type of semiconductor device is described in WO98 / 43301 in addition to the above-mentioned publication.

[0011]

When a high-heat-resistant semiconductor such as SiC, GaN, or diamond is used at a high temperature in order to maximize its performance, the conventional Si semiconductor as described above is used. With the implementation used,
There is room for improvement in the following points.

That is, when the high heat-resistant semiconductor element is used by operating at a high temperature, the temperature of the Si element (operating temperature of 150 ° C.) from the ambient temperature around −40 ° C. to the operating temperature range of 300 ° C. or higher. Operation in a much wider temperature range is required as compared to the following. Therefore, the temperature difference generated by such a wide operating temperature range becomes very large as compared with the related art, and accordingly, a very large thermal stress is repeatedly generated. For example, the thermal expansion coefficient of a SiC chip is
Since the thermal expansion coefficient of other mounting components is very small compared to other conventional mounting components, the conventional mounting method has a large difference in thermal expansion between the SiC chip and the mounting components placed around it. It is a very important task to reduce the adverse effects due to the above.

The above-mentioned thermal stress becomes more and more particularly as the element has a higher withstand voltage and a larger capacity. That is, if the chip withstand voltage is increased to meet the demand for high withstand voltage, energy loss at the chip increases, and the chip temperature further increases. When the current capacity of the device is increased by increasing the number of chips to be mounted for the purpose of increasing the capacity, the size of the device itself and the size of the package component also increase. As a result, even if the temperature difference is the same, the size of the member increases, so that the amount of thermal deformation at the end of each member increases, and the thermal stress generated between the chip and the package component increases, and the amount of misalignment becomes extremely large. The adverse effect of the growth becomes more severe. As shown in the above conventional example,
In the case of a mounting method in which a member for positioning is determined by a member having the same size as the entire package, the difference in the amount of thermal deformation between the chip and the package component becomes large due to a wide operating temperature range, that is, the chip The amount of misalignment due to the difference in thermal expansion between the components and the package components becomes very large, and a large thermal stress occurs. Therefore, it is difficult to realize a large package having a high withstand voltage and a large current capacity.

Further, in the above-mentioned Japanese Patent Application Laid-Open No. 08-088240, there is room for improvement in the heat resistance of the material itself, such as the frequent use of resin parts as mounting parts. As a means to solve this, it is conceivable to manufacture the positioning member by using a material having high heat resistance such as ceramics and a small coefficient of thermal expansion instead of the resin. If it becomes larger, reliability problems such as cracks occur. In addition, there is also a problem of thermal stress caused by a difference in thermal expansion coefficient between the package component made of other metal members and the ceramic component.

The above-mentioned WO 98/43301 shows a structure in which the mutual positions of the semiconductor chip and the common electrode are made independent for each chip.

However, in WO98 / 43301, when a high heat-resistant element such as SiC is operated at a high temperature of 300 ° C. or higher, the difference in thermal expansion between the semiconductor chip and a mounting member arranged around the chip is large. However, there has been no recognition of the adverse effect of thermal stress on the chip, and there has been no known bonding agent that can withstand a high temperature of 300 ° C. or more as a bonding agent for bonding between mounting members.

An object of the present invention is to provide a heat-resistant semiconductor device in which one or a plurality of semiconductor chips are incorporated in a single flat package, and to reduce the generation of thermal stress for use in a wide temperature range, which has not been achieved conventionally. It is an object of the present invention to provide a highly reliable semiconductor device having a high heat resistance and a high reliability.

Another object of the present invention is to provide a power converter having higher performance than a conventional power converter using a Si semiconductor device.

[0019]

A highly heat-resistant semiconductor device according to the present invention comprises a first main electrode provided on a first main surface in a flat package having a pair of common electrodes externally insulated by an insulating outer cylinder. ,
One or a plurality of semiconductor chips having a second main electrode on a second main surface are juxtaposed and incorporated, and at least one main electrode of the semiconductor chip and a common electrode on a package side facing the main electrode, A semiconductor element in which a conductive intermediate electrode is interposed for each chip, and the intermediate electrode and the common electrode are locked by a fitting structure provided on opposing surfaces of the two. Characterized in that they are positioned with respect to each other by a heat-resistant insulating guide member.

Further, a power converter according to the present invention is characterized in that the high heat-resistant semiconductor element described above is used as a main conversion element.

[0021]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A typical embodiment of the present invention will be described with reference to the drawings.

FIG. 1 shows an example of a cross section of a flat semiconductor device, in which a plurality of SiC chips 1 are incorporated. The figure shows a cross section from the leftmost outermost part of the flat semiconductor element 2 to the middle toward the center.

Main electrodes are formed on both main surfaces of the SiC chip 1, respectively. On the SiC chip 1, intermediate electrodes 3, 4 having both heat dissipation and electrical connection are arranged so as to be in contact with the main electrode of the chip 1. It is sandwiched between two common electrodes 6. The pair of common electrodes 5 and 6 are externally insulated by a ceramic insulating outer cylinder 7, and the interior of the package is sealed by a metal plate 8 between the common electrodes 5 and 6 and the insulating outer cylinder 7. It has a hermetically sealed structure. However,
This hermetic structure is not always necessary for some applications.

FIG. 2 is an overall view from the upper side with the first common electrode 5 removed, and AA 'shown in the figure.
The position corresponds to the cross-sectional position in FIG.

A configuration for positioning the SiC chip 1 at a predetermined position in the package will be described below.

A hole is formed at the center of the upper surface of the round intermediate electrode 3 arranged on the SiC chip 1, while the SiC
Also on the side facing the chip 1, holes are formed at predetermined positions where the SiC chip 1 is to be arranged. Positioning parts 9 are inserted into holes formed in the intermediate electrode 3 and holes formed in the common electrode 5.
Is fitted, the intermediate electrode 3 is positioned with respect to the common electrode 5 with reference to the center thereof. further,
The intermediate electrode 3 and the SiC chip 1 are positioned relative to each other by a heat-resistant insulating guide component 10 with respect to each outer periphery, so that each chip 1 is independently positioned at a predetermined position in the package.

FIGS. 3 and 4 show another embodiment of the flat semiconductor device of the present invention, in which a plurality of SiC diode chips 11 are incorporated. FIG. 3 shows a cross section from the leftmost outermost portion of the flat semiconductor element 2 to the middle thereof.

The SiC diode chip 11 has an anode electrode formed on one side of the SiC substrate and a cathode electrode formed on the other surface.
Are arranged so as to be in contact with the main electrode of the element 2, and this is sandwiched between the first common electrode 5 and the second common electrode 6, which are external electrodes of the element 2. FIG. 4 shows an overall view from the lower side with the first common electrode 6 removed.
The position A 'corresponds to the sectional position shown in FIG.

A hole is formed in the center of the lower surface of the intermediate electrode 4 arranged on the SiC diode chip 11, while the hole of the common electrode 6
The chip 1 is also placed on the side facing the SiC diode chip 11.
A hole is formed at a predetermined position where 1 is to be arranged. By fitting the positioning component 9 into the hole formed in the intermediate electrode 4 and the hole formed in the common electrode 6,
Are positioned with respect to the common electrode 6 with respect to the center thereof. Further, the intermediate electrode 4 and the SiC diode chip 11
Is a heat-resistant insulating guide part 1 based on each outer circumference.
0, each chip 1
1 are independently positioned at predetermined positions in the package.

In general, when a temperature change occurs in a package due to the operation of a semiconductor device or the like, a positional displacement (lateral displacement) between components occurs due to a difference in thermal expansion coefficient between the components, and the size of the components is large. The larger the
The generated displacement and stress increase.

However, in the above structure, the positioning components 9 are completely movable independently for each chip, and the size of each mounting component is small. Therefore, for example, even if the dimensions of the common electrodes 5 and 6 change due to thermal expansion and the position of the positioning hole provided therein changes, the positioning component 9 is different from the other positioning components 9 in accordance with the movement of the hole. The intermediate electrode and the semiconductor chip, which move independently and are simultaneously positioned by the positioning component 9, are positioned relative to each other by the heat-resistant insulating guide component 10 with respect to the outer periphery of the intermediate electrode and the semiconductor chip. Since it moves together with the component 9, a large displacement difference, that is, no stress occurs. Further, when the positions of the semiconductor chip and the intermediate electrode are determined with the center of the semiconductor chip as a reference axis, the thermal expansion change (strain) of the individual semiconductor chip and the intermediate electrode occurs around this central axis. Thermal stress is generated in a distribution symmetrical with respect to the chip center toward the direction. Moreover, since the size of the mounting component is small, only a stress limited to a small range of the chip size is generated. Therefore, this method can greatly reduce the damage to the chip,
Stability can be increased. More preferably, by configuring the two common electrodes 5 and 6 with the same material,
Since the dimensional change due to the temperature change in the surface direction of the two common electrode surfaces can be made exactly the same, the stress on the components sandwiched between the two common electrodes 5 and 6 can be further reduced.

On the other hand, in the case of positioning with a large part over the entire integrated package as seen in the conventional example, the magnitude of the generated stress changes from the center to the periphery as viewed in the entire package. When viewed from chip to chip, a wide stress distribution changes from one end of the chip to the other end, and a larger stress is generated particularly in a chip arranged at the periphery of the package.

On the other hand, according to the present invention, the stress generated in the chip is greatly reduced, and the reliability of the device is greatly improved. This is particularly effective when the number of mounted chips is large and the package size is large.

Further, according to the present invention, the relative positions of the semiconductor chips do not shift, and the positional relationship of each chip in the package can be maintained with high reliability and accuracy over a wide temperature range. In addition, the size of expensive heat-resistant parts and the number of parts used can be reduced, so that the cost can be reduced.

The positioning component 9 may be conductive or insulative. The positioning component 9 has a required positioning accuracy in consideration of heat resistance and a difference in thermal expansion coefficient between the intermediate electrode and the common electrode. What is necessary is just to determine by a relationship. That is, when high-precision positioning is required, it is particularly preferable to select the same material as the intermediate electrode, or a heat-resistant material having a small difference in thermal expansion coefficient from the intermediate electrode.

Further, the SiC chip, the intermediate electrode, and the common electrode are not bonded to each other, and it is desirable that the generation of excessive thermal stress can be further reduced even when used in a wide operating temperature range.

In the above embodiment, SiC was used as the high heat-resistant semiconductor.
Although shown in the example of the semiconductor, the present invention can be similarly applied to a high heat-resistant semiconductor that can operate at a higher temperature than Si such as GaN and diamond other than SiC.

The heat-resistant insulating guide member 10 is close to a high-heat-resistant semiconductor in order to accurately position the high-heat-resistant semiconductor chip and the intermediate electrode and suppress the generation of thermal stress to increase the reliability of the component. It is preferable to use a material having a coefficient of thermal expansion, particularly a high-strength ceramic material. Silicon carbide, silicon nitride, aluminum nitride, mullite,
Alternatively, it is particularly preferable to use an insulating guide part made of a composite material mainly composed of these.

Next, an example of another positioning method will be described with reference to FIGS. Each of the figures is a cross-sectional view of a vertical mounting of only one chip region.

FIG. 5 shows that a projection is formed at the center of the surface of the intermediate electrode 12 in contact with the common electrode 5, while a hole is formed at a predetermined position of the common electrode 5 facing the intermediate electrode 12. A method is shown in which the mutual positions of the intermediate electrode 12 and the common electrode 5 are determined by directly fitting them.

According to the present system, the number of parts can be reduced and the assembly can be simplified.

FIG. 6 shows an example in which a hole is formed at the center of the surface of the intermediate electrode 13 in contact with the common electrode 5, while a projection is formed at a predetermined position of the common electrode 5 facing the intermediate electrode. Indicated.

The hole provided in the intermediate electrode 13 and the common electrode 5
By directly fitting the projections provided on the, it is possible to determine the mutual position of the intermediate electrode and the common electrode,
As described above, the number of parts can be reduced and assembly can be simplified.

FIG. 7 shows that a through hole is formed at the center of the surface of the intermediate electrode 14 in contact with the common electrode 5, while holes having different diameters are formed at predetermined positions of the common electrode 5 facing the intermediate electrode. A method of determining the mutual positions of the intermediate electrode 14 and the common electrode 5 using a positioning component 15 having an outer diameter corresponding to each hole diameter is shown.

The positioning component 15 may be either insulative or conductive, and an optimal one may be selected in consideration of heat resistance, workability, cost, and the like.

FIG. 8 shows the positioning of the intermediate electrode 14 and the chip 1 using the positioning component 15 in the same manner as described above, and the positioning component 15 is made of a heat-resistant insulating material. The example in which the control signal wiring of the chip 1 is formed by forming the control wiring 16 for controlling the operation of the chip 1 by an external signal has been described.

Specifically, first, the control electrode pads 17 on the chip 1 are connected to the control electrode wirings 16 vertically to the chip main surface.
Pull out. The positioning component 15 and other heat-resistant electrical insulation components (not shown) are provided around the control electrode wiring 16 to maintain electrical insulation from the intermediate electrode 14 and the common electrode 5. .

As described above, in the present system, the system for drawing out the wiring from the control electrode of each semiconductor chip also has a structure which also serves as the system for determining the position of each semiconductor chip in the plane in the flat package. No new parts are required for positioning, and the number of parts can be greatly reduced.

Further, even when a temperature change occurs in the package due to the operation of the semiconductor element and the like, the thermal expansion of the common electrode 5 causes a change in the position of the positioning hole provided therein, so that the insulating member 15 remains in place. Since the intermediate electrode 14 and the chip 1 whose positions are determined by the insulating member 15 move together with the movement of the hole, the relative positions of the control electrode wiring 16 and the chip 1 are shifted. There is no. Therefore, the connection reliability between the control electrode pad 17 and the control electrode wiring 16 is also improved.

The control wiring lead-out portion provided on the intermediate electrode is as follows:
It is most preferable to form a through hole in the center as described above, but the position of the control electrode pad 17 formed on the chip 1 side,
Depending on the shape and the number of the electrodes, the electrode may be eccentric, may be formed in a notch shape or a rectangular shape at the end of the electrode, or may have a plurality of holes. Further, the outer shape of the hole and the insulating member is not limited to a round shape, but may be a square shape. The outer shape of the intermediate electrode may be round or square, but it is preferable that the intermediate electrode provided on the upper side of the drawing has a structure capable of avoiding contact with the pressure-resistant structure formed at the end of the chip. Also, a structure that can avoid contact with the control electrode part is required,
The shape of the surface in contact with the chip is preferably ring-shaped, comb-shaped, single-toothed, dice-shaped, or the like that matches the position, shape, and number of electrode pads. On the other hand, it is preferable that the intermediate electrode provided on the lower side of the drawing has a planar shape and can be in contact with the main electrode of the chip as widely as possible.

In order to stabilize the pressure distribution of the entire device during pressurization, it is preferable that the number of mounted chips is at least three or more, and a plurality of mounted chips are arranged uniformly when viewed from the center of the device. Is desirable.

In the embodiment, the example in which the outer shape of the common electrode or the package is round is shown. However, a quadrangular semiconductor device is of course possible, and in this case, the insulating outer cylinder is preferably quadrangular. The desired shape may be selected in consideration of various other factors such as the manufacturing cost of the packaging material.

The present invention is directed to a general high heat-resistant semiconductor device having a first main electrode on a first main surface and a second main electrode on a second main surface, and includes various types of PN diodes, Schottky diodes, SIDs and the like. In addition to the diode, the present invention can be similarly applied to a semiconductor element with a control electrode such as an insulated gate transistor (MOS transistor) and an insulated gate thyristor (MOS control thyristor).

Further, the mounting method of the present invention includes a device in which only a plurality of diode chips are positioned and mounted in a flat package, a flat semiconductor device including only a switching semiconductor such as a MOSFET, and a diode chip and a switching semiconductor chip. A plurality of flat semiconductor elements arranged in antiparallel,
And the like.

FIG. 9 shows an example of a circuit diagram for one bridge as a power self-excited converter using the high heat-resistant flat semiconductor device of the present invention.

The structure is such that the SiC MOSFET 18 and the SiC diode 19, which are the main conversion elements, are arranged in anti-parallel, and n pieces are connected in series. These MOSFETs and diodes represent flat semiconductor elements in which many SiC semiconductor chips are mounted in parallel. When the above-described reverse conducting SiC flat semiconductor device is used, the MOSFET 18 and the diode 19 shown in FIG.
Are packaged together in a single package.

The flat type semiconductor element is a self-excited converter, a converter for a mill, a variable speed pumped water generator, a rolling mill, a substation facility in a building, a substation facility for an electric railway, a sodium sulfur ( NaS) It can also be used for converters such as battery systems.

According to the present embodiment, it is possible to suppress the occurrence of a problem caused by a mutual displacement due to a difference in thermal expansion or the like between different members constituting the semiconductor element, a stress between members, and the like.
In addition, high-precision positioning is possible, and the packing density can be increased by reducing the space between chips. realizable.

Further, by using a highly heat-resistant semiconductor element having high reliability as described above, a higher-performance power converter can be realized as compared with a conventional power converter using a Si semiconductor element. That is, the power converter using the semiconductor element of the present invention can greatly reduce the loss, especially when the withstand voltage is increased, as compared with the case where the Si semiconductor element is used, so that further energy saving can be realized. Furthermore, since the element can be used at a high temperature, the burden of cooling and the like can be reduced, and the converter can be made compact, so that the cost can be significantly reduced.

[0060]

According to the present invention, a semiconductor device in which one or a plurality of high heat-resistant semiconductor chips are incorporated in one flat package is subjected to a thermal stress against use in a wider temperature range than ever before. It is possible to obtain a highly reliable heat-resistant semiconductor element in which generation is suppressed.

Further, it is possible to provide a power converter having higher performance than a conventional power converter using a Si semiconductor element.

[Brief description of the drawings]

FIG. 1 is a partial longitudinal sectional view of a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a cross-sectional view of the semiconductor device according to the first embodiment of the present invention.

FIG. 3 is a partial longitudinal sectional view of a semiconductor device according to a second embodiment of the present invention.

FIG. 4 is a cross-sectional view of a semiconductor device according to a second embodiment of the present invention.

FIG. 5 is an enlarged vertical sectional view of a one-chip portion showing a third embodiment of the present invention.

FIG. 6 is an enlarged vertical sectional view of a one-chip portion showing a fourth embodiment of the present invention.

FIG. 7 is an enlarged vertical sectional view of a one-chip portion showing a fifth embodiment of the present invention.

FIG. 8 is an enlarged vertical sectional view of a one-chip portion showing a sixth embodiment of the present invention.

FIG. 9 is a configuration circuit diagram of one bridge of a converter using the semiconductor element of the present invention.

FIG. 10 is a longitudinal sectional view of a conventional semiconductor device.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... SiC chip, 2 ... flat semiconductor element, 3,4 ... intermediate electrode, 5,6 ... common electrode, 7 ... insulating outer cylinder, 8 ... metal plate,
9, 15 ... positioning parts, 10 ... insulation guide parts, 1
DESCRIPTION OF SYMBOLS 1 ... SiC diode chip, 12, 13, 14 ... Intermediate electrode, 16 ... Control wiring, 17 ... Control electrode pad, 18 ...
SiC MOSFET, 19 ... SiC diode, 20 ... Snubber.

 ──────────────────────────────────────────────────続 き Continuing from the front page (72) Katsunori Asano 3-3-22 Nakanoshima, Kita-ku, Osaka-shi, Osaka Inside Kansai Electric Power Co., Inc. (72) Yoshitaka Sugawara 3-3-1 Nakanoshima, Kita-ku, Osaka, Osaka No.22 Kansai Electric Power Co., Inc. F-term (reference) 5F005 GA02 GA04

Claims (6)

[Claims] 1. A flat package in which a pair of common electrodes is externally insulated by an insulating outer cylinder, and has a first main electrode on a first main surface and a second main electrode on a second main surface. One or a plurality of semiconductor chips are juxtaposed and incorporated, and a conductive intermediate electrode is interposed for each chip between at least one main electrode of the semiconductor chip and a common electrode on the package side opposed thereto. A semiconductor element in which the intermediate electrode and the common electrode are locked by a fitting structure provided on opposing surfaces thereof, wherein the intermediate electrode and the semiconductor chip are heat-resistant insulating A highly heat-resistant semiconductor element characterized by being mutually positioned by a guide member. 2. The high heat-resistant semiconductor device according to claim 1, wherein the heat-resistant insulating guide member is made of silicon carbide, silicon nitride, aluminum nitride, mullite, or a composite material mainly composed of these. 3. At least one or more of the one or more semiconductor chips has a first main electrode and a control electrode on a first main surface, and a second main electrode on a second main surface. 3. A main current control function according to the control signal of claim 1.
2. A high heat-resistant semiconductor element according to item 1. 4. The high heat resistant semiconductor device according to claim 3, wherein at least one of the fitting structural components for locking the intermediate electrode and the common electrode has a function of positioning a wiring of the control signal to the chip. 5. The semiconductor device according to claim 1, wherein at least one of said one or more semiconductor chips is a diode.
The highly heat-resistant semiconductor device according to any one of the above items. 6. A power converter using the highly heat-resistant semiconductor element according to claim 1 as a main conversion element.