JP2000341952A - Ultralow-frequency high voltage power source - Google Patents

Ultralow-frequency high voltage power source

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Publication number
JP2000341952A
JP2000341952A JP11188030A JP18803099A JP2000341952A JP 2000341952 A JP2000341952 A JP 2000341952A JP 11188030 A JP11188030 A JP 11188030A JP 18803099 A JP18803099 A JP 18803099A JP 2000341952 A JP2000341952 A JP 2000341952A
Authority
JP
Japan
Prior art keywords
voltage
circuit
high voltage
commercial frequency
frequency
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11188030A
Other languages
Japanese (ja)
Inventor
Hiroshi Iwai
弘 岩井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to JP11188030A priority Critical patent/JP2000341952A/en
Publication of JP2000341952A publication Critical patent/JP2000341952A/en
Pending legal-status Critical Current

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  • Rectifiers (AREA)

Abstract

PROBLEM TO BE SOLVED: To improve performance, such as miniaturization of a device and the reduction of input capacity. SOLUTION: In a full wave twofold voltage rectifying circuit, two rectifying circuits, where modulation voltage by the reference power source 11 (0.1 Hz) of an AC switching regulator 2 is applied to the primary side of a high voltage transformer 3 from a commercial frequency power source 1, two pairs of rectifying elements which are connected to reverse polarities in series are connected to a secondary side in parallel, the intermediate points are connected to high voltage semiconductor switches 25 and 26 are installed, and each piece end is connected to one end of a secondary wire and the other end is set to be output. The gate signals of the two high voltage semiconductor switches 25 and 26 are as signals via the AND circuits 5, 6, 8 and 9 and OR circuits 7 and 10 of the respective synchronizing signals of a commercial frequency and a reference power frequency. They are transmitted alternately at every inversion of the polarity of commercial frequency voltage and ultralow-frequency voltage following the increase/decrease of reference voltage is generated through the full wave double voltage rectifying circuit and a smoothing circuit with the conduction operation of the high voltage semiconductor switches 25 and 26.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、高電圧機器特に電力ケ
ーブルの絶縁耐力試験に使用される超低周波電源に関す
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an ultra-low frequency power supply used for a dielectric strength test of a high-voltage device, particularly a power cable.

【0002】[0002]

【従来の技術】高電圧機器や電力ケーブルの交流絶縁耐
力試験に於て、その静電容量が大きいと、負荷電流が大
きく試験電源の容量が非常に大きくなり特に野外現地試
験の場合には、外形重量共その運搬等に問題があり経済
的でなかった。そのため交流試験の代わりに直流試験が
一般的に実施されてきた。しかし直流電圧印加時の絶縁
体内の電界分布は交流電圧印加時と異なるため、その絶
縁体中の欠陥が必ず直流電圧印加で検出可能かどうか疑
問であった。また、直流課電により健全な絶縁体にダメ
ージを与えることが懸念された。そこで本来の交流試験
をするため、装置の容量を減らす手段としてその周波数
を0.1Hz程度にし、その容量を小さくする方法がい
ろいろ考えられた。例えば商用周波数電源を超低周波に
同期させたスライダックで振幅変調し、その電圧を高圧
変圧器で昇圧し整流回路を介して変調電圧の包絡線に追
従した超低周波電圧を発生させる方式が紹介されてい
る。
2. Description of the Related Art In an AC dielectric strength test of a high-voltage device or a power cable, if the capacitance is large, the load current is large and the capacity of a test power supply is very large. The external weight was not economical due to problems in its transportation and the like. Therefore, a DC test has been generally performed instead of the AC test. However, since the electric field distribution in the insulator when a DC voltage is applied is different from that when an AC voltage is applied, it was questioned whether defects in the insulator could always be detected by applying a DC voltage. In addition, it was feared that a DC insulator might damage a sound insulator. Therefore, in order to perform the original AC test, various methods for reducing the capacity of the apparatus by setting the frequency to about 0.1 Hz and reducing the capacity have been considered. For example, a method is introduced in which a commercial frequency power supply is amplitude-modulated by a sliderac that is synchronized to an ultra-low frequency, the voltage is boosted by a high-voltage transformer, and an ultra-low-frequency voltage that follows the envelope of the modulation voltage via a rectifier circuit is introduced. Have been.

【0003】[0003]

【発明が解決しようとする課題】しかしながら、上述の
ような超低周波でスライダックを駆動し商用周波数電圧
を振幅変調する方式は下記のような欠点があった。
However, the above-mentioned method of driving the SLIDAC at an extremely low frequency and modulating the amplitude of the commercial frequency voltage has the following disadvantages.

【0004】スライダックを機械的に駆動させるための
機械機構及び動力の具備、スライド点の接触不良による
波形歪、及び火花の発生による寿命に問題があった。
There are problems with mechanical mechanisms and power for mechanically driving the SLIDAC, waveform distortion due to poor contact of slide points, and life due to spark generation.

【0005】出力電圧を最大まで上昇し、次に下降させ
る場合、被試験物の静電容量に充電した電荷を放電しな
くてはならず下降時に放電抵抗を挿入するか、常時放電
抵抗を被試験物に並列に接続しておかなくてはならず、
その分だけ装置の容量が大きくなる欠点があった。
When the output voltage is increased to the maximum and then decreased, the electric charge charged in the capacitance of the device under test must be discharged. Must be connected in parallel with the test object,
There is a drawback that the capacity of the device is increased accordingly.

【0006】交流出力電圧を発生させるためには、整流
回路の極性は半周期毎に正負反転させなくてならず、整
流回路のダイオードの反転切換えスイッチを必要とし、
特に出力電圧が高い場合には耐圧上装置の大型化の原因
になった。
In order to generate an AC output voltage, the polarity of the rectifier circuit must be inverted every half cycle, and a switch for inverting the diode of the rectifier circuit is required.
In particular, when the output voltage is high, this causes an increase in the size of the device in withstanding voltage.

【0007】[0007]

【課題を解決するかめの手段】本発明は上述のようなス
ライダックを使用するのでなく、交流スイッチングレギ
ュレータ、半導体素子等及びそれ等の制御電子回路を使
用することにより小型で経済的な装置を提供するもので
ある。その基本的な手段は下記の通りである。
SUMMARY OF THE INVENTION The present invention provides a compact and economical device by using an AC switching regulator, a semiconductor device and the like and control electronics thereof, instead of using the above-mentioned slidac. Things. The basic means are as follows.

【0008】入力は商用周波数電源とし、電圧調整とし
てスライダックの代わりに交流スイッチングレギュレー
タを使用し、その電圧調整は同レギュレータの制御入力
に接続した超低周波発生基準電源(以下基準電源と称
す)の電圧調整により変調電圧を発生させる。
An input is a commercial frequency power supply, and an AC switching regulator is used in place of a slidac for voltage adjustment. The voltage adjustment is performed by an ultra-low frequency generation reference power supply (hereinafter referred to as a reference power supply) connected to a control input of the regulator. A modulation voltage is generated by voltage adjustment.

【0009】その電圧を両端絶の2次巻線を持つ高圧変
圧器で昇圧し、2次高圧側を整流素子と高圧半導体スイ
ッチを使用した全波2倍電圧整流回路で構成し、そのス
イッチのゲート信号に電源周波数と基準電源周波数の各
同期信号のアンド信号を使用し、上記2個のスイッチの
ゲート端子に商用周波数電源の極性反転毎に同信号を順
次交互に伝達し、基準電圧に追従した電圧を発生させ被
試験物の静電容量を充電及び放電をさせるものである。
The voltage is boosted by a high-voltage transformer having a secondary winding having both ends, and the secondary high-voltage side is constituted by a full-wave double voltage rectifier circuit using a rectifying element and a high-voltage semiconductor switch. The gate signal uses the AND signal of the synchronizing signal of the power supply frequency and the reference power supply frequency. The same signal is transmitted alternately to the gate terminals of the above two switches every time the polarity of the commercial frequency power supply is inverted, and follows the reference voltage. The charged voltage is generated to charge and discharge the capacitance of the device under test.

【0010】[0010]

【発明の実施の形態】以下、本発明の実施の形態を図
1、2、で説明する。図1は本発明の基本回路図、図2
は各部の動作波形を示す。図1、図2に於て商用周波数
電源1(50又は60Hz)の電圧E1を交流スイッチ
ングレギュレータ2の入力に伝達し、基準電源11
(0.1Hz)の電圧E2の制御電圧による出力変調電
圧を高電圧変圧器3の1次側に接続し、両端絶縁の2次
巻線に高電圧の2次電圧(図2、点線)を発生させる。
同時にE1の電圧を同期回路4に接続しE1の正、負ピ
ーク値を中心とした一定の幅で商用周波数に同期した同
期信号P1及びP2を発生させる。又、同期回路12に
より基準電圧E2の正発生中の同期信号P3、負発生中
の同期信号P4を発生させP1とP3、P2とP4、P
2とP3、及びP1とP4の各々のAND信号をAND
回路5、6、8、及び9を介して同期信号1P、4P、
2P、及び3Pを発生させる。次に1Pと4P、2Pと
3PをOR回路7、10を介して高圧半導体スイッチ2
5、26のゲート信号G1、及びG2を発生させる。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below with reference to FIGS. FIG. 1 is a basic circuit diagram of the present invention, and FIG.
Indicates the operation waveform of each unit. 1 and 2, the voltage E1 of the commercial frequency power supply 1 (50 or 60 Hz) is transmitted to the input of the AC switching regulator 2, and the reference power supply 11
(0.1 Hz) The output modulation voltage by the control voltage of the voltage E2 is connected to the primary side of the high-voltage transformer 3, and the high-voltage secondary voltage (dotted line in FIG. 2) is applied to the secondary windings insulated at both ends. generate.
At the same time, the voltage of E1 is connected to the synchronization circuit 4 to generate synchronization signals P1 and P2 synchronized with the commercial frequency with a fixed width centered on the positive and negative peak values of E1. Further, the synchronizing circuit 12 generates the synchronizing signal P3 during the positive generation of the reference voltage E2 and the synchronizing signal P4 during the negative generation, and generates P1 and P3, P2 and P4, P
AND signals of P2 and P3 and P1 and P4
Through circuits 5, 6, 8, and 9, the synchronization signals 1P, 4P,
2P and 3P are generated. Next, 1P and 4P, 2P and 3P are connected to the high voltage semiconductor switch 2 through OR circuits 7 and 10.
5, 26 gate signals G1 and G2 are generated.

【0011】一方、互いに逆極性に直列接続した2個の
整流素子13と15、14と16、及び17と19、1
8と20の並列回路を形成し、その各々の中間点を高圧
半導体スイッチ25、26、及び保護抵抗21と22、
23と24の直列回路で接続した二組の整流回路を設
け、それぞれの一端を高圧変圧器の2次巻線の一端に接
続し、他端を直列接続し平滑コンデンサ27、28一端
に接続し、且つ同2次巻線の一端をコンデンサ27、2
8の中間点に接続し2倍電圧整流回路を構成し、同2次
電圧のピーク値の2倍高電圧をコンデンサ間に発生させ
る。
On the other hand, two rectifying elements 13 and 15, 14 and 16, and 17 and 19, 1
8 and 20 are formed in parallel, and the intermediate points of each of them are connected to high-voltage semiconductor switches 25 and 26 and protection resistors 21 and 22.
Two sets of rectifier circuits connected by a series circuit of 23 and 24 are provided, one end of which is connected to one end of a secondary winding of the high voltage transformer, the other end is connected in series, and one end is connected to one end of smoothing capacitors 27 and 28. And one end of the secondary winding is connected to a capacitor 27, 2
A double voltage rectifier circuit is formed by connecting to the intermediate point of No. 8 and a voltage twice as high as the peak value of the secondary voltage is generated between the capacitors.

【0012】次にその動作機能を図1、2で説明する。
基準電源11と交流スイッチングレギュレータ2で変調
された高圧変圧器3の2次電圧の発生波形は図2の点線
に示すように基準電圧E2(0.1Hz)の波形に対応
し、いま基準電圧E2が零より正側に上昇すると、2次
電圧も零より点線で示したような変調された電圧で上昇
する。いま整流素子13、16及び17、20に接続さ
れた2次巻線の一端の電圧が平滑コンデンサ27、28
の中間点に接続された他端に対して正極性の時、整流回
路と同期信号1Pのゲート信号G1により高圧半導体ス
イッチ25が導通状態になり2次電圧の電流が整流素子
13、保護抵抗21、高圧半導体スイッチ25、保護抵
抗22、整流素子14、及び平滑用コンデンサ27を経
由して流れ、平滑用コンデンサ27を充電しその時の2
次電圧のピーク値に相当する電圧E3がコンデンサ27
の両端に発生する。次の半サイクルでは整流素子13、
16及び17、20に接続された2次巻線の電圧の極性
は反転し負極性となり、正極性の場合と同じ動作で整流
回路と同期信号2Pのゲート信号G2により高圧半導体
スイッチ26が導状態になり、その2次電流は平滑コン
デンサ28、整流素子18、保護抵抗24、高圧半導体
スイッチ26、保護抵抗23、整流素子17を経由して
流れ、平滑用コンデンサ28を充電しその時の2次電圧
のピーク値に相当する電圧E4がコンデンサ28の両端
に発生する。尚、E3とE4の極性は両コンデンサ2
7、28の接続点に対して互いに逆極性ですが図1に示
すように対接地に対しては同極で、対地電圧はE3+E
4となり且つE3=E4で2次電圧のピーク値の2倍と
なる。このように半サイクル毎に交互に充電され基準電
圧の上昇に従い2次ピーク電圧の包絡線に追従した電圧
E3、E4が発生上昇する。次に2次電圧はピーク値を
過ぎると充電電圧E3、E4より低くなり半サイクル毎
にゲート信号G1、G2により平滑用コンデンサ27の
電圧E3は整流素子15、保護抵抗21、高圧半導体ス
イッチ25、保護抵抗22、整流素子16及び高圧変圧
器3の2次巻線を通じて、その時の2次電圧のピーク値
になる迄放電される。次の半サイクルでは、同じく平滑
用コンデンサ28の電圧E4は整流素子19、高圧半導
体スイッチ26、整流素子20、及び高圧変圧器3の2
次巻線を通じて、その時の2次電圧のピーク値になる迄
放電され、上昇時と同様2次変調電圧の下降に従いピー
ク値の包絡線に追従した波形の電圧E3、E4で下降す
る。
Next, the operation function will be described with reference to FIGS.
The waveform of the secondary voltage generated by the high voltage transformer 3 modulated by the reference power supply 11 and the AC switching regulator 2 corresponds to the waveform of the reference voltage E2 (0.1 Hz) as shown by the dotted line in FIG. Rises to the positive side from zero, the secondary voltage also rises from zero to a modulated voltage as shown by the dotted line. Now, the voltage at one end of the secondary winding connected to the rectifiers 13, 16 and 17 and 20 is
When the polarity is positive with respect to the other end connected to the middle point of the rectifier circuit and the gate signal G1 of the synchronizing signal 1P, the high-voltage semiconductor switch 25 becomes conductive, and the current of the secondary voltage is reduced by the rectifier element 13 and the protection resistor 21. Flows through the high-voltage semiconductor switch 25, the protection resistor 22, the rectifying element 14, and the smoothing capacitor 27 to charge the smoothing capacitor 27 and
A voltage E3 corresponding to the peak value of the next voltage is
Occur at both ends. In the next half cycle, the rectifying element 13,
The polarity of the voltage of the secondary winding connected to 16, 17, and 20 is inverted and becomes negative, and the high-voltage semiconductor switch 26 is turned on by the rectifier circuit and the gate signal G 2 of the synchronization signal 2 P in the same operation as in the case of positive polarity. The secondary current flows through the smoothing capacitor 28, the rectifying element 18, the protection resistor 24, the high-voltage semiconductor switch 26, the protection resistor 23, and the rectifying element 17, and charges the smoothing capacitor 28 to thereby charge the secondary voltage. , A voltage E4 corresponding to the peak value is generated across the capacitor 28. Note that the polarity of E3 and E4 is
The connection points 7 and 28 have opposite polarities, but have the same polarity with respect to ground as shown in FIG. 1, and the ground voltage is E3 + E.
4 and E3 = E4, which is twice the peak value of the secondary voltage. Thus, the voltages E3 and E4 which are charged alternately every half cycle and follow the envelope of the secondary peak voltage are generated and rise as the reference voltage rises. Next, when the secondary voltage exceeds the peak value, the voltage becomes lower than the charging voltages E3 and E4, and the voltage E3 of the smoothing capacitor 27 is changed every half cycle by the gate signals G1 and G2, so that the rectifying element 15, the protection resistor 21, the high-voltage semiconductor switch 25, The current is discharged through the protection resistor 22, the rectifier 16 and the secondary winding of the high-voltage transformer 3 until the peak value of the secondary voltage at that time is reached. In the next half cycle, the voltage E4 of the smoothing capacitor 28 is also changed to the voltage of the rectifier 19, the high-voltage semiconductor switch 26, the rectifier 20 and the high-voltage transformer 3
Through the next winding, the secondary voltage is discharged until the peak value of the secondary voltage at that time is reached, and as with the rising, the voltage drops with the waveforms E3 and E4 following the envelope of the peak value as the secondary modulation voltage falls.

【0013】次に基準電圧E2の極性が負に移行した場
合は、正の場合と同様、高圧変圧器3の2次電圧による
E3、E4の整流動作は半サイクル毎、交互にゲート信
号系列G1、G2による高圧半導体スイッチ25、26
の導通動作により2次電圧が零より負のピーク値迄の期
間中は、高圧変圧器の2次電流が平滑用コンデンサ2
7、28の中間点を経由してコンデンサフ27、整流素
子15、保護抵抗21、高圧半導体スイッチ25、保護
抵抗22、整流素子16を通じて流れ、次の半サイクル
ではその2次電流が高圧変圧器の他端より各回路素子1
7、23、26、24、18、28を通じて流れ、平滑
用コンデンサ27、28の高圧側に2次電圧のピーク値
に相当する電圧E3及びE4が充電され、対地電圧とし
てE3+E4の負極性の電圧が発生する。次に2次電圧
がピーク値より零の期間中、平滑用コンデンサ27、2
8の電圧は正の場合と同様に半サイクル毎に2次巻線を
通じて回路素子13、21、25、22、14及び1
9、23、26、24、20を通じて放電され2次電圧
のピーク値迄下降する。このように負の場合も2次電の
ピーク電圧の包絡線に追従した波形、即ち基準電圧E2
に相当した電圧E3+E4を発生させることができる。
尚、出力電圧E5は平滑回路及び直列抵抗28と被試験
物の静電容量より滑らかな波形の超低周波電圧となる。
Next, when the polarity of the reference voltage E2 shifts to negative, the rectification operation of E3 and E4 by the secondary voltage of the high-voltage transformer 3 is performed alternately every half cycle, as in the case of positive. , G2 high voltage semiconductor switches 25, 26
During the period in which the secondary voltage is from zero to a negative peak value due to the conduction operation of the high voltage transformer, the secondary current of the high voltage transformer is
The current flows through the capacitor 27, the rectifier 15, the protection resistor 21, the high-voltage semiconductor switch 25, the protection resistor 22, and the rectifier 16 via the middle point between the high-voltage transformer and the high-voltage transformer in the next half cycle. Each circuit element 1 from the other end of
7, 23, 26, 24, 18, and 28, the voltages E3 and E4 corresponding to the peak value of the secondary voltage are charged on the high voltage side of the smoothing capacitors 27 and 28, and the negative voltage of E3 + E4 as a ground voltage. Occurs. Next, during the period when the secondary voltage is zero from the peak value, the smoothing capacitors 27, 2
8 are applied to the circuit elements 13, 21, 25, 22, 14 and 1 through the secondary winding every half cycle as in the positive case.
It is discharged through 9, 23, 26, 24 and 20 and falls to the peak value of the secondary voltage. As described above, even in the case of the negative voltage, the waveform following the envelope of the peak voltage of the secondary voltage, that is, the reference voltage E2
Can be generated.
The output voltage E5 is an extremely low frequency voltage having a waveform smoother than the smoothing circuit and the series resistor 28 and the capacitance of the device under test.

【0014】[0014]

【発明の効果】本発明は以上のべたように、スライダッ
ク方式で整流回路に極性切換器や放電抵抗を使用した従
来の超低周波高圧電源に比較して、本発明の装置は小型
になり、性能効率も上がり、且つ寿命も長くなる。また
整流方式を全波2倍電圧整流回路にすることにより、直
流励磁による高圧変圧器の鉄心の飽和、それに基づく励
磁電流の激増を回避し、1次巻線の過熱防止、小型化、
及び入力電源容量の減少等の効果となった。
As described above, according to the present invention, the device of the present invention is smaller in size than a conventional ultra-low frequency high voltage power supply which uses a polarity switcher and a discharge resistor in a rectifier circuit in a slidac system. The performance efficiency is increased and the service life is prolonged. In addition, by using a full-wave doubling voltage rectifier circuit for the rectification method, saturation of the iron core of the high-voltage transformer due to DC excitation and a sudden increase in the exciting current based on the saturation can be avoided, preventing overheating of the primary winding, miniaturization,
And the effect of reducing the input power capacity.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の超低周波高圧電源の基本回路図であ
る。
FIG. 1 is a basic circuit diagram of an ultra-low frequency high voltage power supply of the present invention.

【図2】上記基本回路図の各部動作波形図である。FIG. 2 is an operation waveform diagram of each part of the basic circuit diagram.

【符号の説明】[Explanation of symbols]

1 商用周波数電源 2 交流スイッチングレギュレータ 3 高圧変圧器 4 同期回路 5、6、8、9 AND回路 7、10 OR回路 11 基準電源 12 同期回路 13 14、15、16、17、18、19、20 整
流素子 21 22、23、24 保護抵抗 25、26 高電圧半導体スイッチ 27、28 平滑用コンデンサ 28 直列抵抗 E1 商用周波数電源電圧 E2 基準電圧 E3、E4 平滑用コンデンサ27、28充電電圧 E5 出力電圧 P1、P2、P3、P4 同期信号 1P、2P、3P、4P AND信号 G1、G2 ゲート信号
DESCRIPTION OF SYMBOLS 1 Commercial frequency power supply 2 AC switching regulator 3 High voltage transformer 4 Synchronous circuit 5, 6, 8, 9 AND circuit 7, 10 OR circuit 11 Reference power supply 12 Synchronous circuit 13 14, 15, 16, 17, 18, 19, 20 Rectification Element 21 22, 23, 24 Protective resistor 25, 26 High voltage semiconductor switch 27, 28 Smoothing capacitor 28 Series resistor E1 Commercial frequency power supply voltage E2 Reference voltage E3, E4 Smoothing capacitor 27, 28 Charging voltage E5 Output voltage P1, P2 , P3, P4 Synchronization signal 1P, 2P, 3P, 4P AND signal G1, G2 Gate signal

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 商用周波数より充分低い超低周波の基準
電源で商用周波数電圧を変調し、その変調電圧を高圧変
圧器の1次側に印加し、2次巻線の高圧側を互いに逆極
性に直列接続された一対の整流素子を二対並列接続し、
その各々の中間点を高圧半導体スイッチで接続した二組
の整流回路を設け、それぞれの片端を2次巻線の一端に
接続し、それぞれの他端を出力とした全波2倍電圧整流
回路を構成し、その二組の高圧半導体スイッチのゲート
信号を商用周波数と超低周波数の各々同期信号のAND
回路及びOR回路を介した信号とし、基準電圧の増減に
応じて各々のゲート端子に商用周波数電源の極性反転毎
に交互に伝達し、高圧半導体スイッチの導通動作により
全波2倍電圧整流回路、及び平滑回路を通じてその出力
端に基準電圧波形に相当する超低周波の高電圧を発生さ
せる電源。
1. A commercial frequency voltage is modulated by an ultra-low frequency reference power source sufficiently lower than the commercial frequency, the modulated voltage is applied to the primary side of a high voltage transformer, and the high voltage sides of the secondary windings have opposite polarities. Two pairs of rectifiers connected in series are connected in parallel,
Two sets of rectifier circuits are provided with their respective intermediate points connected by a high-voltage semiconductor switch. One end of each rectifier circuit is connected to one end of a secondary winding, and a full-wave double voltage rectifier circuit having the other end as an output. The gate signals of the two sets of high-voltage semiconductor switches are ANDed with the synchronization signals of the commercial frequency and the ultra-low frequency, respectively.
A signal through a circuit and an OR circuit, which is alternately transmitted to each gate terminal every time the polarity of the commercial frequency power supply is inverted according to an increase or decrease of the reference voltage, and a full-wave double voltage rectifier circuit is provided by a conducting operation of the high-voltage semiconductor switch; And a power supply for generating an ultra-low frequency high voltage corresponding to a reference voltage waveform at its output terminal through a smoothing circuit.
JP11188030A 1999-05-28 1999-05-28 Ultralow-frequency high voltage power source Pending JP2000341952A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11188030A JP2000341952A (en) 1999-05-28 1999-05-28 Ultralow-frequency high voltage power source

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11188030A JP2000341952A (en) 1999-05-28 1999-05-28 Ultralow-frequency high voltage power source

Publications (1)

Publication Number Publication Date
JP2000341952A true JP2000341952A (en) 2000-12-08

Family

ID=16216446

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11188030A Pending JP2000341952A (en) 1999-05-28 1999-05-28 Ultralow-frequency high voltage power source

Country Status (1)

Country Link
JP (1) JP2000341952A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2013139105A1 (en) * 2012-03-19 2013-09-26 上海市电力公司 Small-sized high-voltage cable state monitoring device
JP2014518060A (en) * 2011-05-26 2014-07-24 エンフェイズ エナジー インコーポレイテッド Method and apparatus for generating single phase power from a three phase resonant power converter

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014518060A (en) * 2011-05-26 2014-07-24 エンフェイズ エナジー インコーポレイテッド Method and apparatus for generating single phase power from a three phase resonant power converter
US9444367B2 (en) 2011-05-26 2016-09-13 Enphase Energy, Inc. Method and apparatus for generating single-phase power from a three-phase resonant power converter
WO2013139105A1 (en) * 2012-03-19 2013-09-26 上海市电力公司 Small-sized high-voltage cable state monitoring device

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