JP2000341848A - Reverse-polarity input protective device - Google Patents
Reverse-polarity input protective deviceInfo
- Publication number
- JP2000341848A JP2000341848A JP11149021A JP14902199A JP2000341848A JP 2000341848 A JP2000341848 A JP 2000341848A JP 11149021 A JP11149021 A JP 11149021A JP 14902199 A JP14902199 A JP 14902199A JP 2000341848 A JP2000341848 A JP 2000341848A
- Authority
- JP
- Japan
- Prior art keywords
- voltage power
- load circuit
- power supply
- terminal
- fet
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、直流電圧電源を負
荷回路に接続する回路において、誤って入力側の極性を
逆に接続した場合でも、負荷回路側へ逆極性電圧が印加
されないように保護する逆極性入力保護装置に関するも
のであり、かつドレイン・ソースオン抵抗の低いＦＥＴ
を使用することで逆極性入力保護装置による電力損失の
低減を図るものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit for connecting a DC voltage power supply to a load circuit, so that even if the polarity of the input side is erroneously connected, the reverse polarity voltage is not applied to the load circuit side. FET with low drain-source ON resistance
Is used to reduce the power loss due to the reverse polarity input protection device.
【０００２】[0002]
【従来の技術】図７〜９は、従来使用されている逆極性
入力保護回路である。図７は直流電圧電源の正極側にダ
イオード１５を、図８は負極側にダイオード１６を直列
接続することにより入力側の極性を逆に接続した場合で
も、負荷回路側へ逆極性電圧が印加されないように保護
するものである。また、図９は直流電圧電源の正極側に
ダイオード１７のカソード端子を接続し負極側にアノー
ド端子を接続することにより、入力側の極性を逆に接続
したとき、入力側が短絡状態になりヒューズ１８を溶断
させて負荷回路側へ逆極性電圧が印加されないように保
護するものである。2. Description of the Related Art FIGS. 7 to 9 show conventional reverse polarity input protection circuits. FIG. 7 shows that the diode 15 is connected to the positive pole of the DC voltage power supply, and FIG. 8 shows that the diode 16 is connected in series to the negative pole, so that even if the polarity of the input side is reversed, no reverse polarity voltage is applied to the load circuit side. Is to protect. FIG. 9 shows that the cathode terminal of the diode 17 is connected to the positive terminal of the DC voltage power supply, and the anode terminal is connected to the negative terminal of the DC voltage power supply. To protect the load circuit from the application of a reverse polarity voltage to the load circuit side.
【０００３】[0003]
【発明が解決しようとする課題】図７、図８においては
入力側の極性が正常に接続されている場合でも、ダイオ
ード１５および１６の順方向電圧分だけ電力損失が発生
し、その発熱により効率が低下するという問題があり、
順方向電圧の低いダイオードを使用するにしても限界が
ある。図９においては、ダイオード１７の電力損失は発
生しないが、入力側の極性を逆に接続したとき、入力側
を短絡状態にしてヒューズ１８を溶断させるため、ヒュ
ーズの交換が必要になり、入力側の直流電圧電源に対し
てもストレスがかかってしまうという問題がある。In FIGS. 7 and 8, even if the polarity of the input side is normally connected, a power loss occurs by the forward voltage of the diodes 15 and 16, and the heat generated by the diodes causes the efficiency to decrease. There is a problem that
There is a limit to using a diode having a low forward voltage. In FIG. 9, no power loss occurs in the diode 17, but when the polarity of the input side is reversed, the input side is short-circuited and the fuse 18 is blown. There is a problem that stress is applied to the DC voltage power supply.
【０００４】[0004]
【課題を解決するための手段】本発明は、上記の課題を
解決するものであり、逆流防止用素子にＦＥＴを使用す
ることにより、入力側の極性を逆に接続した場合でも、
負荷回路側へ逆極性電圧が印加されないように保護する
とともに、ドレイン・ソースオン抵抗の低いＦＥＴを用
いて、逆極性入力保護装置による電力損失の低減を図ろ
うとするものである。すなわち、直流電圧電源と負荷回
路との間にＰｃｈ ＦＥＴを介在し、該Ｐｃｈ ＦＥＴ
のドレイン端子を直流電圧電源の正極側に、また、ソー
ス端子を負荷回路の正極側に、さらにゲート端子を直流
電圧電源および負荷回路の負極側に接続してなることを
特徴とする逆極性入力保護装置である。また、上記の逆
極性入力保護回路において、Ｐｃｈ ＦＥＴのゲート・
ソース端子間に抵抗および／または定電圧ダイオードを
接続し、ゲート端子と直流電圧電源の負極側との間に抵
抗を接続したことを特徴とする逆極性入力保護装置であ
る。SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and uses an FET for a backflow preventing element so that even if the polarity of the input side is reversed,
It is intended to protect the load circuit from the application of a reverse polarity voltage and to reduce the power loss by the reverse polarity input protection device by using an FET having a low drain-source on-resistance. That is, a Pch FET is interposed between the DC voltage power supply and the load circuit, and the Pch FET
A reverse terminal having a drain terminal connected to the positive terminal of the DC voltage power supply, a source terminal connected to the positive terminal of the load circuit, and a gate terminal connected to the negative terminal of the DC voltage power supply and the load circuit. It is a protection device. In the above-mentioned reverse polarity input protection circuit, the gate of the Pch FET
A reverse-polarity input protection device characterized in that a resistor and / or a constant voltage diode is connected between source terminals and a resistor is connected between a gate terminal and a negative electrode side of a DC voltage power supply.
【０００５】そして、直流電圧電源と負荷回路との間に
Ｎｃｈ ＦＥＴを介在し、該ＮｃｈＦＥＴのドレイン端
子を直流電圧電源の負極側に、また、ソース端子を負荷
回路の負極側に、さらにゲート端子を直流電圧電源およ
び負荷回路の正極側に接続してなることを特徴とする逆
極性入力保護装置である。また、上記の逆極性入力保護
回路において、Ｎｃｈ ＦＥＴのゲート・ソース端子間
に抵抗および／または定電圧ダイオードを接続し、ゲー
ト端子と直流電圧電源の正極側との間に抵抗を接続した
ことを特徴とする逆極性入力保護装置である。[0005] An Nch FET is interposed between the DC voltage power supply and the load circuit, the drain terminal of the NchFET is connected to the negative electrode side of the DC voltage power supply, the source terminal is connected to the negative electrode side of the load circuit, and the gate terminal is connected. Is connected to the DC voltage power supply and the positive electrode side of the load circuit. In the above reverse polarity input protection circuit, a resistor and / or a constant voltage diode are connected between the gate and source terminals of the Nch FET, and a resistor is connected between the gate terminal and the positive electrode of the DC voltage power supply. This is a reverse polarity input protection device.
【０００６】[0006]
【発明の実施の形態】図１および図４に示す直流電圧電
源を入力とする回路において、図１は、Ｐｃｈ ＦＥＴ
１のドレイン端子を直流電圧電源の正極側に接続し、該
ＦＥＴ１のソース端子を負荷回路の正極側に接続し、該
ＦＥＴ１のゲート端子を直流電圧電源の負極側および負
荷回路の負極側に接続したもので、図４は、Ｎｃｈ Ｆ
ＥＴ２のドレイン端子を直流電圧電源の負極側に接続
し、該ＦＥＴ２のソース端子を負荷回路の負極側に接続
し、該ＦＥＴ２のゲート端子を直流電圧電源の正極側お
よび負荷回路の正極側に接続したものである。入力側の
極性を逆に接続した場合、ＦＥＴ１、２のゲート・ソー
ス端子間にＦＥＴ１、２のドレイン・ソースがオフする
極性に電圧印加されてＦＥＴ１、２がオフ状態になり、
負荷回路へ逆極性電圧が印加されないように保護する。
入力側の極性が正常に接続されている場合は、ＦＥＴ
１、２のゲート・ソース端子間にＦＥＴ１、２のドレイ
ン・ソースがオンする極性に電圧印加されたときに発生
する電力損失をＦＥＴ１、２のドレイン・ソースオン抵
抗分まで低減させることが可能となり、該抵抗分は従来
使用していたダイオードの抵抗分に比べ、著しく小さい
ので、電力損失を大幅に低減させることが可能となる。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS In a circuit using a DC voltage power supply shown in FIGS. 1 and 4 as an input, FIG.
1 is connected to the positive terminal of the DC voltage power supply, the source terminal of the FET1 is connected to the positive terminal of the load circuit, and the gate terminal of the FET1 is connected to the negative terminal of the DC voltage power supply and the negative terminal of the load circuit. FIG. 4 shows Nch F
The drain terminal of ET2 is connected to the negative side of the DC voltage power supply, the source terminal of FET2 is connected to the negative side of the load circuit, and the gate terminal of FET2 is connected to the positive side of the DC voltage power supply and the positive side of the load circuit. It was done. When the polarity of the input side is reversed, a voltage is applied between the gate and source terminals of the FETs 1 and 2 so that the drains and sources of the FETs 1 and 2 are turned off, and the FETs 1 and 2 are turned off.
Protects the load circuit from reverse voltage.
If the input side polarity is properly connected,
It is possible to reduce the power loss that occurs when a voltage is applied between the gate and source terminals of the FETs 1 and 2 so that the drains and sources of the FETs 1 and 2 turn on to the drain-source ON resistance of the FETs 1 and 2. Since the resistance is much smaller than the resistance of a conventionally used diode, power loss can be greatly reduced.
【０００７】図２、図３、図５、図６に示す回路は、図
１、図４に示す基本回路を使用し、入力電圧が、ＦＥＴ
１、２のゲート・ソース端子間の最大定格電圧以上で入
力される場合に対応する応用回路例であり、図２、図５
に示す回路は各々、抵抗４と５、６と７により入力電圧
を分圧してＦＥＴ３、８のゲート・ソース端子間に印加
させることにより最大定格電圧以下で使用することがで
きる。また、図３、図６に示す回路は、ＦＥＴ９、１４
のゲート・ソース端子間に各々、定電圧ダイオード１
０、１３を接続することによりゲート・ソース端子間電
圧は定電圧にクリップされ、最大定格電圧以下で使用す
ることができる。なお、抵抗１１、１２は各々、定電圧
ダイオード１０、１３に過大電流が流れないよう防止す
るための制限抵抗である。The circuits shown in FIGS. 2, 3, 5, and 6 use the basic circuits shown in FIGS.
FIGS. 2 and 5 show examples of application circuits corresponding to cases where input is made at a voltage equal to or higher than the maximum rated voltage between the gate and source terminals of FIGS.
The circuits shown in (1) and (2) can be used below the maximum rated voltage by dividing the input voltage by the resistors 4 and 5, 6 and 7, and applying the divided voltage between the gate and source terminals of the FETs 3 and 8. The circuits shown in FIG. 3 and FIG.
Constant voltage diode 1 between the gate and source terminals of
By connecting 0 and 13, the voltage between the gate and source terminals is clipped to a constant voltage and can be used below the maximum rated voltage. The resistors 11 and 12 are limiting resistors for preventing an excessive current from flowing through the constant voltage diodes 10 and 13, respectively.
【０００８】[0008]
【実施例】本発明の実施例のＰｃｈ ＦＥＴを用いた逆
極性入力保護装置の基本回路を図１に、その基本回路を
使用した応用回路を図２、図３に示す。また、本発明の
実施例のＮｃｈ ＦＥＴを用いた逆極性入力保護装置の
基本回路を図４に、その基本回路を使用した応用回路を
図５、図６に示す。さらに、従来例の逆極性入力保護装
置の基本回路を図７〜９に示す。上記の図１〜８の逆極
性入力保護装置を、入力電圧ＤＣ１２Ｖ、出力電力１０
０Ｗ、効率８０％のスイッチング電源の入力側に接続
し、電力損失〔Ｗ〕、放熱手段、全効率〔％〕について
調査した。その結果を〔表１〕に示す。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows a basic circuit of a reverse polarity input protection device using a Pch FET according to an embodiment of the present invention, and FIGS. 2 and 3 show application circuits using the basic circuit. FIG. 4 shows a basic circuit of a reverse polarity input protection device using an Nch FET according to an embodiment of the present invention, and FIGS. 5 and 6 show application circuits using the basic circuit. 7 to 9 show basic circuits of a conventional reverse polarity input protection device. The above-described reverse polarity input protection device shown in FIGS.
It was connected to the input side of a switching power supply having 0 W and 80% efficiency, and the power loss [W], the heat radiation means, and the total efficiency [%] were investigated. The results are shown in [Table 1].
【０００９】[0009]
【表１】 [Table 1]
【００１０】これより、本発明の逆極性入力保護装置を
用いると、従来の装置と比較して電力損失が激減してお
り、放熱手段も不要で、全効率も向上していることが分
かる。From this, it can be seen that when the reverse polarity input protection device of the present invention is used, the power loss is drastically reduced, the heat dissipation means is not required, and the overall efficiency is improved as compared with the conventional device.
【００１１】ここで、上記実施例の図３、図６で使用す
る定電圧ダイオードには適宜、抵抗を組み合わせて用い
ることもできる。Here, the constant voltage diode used in FIGS. 3 and 6 of the above embodiment can be appropriately combined with a resistor.
【００１２】[0012]
【発明の効果】本発明により、入力時の電力損失を低減
させた逆極性入力保護装置が実現可能となり、低損失な
ため発熱も少なく、放熱手段も不要になり小型化が可能
で、全効率も向上する。よって、小型、高効率が求めら
れるバッテリーへの接続装置として大きな効果をもたら
すものとなる。According to the present invention, it is possible to realize a reverse-polarity input protection device in which the power loss at the time of input is reduced. Also improve. Therefore, the present invention brings about a great effect as a connection device to a battery that requires small size and high efficiency.
【図１】本発明のＰｃｈ ＦＥＴを用いた実施例を示す
逆極性入力保護回路である。FIG. 1 is a reverse polarity input protection circuit showing an embodiment using a Pch FET of the present invention.
【図２】図１の応用例を示す逆極性入力保護回路であ
る。FIG. 2 is a reverse polarity input protection circuit showing an application example of FIG. 1;
【図３】図１の他の応用例を示す逆極性入力保護回路で
ある。FIG. 3 is a reverse polarity input protection circuit showing another application example of FIG. 1;
【図４】本発明のＮｃｈ ＦＥＴを用いた実施例を示す
逆極性入力保護回路である。FIG. 4 is a reverse polarity input protection circuit showing an embodiment using the Nch FET of the present invention.
【図５】図２の応用例を示す逆極性入力保護回路であ
る。FIG. 5 is a reverse polarity input protection circuit showing an application example of FIG. 2;
【図６】図２の他の応用例を示す逆極性入力保護回路で
ある。FIG. 6 is a reverse polarity input protection circuit showing another application example of FIG. 2;
【図７】従来使用されている逆極性入力保護回路であ
る。FIG. 7 shows a conventional reverse polarity input protection circuit.
【図８】従来使用されている他の逆極性入力保護回路で
ある。FIG. 8 shows another conventional reverse polarity input protection circuit.
【図９】従来使用されている他の逆極性入力保護回路で
ある。FIG. 9 shows another conventional reverse polarity input protection circuit.
１、３、９ Ｐｃｈ ＦＥＴ ２、８、１４ Ｎｃｈ ＦＥＴ ４、５、６、７、１１、１２ 抵抗 １０、１３ 定電圧ダイオード １５、１６、１７ ダイオード １８ ヒューズ 1, 3, 9 Pch FET 2, 8, 14 Nch FET 4, 5, 6, 7, 11, 12 Resistance 10, 13 Constant voltage diode 15, 16, 17 Diode 18 Fuse
Claims (4)
ＦＥＴを介在し、該Ｐｃｈ ＦＥＴのドレイン端子を
直流電圧電源の正極側に、また、ソース端子を負荷回路
の正極側に、さらにゲート端子を直流電圧電源および負
荷回路の負極側に接続してなることを特徴とする逆極性
入力保護装置。1. A Pch between a DC voltage power supply and a load circuit.
With the FET interposed, the drain terminal of the Pch FET is connected to the positive side of the DC voltage power supply, the source terminal is connected to the positive side of the load circuit, and the gate terminal is connected to the DC voltage power supply and the negative side of the load circuit. A reverse polarity input protection device, characterized in that:
ｃｈ ＦＥＴのゲート・ソース端子間に抵抗および／ま
たは定電圧ダイオードを接続し、ゲート端子と直流電圧
電源の負極側との間に抵抗を接続したことを特徴とする
請求項１記載の逆極性入力保護装置。2. The reverse polarity input protection circuit according to claim 1, wherein
2. The reverse polarity input according to claim 1, wherein a resistor and / or a constant voltage diode is connected between the gate and source terminals of the channel FET, and a resistor is connected between the gate terminal and the negative electrode of the DC voltage power supply. Protective equipment.
ＦＥＴを介在し、該Ｎｃｈ ＦＥＴのドレイン端子を
直流電圧電源の負極側に、また、ソース端子を負荷回路
の負極側に、さらにゲート端子を直流電圧電源および負
荷回路の正極側に接続してなることを特徴とする逆極性
入力保護装置。3. An Nch circuit between a DC voltage power supply and a load circuit.
With the FET interposed, the drain terminal of the Nch FET is connected to the negative side of the DC voltage power supply, the source terminal is connected to the negative side of the load circuit, and the gate terminal is connected to the DC voltage power supply and the positive side of the load circuit. A reverse polarity input protection device, characterized in that:
ｃｈ ＦＥＴのゲート・ソース端子間に抵抗および／ま
たは定電圧ダイオードを接続し、ゲート端子と直流電圧
電源の正極側との間に抵抗を接続したことを特徴とする
請求項３記載の逆極性入力保護装置。4. The reverse polarity input protection circuit according to claim 1, wherein
4. A reverse polarity input according to claim 3, wherein a resistor and / or a constant voltage diode is connected between the gate and source terminals of the channel FET, and a resistor is connected between the gate terminal and the positive electrode of the DC voltage power supply. Protective equipment.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11149021A JP2000341848A (en) | 1999-05-28 | 1999-05-28 | Reverse-polarity input protective device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11149021A JP2000341848A (en) | 1999-05-28 | 1999-05-28 | Reverse-polarity input protective device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JP2000341848A true JP2000341848A (en) | 2000-12-08 |
Family
ID=15465946
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11149021A Pending JP2000341848A (en) | 1999-05-28 | 1999-05-28 | Reverse-polarity input protective device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2000341848A (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1235341A2 (en) * | 2001-02-26 | 2002-08-28 | Woodward Governor Company | Active snubber circuit for electrical rotary actuator |
| JP2005354888A (en) * | 2004-05-12 | 2005-12-22 | Seiko Instruments Inc | Power generation circuit using electric waves |
| EP2133554A1 (en) | 2007-03-05 | 2009-12-16 | Bosch Corporation | Glow plug drive device |
| JP2013021883A (en) * | 2011-07-14 | 2013-01-31 | Omron Automotive Electronics Co Ltd | Power-supply reverse-connection protection circuit |
| WO2015060095A1 (en) | 2013-10-23 | 2015-04-30 | 日立オートモティブシステムズ株式会社 | Sensor device |
| EP4175116A1 (en) | 2021-10-28 | 2023-05-03 | Somfy Activites Sa | Motorised drive device, associated concealment device and control method |
-
1999
- 1999-05-28 JP JP11149021A patent/JP2000341848A/en active Pending
Cited By (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1235341A2 (en) * | 2001-02-26 | 2002-08-28 | Woodward Governor Company | Active snubber circuit for electrical rotary actuator |
| EP1235341A3 (en) * | 2001-02-26 | 2004-06-30 | Woodward Governor Company | Active snubber circuit for electrical rotary actuator |
| JP2005354888A (en) * | 2004-05-12 | 2005-12-22 | Seiko Instruments Inc | Power generation circuit using electric waves |
| JP4611093B2 (en) * | 2004-05-12 | 2011-01-12 | セイコーインスツル株式会社 | Radio power generation circuit |
| EP2133554A1 (en) | 2007-03-05 | 2009-12-16 | Bosch Corporation | Glow plug drive device |
| JPWO2008108330A1 (en) * | 2007-03-05 | 2010-06-17 | ボッシュ株式会社 | Glow plug drive |
| EP2133554A4 (en) * | 2007-03-05 | 2012-03-21 | Bosch Corp | Glow plug drive device |
| JP2013021883A (en) * | 2011-07-14 | 2013-01-31 | Omron Automotive Electronics Co Ltd | Power-supply reverse-connection protection circuit |
| WO2015060095A1 (en) | 2013-10-23 | 2015-04-30 | 日立オートモティブシステムズ株式会社 | Sensor device |
| US9941686B2 (en) | 2013-10-23 | 2018-04-10 | Hitachi Automotive Systems, Ltd. | Sensor device |
| EP4175116A1 (en) | 2021-10-28 | 2023-05-03 | Somfy Activites Sa | Motorised drive device, associated concealment device and control method |
| FR3128731A1 (en) * | 2021-10-28 | 2023-05-05 | Somfy Activites Sa | Motorized drive device, concealment device and associated control method |
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