JP2000324852A - Current type inverter for photovoltaic power generation - Google Patents

Current type inverter for photovoltaic power generation

Info

Publication number
JP2000324852A
JP2000324852A JP11133429A JP13342999A JP2000324852A JP 2000324852 A JP2000324852 A JP 2000324852A JP 11133429 A JP11133429 A JP 11133429A JP 13342999 A JP13342999 A JP 13342999A JP 2000324852 A JP2000324852 A JP 2000324852A
Authority
JP
Japan
Prior art keywords
current
switching
circuit
power generation
source inverter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP11133429A
Other languages
Japanese (ja)
Inventor
Kimihiko Furukawa
公彦 古川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP11133429A priority Critical patent/JP2000324852A/en
Publication of JP2000324852A publication Critical patent/JP2000324852A/en
Withdrawn legal-status Critical Current

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Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/56Power conversion systems, e.g. maximum power point trackers

Landscapes

  • Supply And Distribution Of Alternating Current (AREA)
  • Inverter Devices (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a current type inverter for photovoltaic power generation having low loss and high conversion efficiency in which the number of electronic parts passing a high frequency current is decreased while reducing noise. SOLUTION: The current type inverter 10 for photovoltaic power generation comprises a bridge type switching circuit 36 comprising four semiconductor switching elements 28-34 connected, respectively, in series with diodes 20-26 receiving DC power from a solar cell array section 12 through a reactor 18, and a current type inverter section 14 having a PWM control circuit 38 outputting a switching control signal to each semiconductor switching element 28-34 wherein DC power is converted into AC power through the current type inverter section 14 and linked with a commercial power system. The reactor 18 is divided uniformly into two and arranged symmetrically to the solar cell array section 12 and a high frequency semiconductor switching element 40 is connected to the input side of the switching circuit 36 in parallel therewith.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】この発明は太陽光発電用電流形イ
ンバータ装置に関し、特にたとえば太陽電池の直流電力
を交流電力に変換して商用電力系統と連系する太陽光発
電用電流形インバータ装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a current-source inverter device for photovoltaic power generation, and more particularly to a current-source inverter device for photovoltaic power generation, for example, converting DC power of a solar cell into AC power and interconnecting with a commercial power system. .

【0002】[0002]

【従来の技術】近年、地球環境保護意識の高まりによっ
て、環境汚染のないクリーンエネルギー、中でも太陽電
池を利用した太陽光発電が注目され実用化が進んでい
る。この太陽光発電では発電電力が日射量に応じて大き
く変動するので、電力の安定供給および余剰発電電力の
有効利用を図るために、ビルや一般家庭に設置される太
陽電池とインバータからなる太陽光発電システムは、商
用電力系統との連系による使用が行われている。すなわ
ち、通常は太陽光発電システムと商用電力系統との並列
運転により負荷、例えばインバータエアコンに対する給
電が行われる。そして、自家に必要な電力の一部または
全部が太陽光発電によって賄われるとともに、太陽電池
の発電電力が余った場合には商用電力系統へ供給する逆
潮流が行われる。
2. Description of the Related Art In recent years, attention has been paid to clean energy free of environmental pollution, especially solar power generation using a solar cell, due to increasing awareness of global environmental protection, and practical use thereof has been promoted. In this photovoltaic power generation, the generated power fluctuates greatly in accordance with the amount of solar radiation, so in order to ensure a stable supply of power and effective use of surplus generated power, the solar power consisting of solar cells and inverters installed in buildings and ordinary households The power generation system is used in connection with a commercial power system. That is, power is normally supplied to a load, for example, an inverter air conditioner, by parallel operation of the solar power generation system and the commercial power system. Then, part or all of the electric power required for the house is covered by the solar power generation, and when the power generated by the solar cell is excessive, a reverse power flow is supplied to the commercial power system.

【0003】一般に、直流電力の単相交流電力への変換
は、例えば図8に示すように、自己ターンオフ機能を有
したスイッチング素子である4個の半導体デバイス、例
えば高速の半導体スイッチング素子(IGBT)Q1〜
Q4と、これらの各スイッチング素子に対して逆並列接
続された4個の帰還ダイオードD1〜D4とからなる単
相ブリッジの電圧形インバータ主回路が用いられる。
In general, DC power is converted into single-phase AC power by, for example, as shown in FIG. 8, four semiconductor devices which are switching devices having a self-turn-off function, for example, a high-speed semiconductor switching device (IGBT). Q1
A single-phase bridge voltage-source inverter main circuit including Q4 and four feedback diodes D1 to D4 connected in anti-parallel to these switching elements is used.

【0004】このインバータ主回路において、半導体ス
イッチング素子Q1、Q4の組と半導体スイッチング素
子Q2、Q3の組とに分け、各組を交互にスイッチング
(開閉)することによって、半導体スイッチング素子Q
1、Q2の接続点と半導体スイッチング素子Q3、Q4
の接続点との間に階段波状の電圧が得られる。そして、
スイッチング制御信号に適当なパルス幅変調(PWM)
を施すことによって、出力電圧波形を正弦波形に近づけ
ることができる。つまり、直流電力を変換して単相交流
電力を出力するインバータ主回路は、スイッチング回路
とこの回路の動作を制御するPWM制御回路から構成さ
れる。
In this inverter main circuit, a set of semiconductor switching elements Q1 and Q4 and a set of semiconductor switching elements Q2 and Q3 are divided, and each set is alternately switched (open / closed), so that the semiconductor switching element Q
1, the connection point of Q2 and the semiconductor switching elements Q3, Q4
A staircase-like voltage is obtained between the connection point and the connection point. And
Pulse width modulation (PWM) suitable for switching control signals
, The output voltage waveform can be approximated to a sine waveform. That is, the inverter main circuit that converts DC power and outputs single-phase AC power includes a switching circuit and a PWM control circuit that controls the operation of this circuit.

【0005】なお、このインバータ主回路の入力直流電
圧は、原理的には出力交流電圧の波高値(実効値の約
1.4倍)であればよいが、実際には半導体スイッチン
グ素子Q1〜Q4の電圧降下、フィルタ回路の電圧降
下、および直流電源(太陽電池)の温度特性などを考慮
して出力交流電圧(実効値)の2倍程度の値に設定され
る。
In principle, the input DC voltage of the inverter main circuit may be a peak value (about 1.4 times the effective value) of the output AC voltage. However, in practice, the semiconductor switching elements Q1 to Q4 The voltage is set to about twice the output AC voltage (effective value) in consideration of the voltage drop of the filter circuit, the voltage drop of the filter circuit, and the temperature characteristics of the DC power supply (solar cell).

【0006】[0006]

【発明が解決しようとする課題】ところで、直流を交流
に変換するインバータでは、インバータの入出力間電圧
の振れによりノイズが多く出るという問題がある。
However, an inverter that converts direct current to alternating current has a problem that a large amount of noise is generated due to fluctuations in the voltage between the input and output of the inverter.

【0007】すなわち、インバータ主回路においては、
電力線のアース間の高周波電圧の強度がノイズの放出量
に大きな影響を及ぼしている。通常ノイズは「アースに
対する高周波電圧の大きさ」として観測される。すなわ
ち、図9において、太陽電池アレイ部1と商用交流電源
2の間に配置されたインバータ主回路3の入出力端子を
P,N、UおよびVとすると、N端子とアース間および
V端子とアース間の各電圧VNE、VVEの高周波成分が
「アースに対する高周波電圧の大きさ」に相当する。ま
た、P端子とアース間およびU端子とアース間の各電圧
VPE、VUEも同様に定義される。
That is, in the inverter main circuit,
The intensity of the high-frequency voltage between the ground of the power line has a great influence on the amount of noise emission. Usually, noise is observed as "the magnitude of the high-frequency voltage with respect to the ground". That is, in FIG. 9, if the input / output terminals of the inverter main circuit 3 arranged between the solar cell array unit 1 and the commercial AC power supply 2 are P, N, U and V, the N terminal and the ground and the V terminal The high-frequency components of the voltages VNE and VVE between the grounds correspond to “the magnitude of the high-frequency voltage with respect to the ground”. In addition, each voltage between P terminal and ground and between U terminal and ground
VPE and VUE are defined similarly.

【0008】そして、インバータが動作する場合、上述
のように入出力間電圧の動きに注意する必要がある。特
に、内部でトランスを用いない方式では入出力端子がイ
ンバータ主回路3を構成するスイッチング素子を通じて
接続されるため入出力間電圧が急激に変化して、VN
E、VVEを変化させようとするため、これによりノイ
ズ放射量が格段に増加する場合がある。また、アースに
対する電圧変化は通常「コモンモード電圧」と呼ばれ
る。
When the inverter operates, it is necessary to pay attention to the movement of the input / output voltage as described above. In particular, in a system in which a transformer is not used internally, since the input / output terminals are connected through the switching elements constituting the inverter main circuit 3, the voltage between the input and output sharply changes and VN
In order to change E and VVE, this may significantly increase the amount of noise radiation. Also, the change in voltage with respect to ground is commonly referred to as "common mode voltage".

【0009】このインバータ主回路3のDC側とAC側
の各端子間(P−N、U−V)の電圧は各々直流電圧・
交流電圧であり、決まった値となる。AC側は系統電圧
であるので、瞬時値が交流であるが非常に低周波である
ため、ノイズとしての影響は無視することができる。
The voltage between each terminal (PN, UV) on the DC and AC sides of the inverter main circuit 3 is a DC voltage
It is an AC voltage and has a fixed value. Since the AC side is a system voltage, the instantaneous value is alternating current but has a very low frequency, so that the influence as noise can be ignored.

【0010】図10に示すような従来の電流形インバー
タでは、上述のようにノイズが非常に多く出るものであ
った。これは、スイッチング方式とインバータ主回路の
動作に起因しているものである。
In the conventional current source inverter as shown in FIG. 10, a very large amount of noise is generated as described above. This is due to the switching method and the operation of the inverter main circuit.

【0011】すなわち、系統側は単相3線200Vの場
合、中性線であるO相は柱上トランスで接地されてい
る。したがって、これを基準に考察する。O相は常時U
−V間の電圧の中点となる。図11に一般的に用いられ
ている波形発生パターンによるタイミング図を示す。
That is, in the case of a single-phase three-wire 200 V on the system side, the neutral phase O-phase is grounded by a pole transformer. Therefore, it is considered based on this. O phase is always U
It is the midpoint of the voltage between -V. FIG. 11 shows a timing chart based on a commonly used waveform generation pattern.

【0012】例えば、「U→V」の方向へ電流を流す場
合、図10においてスイッチング素子Q1、Q4を常時
ONとし、Q2を電流を大きく流すほどOFF時間が長
くなるようにPWMを発生させる。すると入力電流Ii
nはそのPWMの比率に合わせて出力側へと流され、そ
の結果Q2のOFF時間が長いほど出力電流が大きくな
る。逆に、「V→U」の方向へと電流を流す場合は、Q
2、Q3を常時ONとし、Q4をPWMで制御すること
により電流量を制御できる。
For example, when a current flows in the direction of "U → V", the switching elements Q1 and Q4 in FIG. 10 are always turned on, and PWM is generated so that the OFF time becomes longer as a larger current flows through Q2. Then, the input current Ii
n flows to the output side in accordance with the PWM ratio. As a result, the longer the OFF time of Q2, the larger the output current. Conversely, when a current flows in the direction of “V → U”, Q
2. The current amount can be controlled by always turning on Q3 and controlling Q4 by PWM.

【0013】スイッチング素子(Q1〜Q4)を見る
と、各素子がON−OFFする際、OFF時は周辺回路
により決定される電圧が印加される。電流形インバータ
の場合これは通常取り扱う電圧程度となり、AC200
Vに対して連系運転する場合はAC200Vの最大値で
ある282Vが最大である。逆に、ON時にスイッチン
グ素子の両端はON電圧であり、OFF時と比較して非
常に小さい値(1〜2V程度)となる。これによりスイ
ッチングのON−OFFサイクル毎の状況が解析でき
る。
Referring to the switching elements (Q1 to Q4), when each element is turned on and off, a voltage determined by a peripheral circuit is applied when the element is turned off. In the case of a current-source inverter, this is about the voltage normally handled.
In the case of the interconnection operation with respect to V, 282 V which is the maximum value of 200 V AC is the maximum. Conversely, both ends of the switching element are ON voltage when ON, and have a very small value (about 1 to 2 V) as compared with OFF. As a result, the situation of each switching ON-OFF cycle can be analyzed.

【0014】そこで、出力側の電圧が交流の瞬時値で2
00V(片側で100V)、入力側が50Vと仮定す
る。
Therefore, the voltage on the output side is 2
Assume 00V (100V on one side) and 50V on the input side.

【0015】図10において、スイッチング素子のQ
1,Q2,Q4=ON,Q3=OFFの場合、入出力間
電圧は図12のようになる。図中ではONとなっている
スイッチング素子およびダイオードは両方とも省略して
いる。この場合入力リアクトルはDC50Vが印加され
て入力電流Iinは増加する。また、出力電流Iout
は出力側コンデンサCoutからの供給となり、減少す
る。交流側O相を基準とした場合、図から明らかなよう
にP相は150V、N相は100Vとなる。
In FIG. 10, Q of the switching element
When 1, Q2, Q4 = ON and Q3 = OFF, the input / output voltage is as shown in FIG. In the figure, both the switching element and the diode which are ON are omitted. In this case, 50 V DC is applied to the input reactor, and the input current Iin increases. Also, the output current Iout
Is supplied from the output side capacitor Cout and decreases. When the AC side O-phase is used as a reference, the P-phase becomes 150 V and the N-phase becomes 100 V, as is apparent from the figure.

【0016】次に、図12からQ2=OFFとなった場
合の回路図が図13に示されている。Q2=OFFとな
ったために入力電流Iinにより出力側コンデンサCo
utは充電され、充電に不足分の電圧は入力リアクトル
により補われる。ダイオードD4は図11では逆バイア
スのためOFFであったが、スイッチング素子Q2がO
FFとなったためにQ2のOFF電圧が出力側の電圧を
支え、入力電流Iinの戻りの電流を流すためにONと
なる。この場合も交流側O相を基準に考えた場合、N相
は−100VでP相はN相から50V上昇した−50V
となる。
Next, FIG. 13 shows a circuit diagram when Q2 = OFF from FIG. Since Q2 = OFF, the output side capacitor Co is generated by the input current Iin.
ut is charged, and the insufficient voltage for charging is supplemented by the input reactor. Although the diode D4 is OFF in FIG. 11 due to the reverse bias, the switching element Q2
Since the FF has been turned on, the OFF voltage of Q2 supports the voltage on the output side, and is turned ON to allow the return current of the input current Iin to flow. Also in this case, when considering the AC side O-phase as a reference, the N-phase is -100 V and the P-phase is -50 V, which is 50 V higher than the N-phase.
Becomes

【0017】次の半サイクルは交流電圧関係がV>Uと
なる。Q1=OFF、Q2,Q3,Q4=ONの場合の回
路図を図14に示す。Q2=ONであるが、V>Uであ
るためダイオードD2は逆バイアスされOFFである。
O相を基準に考察すると、P相は150V、N相は10
0Vである。
In the next half cycle, the relationship of the AC voltage becomes V> U. FIG. 14 shows a circuit diagram when Q1 = OFF and Q2, Q3, Q4 = ON. Q2 = ON, but since V> U, diode D2 is reverse biased and OFF.
Considering the O phase as a reference, the P phase is 150 V, the N phase is 10 V
0V.

【0018】最後に、Q1,Q4=OFF、Q2,Q3=
ONの場合の回路図を図15に示す。この回路図では図
13においてU,Vが入れ替わったものとみなして良い
から、O相を基準にした場合P相は−50V、N相は−
100Vとなる。
Finally, Q1, Q4 = OFF, Q2, Q3 =
FIG. 15 shows a circuit diagram in the case of ON. In this circuit diagram, since it can be considered that U and V are interchanged in FIG. 13, when the O phase is used as a reference, the P phase is −50 V, and the N phase is −50 V.
100V.

【0019】図11に示す波形発生パターンと図12〜
図15で得られた結果をまとめると、次のようになる。
The waveform generation pattern shown in FIG.
The results obtained in FIG. 15 are summarized as follows.

【0020】1)U>Vの場合、Q2のスイッチングO
N−OFFにおいてO相からみた電位は以下のようにな
る。
1) When U> V, the switching O of Q2
The potential seen from the O phase in N-OFF is as follows.

【0021】 P相 150V→―50V→150V→―50V→… ±100V N相 100V→―100V→100V→―100V→… ±100V 2)U<Vの場合、Q4のスイッチングON−OFFに
おいてV相から見た電位は以下のようになる。
P phase 150V → −50V → 150V → −50V →... ± 100V N phase 100V → −100V → 100V → −100V →... ± 100V 2) When U <V, V phase when switching ON / OFF of Q4 The potential as seen from is as follows.

【0022】 P相 150V→―50V→150V→―50V→… ±100V N相 100V→―100V→100V→―100V→… ±100V いずれのサイクルにおいても±100Vの振れが発生す
る。これはスイッチング毎により発生する電圧の変化で
ある。スイッチング周波数は通常可聴周波数よりも高い
値に設定されるため、15〜17kHz以上がよく使用
される。したがって、P相、N相は上の電圧変化が15
〜17kHzの範囲で発生することとなる。
P-phase 150V → −50V → 150V → −50V →... ± 100V N-phase 100V → −100V → 100V → −100V →... ± 100V A swing of ± 100V occurs in any cycle. This is a change in voltage generated by each switching. Since the switching frequency is usually set to a value higher than the audio frequency, a frequency of 15 to 17 kHz or more is often used. Therefore, for the P and N phases, the upper voltage change is 15
It occurs in the range of ~ 17 kHz.

【0023】一方、系統電圧はACのため、図12〜図
15に示したU,Vが商用周波数(50、60Hz)で
電圧変化が発生する。一般に系統電圧の中性相(0相)
は接地されているので、上述の検証で用いた1)および
2)の電圧変化は接地に対して発生していることとな
り、これの高周波成分(150kHz以上)の大きさが
ノイズとなって観測される。VCCIによると150k
Hzでは79dBμV以下となっており、これは電圧レ
ベルでは89mV以下に相当する。第10高調波(15
0kHz)で89mV以下となることを考慮すると、1
5kHzで±100Vの電圧変化は非常に大きなノイズ
レベルであることが理解される。
On the other hand, since the system voltage is AC, voltage changes occur at U and V shown in FIGS. 12 to 15 at commercial frequencies (50 and 60 Hz). Generally, neutral phase (0 phase) of system voltage
Is grounded, so that the voltage changes 1) and 2) used in the above verification are generated with respect to the ground, and the magnitude of the high-frequency component (150 kHz or more) becomes noise and is observed. Is done. 150k according to VCCI
At 79 Hz, it is 79 dBV or less, which corresponds to 89 mV or less at the voltage level. 10th harmonic (15
Considering that it is 89 mV or less at 0 kHz), 1
It can be seen that a voltage change of ± 100 V at 5 kHz is a very large noise level.

【0024】それゆえに、この発明の主たる目的は、簡
単な構成によりノイズの発生を低減すると共に変換効率
の良い、太陽光発電用電流形インバータ装置を提供する
ことである。
SUMMARY OF THE INVENTION Therefore, a main object of the present invention is to provide a current source inverter for photovoltaic power generation which has a simple structure, reduces noise generation, and has high conversion efficiency.

【0025】[0025]

【課題を解決するための手段】この発明は、太陽電池か
らの直流電力をリアクトルを介して受けるかつ4個の半
導体スイッチング素子からなるブリッジ形のスイッチン
グ回路、および各半導体スイッチング素子にスイッチン
グ制御信号を出力するパルス幅変調制御回路を有する電
流形インバータ部を備え、この電流形インバータ部によ
り太陽電池の直流電力を交流電力に変換して商用電力系
統と連系する太陽光発電用電流形インバータ装置におい
て、リアクトルの出力側でスイッチング回路と並列にな
るように高周波スイッチング部を設けたことを特徴とす
る、太陽光発電用電流形インバータ装置である。
SUMMARY OF THE INVENTION The present invention provides a bridge-type switching circuit which receives DC power from a solar cell via a reactor and includes four semiconductor switching elements, and supplies a switching control signal to each semiconductor switching element. A current-source inverter unit having a pulse width modulation control circuit for outputting the current-source inverter unit. The current-source inverter unit converts the DC power of the solar cell into AC power and interconnects with a commercial power system. And a high-frequency switching unit provided in parallel with the switching circuit on the output side of the reactor.

【0026】また、この発明は上述の太陽光発電用電流
形インバータ装置において、リアクトルを均等2分割し
て太陽電池に対して対称的に配置接続すると共に、スイ
ッチング回路の入力側にこのスイッチング回路と並列に
なるように高周波スイッチング部を設けたことを特徴と
する、太陽光発電用電流形インバータ装置である。
Further, according to the present invention, in the above-described current-source inverter for photovoltaic power generation, the reactor is equally divided into two parts, symmetrically arranged and connected to the solar cell, and the switching circuit is connected to the input side of the switching circuit. A current source inverter for photovoltaic power generation, wherein a high-frequency switching unit is provided in parallel.

【0027】[0027]

【作用】リアクトルの出力側でスイッチング回路と並列
に高周波スイッチング部を設けたことにより、スイッチ
ング回路の動作時に高周波部分は別ルートによりバイパ
スして流れ、電流が通過する電子部品を減らすことがで
きる。また、リアクトルを均等2分割して入力側に対称
的に配置しているのでスイッチングにおいて電位は変化
せずノイズの発生も抑制される。
Since the high-frequency switching section is provided in parallel with the switching circuit on the output side of the reactor, the high-frequency portion flows by bypassing another route during the operation of the switching circuit, and the number of electronic components through which the current passes can be reduced. Further, since the reactor is equally divided into two and arranged symmetrically on the input side, the potential does not change during switching, and generation of noise is suppressed.

【0028】[0028]

【発明の効果】この発明によれば、変換効率が改善され
るると共にノイズも低減されるので、小型で性能のよい
太陽光発電用電流形インバータ装置を安価に提供するこ
とが可能となる。
According to the present invention, since the conversion efficiency is improved and the noise is reduced, it is possible to provide a small-sized and high-performance current-source inverter for photovoltaic power generation at low cost.

【0029】この発明の上述の目的,その他の目的,特
徴および利点は、図面を参照して行う以下の実施例の詳
細な説明により一層明らかとなろう。
The above and other objects, features and advantages of the present invention will become more apparent from the following detailed description of embodiments with reference to the accompanying drawings.

【0030】[0030]

【実施例】図1〜図4に示すこの発明による一実施例で
ある太陽光発電用電流形インバータ装置10について説
明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A current source inverter device 10 for photovoltaic power generation according to an embodiment of the present invention shown in FIGS.

【0031】図1において、太陽光発電用電流形インバ
ータ装置10は、太陽電池アレイ部12からの直流電力
を受ける電流形インバータ部14、および出力フイルタ
回路16を含む。
In FIG. 1, a current-source inverter device 10 for photovoltaic power generation includes a current-source inverter unit 14 that receives DC power from a solar cell array unit 12 and an output filter circuit 16.

【0032】太陽電池アレイ部12は図示されない複数
の太陽電池と同じく同数の逆電流阻止用ダイオードとよ
りなるもので、太陽電池と逆電流阻止用ダイオードは出
力容量に応じて必要な数だけ直列あるいは並列に接続さ
れる。
The solar cell array section 12 comprises the same number of reverse current blocking diodes as a plurality of solar cells (not shown). The required number of solar cells and reverse current blocking diodes are connected in series or as many as necessary according to the output capacity. Connected in parallel.

【0033】また、電流形インバータ部14は太陽電池
アレイ部12で発電された直流電力を交流電力に変換す
るもので、高周波リプルを平滑化する電流平滑用リアク
トル18とダイオード20,22,24、および26を
それぞれ直列接続した4個の半導体スイッチング素子2
8,30,32、および34をブリッジ形に接続して構
成するスイッチング回路36、およびこのスイッチング
回路36の各半導体スイッチング素子28〜34にスイ
ッチング制御信号を出力するパルス幅変調制御回路(P
WM制御回路)38を含む。このPWM制御回路38
は、例えばスイッチング回路36の出力電流を図示され
ない電流検出器で検出してフィードバックするフィード
バック制御系で、スイッチング回路36の出力状態が適
正になるようにパルス幅を調整した複数組のPWMパル
スをスイッチング回路36を構成する各半導体スイッチ
ング素子28〜34に供給するものである。
The current source inverter unit 14 converts the DC power generated by the solar cell array unit 12 into AC power, and includes a current smoothing reactor 18 for smoothing high-frequency ripples and diodes 20, 22, 24, Semiconductor switching elements 2 each of which is connected in series with
8, 30, 32, and 34 connected in a bridge form, and a pulse width modulation control circuit (P) that outputs a switching control signal to each of the semiconductor switching elements 28 to 34 of the switching circuit 36.
WM control circuit) 38. This PWM control circuit 38
Is a feedback control system that detects the output current of the switching circuit 36 with a current detector (not shown) and feeds back the switching current, and switches a plurality of sets of PWM pulses whose pulse widths are adjusted so that the output state of the switching circuit 36 becomes appropriate. This is supplied to each of the semiconductor switching elements 28 to 34 constituting the circuit 36.

【0034】さらに、電流平滑用リアクトル18の出力
側でスイッチング回路36と並列に高周波用半導体スイ
ッチング素子40を接続している。その結果、例えば半
導体スイッチング素子28、30が同時にONするよう
な場合、高周波用半導体スイッチング素子40をONさ
せて高周波電流をこの素子40の方へ流れるようにす
る。これにより従来は半導体スイッチング素子28と3
0およびダイオード20と22の4個分の損失がこのス
イッチング素子40のみとなる。
Further, a high frequency semiconductor switching element 40 is connected in parallel with the switching circuit 36 on the output side of the current smoothing reactor 18. As a result, for example, when the semiconductor switching elements 28 and 30 are simultaneously turned on, the high-frequency semiconductor switching element 40 is turned on so that the high-frequency current flows toward this element 40. Thereby, the conventional semiconductor switching elements 28 and 3
A loss corresponding to 0 and four of the diodes 20 and 22 is only the switching element 40.

【0035】従って、スイッチング回路36より高周波
スイッチング部分を分離することにより、高周波電流の
流れ方が変わってこの電流が通過すべきデバイスを減ら
し、変換効率が0.5〜1%程度改善される。すなわ
ち、図10に示す従来例において、図11のようなスイ
ッチングを行った場合、高周波スイッチングを行うのは
スイッチング素子Q2、Q4であるが、スイッチングサ
イクルの途中にはスイッチング素子Q1、Q2もしくは
Q3、Q4が同時にONとなる時間が存在する。この時
電流(Iin)はスイッチング素子2個とダイオード2
個を通過する。これにより発生する損失は無視できない
値となる。また、上述で説明したように、この電流形イ
ンバータ主回路方式では電流は必ずスイッチング素子2
個とダイオード2個を通過するので、定常的には素子4
個分の損失となる。このことを具体的に説明すると、例
えば入力電流が30A、出力電流が15Aのインバータ
の場合、この回路を流れる電流は出力の15Aでなく入
力の30Aである。したがって、スイッチング素子とダ
イオードのON電圧を合計で3Vとした場合、30A×
3V×電流通過時間分の損失が発生する。この損失は、
通常無視できない大きな値となる。
Therefore, by separating the high-frequency switching portion from the switching circuit 36, the flow of the high-frequency current changes, the number of devices through which this current passes is reduced, and the conversion efficiency is improved by about 0.5 to 1%. That is, in the conventional example shown in FIG. 10, when switching as shown in FIG. 11 is performed, high-frequency switching is performed by the switching elements Q2 and Q4. However, during the switching cycle, the switching elements Q1, Q2 or Q3. There is a time when Q4 is simultaneously ON. At this time, the current (Iin) includes two switching elements and a diode 2
Pass through the pieces. The resulting loss is a value that cannot be ignored. Further, as described above, in this current source inverter main circuit system, the current always flows through the switching element 2.
And two diodes.
This is a loss for each item. To explain this in detail, for example, in the case of an inverter having an input current of 30 A and an output current of 15 A, the current flowing through this circuit is not the output 15 A but the input 30 A. Therefore, when the ON voltage of the switching element and the diode is 3 V in total, 30 A ×
A loss of 3V × current passing time occurs. This loss is
Usually, it is a large value that cannot be ignored.

【0036】また、出力フイルタ回路16はスイッチン
グ回路36の出力端に接続されるコンデンサ42、およ
びリアクトル44、44を含み、高周波成分の少ない出
力を得るための逆L字形となっている。この出力フイル
タ回路16には図示されない負荷および商用電力系統が
連系接続される。
The output filter circuit 16 includes a capacitor 42 connected to the output terminal of the switching circuit 36, and reactors 44, 44, and has an inverted L-shape for obtaining an output with a low frequency component. A load and a commercial power system (not shown) are interconnected to the output filter circuit 16.

【0037】次に、上述の構成における太陽光発電用電
流形インバータ装置10の動作概要について説明する。
Next, an outline of the operation of the current-source inverter device 10 for photovoltaic power generation in the above configuration will be described.

【0038】先ず、太陽光の照射により太陽電池アレイ
部12で生じた起電力は、電流平滑用リアクトル18で
高周波リプルを平滑化し高周波成分を高周波用半導体ス
イッチング素子40に流すと共に平滑な部分をスイッチ
ング回路36に入力される。このスイッチング回路36
では出力状態が適正になるようにPWM制御回路38よ
りパルス幅を調整した複数組のPWMパルスをスイッチ
ング信号としてスイッチング回路36を構成する各半導
体スイッチング素子28〜34に供給する。その結果、
スイッチング回路36からは歪の少ない交流電流が出力
されて出力フイルタ回路16で更に高周波成分を除去さ
れて、負荷若しくは商用電力系統に連系される。
First, the electromotive force generated in the solar cell array unit 12 by the irradiation of sunlight smoothes the high-frequency ripple by the current-smoothing reactor 18, causes the high-frequency component to flow to the high-frequency semiconductor switching element 40, and switches the smooth portion. The signal is input to the circuit 36. This switching circuit 36
Then, a plurality of sets of PWM pulses whose pulse widths are adjusted by the PWM control circuit 38 so that the output state becomes appropriate are supplied as switching signals to the semiconductor switching elements 28 to 34 constituting the switching circuit 36. as a result,
An alternating current with less distortion is output from the switching circuit 36, and the output filter circuit 16 further removes high-frequency components, and is connected to a load or a commercial power system.

【0039】また、この実施例においては、高周波用半
導体スイッチング素子40(Q5)のみを高周波スイッ
チング(15kHz)させることで、それ以外のスイッ
チング回路36を構成する4個の半導体スイッチング素
子28〜34(Q1〜Q4)は出力電流の周波数で切り
かえれば良い。その時のタイミングを示すスイッチング
パターンが図7に示されている。この図より明らかなよ
うに、PWM発生用三角波比較により高周波用半導体ス
イッチング素子40(Q5)のみ高周波スイッチングを
行う。この素子40(Q5)がONの時、出力側半導体
スイッチング素子28〜34(Q1〜Q4)も同時にO
Nとなっているが、ダイオード20〜26が逆流を防止
するので動作に何ら問題は無い。出力側半導体スイッチ
ング素子28〜34(Q1〜Q4)は上述のように商用
周波数でスイッチングするので、高周波用スイッチング
素子40(Q5)と比較してスイッチング速度が低速の
ものが利用可能となる。例えば、バイポーラトランジス
タなどは低速であるがON時の電圧が低く低損失で、価
格も安価である。
In this embodiment, only the high-frequency semiconductor switching element 40 (Q5) is subjected to high-frequency switching (15 kHz), so that the other four semiconductor switching elements 28 to 34 ( Q1 to Q4) may be switched at the frequency of the output current. A switching pattern indicating the timing at that time is shown in FIG. As is apparent from this figure, only the high-frequency semiconductor switching element 40 (Q5) performs high-frequency switching by comparing PWM generation triangular waves. When the element 40 (Q5) is ON, the output side semiconductor switching elements 28 to 34 (Q1 to Q4)
Although it is N, there is no problem in operation since the diodes 20 to 26 prevent backflow. Since the output-side semiconductor switching elements 28 to 34 (Q1 to Q4) switch at the commercial frequency as described above, those having a lower switching speed than the high-frequency switching element 40 (Q5) can be used. For example, a bipolar transistor or the like has a low speed but a low voltage at ON, a low loss, and a low price.

【0040】次に、図2に示す他の実施例について説明
するが、図1の実施例と同一の構成部分については、同
一の符号を付してその説明を省略する。
Next, another embodiment shown in FIG. 2 will be described. The same components as those in the embodiment of FIG. 1 are denoted by the same reference numerals, and description thereof will be omitted.

【0041】この他の実施例においては、電流形インバ
ータ主回路を構成するブリッジ形のスイッチング回路3
6を構成する各半導体スイッチング素子28〜34に直
列接続していた4個のダイオード20〜26(図1を参
照)を1個の共通ダイオード46としてスイッチング回
路36の前段に移動して接続している。したがって、高
周波用半導体スイッチング素子40がONの時はこの共
通ダイオード46により出力側と分離されるので、ダイ
オードは1個で良いことになる。その結果、図1に示す
実施例の場合よりもさらに損失を低減することができ
る。
In another embodiment, a bridge-type switching circuit 3 constituting a current-source inverter main circuit is used.
The four diodes 20 to 26 (see FIG. 1) connected in series to the respective semiconductor switching elements 28 to 34 constituting 6 are moved as one common diode 46 to a stage preceding the switching circuit 36 and connected thereto. I have. Therefore, when the high-frequency semiconductor switching element 40 is ON, it is separated from the output side by the common diode 46, so that only one diode is sufficient. As a result, the loss can be further reduced as compared with the embodiment shown in FIG.

【0042】また、図3に示す第3実施例は、図2の実
施例をさらに改善したもので、同一の構成部分について
は、同じ符号を付してその説明を省略する。
The third embodiment shown in FIG. 3 is a further improvement of the embodiment shown in FIG. 2, and the same components are denoted by the same reference numerals and description thereof is omitted.

【0043】この第3実施例においては、電流形インバ
ータ主回路を構成するスイッチング回路36の出力端側
に接続している高周波成分を除去するコンデンサ42と
リアクトル44で構成される出力フィルタ回路16(図
2を参照)をスイッチング回路36の前段にフィルタ回
路48として配置したものである。すなわち、スイッチ
ング回路36に対してフィルタ回路48を構成するコン
デンサ42を並列に、リアクトル44を直列に接続して
いる。このフィルタ回路48により高周波成分が除去さ
れるからスイッチング回路36を構成する各半導体スイ
ッチング素子28〜34に高周波電流は流れない。その
ために、図2に示す実施例のものに比較してさらに低損
失となる。
In the third embodiment, the output filter circuit 16 (including the reactor 42 and the capacitor 42 for removing high-frequency components connected to the output terminal side of the switching circuit 36 constituting the current source inverter main circuit). 2 is disposed as a filter circuit 48 in a stage preceding the switching circuit 36. That is, the capacitor 42 constituting the filter circuit 48 is connected in parallel to the switching circuit 36, and the reactor 44 is connected in series. Since the high frequency component is removed by the filter circuit 48, no high frequency current flows through each of the semiconductor switching elements 28 to 34 constituting the switching circuit 36. Therefore, the loss is further reduced as compared with the embodiment shown in FIG.

【0044】更に、図4に示すこの発明による第4実施
例は、電流形インバータ主回路の入出力間電圧の振れに
起因するノイズの発生を低減したもので、図1に示す実
施例において、電流平滑用リアクトル18を均等2分割
してリアクトル18a、18bとし、このリアクトル1
8aおよび18bを入力側に対になるように対称的に配
置接続している。なお、図1の実施例と同じ構成部分に
は同一の符号を付してその説明は省略する。このように
入力側の回路構成を工夫することで、対地電圧の高周波
変動を抑制し、低ノイズ化を可能にしている。
Further, the fourth embodiment according to the present invention shown in FIG. 4 reduces the occurrence of noise due to the fluctuation of the input / output voltage of the current source inverter main circuit. The current smoothing reactor 18 is divided equally into two reactors 18a and 18b.
8a and 18b are symmetrically arranged and connected so as to form a pair on the input side. The same components as those in the embodiment of FIG. 1 are denoted by the same reference numerals, and description thereof will be omitted. By devising the circuit configuration on the input side in this manner, high-frequency fluctuations of the ground voltage are suppressed, and low noise is enabled.

【0045】つぎに、この第4実施例の動作概要につい
て考察する。まず、図4において、高周波用半導体スイ
ッチング素子40、および半導体スイッチング素子2
8、34が共にON、半導体スイッチング素子30およ
び32が共にOFFの場合の回路構成が図5に示されて
いる。ここで出力側の電圧が交流の瞬時値で200V
(片側100V)、入力側が50Vであると仮定する。
この図より明らかなようにダイオード20と26がOF
Fとなって、リアクトル18aと18bが見かけ上分離
された形となる。この時、ダイオード20と26が支え
る逆電圧は必ずしも均等になるとは限らないが、このこ
とは逆に直前の値により左右されることを示している。
Next, an outline of the operation of the fourth embodiment will be considered. First, in FIG. 4, the high-frequency semiconductor switching element 40 and the semiconductor switching element 2
FIG. 5 shows a circuit configuration in the case where both 8 and 34 are ON and the semiconductor switching elements 30 and 32 are both OFF. Here, the voltage on the output side is 200 V as an instantaneous value of AC.
(100 V on one side) and 50 V on the input side.
As is apparent from this figure, the diodes 20 and 26 are
As F, the reactors 18a and 18b are apparently separated. At this time, the reverse voltages supported by the diodes 20 and 26 are not always equal, but this indicates that the reverse voltage depends on the immediately preceding value.

【0046】これより、P、N相はO相と対象の電位と
なる。すなわち、図5ではP相は+25V、N相は−2
5Vとなっている。次のサイクルで高周波用半導体スイ
ッチング素子40がOFFとなる。この時の回路構成が
図6に示されている。リアクトル18a、18bが系統
電圧との差を均等に負担するため、P、N端子の電位は
O相に対して対称的な配置となり、P相はO相から+2
5V、N相はO相から−25Vの電位となる。
Thus, the P and N phases become the O phase and the target potential. That is, in FIG. 5, the P phase is +25 V, and the N phase is -2.
5V. In the next cycle, the high-frequency semiconductor switching element 40 is turned off. FIG. 6 shows the circuit configuration at this time. Since the reactors 18a and 18b equally share the difference with the system voltage, the potentials of the P and N terminals are symmetrically arranged with respect to the O phase, and the P phase is +2 from the O phase.
The 5 V and N phases have a potential of −25 V from the O phase.

【0047】図5において、P、N端子の電位はダイオ
ード20、26により発生する逆電圧によりO相とは直
接関係ないたあめ、図5と図6のサイクルが交互に発生
するので、図6は図5の状態を引き継いでいると考える
ことができる。
In FIG. 5, since the potentials of the P and N terminals are not directly related to the O phase due to the reverse voltage generated by the diodes 20 and 26, the cycles of FIGS. 5 and 6 occur alternately. Can be considered to have inherited the state of FIG.

【0048】また、同様に半導体スイッチング素子28
と34がOFF、半導体スイッチング素子30と32が
ONの場合も考えられるが、これは図5および図6にお
いてU、Vの関係が逆転するだけで、P、Nの電位は変
わらないので説明は省略する。
Similarly, the semiconductor switching element 28
And 34 are OFF, and the semiconductor switching elements 30 and 32 are ON. However, this is because the relationship between U and V is reversed in FIGS. 5 and 6 and the potentials of P and N do not change. Omitted.

【0049】以上の説明により、図4に示す第4実施例
で全てのスイッチングにおいて、P、Nの電位は変化せ
ず、その結果ノイズの発生も抑制されることになる。す
なわち、電流形インバータ主回路の入力側にこの発明に
よる対策を実施した場合、130dBμVのノイズが9
0dBμVに低減された。なお、図4の実施例におい
て、太陽電池アレイ部12と並列に平滑用コンデンサを
追加して接続すれば、ノイズの低減効果はさらに大きく
なる。
As described above, in all the switching operations in the fourth embodiment shown in FIG. 4, the potentials of P and N do not change, and as a result, generation of noise is suppressed. That is, when the countermeasure according to the present invention is applied to the input side of the current source inverter main circuit, noise of 130 dBμV is 9%.
It has been reduced to 0 dBμV. In the embodiment of FIG. 4, if a smoothing capacitor is additionally connected in parallel with the solar cell array unit 12, the effect of reducing noise is further increased.

【図面の簡単な説明】[Brief description of the drawings]

【図1】この発明の一実施例である太陽光発電用電流形
インバータ装置の概略構成を示す回路図である。
FIG. 1 is a circuit diagram illustrating a schematic configuration of a current source inverter device for photovoltaic power generation according to an embodiment of the present invention.

【図2】この発明による他の実施例の要部回路図であ
る。
FIG. 2 is a main part circuit diagram of another embodiment according to the present invention.

【図3】この発明による第3実施例の要部回路図であ
る。
FIG. 3 is a main part circuit diagram of a third embodiment according to the present invention.

【図4】この発明による第4実施例の要部回路図であ
る。
FIG. 4 is a main part circuit diagram of a fourth embodiment according to the present invention.

【図5】図4において、ある動作時の回路図である。FIG. 5 is a circuit diagram in a certain operation in FIG. 4;

【図6】図4において、他の動作時の回路図である。FIG. 6 is a circuit diagram showing another operation in FIG. 4;

【図7】図1に示す実施例におけるスイッチングパター
ンのタイミング図である。
FIG. 7 is a timing chart of a switching pattern in the embodiment shown in FIG. 1;

【図8】従来の電圧形インバータ装置の回路図である。FIG. 8 is a circuit diagram of a conventional voltage source inverter device.

【図9】太陽電池アレイ部と商用交流電源の間にインバ
ータ主回路を設けた場合のノイズ発生の概要を説明する
ためのブロック図である。
FIG. 9 is a block diagram for explaining an outline of noise generation when an inverter main circuit is provided between a solar cell array unit and a commercial AC power supply.

【図10】従来の電流形インバータ装置の回路図であ
る。
FIG. 10 is a circuit diagram of a conventional current source inverter device.

【図11】一般的に用いられている波形発生パターンに
よるスイッチングのタイミング図である。
FIG. 11 is a timing chart of switching based on a commonly used waveform generation pattern.

【図12】図10において、スイッチング素子Q1,Q
2,Q4がON,Q3がOFFの場合における回路図で
ある。
FIG. 12 is a diagram showing switching elements Q1, Q
2 is a circuit diagram when Q4 is ON and Q3 is OFF.

【図13】図10において、スイッチング素子Q1,Q
4がON,Q2,Q3がOFFの場合における回路図で
ある。
FIG. 13 shows switching elements Q1, Q
FIG. 4 is a circuit diagram in a case where 4 is ON and Q2 and Q3 are OFF.

【図14】図10において、交流電圧関係がV>Uでス
イッチング素子Q1がOFF、Q2,Q3,Q4がON
の場合における回路図である。
FIG. 14 is a diagram showing the switching element Q1 being OFF and the switching elements Q2, Q3 and Q4 being ON when the AC voltage relationship is V> U.
FIG. 9 is a circuit diagram in the case of FIG.

【図15】図10において、スイッチング素子Q1,Q
4がOFF,Q2,Q3がONの場合における回路図で
ある。
FIG. 15 shows switching elements Q1, Q in FIG.
FIG. 4 is a circuit diagram in a case where 4 is OFF and Q2 and Q3 are ON.

【符号の説明】[Explanation of symbols]

10 …太陽光発電用電流形インバータ装置 12 …太陽電池アレイ部 14 …電流形インバータ部 16 …出力フィルタ回路 18 …電流平滑用リアクトル(入力リアクトル) 20〜26 …ダイオード(D1〜D4) 28〜34 …半導体スイッチング素子(Q1〜Q4) 36 …スイッチング回路 38 …パルス幅変調制御回路(PWM制御回路) 40 …高周波用半導体スイッチング素子(Q5) 42 …コンデンサ 44 …リアクトル 46 …共通ダイオード 48 …フィルタ回路 DESCRIPTION OF SYMBOLS 10 ... Current-source inverter apparatus for photovoltaic power generation 12 ... Solar cell array part 14 ... Current-source inverter part 16 ... Output filter circuit 18 ... Current smoothing reactor (input reactor) 20-26 ... Diode (D1-D4) 28-34 ... Semiconductor switching elements (Q1 to Q4) 36 ... Switching circuit 38 ... Pulse width modulation control circuit (PWM control circuit) 40 ... Semiconductor switching element for high frequency (Q5) 42 ... Capacitor 44 ... Reactor 46 ... Common diode 48 ... Filter circuit

Claims (6)

【特許請求の範囲】[Claims] 【請求項1】太陽電池からの直流電力をリアクトルを介
して受けるかつ4個の半導体スイッチング素子からなる
ブリッジ形のスイッチング回路、および前記各半導体ス
イッチング素子にスイッチング制御信号を出力するパル
ス幅変調制御回路を有する電流形インバータ部を備え、
前記電流形インバータ部により前記直流電力を交流電力
に変換して商用電力系統と連系する太陽光発電用電流形
インバータ装置において、 前記リアクトルの出力側で前記スイッチング回路と並列
になるように高周波スイッチングン部を設けたことを特
徴とする、太陽光発電用電流形インバータ装置。
1. A bridge-type switching circuit that receives DC power from a solar cell via a reactor and includes four semiconductor switching elements, and a pulse width modulation control circuit that outputs a switching control signal to each of the semiconductor switching elements. A current source inverter section having
In the current source inverter device for photovoltaic power generation, which converts the DC power into AC power by the current source inverter unit and interconnects with a commercial power system, high-frequency switching is performed in parallel with the switching circuit on the output side of the reactor. A current source inverter device for photovoltaic power generation, characterized by having an inverter unit.
【請求項2】前記高周波スイッチング部は高周波用半導
体スイッチング素子を含む、請求項1記載の太陽光発電
用電流形インバータ装置。
2. The current source inverter for photovoltaic power generation according to claim 1, wherein said high frequency switching section includes a high frequency semiconductor switching element.
【請求項3】前記スイッチング回路の前段に、さらに共
通ダイオードを直列接続してなる、請求項1または2記
載の太陽光発電用電流形インバータ装置。
3. The current-source inverter for photovoltaic power generation according to claim 1, wherein a common diode is further connected in series before the switching circuit.
【請求項4】前記スイッチング回路の出力端に、さらに
コンデンサとリアクトルで形成される出力フイルタ回路
を接続してなる、請求項1ないし3のいずれかに記載の
太陽光発電用電流形インバータ装置。
4. The current source inverter for photovoltaic power generation according to claim 1, further comprising an output filter circuit formed of a capacitor and a reactor connected to an output terminal of said switching circuit.
【請求項5】前記共通ダイオードと前記スイッチング回
路の間に、コンデンサとリアクトルで形成されるフイル
タ回路を接続してなる、請求項3記載の太陽光発電用電
流形インバータ装置。
5. The current source inverter for photovoltaic power generation according to claim 3, wherein a filter circuit formed by a capacitor and a reactor is connected between said common diode and said switching circuit.
【請求項6】前記リアクトルを均等2分割して前記太陽
電池に対して対称的に配置接続したことを特徴とする、
請求項1ないし5のいずれかに記載の太陽光発電用電流
形インバータ装置。
6. The reactor, wherein the reactor is equally divided into two and symmetrically arranged and connected to the solar cell.
A current-source inverter device for photovoltaic power generation according to claim 1.
JP11133429A 1999-05-14 1999-05-14 Current type inverter for photovoltaic power generation Withdrawn JP2000324852A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
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