JP2000164808A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To restrain the effects of noise superposed on a power source line upon a circuit, in a semiconductor device containing an LSI chip, in which a step-down circuit is formed. SOLUTION: This semiconductor device is mounted on an LSI chip 30 and is provided with a step-down circuit 16 which steps down an external power source, two noise filter circuits 32, 34 which are connected in parallel with the step-down circuit 16 outside of the LSI chip, internal power source lines 40, 48 in the LSI chip which are connected with the respective noise filter circuits, and one or more circuits 44, 46, 52, 54 which are connected with the respective internal power source lines.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having an internal power supply step-down circuit, and more particularly, to suppressing noise generated by a circuit mounted on the semiconductor device and reducing the noise through a power supply line to another circuit. The present invention relates to a semiconductor device configured to prevent sneaking around.

[0002]

2. Description of the Related Art In recent years, as microcomputers are frequently used in home electric appliances and the like, demands for low power, high speed, and low cost of the microcomputer have been increasing. To meet such demands, it is necessary to use an LSI chip driven by a 3V power supply. A dedicated microcomputer pursuing a higher operating speed of 64 bits or 32 bits is 3V
Is prepared so that the whole system is driven by 3V.
In general-purpose microcomputers such as 8-bit, components other than the microcomputer in the system often operate at 5V.
It is often required that the external power supply be stepped down to 3 V and used as an internal power supply. In addition, it is required to mount a step-down circuit for stepping down to 3 V on an LSI chip.

There are the following reasons for mounting a step-down circuit on an LSI chip. First, when a component having a step-down function is externally mounted, the layout area on the board increases. Second, when the number of components mounted on the board is increased, the reliability is deteriorated due to a problem such as poor contact between components as compared with the case where the number of circuits in the LSI chip is increased. Third, if the step-down circuit is not mounted in the LSI chip, it cannot be simply replaced with a conventional LSI chip operating at 5 V, requiring a redesign of the board, which is disadvantageous in terms of cost. That is.

FIG. 6 shows a conventional LSI chip on which a step-down circuit is mounted. This LSI chip 10 is connected to an external power supply of 5V and an external GND (ground) via pads 12 and 14, and one step-down circuit 1 for stepping down 5V to 3V.
6 is provided. Then, in parallel with the internal power supply line 18 and the internal GND line 20 from the step-down circuit 16, for example, the CPU 22, the PLL circuit 24, the ROM / RAM 23,
A circuit such as an OSC (oscillator) 25 is connected. The I / O buffer circuit 26 is connected to a 5V external power supply and an external GND via pads 13 and 15, and the A / D conversion circuit 27 is connected to a 5V external power supply and an external GND via pads 17 and 19. You.

[0005]

As described above, the conventional LSI chip in which a plurality of circuits are connected in parallel to the power supply line and the GND line on the output side of one step-down circuit has the following problems. That is, a circuit in the LSI chip generates noise, which is generated by the power supply line 18, the GND line 2
0 (hereinafter, in this specification, when it is not necessary to distinguish between the power supply line and the GND line, these may be collectively simply referred to as a power supply line), wrap around the power supply line, Noise spreads between circuits.

As described above, the circuit mounted on the LSI chip generates noise and is affected by noise, but the degree of the noise varies.

In a microcomputer, since a large amount of logic operates in synchronization with a clock signal, noise generated when the circuit is turned on and off also occurs in synchronization with the clock signal, and noise is randomly generated and cancels each other. Compared to,
Large noise is likely to occur.

[0008] Such noise affects a circuit by transmitting through a power supply line, but some circuits are vulnerable to noise. For example, in a PLL circuit, the frequency fluctuates and phase lock is lost. In an oscillator, an oscillation frequency fluctuates and noise is generated in an output. In a memory such as a ROM or a RAM, data is erroneously read when noise is applied to a sense amplifier.
SRAMs and DRAMs are adversely affected, such as data being rewritten.

An object of the present invention is to provide an LS having a step-down circuit.
In a semiconductor device including an I chip, an object is to suppress an influence on a circuit due to noise superimposed on a power supply line.

[0010]

According to a first aspect of the present invention, there is provided an LSI chip mounted on an LSI chip for stepping down an external power supply.
Number of step-down circuits, a plurality of noise filter circuits connected in parallel to the step-down circuit, an internal power supply line in the LSI chip connected to each of the noise filter circuits, and a connection to each of the internal power supply lines A semiconductor device including one or more circuits.

According to a second aspect of the present invention, an LSI
A plurality of step-down circuits mounted on a chip for stepping down an external power supply; and the LS connected to an output side of each step-down circuit.
An internal power supply line in the I chip, one or more circuits respectively connected to the internal power supply lines, and a power supply line provided outside the LSI chip and connected to the output side power supply line of each of the step-down circuits. A semiconductor device including a decoupling capacitor can be provided.

In such a semiconductor device, when one or more circuits are connected to each internal power supply line, one or both of the level of noise generated by the circuit and the susceptibility of the circuit to noise are considered. It is important to determine the circuit to be connected so that the influence of noise on the circuit can be suppressed.

[0013]

FIG. 1 is a diagram showing a first embodiment of the present invention. The LSI chip 30 includes one step-down circuit (step-down from 5 V to 3 V) 16 inside, and 2
Noise filter circuits 32 and 34 are provided. The step-down circuit 16 includes an internal power supply line 18, an internal GND line 2
0 and pads 36 and 38 are connected to noise filter circuits 32 and 34, respectively.

Circuits 44 and 46 are connected in parallel to an internal power supply line 40 and an internal GND line 42 connected to the noise filter circuit 32 via pads. Further, an internal power supply line 48 and an internal GND line 50 connected to the noise filter circuit 34 via a pad are
Circuits 52 and 54 are connected in parallel.

The noise filter circuits 32 and 34 are, for example, L
It is composed of a C circuit. Since the inductance L cannot be formed on the LSI chip, a noise filter circuit is provided outside the LSI chip as in the present embodiment. However, if the noise filter circuit is composed of an RC circuit, the capacitor C can be built on an LSI chip, so that the noise filter circuit is
It is also possible to provide on a chip.

FIG. 9 shows an example of a noise filter circuit.
(A) shows an RC noise filter circuit, (b) shows an LC noise filter circuit, and (c) shows a cutoff frequency f _C.
Shows the definition of The LC noise filter of (b) is compared with the RC noise filter circuit of (a).
Large attenuation rate in the high frequency side than the cut-off frequency f _C.

In the above configuration, since the noise filter circuit cuts the noise superimposed on the power supply line, the noise wraps between the power supply lines 40 and 48 via the step-down circuit 16 or is superimposed on the power supply lines 40 and 48. The sneak of the noise into the step-down circuit 16 is prevented, and the sneak of the noise superimposed on the power line 40 to the power line 48 or the sneak of the noise superimposed on the power line 48 to the power line 40 is prevented. Therefore,
It is possible to reduce adverse effects on the circuit due to noise.

FIG. 2 is a diagram showing a second embodiment of the present invention. The LSI chip 60 includes an external power supply and an external G
The ND includes two step-down circuits (step-down from 5 V to 3 V) 62 and 64 connected in parallel via pads 63 and 65 to the ND. Internal power supply lines 66, 68 on the output side of each step-down circuit
The circuit to be connected to the internal GND lines 70 and 72 is determined based on one or both of the level of generated noise and the susceptibility to noise.

As described above, the internal power supply lines are separated, the step-down circuits are connected to the respective power supply lines, and the circuit to be connected to the power supply line is determined by one or both of the level of generated noise and the susceptibility to noise. By doing
It is possible to suppress the influence of the noise superimposed on the power supply line on the circuit.

Further, since the step-down circuit also functions as a noise filter, propagation of noise between power supply line 66 and power supply line 68 is suppressed.

For example, a circuit that generates a large level of noise and a circuit that is easily affected by noise are not connected to the same power supply line. Further, it is preferable to connect circuits having relatively low noise levels to the same power supply line. Further, circuits having a high level of generated noise can be connected to separate power supply lines so that the noise generated by the circuit itself is not transmitted to other circuits. Further, a circuit having a high level of generated noise can be connected to an external power supply via a pad so as not to be connected to the internal power supply, so that noise is not superimposed on the internal power supply line. .

In this embodiment, decoupling capacitors 77 and 78 are externally connected to the power supply lines 66 and 68 via pads 74 and 76 in order to reduce the output impedance of the step-down circuit. With this decoupling capacitor, the output impedance of the step-down circuit is reduced, so that noise circulating through the step-down circuit is suppressed.

FIG. 8 shows a circuit example of the step-down circuit 62 of FIG. The step-down circuit 62 includes a reference circuit 110, an amplifier 111, a resistor 112, and a resistor 113.
The input is an external power supply and an external GND, and the output is an internal power supply and an internal GND.

The reference circuit 110 is a circuit for generating a reference voltage V _r, regardless of fluctuations in the external power supply and temperature, a constant reference voltage V _r (for example, 1.25
V). The output reference voltage is supplied to the amplifier 111
Is input to the + input terminal 114. A voltage value 116 obtained by dividing the output voltage 117 of the amplifier 111 by the resistors 112 and 113 is input to the negative input terminal 115 of the amplifier 111.
Is input to The amplifier 111 outputs the output voltage 11 so that the potential of the input terminal 114 is equal to the potential of the input terminal 115.
Adjust 7

Therefore, the step-down circuit 62
Reference voltage V generated by circuit 110 _r And of the resistor 112
The ratio between the resistance value R1 and the resistance value R2 of the resistor 113
Therefore, the internal power supply voltage V expressed by the equation (1)_int Output
You.

[0026]

V _int = V _r · (R 1 + R 2) / R 2 (1) In the second embodiment, which circuit depends on one or both of the level of the generated noise and the susceptibility to the noise. It is known to those skilled in the art that the idea of determining which power supply line is connected to the power supply line can be applied to the determination of the circuit to be connected to the power supply lines 40 and 48 in the first embodiment described with reference to FIG. It will be obvious.

Although FIG. 2 shows an example in which there are two step-down circuits, it goes without saying that a similar effect can be obtained when there are three or more step-down circuits.

[0028]

FIG. 3 shows a single-chip microcomputer 80 according to a first embodiment of the second embodiment. This single-chip microcomputer includes two step-down circuits (VR) 62 and 64 for stepping down 5V to 3V, and a reference voltage generating circuit (REF) 82 for generating a reference voltage for each step-down circuit. Power supply lines 66, 68
Is connected.

CPU 84, ROM
/ RAM 86 and OSC (oscillator) 88 are connected, and the power supply line 68 is connected to a PLL circuit 90. Circuits connected to the power supply line 66, ie, CPU, ROM /
RAMs and OSCs whose noise levels are almost the same are collected as a group.

The power supply line 68 is connected to a PLL circuit 90 which is easily affected by noise.

I / O buffer circuit 92 for exchanging signals with components operating at 5 V outside the LSI chip
And A / D conversion circuit 94 connects an external power supply of 5V.

The power supply line 66 on the output side of the step-down circuit 62 is connected to a decoupling capacitor (not shown) via an external capacity pad 74, and
4 is connected to a decoupling capacitor (not shown) via an external capacity pad 76.

FIG. 4 is a graph showing the output impedance of the step-down circuit when no decoupling capacitor is externally connected to the power supply line on the output side of the step-down circuit. The ordinate is the output impedance R _OUT (Ω) and the abscissa is the frequency f
(Hz). Each coordinate is logarithmic.

As is clear from FIG. 4, when the decoupling capacitor is not externally connected to the power supply line on the output side of the step-down circuit, the output impedance increases as the frequency increases. Therefore, the output impedance of the high-frequency noise becomes very large, and the high-frequency voltage noise corresponding to the high-frequency component of the current fluctuation of the circuit connected to the step-down circuit is superimposed on the power supply, and the noise wraps around the power supply line. It will be easier.

FIG. 5 is a graph showing the output impedance of the step-down circuit when a decoupling capacitor (0.1 μF) is externally connected to the power supply line on the output side of the step-down circuit. As can be seen from the graph, the output impedance does not increase as the frequency increases. Therefore, the output impedance of high-frequency noise does not increase, and high-frequency voltage noise corresponding to the high-frequency component of the current fluctuation of the circuit connected to the step-down circuit is not easily superimposed on the power supply. It becomes difficult to go around.

FIG. 7 shows an LSI chip 61 which is a second example of the second embodiment of the present invention. LSI chip 6
1. The step-down circuit 10 is connected to the LSI chip 60 shown in FIG.
0 on the output side of the step-down circuit 100.
The internal power supply line 103 and the internal GND line 104 are connected. The CPU 84 is connected to the internal power supply line 103 and the internal GND line 104. The internal power supply line 103 is connected to the decoupling capacitor 102 via the pad 101 similarly to the internal power supply lines 66 and 68.
Is externally attached. Output voltage control signal lines 105, 106, and 107 output from the CPU 84 are connected to step-down circuits 62, 64, and 100, respectively, and the CPU 84 outputs the voltage step-down circuits 62, 64, and 100 through the output voltage control signal lines 105, 106, and 107. 100 output voltages can be controlled independently.

Under the above configuration, for example, when the LSI chip 61 is in a standby state, the CPU 84
For 0, the output voltage is controlled via the output voltage control signal line 107 so that the output voltage becomes the same voltage (for example, 3 V) as in the operation. On the other hand, the CPU 84 includes the step-down circuits 62 and 64
, The output voltage is controlled via the output voltage control signal lines 105 and 106 so that the output voltage is lower than the operating voltage (for example, 1 V). Before returning from the standby state to the operation state, the CPU 84 controls the step-down circuits 62 and 64 via the output voltage control signal line 105 so that the output voltage is the same as the operation voltage (for example, 3 V).

By controlling the output voltages of the step-down circuits 62, 64, and 100 in this manner, the effect of suppressing the influence of noise between different internal power supplies, which is obtained in the LSI chip 60 shown in FIG. 2, is maintained. as it is,
It is possible to reduce power consumption in the standby state.

[0039]

According to the semiconductor device of the present invention, even in a semiconductor device in which the voltage of an external power supply is stepped down by an internal voltage step-down circuit and the internal power supply voltage is set, noise generated by a circuit mounted on an LSI chip is reduced by the power supply. It is possible to reduce or prevent the sneak through the line and adversely affect other circuits.

Further, when the semiconductor device of the present invention is applied to a general-purpose 16-bit or 8-bit microcomputer for household appliances, it solves the problem of chip noise and responds to the reduction in the voltage of the internal power supply. Can be reduced and the cost can be reduced.

[Brief description of the drawings]

FIG. 1 is a diagram showing a first embodiment of the present invention.

FIG. 2 is a diagram showing a second embodiment of the present invention.

FIG. 3 is a diagram illustrating a single-chip microcomputer according to a first example of the second embodiment;

FIG. 4 is a graph showing an output impedance of a step-down circuit when a decoupling capacitor is not externally connected to a power supply line.

FIG. 5 is a graph showing an output impedance of a step-down circuit when a decoupling capacitor is externally connected to a power supply line.

FIG. 6 is a diagram showing a conventional LSI chip on which a step-down circuit is mounted.

FIG. 7 shows an LSI showing a second example of the second embodiment.
It is a figure showing a chip.

FIG. 8 is a diagram illustrating a circuit example of a step-down circuit.

FIG. 9 is a diagram illustrating a circuit example of a noise filter circuit.

[Explanation of symbols]

 16, 62, 64, 100 Step-down circuit 18, 40, 66, 68, 103 Internal power supply line 20, 42, 70, 72, 104 Internal GND line 30, 60, 61 LSI chip 32, 34 Noise filter circuit 44, 46 Circuit 74, 76, 101 Pad for external capacitance 77, 78, 102 Decoupling capacitor 80 Single chip microcomputer 82 Reference generation circuit 84 CPU 86 ROM / RAM 88 OSC 90 PLL circuit 94 A / D conversion circuit 105, 106, 107 Output voltage Control signal line

Claims (12)

[Claims] 1. A step-down circuit mounted on an LSI chip for stepping down an external power supply, a plurality of noise filter circuits connected in parallel to the step-down circuit, and connected to each of the noise filter circuits. An internal power supply line in the LSI chip, one or more circuits connected to each of the internal power supply lines,
A semiconductor device comprising: 2. The semiconductor device according to claim 1, wherein said plurality of noise filter circuits are provided outside said LSI chip. 3. The semiconductor device according to claim 1, wherein said plurality of noise filter circuits are provided inside said LSI chip. 4. When one or more circuits are connected to an internal power supply line connected to each of said noise filter circuits, one or both of the level of noise generated by the circuit and the susceptibility of the circuit to noise are provided. 4. The semiconductor device according to claim 1, wherein a circuit to be connected is determined so as to suppress the influence of noise on the circuit in consideration of both. 5. A plurality of step-down circuits mounted on an LSI chip for stepping down an external power supply, an internal power supply line in the LSI chip connected to an output side of each step-down circuit, and each of the internal power supply lines And a decoupling capacitor provided outside the LSI chip and connected to a power supply line on the output side of each of the step-down circuits, respectively. . 6. When one or more circuits are connected to internal power supply lines connected to the output side of each of said step-down circuits, respectively, the level of noise generated by the circuit and the susceptibility to circuit noise are reduced. 6. The semiconductor device according to claim 5, wherein a circuit to be connected is determined so as to suppress the influence of noise between circuits in consideration of one or both of the following. 7. One or more circuits connected to an external power supply,
The semiconductor device according to claim 1, wherein the semiconductor device is mounted on the LSI chip. 8. The semiconductor device according to claim 7, wherein the circuit connected to the external power supply includes at least an I / O buffer circuit. 9. The semiconductor device according to claim 1, wherein said step-down circuit steps down an external power supply of 5V to 3V. 10. The semiconductor device according to claim 5, wherein the voltage values on the output side of said plurality of step-down circuits are independently controlled. 11. In the standby state, the voltage value output to the internal power supply line to which the CPU is connected is made the same as during operation, while the voltage value output to the internal power supply line to which the CPU is not connected is set higher than during operation. 11. The semiconductor device according to claim 10, wherein the control is performed so as to lower the value. 12. The semiconductor device according to claim 1, wherein said LSI chip is a single-chip microcomputer.