JP2000050649A - Piezoelectric transformer driver and drive method therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To widen the range of power supply voltage in with which a piezoelectric transformer and be driven with high efficiency. SOLUTION: This piezoelectric transformer comprises a power supply 1, a coil 4 connected between the first primary electrode of a piezoelectric transformer 8 and the positive electrode of the power supply 1, a transistor 6 connected between the first primary electrode and the negative electrode of the power supply 1, a transistor 2 and a coil 3 connected between the second primary electrode of the piezoelectric transformer 8 and the positive electrode of the power supply 1, a transistor 5 connected between the second primary electrode and the negative electrode of the power supply means for detecting the amplitude of a drive voltage generated between the second primary electrode and the negative electrode of the power supply 1, and means for reducing the amplitude of a drive voltage which is inputted to the piezoelectric transformer 8 by interrupting the positive electrode of the power supply 1 and the second coil 3 using the second transistor 2, when the amplitude of the drive voltage thus detected exceeds a specified level.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a piezoelectric transformer driving apparatus and method for driving a piezoelectric transformer for supplying a voltage to a cold cathode tube.

[0002]

2. Description of the Related Art Conventionally, an electromagnetic transformer type inverter has been frequently used for lighting a cold cathode tube of a liquid crystal backlight. However, at present, there is an increasing demand for downsizing and low power consumption of inverters for liquid crystal backlights, and piezoelectric transformer-type inverters that are small and have high efficiency have attracted attention. The inverter for the liquid crystal backlight requires a means for keeping the lamp current flowing through the cold-cathode tube constant in order to keep the brightness of the liquid crystal screen constant while being small. Further, in order to cope with a secondary battery having a different number of cells or the like, a liquid crystal backlight inverter is required to be driven with high efficiency in a wide power supply voltage range.

As shown in FIG. 13, a conventional piezoelectric transformer driving device includes a driving unit 1007 and a piezoelectric transformer 1008.
, Tube current detection circuit 1010, and voltage controlled oscillation circuit 10
11 and a frequency dividing circuit 1012. The driving unit 1007 includes coils 1003 and 1004 and transistors 1005 and 1006. Further, a cold cathode tube 1009 is connected to the secondary electrode 1083 of the piezoelectric transformer 1008 as a load. With this configuration, an AC voltage vi is generated between the primary electrode 1081 and the primary electrode 1082 of the piezoelectric transformer 1008 to drive the piezoelectric transformer 1008 and control the tube current il to be constant.

[0004] The tube current detection circuit 1010 includes a cold cathode tube 10
The tube current il flowing out from one end 1092 of the switch 09 is converted into a DC voltage according to the level. Voltage controlled oscillation circuit 1011
Changes the frequency f of the pulse voltage vf1 output to the frequency dividing circuit 1012 so that the DC voltage input from the tube current detecting circuit 1010 always becomes equal to an arbitrarily set value. The frequency of the input voltage vi to the piezoelectric transformer 1008 is calculated by dividing the frequency of the pulse voltage
One-half, that is, f / 2. At this time, an output voltage vo having an amplitude Av (f / 2) × v is generated from the frequency characteristic of the boost ratio Av shown in FIG. 3 (however, Av (f / 2) has a frequency f /
At 2 o'clock, v is the amplitude of input voltage vi), cold cathode tube 1
A tube current il according to the output voltage vo flows through the cold-cathode tube 1009 from the voltage-current characteristics of 009. By the above operation of the voltage controlled oscillation circuit 1011, the tube current il can be kept constant with respect to the variation of the impedance of the cold cathode tube 1009 and the temperature change of the cold cathode tube 1009, that is, the brightness of the cold cathode tube 1009 can be kept constant.

[0005] The frequency dividing circuit 1012 is
The pulse voltage input from 011 is divided by 1/2 by the frequency divider.
Frequency division is performed to generate two pulse voltages having phases different from each other by 180 degrees. The generated pulse voltage is amplified through a buffer and input to the gate 1052 of the transistor 1005 and the gate 1062 of the transistor 1006.

The driving unit 1007 alternately drives the transistors 1005 and 1006 at the same frequency by the pulse voltage input from the output terminals 1123 and 1124 of the frequency dividing circuit 1012. The drive voltages vd1 and vd2 are generated by resonance using the inductance of the coils 1003 and 1004 and the capacitance between the primary electrodes of the piezoelectric transformer 1008 as a time constant.
Is an approximate half-wave sine wave having about three times the amplitude of the power supply voltage Vcc. Between the primary electrodes of the piezoelectric transformer 1008,
Approximate sine wave voltage vi having an amplitude about six times the power supply voltage
Is entered.

[0007]

However, the conventional piezoelectric transformer driving device has the following problems. As shown in FIG. 2, the efficiency ηp of the piezoelectric transformer 1008 is highest near the resonance frequency fo, and decreases as the resonance frequency fo increases. A constant voltage v is applied to the cold cathode fluorescent lamp 1009.
o, the input voltage v of the piezoelectric transformer 1008
The relationship between the amplitude v of i and the frequency f is as shown in FIG. 4 due to the frequency characteristic of the step-up ratio Av of the piezoelectric transformer 1008 shown in FIG. Since the amplitudes of the drive voltages vd1 and vd2 increase in proportion to the power supply voltage Vcc, the amplitude v of the input voltage vi to the piezoelectric transformer 1008 also increases with the power supply voltage Vcc, as shown in FIG. Therefore, the power supply voltage V
When the cc rises, the piezoelectric transformer 1008 changes the frequency f1.
In this case, the driving is performed at f2 or more (f2 or more is shown in FIG. 14).
Decrease.

In the conventional piezoelectric transformer driving device shown in FIG. 13, for example, when the upper limit amplitude vh of the input voltage vi capable of driving the piezoelectric transformer 1008 with high efficiency is twice the lower limit amplitude vl, as shown in FIG. Is limited to a narrow range of about the lower limit power supply voltage value Vcc1 (when Vccl is 7 [V], 7-14 [V]).
Therefore, in order to perform high-efficiency driving at a power supply voltage of 2 Vccl or more, a high-voltage DC-DC converter or the like is required.
The piezoelectric transformer driving device is increased in size and cost.

That is, the conventional piezoelectric transformer driving device has a problem that the power supply voltage range in which the piezoelectric transformer can be driven with high efficiency is narrow. Further, in the conventional piezoelectric transformer driving device, a DC-DC converter is required for high-efficiency driving with a wide power supply voltage, and there is a problem that miniaturization and cost reduction are difficult.

It is an object of the present invention to provide a piezoelectric transformer driving apparatus and method capable of driving a piezoelectric transformer with high efficiency and having a wide power supply voltage range.

It is another object of the present invention to provide a piezoelectric transformer driving apparatus and method suitable for miniaturization and cost reduction without requiring a DC-DC converter.

[0012]

In order to solve the above-mentioned problems, the invention according to claim 1 is directed to a piezoelectric transformer of a first type.
First voltage supply means for supplying a drive voltage to the next electrode; and second voltage supply means for supplying a drive voltage to the second primary electrode of the piezoelectric transformer.
Voltage supply means, drive voltage amplitude detection means for detecting the amplitude of the drive voltage applied to the second primary electrode of the piezoelectric transformer, and the drive voltage amplitude detected by the drive voltage amplitude detection means is equal to or greater than a predetermined value. And driving voltage amplitude reducing means for reducing the amplitude of the driving voltage applied to the first primary electrode and the second primary electrode of the piezoelectric transformer.

According to a third aspect of the present invention, there is provided a power supply, a first coil connected between a first primary electrode of the piezoelectric transformer and a positive electrode of the power supply, and a first primary of the piezoelectric transformer. A first transistor connected between the electrode and the negative electrode of the power supply; a second transistor and a second transistor connected in series between the second primary electrode of the piezoelectric transformer and the positive electrode of the power supply. And a third transistor connected between the second primary electrode of the piezoelectric transformer and the negative electrode of the power supply, and a third transistor connected between the second primary electrode of the piezoelectric transformer and the negative electrode of the power supply. Drive voltage amplitude detection means for detecting the amplitude of the drive voltage to be applied, and, when the amplitude of the drive voltage detected by the drive voltage amplitude detection means is equal to or greater than a predetermined value, the voltage between the positive electrode of the power supply and the second coil The piezoelectric transistor is cut off by using the second transistor. And having a drive voltage amplitude reducing means for reducing the amplitude of the drive voltage to be input to the Nsu.

According to a fifth aspect of the present invention, a first voltage supply means for supplying a drive voltage to a first primary electrode of a piezoelectric transformer, and a drive voltage for supplying a drive voltage to a second primary electrode of the piezoelectric transformer. A driving voltage amplitude detecting step for detecting an amplitude of a driving voltage applied to a second primary electrode of the piezoelectric transformer, the driving voltage amplitude detecting step comprising: When the amplitude of the drive voltage detected in the detection step becomes equal to or larger than a predetermined value, the first primary electrode and the second primary electrode of the piezoelectric transformer are turned on.
A drive voltage amplitude decreasing step of reducing the amplitude of the drive voltage applied to the next electrode.

According to a sixth aspect of the present invention, there is provided a power supply, a first coil connected between a first primary electrode of the piezoelectric transformer and a positive electrode of the power supply, and a first primary of the piezoelectric transformer. A first transistor connected between the electrode and the negative electrode of the power supply; a second transistor and a second transistor connected in series between the second primary electrode of the piezoelectric transformer and the positive electrode of the power supply. A piezoelectric transformer driving method for a piezoelectric transformer driving device, comprising: a coil; and a third transistor connected between a second primary electrode of the piezoelectric transformer and a negative electrode of a power supply.
A drive voltage amplitude detecting step of detecting an amplitude of a drive voltage generated between a second primary electrode of the piezoelectric transformer and a negative electrode of a power supply; and an amplitude of the drive voltage detected by the drive voltage amplitude detecting step. A drive voltage amplitude reducing step of reducing the amplitude of the drive voltage input to the piezoelectric transformer by cutting off the positive electrode of the power supply and the second coil using the second transistor when the voltage exceeds a predetermined value. It is characterized by the following.

[0016]

Next, a first embodiment of the present invention will be described in detail with reference to the drawings. The piezoelectric transformer driving device shown in FIG. 1 includes the primary electrodes 81 and 82 of the piezoelectric transformer 8.
An AC voltage is generated during this period to drive the piezoelectric transformer 8 and to control the current il flowing through the cold-cathode tube 9 to be constant, thereby keeping the brightness of the cold-cathode tube 9 constant. In order to drive the piezoelectric transformer 8 with high efficiency, the primary electrode 81 of the piezoelectric transformer 8 is required.
It is necessary to make the voltage vi input between and 82 a sine wave. The reason is that a sine wave voltage is input between the primary electrodes 81 and 82 of the piezoelectric transformer 8 to prevent the efficiency from being reduced by a harmonic component that hinders the vibration of the piezoelectric transformer 8. Furthermore, in order to make the driving unit 7 highly efficient,
As shown in FIG. 2, the efficiency ηp of the piezoelectric transformer 8 (the efficiency with which the piezoelectric transformer 8 transmits energy from the primary electrodes 81 and 82 to the secondary electrode 83) is high, and the piezoelectric transformer 8 is driven in a frequency range of f1 or more and f2 or less. There is a need to.

The step-up ratio Av of the piezoelectric transformer 8 becomes maximum at the resonance frequency fo as shown in FIG. 3, and decreases as the distance from the resonance frequency fo increases. Therefore, when the output voltage vo of the piezoelectric transformer 8 is kept constant, the input voltage vi of the piezoelectric transformer 8 is
The amplitude v and the frequency f are as shown in FIG. 4. As the amplitude v increases, the piezoelectric transformer 8 is driven at a frequency farther from the resonance frequency fo. The efficiency ηp of the piezoelectric transformer 8 becomes maximum near the resonance frequency fo as shown in FIG. 2, and decreases as the distance from the resonance frequency fo increases. Therefore, in order to drive the piezoelectric transformer 8 with high efficiency, as shown in FIG. 4, the frequency f of the input voltage vi of the piezoelectric transformer 8 is set to the range of f1 to f2 where the efficiency ηp is high, and the amplitude v is set to v.
It is necessary to be in the range of 1 or more and vh or less.

The piezoelectric transformer driving device according to the present invention is characterized in that the amplitude v of the input voltage vi to the piezoelectric transformer 8 is switched to expand the power supply voltage range for highly efficient driving.

In the driving unit 7 shown in FIG. 1, the driving voltage vd1 generated between the primary electrode 81 of the piezoelectric transformer 8 and the negative electrode 1a of the power supply 1, the driving voltage vd1 between the primary electrode 82 and the negative electrode 1a of the power supply 1, The inductances of the coils 3 and 4 are set so that the driving voltage vd2 generated therebetween becomes an approximate half-wave sine wave, the transistor 2 is always turned on, and the transistors 5 and 6 are alternately turned on as shown in FIG. When driven, the driving voltage v
d1 and vd2 are approximate half-wave sine waves each having an amplitude about three times the power supply voltage Vcc. At this time, the input voltage vi to the piezoelectric transformer 8 becomes an approximate sine wave voltage having an amplitude about six times the power supply voltage Vcc. On the other hand, transistor 2 is always off, transistor 5 is always on,
When the transistor 6 is driven as shown in FIG.
d1 is almost 0, and drive voltage vd2 is about 3 of power supply voltage Vcc.
It becomes an approximate half-wave sine wave having twice the amplitude, and the input voltage vi to the piezoelectric transformer 8 becomes an approximate half-wave sine wave voltage having an amplitude about three times the power supply voltage Vcc.

The amplitude of the drive voltage vd2 is detected. When the amplitude of the drive voltage vd2 exceeds a preset value, the transistor 2 is always turned off, the transistor 5 is always turned on, and the amplitude of the input voltage vi to the piezoelectric transformer 8 is increased. × Vcc, 3 ×
Change to Vcc. By setting the preset value to one half of the upper limit vh of the high efficiency driving shown in FIG. 4, that is, about vh / 2, the power supply voltage range of the high efficiency can be reduced to about 2
Can be doubled.

As shown in FIG. 1, the piezoelectric transformer driving device according to the present invention comprises a transistor 2 for turning on and off a power supply 1 and a coil 3 and primary electrodes 81 and 8 of a piezoelectric transformer 8.
2, a drive unit 7 for generating an AC voltage, a piezoelectric transformer 8 for boosting an AC voltage input between the primary electrodes of the piezoelectric transformer 8 and outputting the boosted AC voltage to the secondary electrodes, and converting the tube current il to a DC voltage according to the level. Tube current detecting circuit 10 for converting, frequency dividing circuit 12
A voltage-controlled oscillation circuit 11 for changing the frequency of a pulse voltage to be output to the circuit, a frequency dividing circuit 12 for driving the transistors 5 and 6 of the driving unit 7, and an amplitude of a driving voltage vd2 generated at the primary electrode 82 of the piezoelectric transformer 8 are detected. The driving voltage control circuit 13 switches the operation state of the transistor 2 and the transistor 5 of the driving unit 7 and the flip-flop 14 that determines the timing of switching the operation of the transistors 2 and 5. The drive unit 7 includes coils 3 and 4, and transistors 5 and 6. The cold cathode tube 9 is connected to the secondary electrode 83 of the piezoelectric transformer 8 as a load.

The positive electrode 1a of the power supply 1 is connected to one end 4 of the coil 4.
1 and the source 21 of the transistor 2. The other end 42 of the coil 4 is connected to the primary electrode 82 of the piezoelectric transformer 8, the drain 61 of the transistor 6, and the input terminal 131 of the drive voltage control circuit 13. The source 63 of the transistor 6 is connected to the negative electrode 1b of the power supply 1. The drain 23 of the transistor 2 is connected to one end 31 of the coil 3.
The other end 32 of the coil 3 is connected to the primary electrode 81 of the piezoelectric transformer 8 and the drain 51 of the transistor 5. The source 53 of the transistor 5 is connected to the negative electrode 1b of the power supply 1.

The secondary electrode 83 of the piezoelectric transformer 8 is connected to one end 91 of the cold cathode tube 9. The other end 92 of the cold cathode tube 9 is connected to the input terminal 101 of the tube current detection circuit 10.

The output terminal 102 of the tube current detection circuit 10 is connected to the input terminal 111 of the voltage controlled oscillation circuit 11. The output terminal 112 of the voltage controlled oscillation circuit 11 is connected to the input terminal 121 of the frequency dividing circuit 12.

The output terminal 123 of the frequency divider 12 is connected to the gate 52 of the transistor 5, and the output terminal 124 of the frequency divider 12 is connected to the gate 62 of the transistor 6. The output terminal 129 of the frequency dividing circuit 12 is connected to the input terminal 141 of the flip-flop 14.

The output terminal 132 of the driving voltage control circuit 13 is connected to the input terminal 122 of the frequency dividing circuit 12. The output terminal 133 of the drive voltage control circuit 13 is connected to the gate 22 of the transistor 2. Output terminal 13 of drive voltage control circuit 13
9 is connected to the D input terminal 142 of the flip-flop 14. The Q output terminal 143 of the flip-flop 14 is connected to the input terminal 140 of the drive voltage control circuit 13.

Next, the configurations of the frequency dividing circuit 12, the driving voltage control circuit 13, and the flip-flop 14 will be described in detail with reference to FIG. The frequency divider circuit 12 includes a frequency divider 125,
D gate 126, buffer 127, and buffer 128
And The input terminal 121 of the frequency divider 12 is connected to the input terminal of the frequency divider 125. One of the two output terminals of the frequency divider 125 is connected to the input terminal of the AND gate 126. The other output terminal of frequency divider 125 is connected to buffer 128
And the input terminal 141 of the flip-flop 14. The other input terminal of the AND gate 126 is connected to the output terminal 132 of the drive voltage control circuit 13. AND
The output terminal of gate 126 is connected to the input terminal of buffer 127. The output terminals of buffers 127 and 128 are connected to gate 52 of transistor 5 and transistor 6 respectively.
To the gate 62.

The driving voltage control circuit 13 includes a voltage dividing circuit 134
, A smoothing circuit 135, a comparator 136, and a buffer 13
7 and an inverter 138. The input terminal 131 of the driving voltage control circuit 13 is an input terminal of the voltage dividing circuit 134, the output terminal of the voltage dividing circuit 134 is an input terminal of the smoothing circuit 135, and the output terminal of the smoothing circuit 135 is a non-inverting input terminal of the comparator 136. Connect to An arbitrary voltage Vref1 is input to the inverting input terminal of the comparator 136. Comparator 136
Is connected to the D input terminal 142 of the flip-flop 14. Input terminal 1 of drive voltage control circuit 13
40 is the input terminal of the buffer 137 and the inverter 13
8 input terminal. The Q output terminal 143 of the flip-flop 14 is connected to the input terminal 14 of the drive voltage control circuit 13.
Connect to 0. Buffer 137 of drive voltage control circuit 13
Is connected to the gate 22 of the transistor 2.

When the drive voltage vd2 is smaller than a preset value, the transistor 2 is always on as shown in FIG. As described in JP-A-9-107684, when the transistors 5 and 6 are alternately driven at the same frequency as shown in FIG. 5, the inductance of the coil 3 or 4 and the capacitance between the primary electrodes of the piezoelectric transformer 8 are reduced. Due to the resonance with the time constant, the drive voltages vd1 and vd2 become approximate half-wave sine waves having an amplitude about three times the power supply voltage Vcc. Therefore, between the primary electrodes of the piezoelectric transformer 8, an approximate sine wave voltage vi having an amplitude about six times the power supply voltage Vcc is input.

On the other hand, when the drive voltage vd2 is equal to or higher than a preset value, the transistor 2 is always off as shown in FIG. Further, since the transistor 5 is always on, the drive voltage vd1 becomes substantially zero. At this time, when the transistor 6 is driven as shown in FIG.
The resonance using the inductance of the coil 4 and the capacitance between the primary electrodes of the piezoelectric transformer 8 as a time constant causes the drive voltage vd2
Is a half-wave sine wave having about three times the amplitude of the power supply voltage Vcc. Therefore, between the primary electrodes of the piezoelectric transformer 8, an approximate half-wave sine wave voltage v having an amplitude about three times the power supply voltage Vcc is applied.
i is input.

The tube current detection circuit 10 converts the tube current il flowing from one end 92 of the cold cathode tube 9 into a DC voltage according to the level. The voltage control oscillation circuit 11 changes the frequency f of the pulse voltage vf1 output to the frequency dividing circuit 12 so that the DC voltage input from the tube current detection circuit 10 always becomes equal to an arbitrarily set value. The frequency of the input voltage vi to the piezoelectric transformer 8 is に よ り of the pulse voltage vf1, that is, f / 2 by the frequency dividing circuit 12. At this time, from the frequency characteristic of the boost ratio Av shown in FIG.
2) × v output voltage vo is generated (however, Av (f /
2) is a step-up ratio at a frequency of f / 2, v is an amplitude of the input voltage vi), and a tube current il according to the output voltage vo flows through the cold-cathode tube 9 from the voltage-current characteristics of the cold-cathode tube 9. By the above operation of the voltage controlled oscillation circuit 11, the tube current il is kept constant, that is, the brightness of the cold cathode tube 9 is kept constant with respect to the variation of the impedance of the cold cathode tube 9 and the temperature change of the cold cathode tube 9.

Next, the operation of the frequency dividing circuit 12 will be described with reference to the timing chart shown in FIG. The frequency dividing circuit 12 shown in FIG. 7 divides the pulse voltage vf1 input from the voltage controlled oscillation circuit 11 by に て using a frequency divider 125, and two pulse voltages vf2 and 180 having phases mutually different by 180 degrees. vf
3 is generated. The generated pulse voltage vf3 is input to the buffer 128. The buffer 128 amplifies the input pulse voltage vf3 to a value at which the transistor 6 can be driven. The pulse voltage vf3 is input to the input terminal 141 of the flip-flop 14. The generated pulse voltage vf2 and the output terminal 1 of the drive voltage control circuit 13
32 is input to an AND gate 126, and the output voltage of the AND gate 126 is
27. Input terminal 12 of AND gate 126
2 is at the H level, the AND gate 12
6 is equal to the pulse voltage vf2 output from the frequency divider 125. On the other hand, when the voltage input to input terminal 122 is at L level, the output voltage of AND gate 126 is at L level. The buffer 127 amplifies the voltage input from the AND gate 126 to a value at which the transistor 5 can be driven.

Next, the operation of the drive voltage control circuit 13 and the flip-flop 14 will be described with reference to the timing chart of FIG. The drive voltage control circuit 13 shown in FIG. 7 compares the value Vd2 obtained by dividing and smoothing the drive voltage vd2 generated at the intersection between the primary electrode 82 of the piezoelectric transformer 8 and the drain 61 of the transistor 6 with a preset value Vref1. 136
Compare with. When Vd2 is smaller than preset value Vref1, comparator 136 outputs L-level voltage Va. This L level voltage Va is supplied to the flip-flop 14
Is input to the D input terminal 142. Flip-flop 1
4 outputs the L level voltage Vb from the Q output terminal 143 irrespective of the pulse voltage vf3 input to the input terminal 141. This L level voltage Vb is input to the gate 22 of the transistor 2 via the buffer 137, and the transistor 2 is always turned on. Also, this L level voltage Vb
Becomes an H level voltage by the inverter 138 and is input to the AND gate 126 from the input terminal 122 of the frequency dividing circuit 12.

On the other hand, Vd2 is a predetermined value Vref1.
At this time, the comparator 136 outputs the H-level voltage Va. This H level voltage Va is supplied to the flip-flop 14
Is input to the D input terminal 142. Flip-flop 1
4 outputs the H level voltage Vb from the Q output terminal 143 in synchronization with the fall of the pulse voltage vf3 input to the input terminal 141. This H level voltage Vb is input to the gate 22 of the transistor 2 via the buffer 137, and always turns off the transistor 2. The H-level voltage Vb is turned into an L-level voltage by the inverter 138, and is input from the input terminal 122 of the frequency dividing circuit 12 to the AND gate 126.

FIG. 9 shows the operation of the transistors 2, 5, and 6 and the input voltage vi to the piezoelectric transformer 8 when the power supply voltage Vcc changes by the above operation. As shown in FIG. 9, by constantly switching the transistor 2 from on to off, the amplitude v of the input voltage vi to the piezoelectric transformer 8 decreases from about 6 × Vcc to about 3 × Vcc. Even in a high power supply voltage region where the conventional circuit had to be driven with an input voltage amplitude v higher than vh shown in FIG. 4, the drive circuit of the present invention has a high efficiency ηp of the piezoelectric transformer 8 and an input voltage amplitude vh It can be driven as follows. Therefore, a drive circuit that is highly efficient with a wider power supply voltage than the conventional circuit is realized.

Next, a second embodiment of the present invention will be described with reference to the drawings. As shown in FIG.
The piezoelectric transformer driving device according to the embodiment includes a transistor 2, a driving unit 7, a piezoelectric transformer 8, a tube current detection circuit 10, a voltage control oscillation circuit 11, and a frequency division circuit 12
, A drive voltage control circuit 13 and a flip-flop 14. The drive circuit 7 includes coils 3 and 4 and transistors 5 and 6. The cold cathode tube 9 is connected to the secondary electrode 83 of the piezoelectric transformer 8 as a load.

As shown in FIG. 10, the driving voltage control circuit 1
3 is connected to the intersection of the power supply 1, the source 21 of the transistor 2, and one end 41 of the coil 4. Also,
As shown in FIG. 12, the driving voltage control circuit 13 includes a voltage dividing circuit 134, a comparator 136, a buffer 137, and an inverter 138. Other configurations are the same as those of the piezoelectric transformer driving device according to the first embodiment shown in FIG.

Next, the operation of the piezoelectric transformer driving device according to the second embodiment of the present invention will be described. As shown in FIG. 11, the drive voltage control circuit 13 compares a value VCC obtained by dividing the power supply voltage Vcc and a preset value Vref1 with a comparator 13.
Compare at 6. When the divided value VCC of the power supply voltage Vcc is smaller than a preset value Vref1, the comparator 136
Outputs an L level voltage Va. This L level voltage V
a is input to the D input terminal 142 of the flip-flop 14. The flip-flop 14 is connected to the Q output terminal 14 regardless of the pulse voltage vf3 input to the input terminal 141.
3 outputs an L level voltage Vb. This L level voltage Vb is input to the gate 22 of the transistor 2 via the buffer 137, and the transistor 2 is always turned on.
The L-level voltage Vb is converted to an H-level voltage by the inverter 138, and is input to the frequency dividing circuit 12.
On the other hand, when the divided voltage VCC of the power supply voltage Vcc is equal to or higher than the preset value Vref1, the comparator 136 outputs the H level voltage Vref.
a is output. This H level voltage Va is input to the D input terminal 142 of the flip-flop 14. The flip-flop 14 outputs the H level voltage Vb from the Q output terminal 143 in synchronization with the fall of the pulse voltage vf3 input to the input terminal 141. This H level voltage Vb
Is the gate 2 of the transistor 2 through the buffer 137
2 to turn off the transistor 2. The H-level voltage Vb is turned into an L-level voltage by the inverter 138, and is input to the frequency dividing circuit 12.

The operation of the driving section 7, the tube current detecting circuit 10, the voltage controlled oscillation circuit 11, the frequency dividing circuit 12, and the flip-flop 14 shown in FIG. The operation is the same as that of the driving device.

In the above operation, the power supply voltage Vcc for switching the transistor 2 from on to off is changed to 1/6 of the upper limit amplitude vh of the input voltage vi capable of high-efficiency driving, that is, v
By setting the value to about h / 6, the power supply voltage with high efficiency is expanded to about twice that of the conventional circuit, similarly to the piezoelectric transformer driving device of the first embodiment.

For example, when the upper limit amplitude vh of the input voltage vi that can drive the piezoelectric transformer 8 with high efficiency is twice the lower limit amplitude v1, the amplitude of the drive voltage vd2 for switching the transistor 2 from on to off is vh / 2. FIG. 12 shows the amplitude v, the frequency f of the input voltage vi to the piezoelectric transformer 8 and the efficiency η of the piezoelectric transformer driving device in the case where the above operation is performed. As shown in FIG. 12, the range of the power supply voltage Vcc at which high efficiency can be obtained is expanded to 2 × Vcc1, which is about twice that of the conventional circuit (Vcc1).
Is 7 to 21 [V], 7 to 21 [V]). Therefore, DC-
A small and inexpensive piezoelectric transformer driving device compatible with a wide power supply voltage can be realized without requiring a DC converter or the like.

[0042]

According to the present invention, the voltage transformer can be driven with high efficiency over a wide power supply voltage range.

The present invention is suitable for miniaturization and cost reduction without requiring a DC-DC converter.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a piezoelectric transformer driving device according to a first embodiment of the present invention.

FIG. 2 is a diagram for explaining frequency characteristics of efficiency of a piezoelectric transformer in the piezoelectric transformer driving device of FIG. 1;

FIG. 3 is a diagram for explaining frequency characteristics of a step-up ratio of a piezoelectric transformer in the piezoelectric transformer driving device of FIG. 1;

FIG. 4 is a diagram for explaining an input voltage amplitude with respect to a frequency when an output voltage of the piezoelectric transformer in the piezoelectric transformer driving device of FIG. 1 is fixed.

FIG. 5 is a diagram for explaining a transistor operation and an input voltage waveform at the time of a low power supply voltage in the piezoelectric transformer driving device of FIG. 1;

FIG. 6 is a diagram for explaining a transistor operation and an input voltage waveform at the time of a high power supply voltage in the piezoelectric transformer driving device of FIG. 1;

7 is an electric circuit diagram showing a frequency dividing circuit, a driving voltage control circuit, and a flip-flop in the piezoelectric transformer driving device of FIG.

8 is a timing chart for explaining the operation of the frequency dividing circuit, the driving voltage control circuit, and the flip-flop in FIG. 7;

9 is a diagram for explaining a transistor operation and an input voltage waveform when a power supply voltage changes in the piezoelectric transformer driving device of FIG. 1;

FIG. 10 is a block diagram showing a piezoelectric transformer driving device according to a second embodiment of the present invention.

11 is an electric circuit diagram showing a driving voltage control circuit in the piezoelectric transformer driving device of FIG.

FIG. 12 is a diagram for explaining power supply voltage characteristics of amplitude, frequency, and efficiency of an input voltage in the piezoelectric transformer driving device of FIG. 1;

FIG. 13 is a block diagram showing a conventional piezoelectric transformer driving device.

FIG. 14 is a diagram for explaining power supply voltage characteristics of amplitude, frequency, and efficiency of an input voltage in a conventional piezoelectric transformer driving device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Power supply 2 Transistor 3, 4 Coil 5, 6 Transistor 7 Drive circuit 8 Piezoelectric transformer 9 Cold cathode tube 10 Tube current detection circuit 11 Voltage control oscillation circuit 12 Divider circuit 13 Drive voltage control circuit 14 Flip-flop

Continued on the front page F term (reference) 2H093 NC02 NC06 NC07 NC52 ND42 NE06 3K072 AA19 BA03 BC07 EB05 EB07 GA02 GB14 GC04 HB03 5H007 BB03 CA02 CB06 CC12 CC32 DA06 DB03 DC02 DC05

Claims (6)

[Claims] 1. A first voltage supply means for supplying a drive voltage to a first primary electrode of a piezoelectric transformer, and a second voltage supply means for supplying a drive voltage to a second primary electrode of the piezoelectric transformer. A drive voltage amplitude detector for detecting an amplitude of a drive voltage applied to a second primary electrode of the piezoelectric transformer; and an amplitude of the drive voltage detected by the drive voltage amplitude detector being equal to or greater than a predetermined value. A driving voltage amplitude reducing means for reducing the amplitude of the driving voltage applied to the first primary electrode and the second primary electrode of the piezoelectric transformer. 2. The piezoelectric transformer driving device according to claim 1, wherein the tube current detecting means detects a tube current flowing out of the cold cathode tube receiving a voltage from the piezoelectric transformer, and the tube current detecting means detects the tube current. And a voltage control means for keeping the tube current constant. 3. A power supply; a first coil connected between a first primary electrode of the piezoelectric transformer and a positive electrode of the power supply; a first coil of the piezoelectric transformer and the power supply. A second transistor and a second coil connected in series between a second primary electrode of the piezoelectric transformer and a positive electrode of the power supply. A third transistor connected between the second primary electrode of the piezoelectric transformer and the negative electrode of the power supply; and a third transistor connected to the second primary electrode of the piezoelectric transformer and the negative electrode of the power supply. A drive voltage amplitude detection means for detecting an amplitude of a drive voltage generated between the drive voltage amplitude detection means; and a positive electrode of the power supply when the amplitude of the drive voltage detected by the drive voltage amplitude detection means becomes a predetermined value or more. Between the coils of the second transistor A drive voltage amplitude reducing means for reducing the amplitude of the drive voltage input to the piezoelectric transformer by using and interrupting the drive. 4. The piezoelectric transformer driving device according to claim 3, wherein the tube current detecting means detects a tube current flowing out of the cold-cathode tube receiving a voltage from the piezoelectric transformer, and the tube current detecting means detects the tube current. And a voltage control means for keeping the tube current constant. 5. A first voltage supply means for supplying a drive voltage to a first primary electrode of a piezoelectric transformer, and a second voltage supply means for supplying a drive voltage to a second primary electrode of the piezoelectric transformer. A driving voltage amplitude detecting step of detecting an amplitude of a driving voltage applied to the second primary electrode of the piezoelectric transformer; and detecting the driving voltage amplitude by the driving voltage amplitude detecting step. A drive voltage amplitude reducing step of reducing the amplitude of the drive voltage applied to the first primary electrode and the second primary electrode of the piezoelectric transformer when the amplitude of the drive voltage is equal to or greater than a predetermined value. A method for driving a piezoelectric transformer, comprising: 6. A power supply, a first coil connected between a first primary electrode of a piezoelectric transformer and a positive electrode of the power supply, the first primary electrode of the piezoelectric transformer and the power supply A second transistor and a second coil connected in series between a second primary electrode of the piezoelectric transformer and a positive electrode of the power supply. And a third transistor connected between the second primary electrode of the piezoelectric transformer and a negative electrode of the power supply. A drive voltage amplitude detecting step of detecting an amplitude of a drive voltage generated between the primary electrode of the power supply and a negative electrode of the power supply; and an amplitude of the drive voltage detected by the drive voltage amplitude detecting step is equal to or more than a predetermined value. When it became A drive voltage amplitude reducing step of reducing an amplitude of a drive voltage input to the piezoelectric transformer by interrupting a connection between a positive electrode of the power supply and the second coil by using the second transistor. Characteristic piezoelectric transformer driving method.