GB2319418A

GB2319418A - Operational transconductance amplifier with floating resistor

Info

Publication number: GB2319418A
Application number: GB9724184A
Authority: GB
Inventors: Katsuji Kimura
Original assignee: NEC Corp
Current assignee: NEC Corp
Priority date: 1996-11-15
Filing date: 1997-11-14
Publication date: 1998-05-20
Also published as: GB9724184D0; JPH10150332A

Abstract

A bipolar or MOS OTA is provided, which is realized without using the BiCMOS processes. An input differential pair is formed by first and second bipolar transistors Q1, Q2 whose emitters are connected to one another through a common emitter resistor R. The emitter resistor serves as a so-called "floating resistor". A differential input voltage is applied across bases of the first and second transistors. An output pair is formed by third and fourth bipolar transistors Q3, Q4 opposite in conductivity type to the first and second transistors. A current flowing through the emitter resistor is proportional to the applied differential input voltage. First and second constant current sources/sinks 1, 2 serve as active loads of the first and second transistors, respectively. Third and fourth constant current sources/sinks 3, 4 drive the first and second bipolar transistors, respectively. The third and fourth bipolar transistors are controlled by collector currents of the first and second bipolar transistors, respectively. A differential output current proportional to the applied differential input voltage is derived through the output pair of the third and fourth transistors.

Description

OPERATIONAL TRANSCONDUCTANCE AMPLIFIER WITH FLOATING RESISTOR BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a differential amplifier circuit comprised of bipolar transistors or Metal Oxide-Semiconductor Field-Effect Transistors (MOSFETs) and more particularly, to a differential amplifier circuit having an improved transconductance linearity within a comparatively wide input voltage range, which is preferably formed on a bipolar or MOS semiconductor integrated circuit (IC) and is operable at a low supply voltage such as 3 V.

2. Description of the Prior Art A differential amplifier circuit having an improved transconductance linearity within a comparatively wide input voltage range has been known as an "Operational Transconductance Amplifier (OTA)".

An example of the conventional bipolar OTAs is shown in Fig. 1, in which a differential input voltage is applied to a floating resistor connected to two transistors of an input differential pair. This conventional OTA is disclosed by S. D. Willingham et al. in IEEE Journal of Solid-State Circuits, Vol. 28, No. 12, pp.1234 - 1245, December 1993, entitled "A BiCMOS Low-Distortion 8-MHz Low-Pass Filter".

As shown in Fig. 1, p-channel MOSFETs M101 and M102 constitute a balanced, input differential pair. Sources of the MOSFETs M101 and M102 are connected to one another through a common source resistor 106. The sources of the MOSFETs MlO1 and M102 are connected to the resistor 106 at nodes A and B, respectively.

An input voltage t is applied to a gate of the MOSFET M101 serving as an input terminal and another input voltage V- is applied to a gate of the MOSFET M102 serving as another input terminal. Thus, a differential input voltage (V* - f) is applied across the gates of the MOSFETs M101 and M102.

A constant current source 103 is connected to the node A to drive the MOSFET M101 by a constant current (1/2) (IQ + In). A drain of the MOSFET M101 is connected to a constant current sink 101 at a node C. The constant current sink 101 serves as an active load of the MOSFET M101 and sinks a constant current (IMi2) from the MOSFET M101.

A constant current source 104 is connected to the node B to drive the MOSFET M102 by a same constant current (1/2) (In + I) as that of the constant current source 103. A drain of the MOSFET M102 is connected to a constant current sink 102 at a node D. The constant current sink 102 serves as an active load of the MOSFET M102 and sinks a same constant current (IM/2) as that of the constant current sink 101 from the MOSFET M102.

A base of an npn-type bipolar transistor Q101 is connected to the node C and a collector of the transistor Q101 is connected to the node A. A base of an npn-type bipolar transistor Q103 is connected to the node C. An emitter of the transistor Q103 is connected to an emitter of the transistor Q101. Therefore, the base-to-emitter voltages of the transistors Q101 and Q103 are equal, resulting in a collector current Ici of the transistor Q101 equal to the output current IOUT1- A collector of the transistor Q103 serves as an output terminal through which an output current I xT1 is outputted.

A base of an npn-type bipolar transistor Q102 is connected to the node D and a collector of the transistor Q102 is connected to the node B. A base of an npn-type bipolar transistor Q104 is connected to the node D. An emitter of the transistor Q104 is connected to an emitter of the transistor Q102. Therefore, the base-to-emitter voltages of the transistors Q102 and O104 are equal resulting in a collector current IC2 of the transistor Q102 equal to the output current Iou2 A collector of the transistor Q104 serves as another output terminal through which another output current IouT2 is outputted.

With the conventional OTA shown in Fig. 1, the MOSFETs M101 and M102 are driven by the same constant current (IM/2). Therefore, the gate-to-source voltages VGS1 and VGS2 of the MOSFETs M101 and M102 are equal, resulting in the following equation (1).

VGSI = VGS2 (1) Thus, the differential input voltage (V+ - V-) is shifted in voltage level to be applied across the resistor 106 located between the nodes A and B, thereby flowing a current (I/2) through the source resistor 106. Therefore, the following equation (2) is established.

V+ - V I/2= (2) 2R The equation (2) means that the current (I/2) flowing through the resistor 106 is proportional to the differential input voltage (Vt - V-).

Also, the constant current [(IQ + IM)/2] flows into the node A, and the current (IN/2), the current (1/2), and the collector current Ic1 flow out from the node A.

Accordingly, the collector current Icl . is expressed as the following equation (3).

IQ - I IC1= (3) 2 Similarly, the constant current [(IQ + IM)/2] and the current (I/2) flow into the node B, and the current (IM/2) and the collector current IC2 flow out from the node B.

Accordingly, the collector current IC2 is expressed as the following equation (4).

IQ + I IC2 - 2 (4) Consequently, the output currents IOUT1 and IOUT2 are expressed as the following equations (3') and (4'), respectively.

IQ - I IOUT1=IC1= (3') 2 IQ + I IOUT2=IC2= (4') 2 It is seen from the expressions (3') and (4') that a differential output current of the conventional OTA in Fig. 1, which is defined as (IOUT2 - I0UT1), is equal to I, i.e., IOUT2 - Iowl = it This means that the differential output current of this OTA is proportional to the differential input voltage (V+ - V).

In other words, this conventional OTA realizes the OTA function of linear transconductance.

With the conventional OTA in Fig. 1, since the pchannel MOSFETs M101 and M102 are used for the input differential pair, there is an advantage that no input current is necessary to be considered in designing the OTA configuration.

An OTA is an essential, basic function block in analog signal applications. Recently, fabrication processes for large-scale integrated circuits (LSIs) have been becoming finer and finer. As a result, the supply voltage for the LSIs has been decreasing from 5 V to 3 V, or lower.

The above-described conventional OTA in Fig. 1 is operable at a low supply voltage such as 3 V. However, there is a problem of a comparatively high fabrication cost. This is because not only bipolar transistors but also MOSFETs are used as active circuit elements and consequently, the socalled BiCMOS processes, which requires a higher fabrication cost than that fabricated by only bipolar processes or MOS processes, are necessarily used for realizing this conventional OTA.

SUMMARY OF THE INVENTION Accordingly, an object of at least the preferred embodiments of the present invention is to provide an OTA that is realized without using the BiCMOS processes.

Another such object is to provide an OTA that is fabricated at a low fabrication cost.

The above objects together with others not specifically mentioned will become clear to those skilled in the art from the following description.

According to a first aspect of the present invention, a bipolar OTA is provided. This OTA is comprised of (a) an input differential pair formed by first and second bipolar transistors whose emitters are connected to one another through a common emitter resistor, (b) first and second constant current sources/sinks supplying/sinking first and second constant currents to/from the first and second bipolar transistors, respectively, (c) third and fourth constant current sources/sinks supplying/sinking third and fourth constant currents, respectively, and (d) an output pair formed by third and fourth bipolar transistors.

The emitter of the first bipolar transistor is connected to the emitter resistor at a first node. The emitter of the second bipolar transistor is connected to the emitter resistor at a second node.

The first and second constant current sources/sinks are connected to collectors of the first and second bipolar transistors, respectively. The first and second constant current sources/sinks serve as active loads of the first and second bipolar transistors, respectively.

The third and fourth constant current sources/sinks are connected to the first and second nodes, respectively.

The third and fourth constant current sources/sinks drive the first and second bipolar transistors by the third and fourth constant currents, respectively.

The third and fourth bipolar transistors of the output pair are controlled by collector currents of the first and second bipolar transistors, respectively.

A differential input voltage is applied across bases of the first and bipolar second transistors of the input differential pair.

A differential output current of the OTA is derived through the output pair formed by the third and fourth bipolar transistors. with the bipolar OTA according to the first aspect of the present invention, the emitters of the first and second bipolar transistors forming the input differential pair are connected to one another through the common emitter resistor.

The first and second constant current sources/sinks supply/sink the first and second constant currents to/from the first and second bipolar transistors, respectively.

Therefore, a current flowing through the common emitter resistor can be proportional to the differential input voltage applied across the bases of the first and second bipolar transistors of the input differential pair.

Further, the collector currents of the first and second bipolar transistors vary dependent upon the current flowing through the emitter resistor. Thus, the third and fourth bipolar transistors, which are respectively controlled by the collector currents of the first and second bipolar transistors, generate output currents dependent upon the current flowing through the emitter resistor.

Because the differential output current of the OTA is derived through the output pair formed by the third and fourth bipolar transistors, this differential output current varies dependent upon the current flowing through the emitter resistor.

Accordingly, the differential output current of the OTA is proportional to the applied differential input voltage.

This means that an OTA function is realized.

Additionally, with the bipolar OTA according to the first aspect of the present invention, base currents flow through the bases of the first and second bipolar transistors forming the input differential pair according to the applied differential input voltage. However, because the first and second constant currents are supplied to or sunk from the first and second bipolar transistors, respectively, the base currents are constant and extremely small. Consequently, degradation in the transconductance linearity is negligibly small.

Thus, the bipolar OTA according to the first aspect of the present invention is realized with the use of only bipolar transistors. This reduces a fabrication cost of this bipolar OTA.

In a preferred embodiment of the bipolar OTA according to the first aspect, the third and fourth bipolar transistors are opposite in conductivity type to the first and second bipolar transistors. The collector currents of the first and second bipolar transistors are directly applied to the third and fourth bipolar transistors, respectively.

In another preferred embodiment of the bipolar OTA according to the first aspect, the third and fourth bipolar transistors are same in conductivity type as the first and second bipolar transistors. The collector currents of the first and second bipolar transistors are applied to the third and fourth bipolar transistors through first and second inverting amplifiers, respectively.

In still another preferred embodiment of the bipolar OTA according to the first aspect, a difference between the collector currents of the first and second bipolar transistors is converted to a differential output voltage.

The differential output voltage is inputted into an emittercoupled pair of fifth and sixth bipolar transistors.

In a further preferred embodiment of the bipolar OTA according to the first aspect, the differential output current of the OTA is derived through first and second current mirror circuits, According to a second aspect of the present invention, another bipolar OTA is provided. This OTA is comprised of (a) an input differential pair formed by first and second bipolar transistors whose emitters are connected to one another through a common emitter resistor, (b) first and second constant current sources/sinks supplying/sinking first and second constant currents to/from the first and second bipolar transistors, respectively, (c) an output pair formed by third and fourth bipolar transistors which are connected to the emitters of the first and second bipolar transistors, respectively, and (d) fifth and sixth bipolar transistors for biasing the third and fourth bipolar transistors, respectively The first and second constant current sources/sinks are connected to collectors of the first and second bipolar transistors, respectively. The first and second constant current sources/sinks serve as active loads of the first and second bipolar transistors, respectively.

The fifth bipolar transistor is controlled by a current flowing through the first bipolar transistor. The sixth bipolar transistor is controlled by a current flowing through the second bipolar transistor.

A differential output current of the OTA is derived through the output pair formed by the third and fourth bipolar transistors.

With the bipolar OTA according to the first aspect of the present invention, the fifth bipolar transistor is controlled by the current flowing through the first bipolar transistor, and the sixth bipolar transistor is controlled by the current flowing through the second bipolar transistor.

The fifth and sixth bipolar transistors supply bias currents dependent upon the current flowing through the emitter resistor to the third and fourth bipolar transistors, respectively.

As a result, the differential output current of this OTA is proportional to the applied differential input voltage.

This means that an OTA function is realized.

Additionally, because of the same reason as that of the bipolar OTA according to the first aspect, the bipolar OTA according to the second aspect of the present invention is realized with the use of only bipolar transistors, This reduces a fabrication cost of this bipolar OTA.

In a preferred embodiment of the bipolar OTA according to the second aspect, bases of the fifth and sixth bipolar transistors are connected to the emitters of the first and second bipolar transistors, respectively.

In another preferred embodiment of the bipolar OTA according to the second aspect, bases of the fifth and sixth bipolar transistors are connected to first and second constant voltage sources, respectively.

According to a third aspect of the present invention, a MOS OTA is provided. This OTA is comprised of (a) an input differential pair formed by first and second MOS & ET whose sources are connected to one another through a common source resistor, (b) first and second constant current sources/sinks supplying/sinking first and second constant currents to/from the first and second MOSFETs, respectively, (c) third and fourth constant current sources/sinks supplying/sinking third and fourth constant currents, respectively, and (d) an output pair formed by third and fourth MOSFETs.

The source of the first MOSFET is connected to the source resistor at a first node. The source of the second MOSFET is connected to the source resistor at a second node.

The first and second constant current sources/sinks are connected to drain of the first and second MOSFETs, respectively. The first and second constant current sources/sinks serve as active loads of the first and second MOSFETs, respectively.

The third and fourth constant current sources/sinks drive the first and second MOSFETs by the third and fourth constant currents, respectively.

The third and fourth MOSFETs of the output pair are controlled by drain currents of the first and second MOSFETs, respectively.

A differential input voltage is applied across gates of the first and second MOSFETs of the input differential pair.

A differential output current of the OTA is derived through the output pair formed by the third and fourth NOSFETs.

With the MOS OTA according to the third aspect of the present invention, because of substantially the same reason as that of the bipolar OTA according to the first aspect, this MOS OTA is realized with the use of only MOSFETs. This reduces a fabrication cost of this MOS OTA.

In a preferred embodiment of the MOS OTA according to the third aspect, the third and fourth MOSFETs are opposite in conductivity type to the first and second MOSFETs. The drain currents of the first and second MOSFETs are directly applied to the third and fourth MOSFETs, respectively.

In another preferred embodiment of the MOS OTA according to the third aspect, the third and fourth MOSFETs are same in conductivity type as the first and second MOSFETs.

The drain currents of the first and second MOSFETs are applied to the third and fourth MOSFETs through first and second inverting amplifiers, respectively.

In a further preferred embodiment of the bipolar OTA according to the third aspect, the differential output current of the OTA is derived through first and second current mirror circuits.

According to a fourth aspect of the present invention, another MOS OTA is provided. This OTA is comprised of (a) an input differential pair formed by first and second MOSFETs whose sources are connected to one another through a common source resistor, (b) first and second constant current sources/sinks supplying/sinking first and second constant currents to/from the first and second MOSFETs, respectively, (c) an output pair formed by third and fourth MOSFETs which are connected to the sources of the first and second MOSFETs, respectively, and (d) fifth and sixth MOSFETs for biasing the third and fourth MOSFETs, respectively.

The first and second constant current sources/sinks are connected to drains of the first and second MOSFETs, respectively. The first and second constant current sources/sinks serve as active loads of the first and second MOSFETs, respectively.

The fifth MOSFET is controlled by a current flowing through the first MOSFET. The sixth MOSFET is controlled by a current flowing through the second MOSFET.

A differential output current of the OTA is derived through the output pair formed by the third and fourth MOSFETs.

With the MOS OTA according to the fourth aspect of the present invention, because of substantially the same reason as that of the bipolar OTA according to the second aspect, this MOS OTA is realized with the use of only MOSFETs.

This reduces a fabrication cost of this MOS OTA.

In a preferred embodiment of the MOS OTA according to the fourth aspect, bases of the fifth and sixth MOSFETs are connected to the sources of the first and second MOSFETs, respectively.

In another preferred embodiment of the MOS OTA according to the fourth aspect, gates of the fifth and sixth MOSFETs are connected to first and second constant voltage sources, respectively.

BRIEF DESCRIPTION OF THE DRAWINGS In order that the present invention mav be readily carried into effect, smbodiments thereof will now be described with reference to the accompanying drawings, by way of example only.

Fig. 1 is a circuit diagram of a conventional OTA.

Fig. 2 is a circuit diagram of a bipolar OTA according to a first embodiment of the present invention.

Fig. 3 is a graph showing the measured transfer characteristic of the bipolar OTA according to the first embodiment in Fig. 2.

Fig. 4 is a circuit diagram of a MOS OTA according to a second embodiment of the present invention, which corresponds to one obtained by replacing the bipolar transistors with the MOSFETs in Fig. 2.

Fig. 5 is a circuit diagram of a bipolar OTA according to a third embodiment of the present invention.

Fig. 6 is a circuit diagram of a MOS OTA according to a fourth embodiment of the present invention, which corresponds to one obtained by replacing the bipolar transistors with the MOSFETs in Fig. 5.

Fig. 7 is a circuit diagram of a bipolar OTA according to a fifth embodiment of the present invention.

Fig. 8 is a circuit diagram of a bipolar OTA according to a sixth embodiment of the present invention.

Fig. 9 is a graph showing the measured transfer characteristic of the bipolar OTA according to the sixth embodiment in Fig. 8.

Fig. 10 is a circuit diagram of a bipolar OTA according to a seventh embodiment of the present invention, which corresponds to a variation of the bipolar OTA according to the sixth embodiment in Fig. 8, Fig. 11 is a circuit diagram of a MOS OTA according to an eighth embodiment of the present invention, which corresponds to one obtained by replacing the bipolar transistors with the MOSFETs in Fig. 8.

Fig. 12 is a circuit diagram of a bipolar OTA according to a ninth embodiment of the present invention.

Fig. 13 is a graph showing the measured transfer characteristic of the bipolar OTA according to the ninth embodiment in Fig. 12.

Fig. 14 is a circuit diagram of a MOS OTA according to a tenth embodiment of the present invention, which corresponds to one obtained by replacing the bipolar transistors with the MOSFETs in Fig. 12.

Fig. 15 is a circuit diagram of a bipolar OTA according to an eleventh embodiment of the present invention.

Fig. 16 is a graph showing the measured transfer characteristic of the bipolar OTA according to the eleventh embodiment in Fig. 15.

Fig. 17 is a circuit diagram of a MOS OTA according to a twelfth embodiment of the present invention, which corresponds to one obtained by replacing the bipolar transistors with the MOSFETs and by adding two constant current sinks in Fig. 15.

Fig. 18 is a circuit diagram of a bipolar OTA according to a thirteenth embodiment of the present invention Fig. 19 is a graph showing the measured transfer characteristic of the bipolar OTA according to the thirteenth embodiment in Fig. 18.

Fig. 20 is a circuit diagram of a MOS OTA according to a fourteenth embodiment of the present invention, which corresponds to one obtained by replacing the bipolar transistors with the MOSFETs and by adding two constant current sinks in Fig. 18.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below with reference to Figs. 2 to 20.

FIRST EMBODIMENT A bipolar OTA according to a first embodiment of the present invention is shown in Fig. 2.

In Fig. 2, this OTA includes a balanced differential pair of npn-type bipolar transistors Q1 and Q2 whose emitter areas are equal to each other. Emitters of the transistors Q1 and Q2 are connected to one another through a common emitter resistor 6 having a resistance R.

The two bipolar transistors Q1 and Q2 constitute an input differential pair. A differential input voltage Vi is applied across bases of the transistors Q1 and Q2.

The emitter of the transistor Q1 is further connected to one terminal of a constant current sink 3 sinking a constant current Io. The other terminal of the constant current sink 3 is connected to the ground. The emitter of the transistor Q1 is connected to the emitter resistor 6 and the constant current sink 3 at a node A. The transistor Q1 is driven by the constant current sink 3.

The emitter of the transistor Q2 is further connected to one terminal of a constant current sink 4 sinking the same constant current lo as that of the constant current sink 3.

The other terminal of the constant current sink 4 is connected to the ground. The emitter of the transistor Q2 is connected to the emitter resistor 6 and the constant current sink 4 at a node B. The transistor Q2 is driven by the constant current sink 4.

A collector of the transistor Q1 is connected to one terminal of a constant current source 1 supplying a constant current Ib at a node C, where Ib is less than Io (i.e., It < Io) The other terminal of the constant current source 1 is applied with a power supply voltage Vcc. The constant current source 1 serves as an active load of the transistor Q1 and supplies the constant current Ib to the transistor Q1.

A pnp-type bipolar transistors Q3 has a collector connected to the node A, a base connected to the node C, and an emitter applied with the power supply voltage Vcc. The transistor Q3 is driven by the constant current sink 3 and controlled by an output (i.e., a collector current Ic1) of the transistor Q1, where Ici = 1b.

Another pnp-type bipolar transistors Q5 has a collector from which an output current IOUT1 is derived, a base connected to the node C, and an emitter applied with the power supply voltage Vcc.

A collector of the transistor Q2 is connected to one terminal of a constant current source 2 supplying the same constant current Ib as that of the constant current source 1 at a node D. The other terminal of the constant current source 2 is applied with the power supply voltage V=. The constant current source 2 serves as an active load of the transistor Q2 and supplies the same constant current Ib to the transistor Q2.

A pnp-type bipolar transistors Q4 has a collector connected to the node B, a base connected to the node D, and an emitter applied with the power supply voltage Vcc. The transistor Q4 is driven by the constant current sink 4 and controlled by an output (i.e., a collector current IC2) of the transistor Q2, where Ic2= Ib.

Another pnp-type bipolar transistors Q6 has a collector from which an output current IVJT2 is derived, a base connected to the node D, and an emitter applied with the power supply voltage Vcc.

The transistors Q3 and Q4 constitute an output pair.

The transistors Q3 and Q5 constitute a current mirror circuit.

The transistors Q4 and Q6 constitute another current mirror circuit.

Next, the operation of the bipolar OTA according to the first embodiment in Fig. 2 is explained below, in which it is supposed that. all the circuit elements used in this OTA are matched in characteristics.

Because the transistors Q1 and Q2 forming the balanced input differential pair are supplied with the same constant currents Ib, respectively, base-to-emitter voltages VAE1 and Vg2 of the transistors Q1 and Q2 are equal to one another, resulting in the following equation (5).

YBEI = VBE2 (5) Thus, the differential input voltage Vj is shifted in voltage level to be applied across the emitter resistor 6 located between the nodes A and B, thereby flowing a current i through the resistor 106. This means that the emitter resistor 6 serves as a so-called "floating resistor".

Therefore, the following equation (6) is established.

V; (6) The equation (6) means that the current i flowing through the resistor 6 is proportional to the differential input voltage V1.

Also, if collector currents of the transistors Q3 and Q4 are defined as I and IC4, respectively, the constant current Ib and the collector current 1C3 flow into the node A, and the constant current I0 and the current i flow out of the node A. Accordingly, the collector current IC3 is expressed as the following equation (7).

Ic3=(Io-1b)+i (7) Similarly, the constant current Ib, the collector current IC4, and the current i flow into the node B, and the constant current Io flows out of the node B. Accordingly, the collector current IC4 is expressed as the following equation (8).

IC4=(I0-Ib)-i (8) Since the bases of the transistors Q3 and Q5 are commonly connected to the node C, the base-to-emitter voltages of the transistors Q3 and QS are equal. Similarly, since the bases of the transistors Q4 and Q6 are commonly connected to the node D, the base-to-emitter voltages of the transistors Q4 and Q6 are equal. Therefore, it is seen that the transistors Q3 and Q5 constitute a current mirror circuit, and that the transistors Q4 and Q6 constitute another current mirror circuit.

As a result, the output currents 1ouT and IOUT2, which are respectively derived from the collectors of the transistors Q5 and Q6, are expressed as the following equations (7') and (8'), respectively. vi IOUT1=IC3=I0-Ib+ (7') Vi IOUT2=IC4=I0-Ib- (8') R It is seen from the expressions (7') and (8') that a differential output current of the bipolar OTA according to the first embodiment in Fig. 2, which is defined as (IOUT1 IOUT2), is equal to (2Vi/R), i.e., IOUT1 - IOUT2 = (2Vi/R).

This means that the differential output current of this OTA is proportional to the differential input voltage Vi. In other words, this OTA realizes the OTA function of linear transconductance.

With the bipolar OTA according to the first embodiment in Fig. 2, base currents flow through the bases of the bipolar transistors Q1 and Q2 forming the input differential pair according to the applied differential input voltage V1. However, because the same constant currents Ib are supplied to the transistors Q1 and 02, respectively, the base currents are constant and extremely small. Consequently, degradation in the transconductance linearity is negligibly small Thus, the bipolar OTA according to the first embodiment is realized with the use of only bipolar transistors. This reduces a fabrication cost of this bipolar OTA.

As seen from the above explanation, the OTA according to the first embodiment corresponds to one obtained by replacing the MOSFETs M101 and M102 with bipolar transistors in Fig. 1.

In this embodiment, although the transistors Q1 and Q2 are of the npn-type, the transistors Q3 and Q4 are of the pnp-type which is an opposite conductivity to that of the transistors Q1 and Q2. This configuration is due to the following reason.

If the transistors Q3 and Q4 are of the same conductivity type (i.e., the npn-type), the collector currents Io and k4 of the transistors Q3 and Q4 do not flow simultaneously with the collector currents Ici and IC2 of the transistors Q1 and Q2. When the collector currents Ici and 1C2 start to flow, the transistors Q3 and Q9 will be turned off, resulting no current i flowing through the emitter resistor 6.

Also, the constant currents Ib of the constant current sources 1 and 2 and the constant currents Io of the constant current sinks 3 and 4 have the relationship of Ib < Io in the first embodiment. This is because if Ib 1 Io, no current flow through the transistors Q3 and Q4, resulting no current i.

To confirm the circuit operation of the bipolar OTA according to the first embodiment in Fig. 2, the transfer characteristic was measured by the inventor, Kimura. The result is shown in Fig. 3.

The testing conditions are as follows.

A tested circuit configuration was one obtained by changing the conductivity of the bipolar transistors to be opposite. Specifically, the transistors Q1 and Q2 were of the pnp-type and the transistors Q3 to Q6 were of the npn-type.

The constant current sources 3 and 4 were connected between the power supply voltage Vcc and the nodes A and B, respectively. The constant current sinks 1 and 2 were connected between the nodes C and D and the ground, respectively.

The power supply voltage Vcc was set as 2.5 V. The resistance R of the common emitter resistor 6 was set as 10 k#. The current difference (I0 - Ib) was set as approximately 50 WA. The output currents IOUT1 and IOUT2 were shown in Fig. 3 as a voltage, in which these currents 'ouTi and IOUT2 were converted by a load resistor with a resistance 24 kn.

It is seen from Fig. 3 that the bipolar OTA according to the first embodiment has a satisfactory transconductance linearity.

SECOND EMBODIMENT A MOS OTA according to a second embodiment of the present invention is shown in Fig. 4. This OTA corresponds to one obtained by replacing the bipolar transistors with MOSFETs in Fig. 2 and by converting the conductivity type to be opposite.

In Fig. 4, this OTA includes a balanced differential pair of p-channel MOSFETs M1 and M2 whose gate-width (W) to gate-length (L) ratios, i.e., (W/L), are equal to each other.

Sources of the MOSFETs M1 and M2 are connected to one another through a common source resistor 6 having a resistance R.

The two MOSFETs M1 and M2 constitute an input differential pair. A differential input voltage Vi is applied across gates of the MOSFETs M1 and M2.

The source of the MOSFET M1 is further connected to one terminal of a constant current source 3 supplying a constant current Ic. The other terminal of the constant current source 3 is applied with a power supply voltage VDD.

The source of the MOSFET M1 is connected to the source resistor 6 and the constant current source 3 at a node A. The MOSFET M1 is driven by the constant current source 3.

The source of the MOSFET M2 is further connected to one terminal of a constant current source 4 supplying the same constant current 1o as that of the constant current source 3. The other terminal of the constant current source 4 is applied with the power supply voltage Wn. The source of the MOSFET M2 is connected to the source resistor 6 and the constant current source 4 at a node B. The MOSFET M2 is driven by the constant current source 4.

A drain of the MOSFET M1 is connected to one terminal of a constant current sink 1 sinking a constant current Ib at a node C, where Ib < Io. The other terminal of the constant current sink 1 is connected to the ground. The constant current sink 1 serves as an active load of the MOSFET Ml and sinks the constant current Ib from the MOSFET M1.

An n-channel MOSFET M3 has a drain connected to the node A, a gate connected to the node C, and a source connected to the ground. The MOSFET M3 is driven by the constant current source 3 and controlled by an output (i.e., a drain current IDl) of the MOSFET M1, where ID1 = 1b Another n-channel MOSFET M5 has a drain from which an output current LOUTS is derived, a gate connected to the node C, and a source connected to the ground.

A drain of the MOSFET M2 is connected to one terminal of a constant current sink 2 sinking the same constant current Ib as that of the constant current sink 1 at a node D.

The other terminal of the constant current sink 2 is connected to the ground. The constant current sink 2 serves as an active load of the MOSFET M2 and sinks the same constant current Ib from the MOSFET M2.

An n-channel MOSFET M4 has a drain connected to the node B, a gate connected to the node D, and a source connected to the ground. The MOSFET M4 is driven by the constant current source 4 and controlled by an output (i.e., a drain current ID') of the MOSFET M2, where ID2 = Ib.

Another n-channel MOSFET M6 has a drain from which an output current 1oUT2 is derived, a gate connected to the node D, and a source connected to the ground.

The MOSFETs M3 and M4 constitute an output pair. The MOSFETs M3 and M5 constitute a current mirror circuit. The MOSFETs M4 and M6 constitute another current mirror circuit.

The operation of the MOS OTA according to the second embodiment in Fig. 4 is substantially the same as that of the bipolar OTA according to the first embodiment in Fig. 2.

Specifically, because the same constant currents Ib are sunk from the MOSFETs M1 and M2 forming the balanced input differential pair, respectively, gate-to-source voltages V=1 and VGSZ of the MOSFETs M1 and M2 are equal to one another, resulting in the following equation (9).

VGS1=VGS2 (9) Thus, the differential input voltage Vi is shifted in voltage level to be applied across the source resistor 6 located between the nodes A and B, thereby flowing a current i through the resistor 6. This means that the source resistor 6 serves as a "floating resistor". Therefore, the following equation (10) is established.

Vi i= (10) R The equation (10) means that the current i flowing through the resistor 6 is proportional to the differential input voltage Vi.

Also, if drain currents of the MOSFETs M3 and M4 are defined as ID3 and ID@, respectively, the constant current Io flows into the node A, and the constant current Ib, the drain current 103, and the current i flow out of the node A.

Accordingly, the collector current IG3 is expressed as the following equation (11).

ID3=(I0-Ib)-i (11) Similarly, the constant current 1o and the current i flow into the node B, and the drain current Ib4 and the constant current Ib flow out of the node B. Accordingly, the collector current IC4 is expressed as the following equation (12).

ID4=(I0-Ib)+i (12) Since the gates of the MOSFETs M3 and M5 are commonly connected to the node C, the gate-to-source voltages of the MOSFETs M3 and M5 are equal. Similarly, since the gates of the MOSFETs M4 and M6 are commonly connected to the node D, the gate-to-source voltages of the MOSFETs M4 and M6 are equal. Therefore, it is seen that the MOSFETs M3 and MS constitute a current mirror circuit, and that the MOSFETs M4 and M6 constitute another current mirror circuit.

As a result, the output currents IOUT1 and IOUT2, which are respectively derived from the drains of the MOSFETs MS and M6, are expressed as the following equations (13') and (14'), respectively.

Vi IOUT1=ID3=I0-Ib- (13') R Vi IOUT2=ID4=I0-Ib+ (14') R It is seen from the expressions (13') and (14') that a differential output current of the MOS OTA according to the second embodiment in Fig. 4, which is defined as (IOUT2 - IOUT1), is equal to (2Vi/R), i.e., IOUT2 - IOUT1 = (2Vi/R).

This means that the differential output current of this OTA is proportional to the differential input voltage V. In other words, this OTA realizes the OTA function of linear transconductance.

With the MOS OTA according to the second embodiment in Fig. 4, since no gate currents flow through the gates of the MOSFETs M1 and M2 forming the input differential pair, no degradation in the transconductance linearity occurs.

Thus, the MOS OTA according to the second embodiment is realized with the use of only MOSFETs. In other words, this OTA can be fabricated by the (Complementary MOS) CMOS processes. This reduces a fabrication cost of this MOS OTA.

THIRD EMBODIMENT A bipolar OTA according to a third embodiment of the present invention is shown in Fig. 5. This is a variation of the first embodiment in Fig. 2 and has the same basic configuration as that of the first embodiment. Therefore, the explanation about the same configuration is omitted here by attaching the same reference numerals to the same or corresponding elements in Fig. 5 for the sake of simplification of description.

As shown in Fig. 5, instead of the pnp-type bipolar transistors Q3 and Q4 in Fig. 2, npn-type bipolar transistors Q13 and Q14, which are the same in conductivity type as the bipolar transistors Q1 and Q2, are used as the output pair.

Further, an inverting amplifier 21 is connected to the node C and a base of the transistor Q13. An inverting amplifier 22 is connected to the node D and a base of the transistor Q14.

An emitter of the transistor Q13 is connected to the node A.

An emitter of the transistor Q14 is connected to the node B.

The output currents IXT1 and IOUT2 are directly derived from collectors of the transistors Q13 and Q14, respectively.

The transistors Q13 and Q14 are controlled by the collector currents Ici and 1c of the transistors Q1 and Q2, respectively. The collector currents Icl and 1C2 are polarity inverted by the inverting amplifiers 21 and 22, respectively, and then, they are applied to the bases of the transistor Q13 and Q14, respectively. Therefore, the transistors Q13 and Q14 are kept active, allowing the collector currents Ii and Icl4 to flow simultaneously with the collector currents Ici and 1C2.

The collector currents Icl3 and 1C14 flow into the nodes A and B, respectively.

The transistors Q13 and 414 and the inverting amplifiers 21 and 22 constitute two negative feedback circuits, respectively.

With the bipolar OTA according to the third embodiment in Fig. 5, there are the same advantages as those in the first embodiment in Fig. 2.

FOURTH EMBODIMENT A MOS OTA according to a fourth embodiment of the present invention is shown in Fig. 6. This OTA corresponds to one obtained by replacing the bipolar transistors with MOSFETs in Fig. 5.

With the MOS OTA according to the fourth embodiment in Fig. 6, there are the same advantages as those in the second embodiment in Fig. 4.

FIFTH EMBODIMENT A bipolar OTA according to a fifth embodiment of the present invention is shown in Fig. 7. This is a variation of the first embodiment in Fig. 2 and has the same basic configuration as that of the first embodiment. Therefore, the explanation about the same configuration is omitted here by attaching the same reference numerals to the same or corresponding elements in Fig. 7 for the sake of simplification of description.

As shown in Fig. 7, instead of the pnp-type bipolar transistors Q3 and Q4 in Fig. 2, npn-type bipolar transistors Q23 and Q24, which are the same in conductivity type as the bipolar transistors Q1 and Q2, are used as the output pair.

Emitters of the transistors Q23 and Q24 are coupled together to be connected through a resistor RE to the ground.

Therefore, the transistors Q23 and Q24 constitute an emittercoupled pair. Bases of the transistors Q1 and Q2 are connected to the nodes C and D, respectively. Collectors of the transistors Q1 and Q2 are connected to the nodes A and B, respectively.

Further, another emitter-coupled pair formed by npntype bipolar transistors Q25 and Q26 are provided. The coupled emitters of the transistors Q25 and Q26 are connected to the ground through a constant current sink 5 sinking a constant current I1.

The output currents TOUT1 and INT2 are derived from collectors of the transistors Q25 and Q26, respectively.

Next, the operation of the bipolar OTA according to the fifth embodiment in Fig. 7 is explained below.

In Fig. 7, collector currents IC23 and Ic2, of the transistors Q23 and Q24 are expressed as the following equations (15) and (16), respectively.

Vi IC23=I0-Ib+ (15) R Vi Ic24=I0-Ib- (16) R Therefore, a current IRE flowing through the resistor RE is expressed as follows.

IRE=IC23+IC24=2(I0-Ib) (17) Due to the difference between the collector currents IC23 and IC24 of the transistors Q23 and Q24, a differential voltage #VBE is generated as shown in the following expression (18).

In the expression (18), VT is the thermal voltage defined as VT = kT/q, where k is the Boltzmann's constant, T is absolute temperature in degrees Kelvin, and q is the charge of an electron.

The differential voltage #VBE is applied across bases of the transistors Q25 and Q26. Therefore, collector currents k25 and IC26 of the transistors Q25 and Q26, i.e., the output currents IOUT1 and IOUT2, are expressed as the following equations (19) and (20), respectively.

Accordingly, a differential output current Al of the bipolar OTA according to the fifth embodiment in Fig. 7 is expressed as follows.

@1Vi #I=IOUT1-IOUT2= (21) (I0-Ib)R It is seen from the expression (21) that the differential output current #I is increased to a value of i multiplied by [Il/(Io - Ib)] and that the differential output current Al is variable by changing the value of the constant current I, of the constant current sink 5.

As explained above, with the bipolar OTA according to the fifth embodiment in Fig. 7, the output currents 1Ti and Io=2 become variable if the constant current I1 of the constant current sink 5 is changed. In other words, the output currents IOUT1 and IOUT2 may be multiplied by a constant.

This corresponds to a configuration that the transistors Q5 and Q6 of the bipolar OTA according to the first embodiment in Fig. 2 have emitter areas K times as much as those of the transistors Q1 and Q2 in Fig. 2, where K is a positive constant.

SIXTH EMBODIMENT A bipolar OTA according to a sixth embodiment of the present invention is shown in Fig. 8. This is a variation of the first embodiment in Fig. 2 and has the same basic configuration as that of the first embodiment. Therefore, the explanation about the same configuration is omitted here by attaching the same reference numerals to the same or corresponding elements in Fig. 8 for the sake of simplification of description.

As shown in Fig. 8, instead of the bipolar transistors Q3 to Q6 in Fig. 2, pnp-type bipolar transistors /Q33 and Q36 and npn-type bipolar transistors Q34, Q35, Q37, and Q38 are provided. The transistors Q33 and Q36 serve as the inverting amplifiers 21 and 22 shown in Fig. 5, respectively. The transistors Q34 and Q35 constitute a current mirror circuit. The transistors Q37 and Q38 constitute another current mirror circuit. The transistors Q35 and Q38 constitute the output pair.

The output currents Iouli and IXrT2 are equal to collector currents 1c33 and IcZ4 of the transistors Q33 and Q34, respectively.

With the bipolar OTA according to the sixth embodiment in Fig. 8, there are the same advantages as those in the first embodiment in Fig. 2, except that the current value Io of the constant current sinks 3 and 4 are twice as much as that of the first embodiment, because the same current flows through the respective transistors Q34 and Q35 or Q37 and Q38.

To confirm the circuit operation of the bipolar OTA according to the sixth embodiment in Fig. 8, the transfer characteristic was measured by the inventor, Kimura. The result is shown in Fig. 9.

The testing conditions are as follows.

The power supply voltage Vcc was set as 2.5 V. The resistance R of the common emitter resistor 6 was set as 10 k#. The current difference (Io - Ib) was set as approximately 50 A, where Io = 70 A and Ib = 20 WA. The output currents IOUT1 and IOUT2 were shown in Fig. 9 as a voltage, in which these currents IOUT1 and IOUT2 were converted by a load resistor with a resistance 15 kin.

It is seen from Fig. 9 that the bipolar OTA according to the sixth embodiment has a satisfactory transconductance linearity.

SEVENTH EMBODIMENT A bipolar OTA according to a seventh embodiment of the present invention is shown in Fig. 10. This is a variation of the sixth embodiment in Fig. 8 and has a configuration where the bipolar transistors Q34 and Q37 are removed in Fig. 8.

With the bipolar OTA according to the seventh embodiment in Fig. 10, there are the same advantages as those in the first embodiment in Fig. 2 and additional advantages that a total circuit current is decreased and that the circuit configuration is simplified.

The current value I0 of the constant current sinks 3 and 4 is equal to that of the first embodiment in Fig. 2.

EIGHTH EMBODIMENT A MOS OTA according to an eighth embodiment of the present invention is shown in Fig. 11. This OTA corresponds to one obtained by replacing the bipolar transistors with MOSFETs in Fig. 8.

With the MOS OTA according to the eighth embodiment in Fig. 11, there are the same advantages as those in the second embodiment in Fig. 4.

The MOSFETs M34 and M37 may be removed as shown in Fig. 10.

NINTH EMBODIMENT A bipolar OTA according to a ninth embodiment of the present invention is shown in Fig. 12. This is a variation of the first embodiment in Fig. 2 and has the same basic configuration as that of the first embodiment. Therefore, the explanation about the same configuration is omitted here by attaching the same reference numerals to the same or corresponding elements in Fig. 12 for the sake of simplification of description.

As shown in Fig. 12, instead of the pnp-type bipolar transistors Q3 to Q6 in Fig. 2, pnp-type bipolar transistors Q43, Q44, Q46, and Q47, which are the opposite in conductivity type to the bipolar transistors Q1 and Q2, and npn-type bipolar transistors Q45 and Q48, which are the same in conductivity type as the bipolar transistors Q1 and Q2, are provided.

The transistors Q43 and Q44 serve as the inverting amplifier 21 in Fig. 5. The transistors Q46 and Q47 serve as the inverting amplifier 22 in Fig. 5. The transistors Q45 and Q48 serve as the output pair.

With the bipolar OTA according to the ninth embodiment in Fig. 12, there are the same advantages as those in the first embodiment in Fig. 2.

The current value Io of the constant current sinks 3 and 4 is equal to that of the fi-rst embodiment in Fig. 2, because the collectors of the transistors Q44 and Q47 are connected to the ground.

To confirm the circuit operation of the bipolar OTA according to the ninth embodiment in Fig. 12, the transfer characteristic was measured by the inventor, Kimura. The result is shown in Fig. 13.

The testing conditions are as follows.

The power supply voltage Vcc was set as 2.5 V. The resistance R of the common emitter resistor 6 was set as 10 kQ. The current difference (Io - Ib) was set as approximately 40 A, where Io = 50 WA and Ib = 10 WA. The output currents IOUT1 and IOUT2 were shown in Fig. 13 as a voltage, in which these currents IOUT1 and ICUT2 were converted by a load resistor with a resistance 10 kQ.

) It is seen from Fig. 13 that the bipolar OTA according to the ninth embodiment has a satisfactory transconductance linearity.

TENTH EMBODIMENT A MOS OTA according to a tenth embodiment of the present invention is shown in Fig. 14. This OTA corresponds to one obtained by replacing the bipolar transistors with MOSFETs in Fig. 12.

With the MOS OTA according to the tenth embodiment in Fig. 14, there are the same advantages as those in the second embodiment in Fig. 4.

The current value Io of the constant current sinks 3 and 4 is equal to that of the second embodiment in Fig. 4.

ELEVENTH EMBODIMENT A bipolar OTA according to an eleventh embodiment of the present invention is shown in Fig. 15. This OTA has the same basic configuration as that of the first embodiment Therefore, the explanation about the same configuration is omitted here by attaching the same reference numerals to the same or corresponding elements in Fig. 15 for the sake of simplification of description.

As shown in Fig. 15, instead of the constant current sources 1 and 2 in Fig. 2, two constant current sources 1' and 2' supplying the same constant currents Io to the ) transistors Q1 and Q2 are provided. Also, instead of the bipolar transistors Q3, Q4, Q5, and Q6 in Fig. 2, bipolar transistors Q53, Q54, QS5, Q56, Q57, and Q58 are provided.

The constant current sinks 3 and 4 in Fig. 2 are removed.

In Fig. 15, the transistors Q54 and Q55 serve as a current mirror circuit, and the transistors Q57 and Q58 serve as another current mirror circuit. The transistor QS3 serves as a bias transistor supplying a bias current Ic53 to the current mirror circuit formed by the transistors Q54 and Q55, thereby activating the transistors Q54 and Q55 . The transistor Q56 serves as another bias transistor supplying a bias current Icse to the current mirror circuit formed by the transistors Q57 and Q58, thereby activating the transistors Q57 and 058. The transistors Q55 and Q58 serve as the output pair.

* An emitter of the transistor Q54 is connected to the ground. A collector of the transistor Q54 is connected to the emitter of the transistor Q1 at the node A. A base of the transistor Q54 is connected to a base of the transistor Q55.

An emitter of the transistor Q55 is connected to the ground.

The output current 1oUTi is derived from a collector of the transistors Q55.

An emitter of the transistor Q53 is connected to the collector of the transistor Q1 and the constant current source 1' at the node C. A base of the transistor Q53 is connected to the node A. A collector of the transistor Q53 is connected to the coupled bases of the transistors Q54 and Q55.

An emitter of the transistor Q57 is connected to the ground. A collector of the transistor Q57 is connected to the emitter of the transistor Q2 at the node B. A base of the transistor Q57 is connected to a base of the transistor Q58.

An emitter of the transistor Q58 is connected to the ground.

The output current IOUT2 is derived from a collector of the transistors Q58.

An emitter of the transistor Q56 is connected to the collector of the transistor Q2 and the constant current source 2' at the node D. A base of the transistor Q56 is connected to the node B. A collector of the transistor Q56 is connected to the coupled bases of the transistors Q57 and Q58.

The transistor Q53 constitutes a negative feedback current loop together with the transistors Q1 and Q54 in such a way that a current IIo t (V < /R)] flows through the transistor Q54 as a collector current Ic5. . Similarly, the transistor Q56 constitutes another negative feedback current loop together with the transistors Q2 and Q57 in such a way that a current [Io + (V/R)] flows through the transistor Q57 as a collector current IC57.

With the bipolar OTA according to the eleventh embodiment in Fig. 15, there are the same advantages as those in the first embodiment in Fig. 2.

To confirm the circuit operation of the bipolar OTA according to the eleventh embodiment in Fig. 15, the transfer characteristic was measured by the inventor, Kimura. The result is shown in Fig. 16.

The testing conditions are as follows.

The power supply voltage Vcc was set as 2.0 V. The resistance R of the common emitter resistor 6 was set as 10 kQ. The constant current Io was set as approximately 60 WA.

The output currents IXT1 and I T2 were shown in Fig. 16 as a voltage, in which these currents IOUT1 and IOUT2 were converted by a load resistor with a resistance 18 kQ.

It is seen from Fig. 16 that the bipolar OTA according to the eleventh embodiment has a satisfactory transconductance linearity.

TWELFTH EMBODIMENT A MOS OTA according to a twelfth embodiment of the present invention is shown in Fig. 17. This OTA corresponds to one obtained by replacing the bipolar transistors with MOSFETs in Fig. 15 and by adding two constant current sinks 3' and 4' sinking the same constant currents Ib. The addition of the constant current sinks 3' and 4' is based on the fact that no gate currents flows into the gates of the MOSFETs M54, M55, M57, and MS8.

With the MOS OTA according to the twelfth embodiment in Fig. 17, there are the same advantages as those in the second embodiment in Fig. 4.

Two constant current sinks sinking the same constant currents Ib may be provided for the current mirror circuit formed by the bipolar transistors Q54 and Q55 and the current mirror circuit formed by the bipolar transistors Q57 and OSS in the eleventh embodiment in Fig. 15.

THIRTEENTH EMBODIMENT A bipolar OTA according to a thirteenth embodiment of the present invention is shown in Fig. 18. This is a variation of the eleventh embodiment in Fig. 15 and has the same basic configuration as that of the eleventh embodiment.

Therefore, the explanation about the same configuration is omitted here by attaching the same reference numerals to the same or corresponding elements in Fig. 18 for the sake of simplification of description.

As shown in Fig. 18, instead of the bases of the pnptype bipolar transistors Q53 and Q56 being respectively connected to the nodes A and B in Fig. 15, the bases of the pnp-type bipolar transistors Q53 and Q56 are connected to a constant voltage source 8 supplying a constant bias voltage V8. Thus, the base voltages of the transistors Q53 and Q56 are fixed to V3, making the transistors Q53 and Q56 active.

With the MOS OTA according to the thirteenth embodiment in Fig. 18, there are the same advantages as those in the twelfth embodiment in Fig. 15.

To confirm the circuit operation of the bipolar OTA according to the thirteenth embodiment in Fig. 18, the transfer characteristic was measured by the inventor, Kimura.

The result is shown in Fig. 19.

The testing conditions are as follows.

The power supply voltage Vcc was set as 2.0 V. The resistance R of the common emitter resistor 6 was set as 10 tQ. The bias voltage VE was set as 1.0 V. The constant current Io was set as approximately 60 A. The output currents IOUT1 and IOUT2 were shown in Fig. 19 as a voltage, in which these currents IOUT1 and IOUT2 were converted by a load resistor with a resistance 18 kick.

It is seen from Fig. 19 that the bipolar OTA according to the eleventh embodiment has a satisfactory transconductance linearity.

FOURTEENTH EMBODIMENT A MOS OTA according to a fourteenth embodiment of the present invention is shown in Fig. 20. This OTA corresponds to one obtained by replacing the bipolar transistors with MOSFETs in Fig. 18 and by adding two constant current sinks 3' and 4' sinking the same constant currents Ib. The addition of the constant current sinks 3' and 4' is based on the fact that no gate currents flows into the gates of the MOSFETs M54, M55, M57, and M58.

With the MOS OTA according to the fourteenth embodiment in Fig. 20, there are the same advantages as those in the thirteenth embodiment in Fig. 18.

In the above first to fourteenth embodiments, the bipolar or MOS OTAs are operable at a low power supply voltage such as 3 V or lower within the input voltage range of approximately 1 V.

While the preferred forms of the present invention have been described, it is to be understood that modifications will be apparent to those skilled in the art without departing from the spirit of the invention. The scope of the invention, therefore, is to be determined solely by the following claims.

Each feature disclosed in this specification (which term includes the claims) and/or shown in the drawings may be incorporated in the invention independently of other disclosed and/or illustrated features.

The text of the abstract filed herewith is hereby deemed to be repeated here in full as part of the specification.

A bipolar or MOS OTA is provided, which is realized without using the BiCMOS processes. An input differential pair is formed by first and second bipolar transistors whose emitters are connected to one another through a common emitter resistor. The emitter resistor serves as a so-called "floating resistor". A differential input voltage is applied across bases of the first and second transistors. An output pair is formed by third and fourth bipolar transistors opposite in conductivity type to the first and second transistors. A current flowing through the emitter resistor is proportional to the applied differential input voltage.

First and second constant current sources/sinks serve as active loads of the first and second transistors, respectively. Third and fourth constant current sources/sinks drive the first and second bipolar transistors, respectively.

The third and fourth bipolar transistors are controlled by collector currents of the first and second bipolar transistors, respectively. A differential output current proportional to the applied differential input voltage is derived through the output pair of the third and fourth transistors.

Claims

CLAIMS 1. A bipolar OTA comprising: (a) input differential pair formed by first and second bipolar transistors whose emitters are connected to one another through a common emitter resistor; (b) first and second constant current sources/sinks supplying/sinking first and second constant currents to/from said first and second bipolar transistors, respectively; (c) third and fourth constant current sources/sinks supplying/s inking third and fourth constant currents, respectively; and (d) an output pair formed by third and fourth bipolar transistors; wherein said emitter of said first bipolar transistor is connected to said emitter resistor at a first node, and said emitter of said second bipolar transistor is connected to said emitter resistor at a second node; and wherein said first and second constant current sources/sinks are connected to collectors of said first and second bipolar transistors, respectively; and said first and second constant current sources/sinks serving as active loads of said first and second bipolar transistors, respectively; and wherein said third and fourth constant current sources/sinks are connected to said first and second nodes, respectively, and said third and fourth constant current sources/sinks drive said first and second bipolar transistors by said third and fourth constant currents, respectively; and wherein said third and fourth bipolar transistors of said output pair are controlled by collector currents of said first and second bipolar transistors, respectively; and wherein a differential input voltage is applied across bases of said first and bipolar second transistors of said input differential pair; and wherein a differential output current of said OTA is derived through said output pair formed by said third and fourth bipolar transistors.
2. A bipolar OTA as claimed in claim 1, wherein said third and fourth bipolar transistors are opposite in conductivity type to said first and second bipolar transistors; and wherein said collector currents of said first and second bipolar transistors are directly applied to the third and fourth bipolar transistors, respectively
3. A bipolar OTA as claimed in claim 1, wherein said third and fourth bipolar transistors are same in conductivity type to said first and second bipolar transistors; and wherein said collector currents of said first and second bipolar transistors are applied to the third and fourth bipolar transistors through first and second inverting amplifiers, respectively
4. A bipolar OTA as claimed in claim 1, wherein a difference between said collector currents of said first and second bipolar transistors is converted to a differential output voltage; and wherein said differential output voltage is inputted into an emitter-coupled pair of fifth and sixth bipolar transistors.
5. A bipolar OTA as claimed in claim 1, wherein said differential output current of said OTA is derived through first and second current mirror circuits.
6. A bipolar OTA comprising: (a) an input differential pair formed by first and second bipolar transistors whose emitters are connected to one another through a common emitter resistor; (b) first and second constant current sources/sinks supplying/sint.ing first and second constant currents to/from the first and second bipolar transistors, respectively; (c) an output pair formed by third and fourth bipolar transistors which are connected to the emitters of the first and second bipolar transistors, respectively; and (d) fifth and sixth bipolar transistors for biasing the third and fourth bipolar transistors, respectively; wherein said first and second constant current sources/sinks are connected to collectors of the first and second bipolar transistors, respectively. The first and second constant current sources/sinks serve as active loads of the first and second bipolar transistors, respectively; and wherein said fifth bipolar transistor is controlled by a current flowing through the first bipolar transistor. The sixth bipolar transistor is controlled by a current flowing through the second bipolar transistor. and wherein a differential input voltage is applied across bases of the first and bipolar second transistors of the input differential pair. and wherein a differential output current of the OTA is derived through the output pair formed by the third and fourth bipolar transistors.
7. A bipolar OTA as claimed in claim 6, wherein bases of said fifth and sixth bipolar transistors are connected to said emitters of said first and second bipolar transistors, respectively.
8. A bipolar OTA as claimed in claim 6, wherein bases of said fifth and sixth bipolar transistors are connected to first and second constant voltage sources, respectively.
9. A MOS OTA comprising: (a) an input differential pair formed by first and second MOSFET whose sources are connected to one another through a common source resistor; (b) first and second constant current sources/sinks supplying/sinking first and second constant currents to/fron said first and second MOSFETs, respectively; (c) third and fourth constant current ' sources/sinks supplying/sinking third and fourth constant currents, respectively; and (d) an output pair formed by third and fourth MOSFETs; wherein said source of said first MOSFET is connected to said source resistor at a first node, and said source of said second MOSFET is connected to said source resistor at a second node; and wherein said first and second constant current sources/sinks are connected to drain of said first and second MOSFETs, respectively, and said first and second constant current sources/sinks serve as active loads of said first and second MOSFETs, respectively; and wherein said third and fourth constant current sources/sinks are connected to said first and second nodes, respectively, and said third and fourth constant current sources/sinks drive said first and second MOSFETs by said third and fourth constant currents, respectively; and wherein said third and fourth MOSFETs of said output pair are controlled by drain currents of said first and second MOSFETs, respectively; and wherein a differential input voltage is applied across gates of said first and second MOSFETs of said input differential pair; and wherein a differential output current of said OTA is derived through said output pair formed by said third and fourth MOSFETs.
10. A MOS OTA as claimed in claim 9, wherein said third and fourth MOSFETs are opposite in conductivity type to said first and second MOSFETs; and wherein said drain currents of said first and second MOSFETs are directly applied to the third and fourth MOSFETs, respectively
11. A MOS OTA as claimed in claim 9, wherein said third and fourth MOSFETs are same in conductivity type to said first and second MOSFETs; and wherein said drain currents of said first and second MOSFETs are applied to the third and fourth MOSFETs through first and second inverting amplifiers, respectively.
12. A MOS OTA as claimed in claim 9, wherein said differential output current of said OTA is derived through first and second current mirror circuits.
13. A MOS OTA comprising: (a) an input differential pair formed by first and second MOSFETs whose sources are connected to one another through a common source resistor; (b) first and second constant current sources/sinks supplying/sint.ing first and second constant currents to/from said first and second MOSFETs, respectively; (c) an output pair formed by third and fourth MOSFETs which are connected to said sources of said first and second MOSFETs, respectively; and (d) fifth and sixth MOSFETs for biasing said third and fourth MOSFETs, respectively; wherein said first and second constant current sources/sinks are connected to drains of said first and second MOSFETs, respectively, and said first and second constant current sources/sinks serve as active loads of said first and second MOSFETs, respectively; and wherein said fifth MOSFET is controlled by a current flowing through said first MOSFET, and said sixth MOSFET is controlled by a current flowing through said second MOSFET; and wherein a differential input voltage is applied across gates of said first and second MOSFETs of said input differential pair; and wherein a differential output current of said OTA is derived through said output pair formed by said third and fourth MOSFETs.
14. A MOS OTA as claimed in claim 13, wherein gates of said fifth and sixth MOSFETs are connected to said sources of said first and second MOSFETs, respectively.
15. A MOS OTA as claimed in claim 13, wherein gates of said fifth and sixth MOSFETs are connected to first and second constant voltage sources, respectively.
16. An OTA substantially as herein described with reference to and/or as shown in any of Figures 2 to 20 of the accompanying drawings.