GB2292225A - Loop testers - Google Patents

Loop testers Download PDF

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Publication number
GB2292225A
GB2292225A GB9516397A GB9516397A GB2292225A GB 2292225 A GB2292225 A GB 2292225A GB 9516397 A GB9516397 A GB 9516397A GB 9516397 A GB9516397 A GB 9516397A GB 2292225 A GB2292225 A GB 2292225A
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GB
United Kingdom
Prior art keywords
mains
cycles
switch
loop
voltage
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Granted
Application number
GB9516397A
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GB2292225B (en
GB9516397D0 (en
GB2292225A8 (en
Inventor
Geoffrey Keith Lawlor
Neil John Lundy
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JEKYLL ELECTRIC TECHNOLOGY Ltd
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JEKYLL ELECTRIC TECHNOLOGY Ltd
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Publication of GB2292225A8 publication Critical patent/GB2292225A8/en
Publication of GB2292225A publication Critical patent/GB2292225A/en
Application granted granted Critical
Publication of GB2292225B publication Critical patent/GB2292225B/en
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R27/00Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
    • G01R27/02Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant
    • G01R27/16Measuring impedance of element or network through which a current is passing from another source, e.g. cable, power line
    • G01R27/18Measuring resistance to earth, i.e. line to ground

Abstract

A loop tester tests mains live-to-earth resistance (R1 Fig. 1 not shown) by putting a resistance R2 across L and E. To avoid tripping a current imbalance detector, R2 is relatively large. In one form, switch SW1 is closed on alternative positive half-cycles, so successive positive half-cycles measure mains voltage with and without the "shorting" resistance (R1). A control switch SW2A passes the mains voltage on half-cycles without R2 to an integrator 23 directly, and a control switch SW2B passes the mains voltage on half-cycles with R2 to the integrator 23 via an inverter 11. The integrator integrates the difference between the with and without resistor half-cycles over many pairs of half-cycles, to reduce the effect of mains noise. The switch timings can be varied, and higher frequency switching can be used. <IMAGE>

Description

- 1 2292225 The present invention relates to test apparatus for mains
systems.
Mains-powered electrical appliances are in widespread use in both domestic and business premises. Such appliances range from mundane items like desk lamps and electric kettles to modern electronic items like fax machines and personal computers and their associated components.
The testing of such appliances, and of the mains systems from which they are fed, has in the past been somewhat random and sporadic. Recent regulations, however, effectively require periodic testing of both mains systems and such appliances in business premises. The two types of test testing appliances and testing the mains system - are normally performed independently and by separate test devices.
For testing appliances, various properties such as continuity and insulation need to be checked, and instruments termed portable appliance testers or PATs have been developed. Examples of PAT9 are described, for example, in our earlier applications, GB 2 277 381 A and 2 277 598 A.
For testing mains supplies, a major test is the measurement of what is termed the loop impedance of the mains supply, and instruments for measuring this are known as loop testers. (The loop impedance is the impedance between the live and earth mains wires.) The present invention is concerned with loop testers.
The traditional approach to achieving safety is the provision of means for detecting a fault while the appliance is in operaiion and thereupon isolating the device. This technique remains standard even when system and equipment testing is carried out regularly as well. Traditionally, this has been done by providing f uses at suitable locations in the circuit. More recently, miniature circuit breakers (MCBs) have come into widespread use; also, earth feult5 are now often detected, and the use of residual current devices (RCIDs) has become popular for this purpose.
Essentially, an IRCID senses the difference between the currents in the live (phase) and return (neutral) lines to the appliance, and opens a relay in those lines if there is a significant imbalance. The RCD thus indirectly detects any earth leakage current which results from a failure of the insulation of the appliance. One particular application of RCIDs is with garden appliances such as hedgecutters and lawnmowers, where there are serious risks of them becoming wet (with the danger of.current leakage) and of them cutting their own cables.
RCDs can be applied in various ways. An RCID can be included in the mains supply system, generally in addition to a fusebox or MCB unit. Alternatively, an RCID can be included in the mains connection to the applianbe, either as a component in the plug on the end of the appliance's mains cable or as a separate adaptor which is plugged into the mains socket and carries a mains-type socket into which the appliance's mains cable con be plugged.
For present purposes, we can take the mains as being a single-phase system at domestic consumer voltage (22030 V for the UK). This system has a, live line and a neutral (return) line, and also has an earth line. The earth line (which forms the third pin of conventional mains sockets) is literally earthed, by being connected to eg a (metal) water mains pipe or the metal sheathing of the (electrical) mains, with the earth connection being completed by earthing of the neutral line at a supply point such as a transformer substation.
If an appliance develops a live-to-earth fault, the earthing of the appliance should prevent it (ie its casing or other accessible parts) from rising to a significant voltage. However, for various reasons, including the incorrect wiring of a mains installation, the earth connection may in fact have a substantial resitance. The fault current from the live line will flow through the earth connection, and the voltage drop across such earth connection resistance can thus result in the appliance's casing rising to a substantial voltage. This can be dangerous, since someone touching the appliance may also touch a better earth.
The standard technique for performing a loop test is to measure the mains voltage both on open circuit and with a resistor connected between the live line and earth. (The voltage is normally measured from live to earth rather than neutral, since the live to neutral voltage may not be affected by an earth fault.) It is desirable to be able to detect and measure earth resistances of the order of 3 - mn. The resistor used in the loop tester is therefore typically about 10 Q. This results in large currents, typically in the region of 3 to 25 A, flowing.
The current which results from loop testing flows out from the live line and returns through the earth line, and is thus equivalent to an earth fault current. It is evident that if an RCD is included in the mains system, this will detect a loop testing current and trip (open). Thus it will often not be possible to perform a conventional loop test on a mains system which includes an RCD.
The object of the present invention is to overcome this situation.
Accordingly the present invention provides a loop tester comprising a relatively large resistance connected in series with a circuit-closing switch (shorting switch) across the mains, an integrator fed from the mains via a pair of control switches one of which is in series with an inverter, and control means for repeatedly operating the shorting switch in synchronism with the mains frequency and for operating the control switches to rectify the open-circuit and closed-circuit mains voltaps in opposite senses onto the integrator.
The resistance in series with the shorting switch is chosen to be large enough that an RCD in the mains system is unlikely to be tripped by the current flowing when the shorting switch is closed. The current resulting from closing the shorting switch is therefore far smaller than what is normally regarded as a "short circuit"; however, for brevity the circuitclo5ing switch will be termed a shorting switch.
In one form of the present tester, the shorting switch is open and closed for alternate mains half-cycle5 of the same sense (eg positive). In modified forms, the shorting switch is open and closed for successive mains half-cycles, or for successive pairs of mains half-cYcles, or is operated at a multiple of the mains frequency. In a more elaborate form, the shorting switch is operated at a succession of different such frequencies, or pseudo-randomly.
Various forms of loop testers embodying the invention will now be described, by way of example. with reference to the drawings, in which:
Fig. 1 is a block diagram of a mains supply system; Fig. 2 is a tester block diagram; Fig. 3 is a set of waveforms of the operation of one form of tester; Figs. 4 and 5 are sets of waveforms of the operation of modifications of the Fig. 3 tester; and Figs. 6A and 6B are sets of waveforms of the operation of another form of tester.
Fig. 1 shows in simplified form 8 mains system 10 including an RCID. The mains system comprises a 220 V 50 Hz power generator 11 (which in practice will usually be a step-down transformer from a high voltage) connected between the live line L and the neutral line N. The neutral side of the generator' 11 is also earthed. At the consumer installation, there is a 3-pin socket IZ with the live pin L and neutral pin N connected to the live and neutral lines from the generator 10, and with the earth pin E earthed.
The connection between the earth pin E and the earth connection of the neutral side of the generator 11 should have negligible resistance, but in practice it may have an appreciable resistance, shown as resistor RI. The purpose of the loop tester is to measure the value of this resistance.
We assume that the mains supply 10 includes an RCD (residual current device) 13. In principle, this comprises sensing means 14 coupled to both the live and neutral lines of the mains supply to sense the difference (if any) between the outward current in the live line and the return current in the neutral line, amplifying means 15 for amplifying the output of the sensing means 14, and switch means 16 in the live and neutral lines which are opened in the event of a significant current imbalance being detected. (in practice there may obviously be elaborations on this basic principle.) The various forms of tester are all structurally similar, and the block diagram of Fig. 2 is common to them all, though for some of the simpler testers, not all the components shown are required. The differences between the different testers lie largely in the internal details of the blocks, eg in the logic functions and the timings resulting therefrom.
To measure the loop resistance of the mains system 10, this loop tester 20 is plugged into the mains socket 12. The tester utilizes the live and earth pin5 L and E of the socket, as shown (though it may of course use the live and neutral pins for powering itself). The tester 20 uses the standard principle of measuring the live-to-earth (L-E) mains voltage on open circuit and with a resistance R1 connected between live and earth. The voltage with the resistance R2 is reduced from the open-circuit voltage by a factor R2AR1 + R2).
It is desirable to measure quite small values of RI. For reasonable accuracy, R2 must (in a conventional tester) be small enough to give a significant voltage drop across RI for the smallest value of R1 which needs to be measured with reasonable accuracy. This means that the current which flows through the earth loop will be large for small values of R1. This in turn means that the RCD 13 will trip, opening the switches 16 and disconnecting the mains supply to the plug 12, so that the loop resistance cannot be mea!s.ired.
To avoid this, ie to prevent the RCD from tripping. the present tester 20 uses a large value for R2. This means that the factor R2AR1 + R2) will be close to 1, and the corresponding voltage reduction will be small. It will be so small that it cannot be directly measured with sufficient accuracy; indeed, it may be so small that it is comparable with the voltage variation of the mains supply.
1 To overcome these problems, the tester 20 uses a difference and integration technique in which a shorting switch SWI is repeatedly opened and closed, with the voltages resulting from the two states of the switch being integrated in opposite directions by an integrator. Since the mains voltage varies sinusoidally. the switch is controlled in synchronism with the mains waveform.. and the integration is performed over an integral number of mains cycles. As a result, undesired variations are cancelled out, and an effective measurement can be made using a loop current which is below the level required to trip the RCD 13.
More specifically, the loop tester comprises the shorting switch SWI connected in series with a resistor R2 across the L and E pins of a plug 21 by which it is connected to the mains system 10. The switch SWI is controlled by a control unit 22. The L pin is connected to an integrator 23, which is formed by an operational amplifier Al, a resistor R3, and a feedback capacitor Cl, via two parallel paths containing two control switches SW2A and SW2B, the path including switch SW213 also including an inverter 11. These two control switches are controlled by the control unit 22.
The control unit 22, and other components of the tester. are powered by a power supply unit 24 which is also connected across the L and E or N) pins. A polarity or zero-crossing detector 25 is also connected to the mains terminals i L and E, and feeds the control unit 22. It also feeds a cycle counter 26 which in turn feeds the control unit 22, and also feeds a frequency step counter 29 which feeds the control unit 22. The frequency step counter 29 is only needed for certain modes of operation. Also, in practice the control unit 22 may be a microprocessor, which may be arranged to incorporate the counters 26 and 29.) p Fig. 3 is a set of waveforms for the operation of the first loop tester. The top waveform shows the 50 Hz mains waveform. The next waveform, ON, shows the periods (positive half-cycles) during which measurement is tarried out. The next waveform, SWI, shows the periods (alternate positive half-cycles) during which the shorting switch SWI is closed. Closing this switch puts resistor R2 across the mains (L-E), and the current drawn also flows through the mains resistance R1, resulting in a drop in the mains voltage (L-E) at the tester. This voltage drop is indicated by the broken line portions of the mains wavef orm. Since R2 is large, so that the current drown is too low to trip the IRCID 13 (Fig. 1), this voltage reduction is only small.
The control switches SW2A and SW2B are closed alternately for successive positive half-cycles; switch SW2A is closed for the ON periods when the shorting switch is open, and switch SW2B is closed for the ON periods when the shorting switch is closed. (The ON waveform is simply the sum of the two control switch waveforms.) When switch SW2A is closed, the mains voltage is fed directly to the integrator 23 and integrated; when switch SW213 is closed, the mains voltage is fed to the integrator 23 via the inverter 11. The integrator voltage will therefore rise during the SW2A closed periods and fall during the SW213 closed periods, as indicated by the waveform Vint. The voltage Vint therefore consists of a sequence of rises and falls (separated by the "dead" periods of the negative mains half-cycles, which are not used for measurement). The rises and falls of the Vint waveform are actually S-shaped rising and failing cosine halfcycle5, but are shown as linear for simplicity.
The voltage Vint ramps up and down with the closing of the control switches. However, when switch SW2A is closed, the full mains voltage is being applied to the integrator 23, while when switch SW213 is closed, the mains voltage is slightly reduced because SWI is also closed; this is shown in much exaggerated form, by the broken part of the L-E waveform. In addition to its ramping up and down on each pair of cycles, the voltage Vint therefore undergoes a net increase over the pair of cycles, corresponding to the change in mains voltage 7 - produced by the closing of SW1. Although this net increase is likely to be very small over a single pair of cycles, the integrator accumulates these net increases over successive pairs of cycles.
The net increase in Vint over a single pair of cycles is small enough that it is likely to be affected by random noise on the mains. However, over a sufficient number of pairs of cycles, the net increase in Vint becomes substantial, and the effect of mains noise is proportionately reduced. The cycle counter 26 is set to count a suitable number of pairs of cycles Qe a suitable even number of cycles) for both these effects to occur. When the cycle counter reaches that count, the closing of the switches SWI, SW2A, and SW2B is terminated. The integrated voltage Vint of the integrator 23 is converted to digital form by an anal og-to-di Sital converter 27 and passed to the control unit 22, which calculates the mains loop impeden ce and displays it via a display device 28.
The integration is carried out over a large number of pairs of cycles, in each of which switch SWI is open for part of the time and closed for' an equal part. This helps to limit the up-and-down excursions of the integrator voltage; it also greatly reduces the chances of serious error, since mains noise and other disturbance is extremely unlikely to have a significant 2-cycle (25 Hz) component. (in contrast, a long period of integration in one direction with switch SWI open followed by a similar long period of integration in the other direction with switch SWl closed would result in an extreme integrator voltage 5wing and would also be vulnerable to a mains disturbance, such as a large load being switched on or off, occurring half-way through the measurement period.) The determination of the start of the mains cycles is performed by a simple zero crossing detector, and may therefore be inaccurate if there is phase-related noise on the mains occurring at about that point. This - can be overcome by Using an internal oscillator which is locked to the mains signal by a phase-locked loop. However, the ON measurement periods for both cycles of a cycle pair Ce one cycle with switch SW1 on and one cycle with that switch off) start at the same point of the mains cycle. It will therefore be evident that this!system is essentially unaffected by any slight inaccuracy in the determination of the start of the ON measurement periods.
9 8 - The mains loop impedance measurement is shown as being carried out during a succession of pairs of positive mains half-cYcles. Measurement could instead be carried out continuously, ic during both positive and negative half-cycles.
Fig. 4 shows the operation of a second loop tester, which uses one way of doing this. The ON waveform is omitted, as the system measures continuously, with the shorting switch SW1 closed during positive halfcycles and open during negative half-cycles. With this mode of operation, switch SW2A is permanently open and switch SW2B permanently closed during the measurement period. However, this mode of operation has a potential disadvantage. The positive and negative mains half-cycles might have some systematic slightly different characteristics. Since positive half-cycles are used only for measurement with SWI closed and negative half-cycles are used only for measurement with SW1 open, any such difference between positive and negative half-cycles could produce a systematic error.
Fig. 5 shows the operation of a third loop tester, in which this difficulty is overcome. In this, the shorting switch is open and closed for alternate full cycles. In this mode, the polarity or sign of the mains voltage has to be used to control the switches SW2A and SW2B to produce rectification, since simple integration over a full cycle will of course produce a zero net output. The on and off periods of the switches SW2A and SW2B is therefore controlled by a combination of the SWI switching signal and the output of the polarity or zerocrossing detector 25, shown as waveform SGN. (Specifically, SW2A is turned on by the Exclusive-OR of the waveforms for SWI and SGN, and SW2B is turned on by the complement of this, the Equivalence of the waveforms for SW1 and SGN.) It will be evident that the on period of the shorting switch can start at any position in the mains cycle, provided that its lasts for a full cycle.
The mode of operation of this third loop tester has the slight disadvantage that the up-and-down swings of the integrator voltage are twice those of the Fig. 3 mode. However, it allOW5 the measurement to be done in half the number of cycles as the Fig. 3 loop tester for the same accuracy (the number of cycles should of course still be even). It is also, like the Fig. 3 loop tester, largely immune to noise and interference.
0 - 9 The discussion so far has been in terms of the mains loop impedance being a simple resistance. In practice, however, there may be various reactances as well as resistances associated with the main5, forming a complicated network. it is desirable to be able to measure the true mains impedance rather then re5i5tance.
If the interaction between the mains and the various mains testers described so far (the Figs. 3, 4, and 5 testers) is considered in general terms, the switching of the shorting switch in effect generates an AC signal which is fed into and drives the mains system. In the Figs. 3 and 5 testers, this driving signal is at 25 Hz; in the Fig. 4 tester, it is at 50 Hz. To gain a fuller knowledge of the characteristics of the mains loop impedance, it is desirable to measure it at various frequencies.
Figs. 6A and 6B show the operation of a fourth loop tester, which achieves this. This performs a series of measurements at different frequencies fl, f2, f3, etc, as indicated in Fig. 6A. (The time scale of Fig. 6A is considerably compressed relative to that of Figs. 3, 4, 5, and 613.) The frequencies may be chosen to cover a convenient range, from say 200 Hz to 10 kHz. Each measurement is made over a period of several mains cycles (or pairs of cycles); the cycle counter 26 counts the number of cycles required for each measurement, and as each measurement is completed, the frequency step counter 29 is incremented to define the next frequency and measurement period. The total time required to make the measurements may thus typically be a few!second5. The results of the various measurements can be displayed in sequence on the display device 28, and/or processed by the control unit 22.
It may be desirable to have a "guard" period (eg one mains cycle) between the successive measurement periods. to allow the integrator voltage to be determined and reset. It may also be desirable to have an initial period during which the control unit 22 (which will. if it is a microprocessor, have an associated or internal high frequency clock generator) measures and stores the mains frequency so that it can later generate suitable multiples thereof. The succe5sive measurement periods can also, of course, be of different lengths.
v For each frequency (ie for each count of the frequency step counter 29), the control unit 22 generates a square wave signal at a suitable multiple of 25 Hz (half the 50 Hz mains frequency) to control the switch SWI. If the frequency is an odd multiple of 25 Hz, then it is fed to switch SWI directly; if it is an even multiple of 25 Hz, ie an exact multiple of the 50 Hz mains frequency, then it is combined with the mains polarity signal SGN to form the control signal for switch SW1. Switches SWZA and SW2B are controlled, as before, by the Exclusive-OR and Equivalence combinations of the SWIA control signal and the SGN signal.
Fig. 6B shows the waveforms for part of a measurement period at a frequency of 150 Hz. Since 150 is an even multiple of 25. the 150 Hz signal to switch SW1 is reversed at the end of each full mains cycle, as shown. The top waveform shows the mains signal and the periods during which the mains voltage is slightly decreased because of the closure of switch SW1. It can also be seen that the switches SW2A and SW2B are operated so that Vint rises during periods when SW1 is open and falls during periods when SWI is closed.
Of course, the actual signal which the opening and closing of switch SW1 generates is not a pure frequency. Since the driving signal is a square wave, it will have considerable harmonics. Also, if the frequency is an even multiple of half the mains frequency, as in the Fig. 6B waveforms, the driving signal is not a pure square wave, because of the reversal at the end of each mains cycle. Nevertheless, the present system provides a good general indication of the frequency/impedance characteristic of the mains system.
It is evident from Fig. 6B that the various periods during which switch SWI is closed are matched by corresponding periods during which switch SW1 is open. For example, period U is matched to period t8, and period t4 is matched to period tIO.
Suitable pseudo-random switching signals could be used instead of the sequence of signals at successive frequencies, giving a single impedance value which effectively averages the impedances for the various component frequencies.
V I A loop tester comprising a relatively large resistance connected in series with a circuit-closing switch (shorting switch) across the mains, an integrator fed from the mains via a pair of control switches one of which is in series with an inverter, and control means for repeatedly operating the shorting switch in synchronism with the mains frequency and for operating the control 'Switches to rectify the open-circuit and closed-circuit mains voltages in opposite senses onto the integrator.
2 A loop tester according to claim I wherein the shorting switch is open and closed alternately on successive mains half-cycles of the same sense (eg positive).
3 A loop tester according to claim I wherein the shorting switch is open and closed alternately for successive mains half-cycles.
4 A loop tester according to claim I wherein the shorting switch is open and closed alternately for successive pairs of mains half-cycles.
A loop tester according to claim I wherein the shorting switch is operated at a multiple of the mains frequency.
6 A loop tester according to claim 5 wherein the shorting switch is operated at a succession of different such frequencies.
7 A loop tester according to claim 1 wherein the shorting switch is operated pseudo-randomly.
8 A loop tester substantially as herein described with reference to the drawings.
9 Any novel and inventive feature or combination of features specifically disclosed herein within the meaning of Article 4H of the International Convention (Paris Convention).
GB9516397A 1994-08-10 1995-08-10 Loop testers Expired - Fee Related GB2292225B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB9416122A GB9416122D0 (en) 1994-08-10 1994-08-10 Loop testers

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GB9516397D0 GB9516397D0 (en) 1995-10-11
GB2292225A8 GB2292225A8 (en) 1996-02-14
GB2292225A true GB2292225A (en) 1996-02-14
GB2292225B GB2292225B (en) 1998-02-18

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GB9516397A Expired - Fee Related GB2292225B (en) 1994-08-10 1995-08-10 Loop testers

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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0706663B1 (en) * 1993-07-01 1997-10-01 Avo International Limited Electrical test instrument
GB2343005A (en) * 1998-10-06 2000-04-26 Desmond Wheable Earth loop resistace measuring arrangement
GB2381322A (en) * 2001-10-24 2003-04-30 Martindale Electric Company Lt Loop impedance meter
EP1306682A3 (en) * 2001-10-02 2003-11-19 Robin Electronics Limited Circuit tester
US7265555B2 (en) 2005-11-09 2007-09-04 Douglas William Batten Loop impedance meter
GB2591998A (en) * 2020-02-05 2021-08-18 Megger Instruments Ltd Measuring loop resistance

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB883718A (en) * 1959-09-08 1961-12-06 Dehavilland Aircraft Improved impedance indication apparatus
GB2097942A (en) * 1981-05-06 1982-11-10 Dorman Smith Switchgear Ltd Short circuit current protection

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB883718A (en) * 1959-09-08 1961-12-06 Dehavilland Aircraft Improved impedance indication apparatus
GB2097942A (en) * 1981-05-06 1982-11-10 Dorman Smith Switchgear Ltd Short circuit current protection

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0706663B1 (en) * 1993-07-01 1997-10-01 Avo International Limited Electrical test instrument
GB2343005A (en) * 1998-10-06 2000-04-26 Desmond Wheable Earth loop resistace measuring arrangement
GB2343005B (en) * 1998-10-06 2002-10-02 Desmond Wheable An instrument for the measurement of earth loop resistance without tripping R C D's (Residual current detector)
EP1306682A3 (en) * 2001-10-02 2003-11-19 Robin Electronics Limited Circuit tester
GB2381322A (en) * 2001-10-24 2003-04-30 Martindale Electric Company Lt Loop impedance meter
GB2381322B (en) * 2001-10-24 2005-09-14 Martindale Electric Company Lt Loop impedance meter
US7170296B2 (en) 2001-10-24 2007-01-30 Martindale Electric Co. Ltd Loop impedance meter
US7265555B2 (en) 2005-11-09 2007-09-04 Douglas William Batten Loop impedance meter
GB2591998A (en) * 2020-02-05 2021-08-18 Megger Instruments Ltd Measuring loop resistance
GB2591998B (en) * 2020-02-05 2022-04-06 Megger Instruments Ltd Measuring loop resistance

Also Published As

Publication number Publication date
GB2292225B (en) 1998-02-18
GB9516397D0 (en) 1995-10-11
GB2292225A8 (en) 1996-02-14
GB9416122D0 (en) 1994-09-28

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PCNP Patent ceased through non-payment of renewal fee

Effective date: 20050810