GB2142193A - Power supply circuit - Google Patents

Abstract

The circuit is for welding apparatus and is particularly arranged for use with a three-phase supply. The circuit has two switching circuits each including the primary of a respective transformer Tri connected intermediate a pair of switching transistors T1,T2 in a series connection between power supply terminals. The transformers have their secondaries connected to a welding output circuit including a magnetic amplifier (Figs. 10 and 11) and current sensing means for welding current regulation. The switching transistors are transformer coupled to a separate oscillator circuit T3,T4. The two switching circuits are alternatively turned on to energise the output circuit. Fly-back diodes D3,D4 connected to taps on the primary windings permit continual current flow upon switching-off of a pair of switching transistors, the taps serving to raise the reset voltage. A loss-less snubbing circuit is connected to each switching transistor with a capacitor C1,C6 across the transistor and another capacitor C2,C3 connected between the associated primary winding tap and the first capacitor through an inductor L1,L2. The capacitor C1,C6 is charged when the associated transistor is turned off and the capacitor C2, C8, receives charge from the capacitor C1, C6 when the associated transistor is turned on. <IMAGE>

Description

SPECIFICATION Three phase welding power module This invention relates to a welding power source, and particularlyto the implementation of a loss less snubbing system on a 3 phase switching power supply.Thesystem successfully constructed consists of two forward converters arranged to deliver power alternately into a welding arc. The power levels achievedwere designed to be in the 120 A region.

The primary problems involved in known welding power sources are in two associated areas. The first is the abilityto switch the transistor offand pass the load currentto an effective snubbing networkwhen operating from the three phase mains. The second is to be able to resetthesnubbing system readyforthe next cycle. Inthe soft switching system this is accomplished by a combination of capacitors, to take the snubbing current, inductors to raise the capacitor voltage to a level where the next switching phase can begin and a logic sensing system to turn the next transistor on. This has disadvantages; e.g., associated complex logic and susceptibility to external interference.

In an attemptto overcome the above disadvantages, the system described herein comprises two forward converters and associated high efficiency snubbing for all the transistors. The forward converters are arranged to deliver power alternately, and are driven from a self oscillating base drive system. This has the advantages of simplicity, low cost, high efficiency and reliability. The output control system can be an inexpensive high frequency magnetic amplifier.

The nature of the invention and the manner in which it maybe put into effectwill be explained in detail with reference to the accompanying drawings wherein:- Figure lisa circuit diagram of a basic snubber system; Figure 2 is a graph illustrating the safe operating areafora power in the switching mode; Figure 3 is an equivalent circuit for calculating efficientsnubbing values; Figure 4 shows the arrangement of a two transistor forward converter; Figure 5 shows the basic arrangement of two forward converters without snubbing networks; Figure 6 shows a two transistorforward converter arrangement configured to give 20% extra reset voltage;; Figure 7 showsthe overall circuitof one ofthetwo forward converters in a supply system according to the invention with the common base drive system; Figures8and9showhysteresis loopsforcore materials in the amplifier of the preferred control system; Figure 10 shows a preliminary output control system circuit; and Figure 11 shows the preferred circuitforthe output control system Figure 1 shows a snubber system with a transistor T1 driving a load ZL. On switch off the inductive current which will continue to flow from ZL will be transferred from T1 to capacitor C1 via diode D1.To keep the transistor within its SOAR rating,the current through T1 must have dropped two a level If by the time the collectorvoltage has reached thevalue of Vceo (see Figure2) as defined in the transistor data sheet.

On turn on,the charge on C1 will cycle through L1 and D2to charge up capacitor C2to ecactlythe same level that existed on C1 before turn on, if C1 and C2 are the same value. This will discharge C1 completely. On turn off C2 will be discharged through the load and D3, effectively doubling the snubbing effect of C1.The cycle is then ready to be repeated.

This circuit, unfortunately, cannot be used with push pull, halforfull bridge designs. The reason for this is as follows: The capacitive discharge of C2, would be through the top transistor in a bridge design. The extra charge on C1 as the voltage on T1 doubles, in a push pull system, would place unacceptable stress levels on the second transistor in a push pull design.

One problem which does exist witch this network, when operated with a forward converter arises on low loading. Under these conditions the current feeding the snubber network is insufficient to raise the collector voltage for a period long enough to reset the flux in the transformer core. This causes the magnetising current to increase significantly. For this reason the core should be gapped, to prevent runaway saturation thus allowing the magnetising current to reach levels comparable to the transformer current under load. This is described below. To calculate the values necessary for efficient snubbing on switch off, the equivalent circuit is modelled in Figure 3.

At time to: I - IC From to to full switch off:

where T is the switching time of transistor Using the laplace transform this transforms to:

where 1L - initial value e to thus Vx r (I1(s)Ic(s)) x 1lSE1

this traosforms baclr to

Knowing Vx,the maximum safevoltagethe transistor can stand on turn off before the collector current drops to an insignificant level, and the switching timeT, the size of C1 can be obtained. This The drawings originally filed were informal and the print here reproduced is taken from a later filed formal copy.

The claims were filed later than the filing date within the period prescribed by Rule 25(1) of the Patents Rules 1982.

also determines the value of C2, this being effectively in parallel with C1 during turn off asfarasthe transformer current is concerned.

L1 is determined by the following consideration: 1 ) It must limitthe discharge current of C1 to a reasonable value during the transistor conduction phase.

2) The dischargetime of C1 must be kept to within the conduction time period.

3) The value of L1 must be high in comparison to the tapping of the transformer. The reason forth is is to prevent the impedance of L1 from loading the transformer.

If loading occurs then incorrect flux reset on the transformer results due to L1 preventing the transis torcollectorfrom exceeding the linevoltage.The tapping is designed to give an extra 10% reverse reset voltage on the transformer.

The voltage rating on the diodes D1 to D3 must be at leastthe highest line voltage expected plus ten percent, to allowforthe extra flux reset. The current rating is determined from the load currentfor D1. The currentfor D2 can be easily determined from the results derived in appendix B D3 can be determined from the maximum discharge rate of C2, which will depend on the load in a similarfashion to D1.

Atwo transistorforward converterfor use with the above snubbing networkfor operation from 440 v 3 phase supply is shown in basicform in Figure 4. The cycle of operation is as follows: T1 and T2 conduct thus allowing full supply voltage across the transformer, this induces secondary currentand voltage in the secondary winding. This is rectified and passed to the load ZLvia L2. When the conduction period ceases currentstill attempts to flow in the transformer primary causing a voltage reversal across the primary. The current can then flow backto the supply via diodes D4 and D5. In theorythe conduction period must be setto a value equal to or less than the off period.

However since during the conduction period the saturation voltages of T1 and T2 subtracting from the full supplyvoltage across Tr1 and during the off period the conduction voltages of D4 and D5 adding to the supply voltage across Tri, this requirement can be relaxed slightly, allowing the on period to be slightly longer than the off period.

In the initial low voltage breadboard circuit, with the transistors being driven from a timing transfor- mer connected as shown in Figure 5 the amount of extra reset provided by the voltage drops was only foundto be sufficient if the snubbing circuit was disconnected. Transformer saturation eventually re sulted,with a high supplyvoltage applied and the snubber circuit connected, if the system was un loaded. The reason forthis was due to thetimethat the snubbing networktookto charge up underthese conditions. This produced a low reverse voltage time integral across the transformer, hence insufficient flux reset.TO overcome this problem two extra tappingswere used on the transformer, this is shown in Figure 6. The tappings were inserted 10% in from each end. This gave an effective 20% increase in reverse voltage thus allowing a reduction in the off time period.

Two further problems also resulted from using the timing circuit shown in Figure 5. Under high loading conditionsthecircuitcould not provide sufficient base drive without producing unacceptable losses in R1 and a rise in operating frequency.

The second problem was also connected with base drive this circuit produced inefficient transistorturn off under high collector voltage conditions. For these reasons this circuit was rejected in favour of using a driven base drive from a separate half bridge oscillator. The power for driving this system was derived from a separatewinding on one of the transformers.

The full circuit is shown in Figure 7. The circuit contains one or two interesting features apart from those mentioned previously. The most notable fea- ture being the transfer of C2 from the collector to the anode of D4 and similarlyforthe capacitor on T2's emitter. The reason is to reduce turn on stresses in the transistors. Reverse recovery times in these high voltage devices can produce excessive and danger ous operating conditions in the transistors. Using the inductance in the tapping to limitthe rate of collector current reduces the turn on stress inthetransistors.

Several significant differences exist between the circuit of Figure 7 and the original, outlined in Figure 5. Diode D2 and the diode in the corresponding position inthesnubbing networkforT2 required a small snubbing networkaround them. Withoutthis networkthe junction capacitance of the diode and L1 were found to ring at a high frequency. Switch off conditions with the original base system were unsuitable at these voltage levels. The system adopted consisted of a self oscillating push pull circuit. The main transformer in the base drive system was gapped to prevent runaway saturation. This system proved extremely effective. The powertothe base drive system was provided bya separate winding on one of the main transformers.To startthe system a feed from the H.T. line charges up C5 via resistor R1. To ensure that the system cannot start before adequate voltage is available to the base drive, the diacfiring circuit is backed off by zenner diode Z1.

To achieve minimum snubber discharge loading on the transformer reset voltage,the value of L1 was found to be optimum when it achieved a discharge cycle time of 9pus. For the snubber capacitor values given, this was 1.6 milli henries. Another problem that arose with the network involved the incomplete discharge of C1. This was caused by leakage current in D2 and also incomplete charging of C2 due to the positioning ofthe capacitor onthetapping and not on the collector.

This capacitor was positioned on the tap to minimise the rate of rise of current on turn on due to recombination in The problem was cured by positioning a 1 KQ resistor across D1. This removed the small, but significan charge on C1.

The table below shows the system efficiency at various power levels. The high magnetising current and low efficiency at small outputs ought to be noted.

As the output level rises, so does the efficiency reaching a level approaching 80%. The results below are for overall system effiencyincluding output diodes, base drive and control system losses.

Vin li Pin Vout lout Pout Efficiency 544 1.18 642 20 18 360 56% 540 2.5 1350 22 46 1012 75% 540 3.75 2025 21 75 1575 78% For the output control system we choose to use a modified form of magnetic amplifierwhich requires onlythe single main current carrying winding to achieve the necessary control. The core material utilized exhibits a square hysteresis loop with an extremely high residual flux. The ideal material would have a residual flux density equal to its saturationflux density. Figure 8 shows the hysteresis loop of the material Orthonol which exhibits such a characteristic. For operation at high frequencies it is essential that the material be produced in tape form, various thicknesses of tape are available with 1 mil tape being utilized on the prototype. Figure 9 shows the dynamic hysteresis loop in 2 mil Orthonol.This material isavailablefrom Magneticsadivision of Spang Industries Incorporated, U.S.A.

If inductors L1 and L2 shown on the diagram in Figure 10whereto be wound on Orthonol cores, uni-directional current would flow via diodes D10 and D11 through each inductorintheabsenceofany conduction through transistorT3. After one ortwo cycles the cores would saturate and the inductors would present virtually no impedance to currentflow.

ConsiderT3 in full conduction andthefluxmove- ments in the core of either inductor L1 or L2, forward voltage is applied to the inductor as and when the relevanttransformerwinding goes positive and a flux excursion equal to the time integral of the applied voltage occurs. When the winding in question changes polarity, a negative voltage is applied via eitherD13orD14and a similarflux excursion in the opposite direction takes place since the applied voltages are equal and they are appliedfor equal time intervals. Provided sufficientflux links are available to prevent saturation, the cores do not saturate and therefore only magnetizing currentwill flow into the load.

Consider nowT3 in partial conduction. The applied voltage in reverse via this component is reduced and the extent two which flux is re-set during the negative half cycle is less than the required flux linkages indicated to withstand the positive half cycle. Core saturation will therefore occur partway th rough the positive half cycle and load currentwill flow.

It will thus be appreciatedthat by regulating the voltage drop appearing across component T3 from zero to maximum it is possible to control the saturation point of either inductor L1 or L2 from either notoccurring or occurring early in the relevant half cycle.

To ensure that a freewheel path is involved in which inductive energy associated with the smoothing choke L3 can flow, diode D12 is incorporated as shown.

The rudimentary control system indicated on the diagram is used on the prototype simplyto illustrate the principles. Shunt R10 develops a voltage prop ortional to currentflow. When this exceeds the stand-off potential of this device goes into conduction turning on T3 and thereby resetting chokes L1 and L2 as described above. Being a closed loop feed back system, current stabilization can be attained, the degree of which is dependent upon the gain of the system. Similarlyvoltagefeed back is employed in which the voltage across the load is sensed and when a particular level is exceeded, transistorT5 is brought into conduction.

Two independent drive systems are utilized forthe flux re-setting circuit; feeding R11 directly into the base of T3 would provide control. However, problems associated with over dissipation would be encountered. The reasons behind this are as follows: Considerfirst the action of the current control system, the provision ofcurrentfeed back serves a two-fold purpose firstlyto provide means for controlling the maximum current in the load and secondlyto protect the unit against short circuits. Under these conditions no voltage appears across the load terminals and the full secondary voltage must be developed across either L1 or L2 without saturation occurring.To obtain this condition the flux in each of the inductor cores must be fully reset each half cycle and this can only be achieved if T3 were maintained in fullconduction and with negligible voltage drop appearing across R12. R12 musttherefore be of an extremely low ohmic value.

It should be appreciated that saturation of chokes L1 and L2 in the reverse direction; i.e., that opposite to load current flow cannot occur under cu rrentfeed back conditions.

In orderto meet the above drawbacks, making it suitable for welding, the circuit of Figure 1 0ways modified to that shown in Figure 11. In this circuitT3 and T5 have been replaced by the single transistor T1, which is configured to act as a constant current source.

The simple currentcontrol circuit ofT4 and shunt R10 was replaced with a type 1 servo loop. Monitoring of the output was achieved with a current transfor- mer. This assures accurate and drift free operation.

The level ofthe output current is determined by the reference voltage into the non inverting input of A1.

A1 being configured as the integrator in a type 1 loop ensuresthatthe output current is only a function of the demanded level and independent of supply voltage and arc length changes.

To obtain external control of the current requires only a O 0- SVanalogue signal into the system. 5 volts representing a desired level of 100 A output current.

This ensures easy interfacing of additional control circuitry such as pulsing and weld penetration control, at a later date.

Very few satisfactory circuits are available to the power electronics engineerfor use with three phase mains supply. The circuits described in the previous sections should be extremely useful alternatives to the few circuits presently known. Efficiency levels at high power outputs are high, though a drop in efficiency must be expected at lower power levels. The power source worked well into a welding arc and should proveto be extremely economic in production.

Claims (9)

1. A power supply circuitforwelding apparatus comprising: first and second switching circuits each including a respective primary winding of a transformer, at least one switching transistor connected in series with the primary winding between power supply terminals to provide a controlled path forthe supply of energising currenttothe primarywinding,and a respective snubbing circuitforthe or each switching transistor including a first and second capacitor interconnected through an inductor, the first capacitor being connected in parallel with the transistorfor charging when the associated transistor is turned off and the second capacitor receiving charge from the first when the associated transistor is turned on;; a welding output circuit transformer-coupled to the respective primary windings to derive welding cur rentfrom the energisation ofthe primary windings; and an oscillator circuit coupled to said switching transistors to control the turning on of the transistors suchthatthe respectiveprimarywindingsarealter nately energised.

2. Apowersupplycircuitaccording to Claim 1 in which each of said first and second switching circuits each includes a pair of such switching transistors serially connected between said supply terminals, the respective primary winding being serially connected therewith intermediate the pair of transistors, and further comprises a pairofunidirectionally- conductive devices serially-connected between said supplyterminalswith said primary winding connected therebetween, said devices serving, upon said pair of switching transistors becoming non-conductive, to allowa continued flow of current in said primarywinding.

3. A powersupplycircuit according to Claim 2 in which said devices are connected to taps adjacent each end of the primarywinding, said pair of transistors being connectedto respective winding erids.

4. A power supplycircuit according to Claim 3 in which in each switching circuitfor each snubbing circuit the second capacitor has one terminal con nectedto a respective tap on the primary winding and the otherterminal connected to the first capacitor via the associated inductor.

5. A powersupplycircuit according to any preceding claim in which each switching circuit is associated with a respective transformer whose primarywinding is connected as aforesaid in the switching circuit, and each transformer having a respective secondary winding connected to said output circuit

6. A power supply circuit according to any preceding claim in which said output circuit includes a magnetic amplifierthrough which the welding current is passed, and means for sensing the welding currentto derive a feedback signal to control the magnetic amplifierforcontrolling welding current.

7. A powersupply circuit according to any preceding claim in which said oscillator circuit is transformer coupled to said switching transistors.

8. A power supply circuit according to any preceding claim further including rectifier means associated with one switching circuit for deriving power to operate said oscillator circuit.

9. Apowersupplycircuitforwelding apparatus substantially as hereinbefore described with reference to the accompanying drawings.