FR3117288B1 - Dynamic comparator - Google Patents

Dynamic comparator Download PDF

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Publication number
FR3117288B1
FR3117288B1 FR2012890A FR2012890A FR3117288B1 FR 3117288 B1 FR3117288 B1 FR 3117288B1 FR 2012890 A FR2012890 A FR 2012890A FR 2012890 A FR2012890 A FR 2012890A FR 3117288 B1 FR3117288 B1 FR 3117288B1
Authority
FR
France
Prior art keywords
gate
output
gates
controllable
door
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR2012890A
Other languages
French (fr)
Other versions
FR3117288A1 (en
Inventor
Arnaud Verdant
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Commissariat a lEnergie Atomique CEA
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Commissariat a lEnergie Atomique CEA, Commissariat a lEnergie Atomique et aux Energies Alternatives CEA filed Critical Commissariat a lEnergie Atomique CEA
Priority to FR2012890A priority Critical patent/FR3117288B1/en
Priority to EP21199140.1A priority patent/EP4012924A1/en
Priority to US17/450,598 priority patent/US11545992B2/en
Publication of FR3117288A1 publication Critical patent/FR3117288A1/en
Application granted granted Critical
Publication of FR3117288B1 publication Critical patent/FR3117288B1/en
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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/34—Analogue value compared with reference values
    • H03M1/38—Analogue value compared with reference values sequentially only, e.g. successive approximation type
    • H03M1/42—Sequential comparisons in series-connected stages with no change in value of analogue signal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/22—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral
    • H03K5/24—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude
    • H03K5/2472—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude using field effect transistors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66—Digital/analogue converters
    • H03M1/74—Simultaneous conversion
    • H03M1/80—Simultaneous conversion using weighted impedances
    • H03M1/802—Simultaneous conversion using weighted impedances using capacitors, e.g. neuron-mos transistors, charge coupled devices
    • H03M1/804—Simultaneous conversion using weighted impedances using capacitors, e.g. neuron-mos transistors, charge coupled devices with charge redistribution
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/02—Comparing digital values
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Manipulation Of Pulses (AREA)
  • Electronic Switches (AREA)
  • Measurement Of Current Or Voltage (AREA)

Abstract

Comparateur dynamique La présente description concerne un comparateur (2) comprenant un anneau de portes (110A, 110B, 110A', 110B', 106, 108) en série, dans lequel :chaque porte met en œuvre une fonction inverseuse entre une première entrée (100) et une sortie (102) de la porte ; au moins une (110A', 110B') porte est commandable et est associée à une autre porte ; chaque porte commandable (110A', 110B') comprend une entrée de commande (116) reliée à la sortie (102) de ladite porte associée, et empêche une commutation de sa sortie (102) à un état haut si son entrée de commande (116) est à l'état haut, et à un état bas sinon ; et l'entrée de commande (116) de chaque porte commandable (110A', 110B') reçoit la sortie (102) de ladite porte associée si un nombre pair de portes sépare ces deux portes, et reçoit le complémentaire de ladite sortie sinon. Figure pour l'abrégé : Fig. 2Dynamic comparator The present description relates to a comparator (2) comprising a ring of gates (110A, 110B, 110A', 110B', 106, 108) in series, in which: each gate implements an inverting function between a first input ( 100) and an exit (102) from the door; at least one (110A', 110B') door is controllable and is associated with another door; each controllable gate (110A', 110B') comprises a command input (116) connected to the output (102) of said associated gate, and prevents switching of its output (102) to a high state if its command input ( 116) is in the high state, and in a low state otherwise; and the control input (116) of each controllable gate (110A', 110B') receives the output (102) of said associated gate if an even number of gates separates these two gates, and receives the complement of said output otherwise. Figure for the abstract: Fig. 2

FR2012890A 2020-12-09 2020-12-09 Dynamic comparator Active FR3117288B1 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
FR2012890A FR3117288B1 (en) 2020-12-09 2020-12-09 Dynamic comparator
EP21199140.1A EP4012924A1 (en) 2020-12-09 2021-09-27 Dynamic comparator
US17/450,598 US11545992B2 (en) 2020-12-09 2021-10-12 Dynamic comparator

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR2012890 2020-12-09
FR2012890A FR3117288B1 (en) 2020-12-09 2020-12-09 Dynamic comparator

Publications (2)

Publication Number Publication Date
FR3117288A1 FR3117288A1 (en) 2022-06-10
FR3117288B1 true FR3117288B1 (en) 2023-05-26

Family

ID=74554041

Family Applications (1)

Application Number Title Priority Date Filing Date
FR2012890A Active FR3117288B1 (en) 2020-12-09 2020-12-09 Dynamic comparator

Country Status (3)

Country Link
US (1) US11545992B2 (en)
EP (1) EP4012924A1 (en)
FR (1) FR3117288B1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR3119055B1 (en) * 2021-01-15 2022-12-09 Commissariat Energie Atomique Dynamic comparator

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7365661B2 (en) * 2002-11-14 2008-04-29 Fyre Storm, Inc. Power converter circuitry and method
US6801146B2 (en) * 2002-11-14 2004-10-05 Fyre Storm, Inc. Sample and hold circuit including a multiplexer
US6801028B2 (en) * 2002-11-14 2004-10-05 Fyre Storm, Inc. Phase locked looped based digital pulse converter
US6906502B2 (en) * 2002-11-14 2005-06-14 Fyre Storm, Inc. Method for regulating an output voltage of a power coverter
JP4128545B2 (en) * 2004-05-20 2008-07-30 富士通株式会社 Sampling switch
US8319205B2 (en) * 2008-08-14 2012-11-27 Nantero Inc. Nonvolatile nanotube programmable logic devices and a nonvolatile nanotube field programmable gate array using same
US9917594B1 (en) * 2016-09-06 2018-03-13 Texas Instruments Incorporated Inbuilt threshold comparator
US10447290B2 (en) * 2017-12-11 2019-10-15 Texas Instruments Incorporated Reduced noise dynamic comparator for a successive approximation register analog-to-digital converter
CN112865763A (en) * 2019-11-28 2021-05-28 长鑫存储技术有限公司 Comparator with a comparator circuit
JP2022134242A (en) * 2021-03-03 2022-09-15 キヤノン株式会社 Comparator, photoelectric conversion device, and apparatus

Also Published As

Publication number Publication date
EP4012924A1 (en) 2022-06-15
FR3117288A1 (en) 2022-06-10
US11545992B2 (en) 2023-01-03
US20220182068A1 (en) 2022-06-09

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