FR2497421A1 - Non-inverting variable ratio DC=DC switching regulator - uses series switch driving an LC circuit to step up input voltage and shunt switch to lower output voltage - Google Patents

Abstract

The regulator provides a variable DC to DC conversion ratio able to provide output voltages above, equal to, or below the DC input voltage. The regulator uses a series switching transistor driving a series inductor (L1) and shunt output capacitor (C2) to step up the input voltage, then a shunt switching transistor across the output to lower the DC voltage. By variation of transistor ON/OFF time ratios the voltage at the output terminals is variable. The DC supply (SC) is coupled to a series pass transistor (S2) which feeds a series inductor (L1). A free wheel diode (D2) is connected between their junction and ground. A shunt connected switching transistor (S1) shorts the inductor output to ground when the output is to be reduced. Control circuits (3,4) determine the conduction internal of both transistors and ensures synchronisation between them.

Description

CUTTING REGULATOR CIRCUIT
NON VOLTAGE REVERSE
The present invention relates to a switching regulator circuit which does not reverse voltage and which can act as a step-down or step-up voltage.

 To carry out a continuous / continuous transformation it is known to proceed by cutting the current in an inductor, or by cutting the current in the primary of a transformer. L) n is concerned here with the first category of these circuits which can be presented in three different forms: direct converter assembly (step-down) and accumulation converter assemblies (step-up, reverse polarity). These arrangements constitute three basic circuits, respectively step-down, step-up and inverter, and which use the same components, namely an inductor, a switch which can be constituted by a transistor, a stop diode and a tank capacity at the output. The energy is stored in the inductance and in the output capacitor. A control circuit controls the variations of the output voltage according to the variations of the input voltage and the needs of the load and generates a control signal. of the switch to modify the switching cycle so as to stabilize the output voltage. The ratio between the switch closing time and the switching period is equal to the form factor which by definition can vary from 0 to 1.

 The object of the invention is to provide a non-inverting switching regulator circuit which accepts an input voltage which may be lower, equal to or greater than the regulated output voltage, while the minimum possible input voltage must be higher than that provided at the output in the case of a step-down circuit and that the maximum possible input voltage must be lower than that provided at the output in the case of a booster circuit.

According to an object of Minvention in @@ lles um @@@ it @ regulator by the connection in series of two circulates one bans an elevator circuit followed by a mirsud absorber and by @@@ ande in 3) prbronisone of the comm @@ iseurs equipanis @@ circu @@
According to an a @@ re mode preferemdiai es re @@@@ the non-inverting regulator circuit el formed by a @@@ and @@@@ preceded by a circuit composed of a commutator in ser's with an elede connected between the lornes receiving the lension @@@ irés, the diode elentuated by ailieurs to the input terminals of the downstream @@@ elevator, the two cormuteleurs circuits being also controlled in synchronism.

The peculiarities of the invention appear also in the following comtion given by way of nonlimiting example, using the appended figures which represent:
Fig l. a first embodiment of a regulator circuit according to the present invention
Fig 2, a second preferred constituent 52 ande embodiment of a regulator circuit according to the invention; and
- Fig. 3, a diagram relating to the circuit of connmende of the switches.

 The non-inverting switching regulator circuit of FIG. 1 consists of two basic converter circuits connected in cascade, a tendon raising circuit 1 followed by a step-down circuit of isodon 2, the assembly having the property of accepting an internal input voltage E, equal to or greater than Urgulated output voltage intended for operation.

 The switches 51 and 52 are controlled simultaneously on opening and closing by a control circuit 3 which acts on the switching parameters to maintain constant the output voltage U as a function of the requirements of the load RC connected at the output and function of variations in supply voltage E.

The latter is produced by an annex power supply SC connected to the input el. We will a priori consume the voltage E is continuous.

 The intermediate DC voltage U1 is provided by the booster circuit 1 and its value is greater than the input voltage E.

The regulated DC voltage U at the output provided by the step-down circuit 2 is less than the intermediate value U1. The operation of each of these basic circuits 1 eL 2 is recalled below.

In the switching regulator circuit 1 when the switch S1 closes, the voltage VS1 at its terminals Lombe practically at zero and; the voltage difference E - VSI appears at the terminals of the inductor L1 causing an increasing current IL1 in this element. As the voltage VS1 is lower than the output voltage U1, the diode D1 is reverse biased and the current cannot flow to the output, that is to say to the circuit 2. When the switch S1 opens at again, the current IL1 in the inductance
Since L1 cannot change instantaneously, the voltage VS1 becomes equal to the sum of the output voltage U1 and that VD1 across the diode D1 in the forward direction. Current can now flow to the output and to the capacitor C1. This current decreases according to a law which can be assimilated to a linear variation with a slope substantially equal to (U1 + VDI - E) / L1, for elements L1 and C1 chosen of sufficiently high value.

The duration and the period of the switching pulses IT emitted by the control circuit 3 are adjusted so that the average current flowing in the diode D1 is equal to the output current IS1. The form factor of the assembly has the expression:
tl = U1 + UDI - E
U1 + VD1 - VS1
In the step-down circuit 2 when the switch 52 closes, the voltage across the terminals of the diode D2 rises towards the input value U1 minus the fall VS2 in the switch 52. The diode D2 is blocked and the voltage difference U1- VS2 - U appears at the terminals of the inductance L2 giving rise to an increasing current IL2 and which flows towards the load RC and towards the capacity C2. If the instantaneous current IL2 is lower than the current IS absorbed by the load, the capacity C2 provides the missing current which has the effect of causing the output voltage U to drop slightly. On the other hand, if the instantaneous current IL2 is greater than IS, the capacitor C2 absorbs the surplus and the output voltage U increases. When the switch 52 opens, the voltage across the diode D2 changes sign and corresponds to the low value VD2 which it presents in the passing direction; the diode D2 is indeed unlocked and allows to close the circuit for the energy stored in the inductor L2 whose current IL2 cannot change instantly. At any time, the voltage across the inductor is equal to - QU + VD2 ) and the current IL2 decreases linearly with a slope equal to - (U +
VD2) / L2 until it becomes zero or the controller 52 23 closes and the cycle begins again. As before I the cutting cycle controlled by the circuit 3 is determined so that the average current in the inductance balances that of the output 15 towards the load under these conditions the average current of the crimping capacities C2 is zero and the voltage U remains constant The form factor of the assembly has the expression:
12 = U + VD2
----------------
U1 - US2 + VD2
The switches 51 and 52 being controlled simultaneously the form factors t1 and T 2 are equal el; by asking
VD = VD1 = VD2 and VS = VS1 = VS2, we obtain the relations: t = U + VD for the form factor
U + VD + E - VS and U1 = U + E for the intermediate value Ul.

 The chopping cycle is controlled by the control circuit 3 so that the average current in the inductor L2 is equal to the use current IS. By using high value inductors L1 and L2, the regulator has the advantage of reducing the peak current flowing through the switches. It is noted that the intermediate voltage is equal to E + U and the role of the riser 1 proves useless from the moment when the input voltage E is equal to or greater than the regulated voltage U at the output. To remedy this, a complementary control circuit 4 can be provided which has the effect of keeping the switch S1 open when the specific conditions of the input voltage E occur.

The second embodiment shown in FIG. 2 previously comprises an elevator assembly 1 connected on the output side to the load RC and preceded on the input side by a circuit corresponding to the input elements of the step-down assembly 2 of FIG. 1 namely, the switch 52 and the diode D2. This assembly has fewer elements than the previous version and is a preferred embodiment. As previously, the switches S1 and 52 are controlled in synchronism by the control circuit 3. When the switches S1 and 52 are controlled on closing, the intermediate voltage U2 across the terminals of the diode D2- goes up to the voltage of input E minus the low voltage drop V52 at the terminals of switch S2.A voltage difference E - VSl - V52, VS1 being the voltage at the terminals of switch S1, therefore appears at the terminals of inductance L1 giving rise to a current IL1 . This current increases linearly with a slope equal to (E - VS1- VS2) / L1 until the switches open. At this time, as the current in the inductor cannot change instantaneously, the voltage U2 drops to
VD2 (voltage across diode D2 in the forward direction) and the voltage across S1 increases to the value U + VD1 VDI voltage across diode D1 in the forward direction); the diodes D1 eL D2 are conductive and close the circuit for the energy stored in the inductor L1.At the moment of opening, the voltage across the inductor is equal to - (U + VD1 + VD2) and the current
IL1 decreases with a slope equal to - (U + VD1 + VD2) / L1 until it becomes zero, or switches S1 and 52 are closed again and the cycle begins again. Control by circuit 3 of switches is made so that the average current in diode D1 is equal to the output current IS. The form factor has the value:
T = U + VD1 + VD2
----------------------------------
U + VD1 + VD2 + t - VS1 - 152
The voltage so U can be chosen from @@ @@@ independent of the antare voltage AE, that is to say phs prand in addition to small, without discontinuity for the value U = E. @@@@ de the voltage U being identical to that of the voltage co @@@ 5. As previously, an additional circuit of con @@@ to may be provided to nauticalise esetion of the meniage 5 in @@@@ inrs when the input voltage E is lower or equal to the output lamsion @ansion U.

 Referring to FIG. 3, the corrende circuit 3 can be constituted for an input comparsier circuit 39 in which the voltage of sortia U is compared to a voltage, of preference UO stabilized. 1 the error voltage at the output of the comparator is applied to an integrator circuit 31 followed by a width mediator circuit 32 which modifies the cutting cycle and the output stage of which can advantageously consist of a transistor 33 allowing by its outputs transmitter and collseter to separately and simultaneously control the switches 51 and 52 formed of complementary transisters a transistor P @@ and an NPN translstor (Fig. 2). Various colutions can be envisaged for the resilization of the circuit 32 according to which one is seen on the setting duration parameter TF of the switches, or on the cutting period parameter T, or on the two parameters simultaneously. The period T can be fixed by an oscillator, or made variable by the control of a voltage controlled oscillator.

The complementary control circuit 4 is shown in FIG. 3 by elements 40 and to 3. Circuit 40 is a filter for voltage E and may consist of a resistance and capacitance cell
The filter output corresponds to the average value of E and is applied to circuit 41 where it is added to a stabilized value U3. The output of the summator 41 which may consist of a resistance circuit, is applied to the hysteresis comparator circuit 42 which receives the value U by its second input. The output of the comparator drives a switch 43 which will cut off the operation of the element 52 of the input circuit 5 (Fig. 2). The assembly relates to the case of FIG. 2 where the condition satisfied is
E less than or at most equal to U (for mounting Fig. 1 the condition is the opposite). The value U3 is determined in relation to
U and with the hysteresis of comparator 42 to satisfy this condition. Thus equipped, the regulator circuiL according to Figs 2 and 3 only works as an elevator; a corresponding version according to
Figs. 1 and 3 will only work in step down.

We have thus described a regulator circuit with non-voltage inverter switching allowing great flexibility of use since its stabilized output voltage U can be chosen substantially independently of the input value E. To simplify the description of the operation it has been conventionally considered that the windings and capacitors are lossless, that the solid-state switches are of infinite resistance in the blocked state and close to zero in the on state, that the RC load is a pure resistance, that the source SC has a substantially zero internal resistance, and that the values of the inductances and capacitances and load resistances are such that the time constants (RC.C2 eL L2.C2, Fig.1;; RC.C1 and L1.C1, Fig. 2) are very large compared to the TF conduction and TD blocking times
TF which made it possible to consider the variation of the current in the inductance as linear.

 As for the basic, raising or lowering circuits, the regulator circuit described allows by action on the duty cycle = TF / TD to obtain a stabilized voltage U from an input voltage E in principle whatever, but non-zero mean value and with the correct polarity.

Claims (5)

 1. A non-inverting switching regulator circuit for this voltage, using a voltage booster circuit having two input terminals and two output terminals and comprising, between a first input terminal and a first output terminal an indiletance (L.1 ) in series with a first diode (D1), between its two input terminals, said inductor in series with a first switch (51), between the two terminals - output capacity 9C1) and a first connection reliani its second terminal d '' connected to its second output terminal, a control circuit (3) producing a periodic switching signal for cyclically controlling the first switch as a function of the variations in the output voltage (U) of the regulator, characterized in that the booster circuit is connected in series by its two input terminals with an upstream circuit (r) also provided with two input terminals and two output terminals and comprising, between a first input terminal and a first output terminal a die uxth switch (52), between its two input terminals said second switch in series with a second diode (D2) said second diode being connected in parallel on its two output terminals and a connection connecting its second input terminal to its second output terminal, the regulated voltage being taken from the terminals of the first capacitor and the control circuit simultaneously delivering the chopping signal to the two switches.  2. A non-inverting switching regulator circuit using a voltage booster circuit having two input terminals and two output terminals and comprising, between a first input terminal eL a first output terminal a first inductance (L1) in series with a first diode (D1), between its two input terminals said inductor in series with a first switch (51) between its two output terminals a first capacitor (CI) and a first connection connecting its second terminal input to its second output terminal, a control circuit (3) generating a periodic switching signal for cyclic control of the first switch according to variations in the output voltage (U) of the regulator, characterized in that the booster circuit is connected in series by its output terminals to a step-down circuit (2) provided Cgalemcnt with two input terminals and two output terminals and comorCanL, between a first input terminal and a first terminal ne output a second switch (52) in series with a second inductance (L2), between its two input terminals said second switch in series with a second diode (D2), between its two output terminals a second capacitor (C2 ) eL a second connection connecting its second input terminal to its second output terminal, the regulated output voltage tU) being produced at the terminals of the second capacitor and the control circuit simultaneously delivering the switching signal to the two switches.  3. Regulator circuit according to claim 1 or 2, characterized in that it comprises a complementary control circuit (4) provided with a comparator circuit (42) for comparing the regulated output voltage (U) with the voltage of input (E) supplying the regulator circuit from a generator (SC) annex, said input voltage being applied to the input terminals of the first circuit of the two circuits connected in cascade to form the regulator circuit, said output voltage being taken from the output terminals of the second circuit, the comparator output controlling a third switch (43) interposed on the control connection of the switch of the first circuit, so as to cancel the action of the first circuit if necessary.  4.Regulator circuit according to any one of the preceding claims, characterized in that the control circuit comprises a comparison circuit (31) for comparing the output voltage with a reference voltage and therefore the output is applied to a modulator circuit. wide (32) to modify the cutting cycle, the output of this latter circuit being effected by a transistor assembly (33) controlling respectively by its emitter and collector outputs the two switches of the regulator circuit, these two circuits being made up of transistors polarity, one PMP, the other NPN.  5. Regulatory circuit @@@@ claim J or 4, carantérisé in that the @@@@ command correspondence (a) @@@@ ie in sense an arr @@@@ @@@@) filter in @ @@@ Ten @@@@ oit @@ of hearing (41) receiving by goers uns tem @@@ ion de @@@@ élérence (U1) a hoop of @@ pereison iom @@@ est @@@@ @@@ by a hysteresis comparator (42) succeeding by azilleure tensi @@ reg @@@@ and dem the atic output a transistor (43) so @@ l la @@@ autaieur interposed on the conumande of comma @@@ @ from the first d @@@.