DE102020117180A1 - Step-up converter for a power supply of an electrical consumer and a power supply and method for up-converting the input voltage in a power supply of an electrical consumer - Google Patents

Abstract

The invention relates to a step-up converter for a power supply for an electrical consumer, having a rectifier or pole changer circuit (D1, D2; S3, S4), an inductor (L1) and a filter capacitor (C1), the inductor (L1) being connected to one pole is connected to an AC voltage source (ACin) and to a node (P1) between two semiconductor switches (S1 and S2). According to the invention, the first semiconductor switch (S1) is connected in series with a measuring resistor (R1). The step-up converter has a signal generation unit (110) for generating control signals for the two semiconductor switches (S1, S2), with the first semiconductor switch (S1) being closed and the second semiconductor switch (S2) being opened for step-up conversion of the input voltage when the input voltage (Vin) is positive is used to drive a current through the inductor (L1) to magnetize the inductor (L1). To demagnetize the inductance (L1), the first semiconductor switch (S1) is opened and the second semiconductor switch (S2) is closed and the filter capacitor (C1) is charged accordingly. The signal generation unit (110) has means for detecting the current through the measuring resistor (R1), in particular at the beginning of the phase for magnetizing the inductance (L1). This boost converter (100) can be used advantageously as a power factor pre-regulator in power supplies.

Description

The present invention relates to a step-up converter for a power supply for supplying an electrical consumer. The invention further relates to a power supply which has a boost converter according to the invention. The step-up converter can in particular be used as a power factor pre-regulator in a switched-mode power supply. The invention also relates to a method for up-converting the input voltage in a power supply for an electrical consumer.

Power supplies are required for a wide variety of areas and purposes. Since the term power supply is used in many ways, the term power converter will be used in the following. Their task is to control the flow of current between the power source and load or to convert it from one type of current to another. They belong to the sub-area of power electronics within electrical engineering. There are the following types of power converters: rectifiers, inverters, DC converters, and AC converters. These various power converters also include the power supply units, which are also referred to as power supply units. Their task is to supply electronic equipment with direct voltage. A distinction is made between linear power supply units and switched-mode power supply units. The switched-mode power supply units are also part of the regulated power supply units.

the 1 shows the basic structure of a switched-mode power supply. It consists of the components active PFC circuit 10 , DC chopper 20th , Power transfer stage 30th , Smoothing 40 , Control stage 50 , Electrical isolation 60 and control 70 . The mains voltage from the public power supply network is present at the input of the switched-mode power supply. An example is the AC voltage with an effective value of 230 V and a mains frequency of 50 Hz. In the active PFC circuit 10 the following three components may be present, line filters 1 , Boost converter 2 and filter capacitor 3 . At the output of the active PFC circuit 10 if there is a high DC voltage, which affects a voltage value of 400 V, for example. This DC voltage is generated by the DC chopper 20th chopped into a square wave signal. A power transistor, for example a bipolar transistor, is located in it 4th , MOSFET transistor, corresponding to Metal Oxide Semiconductor Field Effect Transistor, thyristor or IGBT, corresponding to Insulated Gate Bipolar Transistor, which generates the square-wave signal through switching processes. By changing the duty cycle of the square wave signal, different voltages and currents and thus different powers can be set. Pulse width modulation (PWM) and pulse train modulation (PFM) techniques are mainly used to control the circuit breakers.

For power supply units that are designed for power ranges of 75 W and more, it is a requirement that they are equipped with PFC technology, corresponding to Power Factor Correction, in order to avoid repercussions on the power supply network by generating harmonics. This is also defined in the European standard EN61000-3-2. An active PFC circuit is often used for this. This consists of a kind of additional switched-mode power supply that is connected upstream of the actual power supply and ensures that the current consumed corresponds to the sinusoidal mains voltage. As a result, the current follows a curve that would be caused by a resistance at the current mains voltage. Thus, if the mains voltage is not exactly sinusoidal, as it often occurs in power networks, the actual course - not the idealized one - of the mains voltage is followed. The power factor remains close to one and there are fewer harmonics. Otherwise these could "build up" and overload the power grid. The power factor indicates the ratio of real power to apparent power. If the phase shift between current and voltage is zero, the real power and apparent power are the same and the power factor remains at one. If there are noticeable phase differences between voltage and current, power will flow back to the utility and the power factor will drop below unity. Active PFC circuits usually consist of a rectifier with a directly downstream step-up converter, which charges a capacitor with a large capacity to a voltage above the peak voltage of the AC mains voltage, e.g. 400 V. From this the actual consumer (switched-mode power supply or e.g. electronic ballast for fluorescent lamps) is supplied. A step-up converter is also known as a step-up converter. It is a flyback converter in which a coil drives a current through the load when the switching transistor blocks.

the 2 shows the basic circuit diagram of a step-up converter that can be used in such an active PFC circuit. By operating step-up converter circuits in what is known as the boundary conduction mode, low-loss switching of the MOSFET semiconductor switches S commonly used is achieved. The step-up converter is used here 100 near the gap limit of the inductor current I _L operated in such a way that both currentless switching on, so-called "Zero Current Switching" (ZCS), as well as voltage-free switching on, so-called "Zero Voltage Switching" (ZVS), of the switch S is possible. The thrush L1 of the boost converter 100 and the output capacitance of the semiconductor switch Coss form one Series resonance circuit. This resonant circuit is recharged within half the period of its natural frequency, so that when the sign of the inductor current changes I _L the output capacitance Coss to twice the value of the boost converter input voltage V _in , minus the boost converter output voltage Vout is reloaded. As a result, when the semiconductor switch S is switched on again, the switching voltage and the inrush current and thus the switching losses are reduced. Such switching losses occur when the semiconductor switch S has current flowing through it. According to Ohm's law, P = U * I. The power loss P, which is converted into heat in the semiconductor switch S, is therefore dependent on how high the voltage is that is present.

$$t_{Off}=\frac{V_{in}}{V_{out}-V_{in}}\ast t_{On}$$

$$t_{Res}=\pi \ast \sqrt{L\ast C_{Osc}}$$

In the 3 voltage and current curves over a complete switching period of the semiconductor switch S are shown. The course of the current I _L is triangular-shaped. During the switch-on phase t _on the current through the reactor increases L1 linear. During the switch-off phase toff, the current falls through the choke coil L1 linearly. In the phase t _res , which is half the period of the resonance frequency of the resonant circuit consisting of a choke coil L1 and the capacitance of the semiconductor switch S corresponds, even the current direction changes. The temporal relationships are made up as follows: $$t_{On}=\frac{{\mathrm{P.}}_{in}\ast 2\ast \mathrm{L.}}{{\mathrm{<figure-callout\; id="2"\; label="V\; i\; n"\; filenames="DE102020117180A1\_0008.png,DE102020117180A1\_0012.png"\; state="\{\{state\}\}">V</figure-callout>}}_{in}{}^2}$$

$$t_{Off}=\frac{V_{in}}{V_{Out}-V_{in}}\ast t_{On}$$

$$t_{\mathrm{R.}es}=\pi \ast \sqrt{\mathrm{L.}\ast {\mathrm{C.}}_{Osc}}$$

P _{in is} the input power and L is the inductance of the choke coil L1 . In order to ensure that the semiconductor switch is switched with as little loss as possible, the period T _{s of} a switching cycle must not be shorter than: $$T_{smin}=t_{On}+t_{Off}+t_{\mathrm{R.}es}.$$

This then ensures that the transistor capacitance of the semiconductor switch S can be discharged for loss-free switching.

In particularly loss-optimized applications, instead of a conventional boost converter according to 2 a half-bridge PFC circuit with at least two active semiconductor switches S1 , S2 for use. This is in 4th shown. Thereby the diode D. out 2 by another semiconductor switch S2 replaced.

The temporal relationships that are necessary for the circuit in accordance with 2 apply are in the US patent US 8,766,605 B2 explained in relation to the use of a half-bridge PFC circuit. The term half-bridge PFC circuit expresses that both the positive and the negative half-wave are up-converted by the same semiconductor switch branch. However, this makes a pole reversing circuit necessary, which closes the circuit.

In the 5 becomes the time sequence of the control signals of the semiconductor switches S1 and S2 for a positive input voltage V _in shown. The control signals are generated by setting current thresholds I _h and I _l. For this purpose, the current must be recorded using measurement technology and compared with specified values.

In this case, the condition for switching off S1 and switching on S2 is that the current threshold I _{h of} the inductor current is exceeded I _L . The current threshold I _h for the respective operating point is specified by a current regulator. In this case, the condition for switching off S2 and switching on S1 is that the current threshold I _{l of} the inductor current is undershot I _L . The current threshold I _l is statically specified and its position ensures that the capacity is completely recharged C _osc of the semiconductor switch S1 .

In contrast to the circuit, in 2 where the diode D. The switch determines the reloading process S2 switched on until the capacity has been completely reloaded C _osc to 0 V. After that, it becomes a semiconductor switch S1 switched on and S2 switched off at the same time, so that the current I _L can commutate from S2 to S1 and the direction of the current I _L changes again. A new cycle begins with the magnetization of the choke coil.

Details on this control method can be found in the documents US 20070109822 A1 and US 8026704 B2 described in more detail.

An alternative method for generating the control signals for the semiconductor switches S1 and S2 is from a doctoral thesis "Current Mode Control structure: Current-Mode Control: Modeling and Digital Application", by Jian Li, April 14, 2009 , Blacksburg, Virginia Polytechnic Institute and State University. The semiconductor _switches are used to generate the switching times t onS1 and t _onS2 S1 and S2 Comparators are used to track the current I _L Compare the voltage drop caused in a measuring resistor with voltage threshold values.

From the document "LED Application Design Using BCM Power Factor Correction (PFC) Controller for 100W Lightning System"; AN-9731, 02011 Fairchild Semiconductor Corporation Rev. 1.0.0, 3/24/11 a circuit design for a PFC circuit that is operated in the so-called "Boundary Conduction Mode" (BCM) is known.

The mentioned methods for generating the control signals for step-up converter topologies with 2 current switches S1 , S2 are operated, require all the information about the current flow through the inductance L in order to generate the control signals with comparators. However, the solutions presented only make this possible with the acceptance of considerable disadvantages.

In one solution, the current is measured I _L directly with a measuring resistor (shunt) in the current path of I _L using a circuit for electrical isolation that brings the signal to the measurement potential.

1. a. Schaltkreise zur Potenzialtrennung verursachen höhere Kosten
2. b. Schaltkreise zur Potenzialtrennung haben oft nur eine geringe Bandbreite und geben das Signal verzerrt wieder.

Disadvantage:

1. a. Circuits for electrical isolation cause higher costs
2. b. Electrical isolation circuits often only have a small bandwidth and reproduce the signal in a distorted manner.

In the other solution, the current is measured with current transformers in the individual current switch paths using additional switching means to demagnetize the current transformers and additional switching means to measure the current bidirectionally.

• c. Es handelt sich um aufwendige Schaltmittel mit vielen Komponenten
• d. Stromwandler sind im Regelfall teurer als Strommesswiderstände (Shunts). Sie messen den Strom meistens indirekt über eine

Disadvantage:

• c. It is a complex switching device with many components
• d. Current transformers are usually more expensive than current measuring resistors (shunts). They mostly measure the current indirectly via a

Measurement of the magnetic field strength of the magnetic field generated by the flow of current with coils or Hall sensors.

It is therefore the object of the invention to provide a step-up converter for power supplies which avoids the disadvantages mentioned above. The inventors recognized that the potential for the measurement and control circuits should, as usual, be placed on the low-interference potential of the negative intermediate circuit voltage. In addition, the most favorable current measurement possible with the aid of just one measuring resistor in the current path with little additional circuitry should be sufficient for recording the current.

This object is achieved by a step-up converter according to claim 1, a power supply for an electrical load according to claim 12 and a method for up-converting the input voltage in a power supply according to claim 14.

The dependent claims contain advantageous developments and improvements of the invention according to the following description.

In a general embodiment, the invention relates to a step-up converter for a power supply of an electrical load, having a rectifier or pole-changing circuit, an inductance and a filter capacitor, the inductance being connected to one pole of the AC voltage source and to a node between two semiconductor switches. This step-up converter is characterized in that the first semiconductor switch is connected in series with a measuring resistor and has a signal generation unit for generating control signals for the two semiconductor switches, the first semiconductor switch being closed and the second semiconductor switch being opened for up-converting the input voltage when the input voltage is positive is to drive a current through the inductance to magnetize the inductance. To demagnetize the inductance, the first semiconductor switch is opened and the second semiconductor switch is closed and the filter capacitor is charged accordingly. The signal generation unit has means for detecting the Current through the measuring resistor to the beginning of the phase for magnetizing the inductance and a filter capacitor, the inductance being connected to one pole of the AC voltage source and to a node between two semiconductor switches. In a preferred embodiment, the first semiconductor switch is connected in series with a measuring resistor in order to measure the current flowing through the first semiconductor switch. In this case, a signal generation unit is provided in the step-up converter for generating control signals for the two semiconductor switches. To up-convert the input voltage when the input voltage is positive, the first semiconductor switch is closed and the second semiconductor switch is opened in order to drive a current through the inductance to magnetize the inductance. To demagnetize the inductance, the first semiconductor switch is opened and the second semiconductor switch is closed. In the demagnetization phase, the filter capacitor is charged accordingly. Furthermore, the signal generation unit has means for detecting the current through the measuring resistor at the beginning of the phase for magnetizing the inductance with a positive input voltage. The invention offers the advantage that switching of the semiconductor switches with as little loss as possible becomes possible. This is because the capacitance of the semiconductor switch is particularly disruptive to lossless switching. It causes a voltage during the switching process which, together with the remaining current flow in the semiconductor switch, leads to a power loss. In order to switch without loss, it is necessary to discharge the capacitance of the semiconductor switch as completely as possible. A current measurement is required for this. A particular advantage of the circuit is that a simple measuring resistor is sufficient for current measurement.

In a further development of the invention, the first semiconductor switch is opened and the second semiconductor switch is closed to drive a current through the inductance to magnetize the inductance, whereby the first semiconductor switch is closed and the second semiconductor switch is closed to demagnetize the inductance to demagnetize the inductance is opened. In the demagnetization phase, the filter capacitor is charged accordingly. The signal generation unit has means for detecting the current through the measuring resistor at the end of the phase for demagnetizing the inductance. This variant of the invention enables lossless switching of the semiconductor switches by adapting the control signals of the semiconductor switches even when the negative half-wave of the AC input voltage is applied. The invention thus makes it possible to dispense with half-wave rectification, which would result in additional costs.

For switching with as little loss as possible, it is also advantageous if the signal generation unit has a calculation unit which precalculates the control cycle time for the phases for magnetization and demagnetization per control cycle as a function of the input voltage and output voltage. A control cycle consists of the phases for magnetization and demagnetization. The signal generation unit also has a control stage which, based on the difference between the measured current value through the measuring resistor and a current reference value, calculates a correction value for the control cycle time. In this way, various factors that would be required for a more precise calculation of the control cycle time can be left out of consideration. Some factors, such as component scatter, are unavoidable and could only be captured with great effort. In addition, some factors could be age-related, which means even more effort to take into account.

It is particularly advantageous for lossless switching if the correction value is used in a timer unit of the signal generation unit for the subsequent control cycle, so that the timer unit shortens or extends the control cycle time accordingly. The signal generation unit generates the control signals for the semiconductor switches.

It is also advantageous that the signal generation unit has a further control stage which calculates a magnetization time from the difference between the specified output voltage and the measured output voltage. This corresponds to a voltage regulator that outputs a controlled variable in order to keep the output voltage constant.

To generate the control signals for the semiconductor switches, it is advantageous if the signal generation unit has a further timer unit to which the calculated magnetization time is passed on, in which the calculated magnetization time is used for a number of subsequent control cycles. The control signals are generated in the form of PWM signals. The pulse duty factor of the PWM signals can be set variably through the separate timer units.

In an advantageous variant, the number of control cycles for which the calculated magnetization time is used is valid for a half-wave of the AC input voltage. For the sake of simplicity, the magnetization time is kept constant over a half-wave, while the demagnetization time is adjusted.

For this, it is also advantageous that the signal generation unit is equipped with an input AC voltage detection unit, which is set up to determine the phase position of the input AC voltage, and the information about the phase position, in particular whether the positive half-wave or negative half-wave of the input alternating voltage is present, to a configuration unit of the Signal generating unit supplies. The mode of operation of the step-up converter according to the invention is different for the positive and negative half-waves of the AC input voltage. It is therefore advantageous to detect the phase position.

In this regard, a further advantageous variant consists in that the configuration unit is set up to configure a number of the components of the signal generation unit for operation with a positive input voltage or with a negative input voltage, depending on what the information about the phase position of the AC input voltage indicates. It is common to see the different To configure components via register entries, which can be done by the configuration unit.

To detect the current when the capacitance of the semiconductor switch is discharged, it is advantageous to connect the measuring resistor between the first semiconductor switch and the return line to the input AC voltage source to which the inductance is not connected.

A choke coil is typically used as the inductance in step-up converters. This can be precisely adapted by the number of turns and stretches or upsetting and geometric design.

In a further embodiment, the invention consists in a power supply for an electrical consumer which has a step-up converter according to the invention. The step-up converter according to the invention can particularly advantageously serve as a step-up converter for power factor precontrol in the power supply.

Such power factor pre-regulation stages can be used particularly advantageously in switched-mode power supplies.

Another embodiment of the invention consists in a method for up-converting the input voltage in a power supply of an electrical consumer. The step-up converter has a rectifier circuit, an inductance and a filter capacitor, the inductance being connected to one pole of the input voltage source and to a node between two semiconductor switches. Furthermore, there is a signal generation unit for generating control signals for the semiconductor switches, with the first semiconductor switch being closed for upward conversion of the input voltage with a positive input voltage and the second semiconductor switch being opened in order to drive a current through the inductance, to magnetize the inductance, and for Demagnetization of the inductance, the first semiconductor switch is opened and the second semiconductor switch is closed and the filter capacitor is charged accordingly. The method is characterized in that the current through the measuring resistor is measured at the beginning of the phase for magnetizing the inductance and a control cycle time for the phases for magnetizing and demagnetizing per control cycle is calculated in advance depending on the input voltage and output voltage. A control stage calculates a correction value for the control cycle time based on the difference between the measured current value through the measuring resistor and a current reference value, by which the precalculated control cycle time is corrected. In this way, deviations in the precalculated control cycle time are corrected and, after a number of control cycles, the desired demagnetization time is reached, which leads to the complete discharge of the capacitance of the semiconductor switch.

In this regard, there is a particular advantage that with this method the current through the measuring resistor is measured at predetermined times, which are predetermined by the precalculated control cycle time and corrected by the correction value. For the invention it is sufficient to measure the current only at these times, which is possible with inexpensive AD converters.

• 1 ein Prinzipschaltbild eines Schaltnetzgerätes;
• 2 ein Prinzipschaltbild einer Halbbrücken-PFC-Schaltung mit einem Halbleiterschalter;
• 3 den Stromverlauf durch die Induktivität der Halbbrücken-PFC-Schaltung gem. 2 und den Spannungsverlauf am Halbleiterschalter S aufgrund seiner Drain-Source-Kapazität;
• 4 ein Prinzipschaltbild einer Halbbrücken-PFC-Schaltung mit zwei Halbleiterschaltern;
• 5 den Stromverlauf durch die Induktivität der Halbbrücken-PFC-Schaltung gem. 4 und den Spannungsverlauf am Halbleiterschalter S1 aufgrund seiner Drain-Source-Kapazität;
• 6 ein Prinzipschaltbild einer Halbbrücken-PFC-Schaltung mit zwei Halbleiterschaltern und Polwender-Schaltung;
• 7 ein Prinzipschaltbild einer Halbbrücken-PFC-Schaltung mit zwei Halbleiterschaltern, wobei die Polwender-Schaltung mit Dioden realisiert wird;
• 8 den Stromverlauf durch die Induktivität der Halbbrücken-PFC-Schaltung gem. 7 bei positiver Halbwelle der Eingangsspannung;
• 9 den Stromverlauf durch die Induktivität der Halbbrücken-PFC-Schaltung gem. 7 bei negativer Halbwelle der Eingangsspannung; und
• 10 ein Blockschaltbild einer Signalerzeugungseinheit der Halbbrücken-PFC-Schaltung.

Several exemplary embodiments of the invention are explained in more detail below with reference to the figures shown in the drawings. Show it:

• 1 a schematic diagram of a switched-mode power supply;
• 2 a basic circuit diagram of a half-bridge PFC circuit with a semiconductor switch;
• 3 the current flow through the inductance of the half-bridge PFC circuit according to 2 and the voltage profile at the semiconductor switch S due to its drain-source capacitance;
• 4th a basic circuit diagram of a half-bridge PFC circuit with two semiconductor switches;
• 5 the current flow through the inductance of the half-bridge PFC circuit according to 4th and the voltage curve on the semiconductor switch S1 due to its drain-source capacitance;
• 6th a basic circuit diagram of a half-bridge PFC circuit with two semiconductor switches and a pole inverter circuit;
• 7th a basic circuit diagram of a half-bridge PFC circuit with two semiconductor switches, the pole-changing circuit being implemented with diodes;
• 8th the current flow through the inductance of the half-bridge PFC circuit according to 7th with a positive half-wave of the input voltage;
• 9 the current flow through the inductance of the half-bridge PFC circuit according to 7th with negative half-wave of the input voltage; and
• 10 a block diagram of a signal generation unit of the half-bridge PFC circuit.

The present description illustrates the principles of the disclosure of the invention. It is therefore understood that those skilled in the art will be able to conceive various designs which, although not explicitly described here, follow the principles of the invention Embody revelation and should also be protected in its scope.

As described, there is the approach to operate a PFC circuit in Boundary Conduction Mode (BCM). Thereby the time t _on for repeated magnetization of the inductance L kept constant over a sinusoidal half-wave of the AC mains voltage. This time is proportional to the power output of the switched-mode power supply and is specified by a voltage regulator, which is supposed to keep the output voltage of the circuit, for example 400 V, constant.

In addition, the time to demagnetize the inductance L must be set. In the publication mentioned, this happens through the generation of a Zero Current Detection (ZCD) signal, which is caused by the recharging process of a diode. However, this cannot be generated in a step-up converter circuit in which the function of the diode is implemented by a current switch, since this current switch does not block by itself.

In order to solve this problem, it is proposed according to the invention to calculate in advance the point in time at which the second current switch is to switch off and to set the time for demagnetization accordingly.

The demagnetization time (off time) in which the first current switch S1 open and the second S2 is closed, is calculated as follows from the time t _on for magnetizing: $$t_{Off}=\frac{V_{in}}{V_{Out}-V_{in}}\ast t_{On}.$$

Since the calculation can deviate due to component tolerances and other factors, such as delays in generating the control signals in driver stages, etc., it must be checked whether the desired current value in the inductance L has also been reached with the calculated off-time.

For this purpose, the required information about the current can be obtained from the path of the first semiconductor switch S1 can be used. With the help of a current measuring resistor, a measuring voltage can be generated that is proportional to the current through the semiconductor switch S1 is.

the 6th shows a basic circuit diagram of the half-bridge PFC circuit according to the invention. The sinusoidal mains voltage with 230 V rms value and 50 Hz mains frequency is present at the ACi _n input. In the upper line is a choke coil L1 switched. In the example it has an inductance of 64 µH. This line goes to a junction point P1, which on the one hand connects to the drain output of a first semiconductor switch S1 communicates. On the other hand, the node P1 is connected to the source input of a second semiconductor switch S2 in connection. Both semiconductor switches S1 and S2 are designed as field effect transistors of the nMOSFET type. Instead, other semiconductor switches such as bipolar transistors, thyristors or IGBTs could be used. They are used to rectify and chop up the input signal. To do this, they are switched at a relatively high frequency, for example 100 kHz. The control signal CTRL1 is to the gate of the field effect transistor S1 created. The control signal CTRL2 is to the gate of the field effect transistor S2 created. The exact timing of these control signals is calculated in a digital circuit that is shown in 6th is not shown, but which is explained in more detail below. At the output of the half-bridge PFC circuit 100 is a filter capacitor C1 switched on during the switching phase of the semiconductor switch S2 is charged and provides the following DC chopper of the switched-mode power supply with a high voltage of 400 V, for example. The filter capacitor C1 has a capacity of 600 µF, for example. The current that, when the semiconductor switch S _{2 is} open, in the opposite direction to discharge the transistor capacitance of the semiconductor switch S1 flows through the measuring resistor R1, which is in the lower branch of the series circuit of the two semiconductor switches S1 and S2 is provided. The measuring resistor R1 has a resistance value of 20 mΩ, for example. With this current flow, the transistor capacitance is discharged, which is necessary for lossless switching. In order to achieve this, the measurement of the current flow is first required. The voltage drop is therefore recorded across the measuring resistor R1. This is done in such a way that the voltage at node P3 is fed to an input of the digital circuit, via which the voltage is measured. An A / D input of the digital circuit can be used for this purpose. In a second branch there are two further semiconductor switches S3 and S4 intended. These are also nMOS field effect transistors, for example. The junction point P2, to which both transistors are connected, is connected to the return line to the electrical works. Both semiconductor switches S3 and S4 serve to reverse the polarity of the circuit. For the positive half-wave of the input voltage, S4 is blocked and S3 is switched on. For the negative half-wave of the input voltage, S3 is blocked and S4 is switched on. The switching signals CTRL3 and CTRL4 are therefore switched with the 50 Hz mains frequency.

the 7th shows another variant of this circuit in which the two semiconductor switches S3 and S4 are replaced by diodes. These have the advantage that they do not require any dedicated switching signals. The diodes are self-locking and show the desired pole turning behavior even without control signals. The other components in 7th that have the same reference numbers as in 6th , denote the same components.

• LED Application Design Using BCM Power Factor Correction (PFC) Controller for 100W Lightning System; AN-9731, 02011 Fairchild Semiconductor Corporation Rev. 1.0.0, 3/24/11.

With the circuit according to 7th an approach known from the following publication is further developed:

• LED Application Design Using BCM Power Factor Correction (PFC) Controller for 100W Lightning System; AN-9731, 02011 Fairchild Semiconductor Corporation Rev. 1.0.0, 3/24/11.

With this circuit design, a PFC circuit is operated in the so-called “Boundary Conduction Mode” (BCM). Here is the time T _on , which is used to chop the input voltage at approx. 100 kHz, is kept constant over a sine half-wave of the mains voltage. This time corresponds to the time it takes to magnetize the inductance L per control process. As described, the PFC circuit contains a current control loop which has the task of _{keeping the instantaneous value of the input current I L} (t) (inductor current) proportional to the instantaneous value of the input voltage V _in (t). In this way, the power factor can then be kept close to one. This time is proportional to the power and is specified by a voltage regulator, which is supposed to keep the output voltage of the circuit constant at 400 V, for example.

In order to set the time for demagnetizing the choke L, a Zero Current Detection (ZCD) signal is used in the publication mentioned, which is caused by the charge reversal of the diode. However, this can be done in a step-up converter circuit in which the function of the diode is performed with a low-loss semiconductor switch S2 is realized, but not generated in this way, since these semiconductor switches do not lock by themselves when a gate voltage is applied.

It is therefore according to the invention the point in time at which the second semiconductor switch S2 should switch off, calculated in advance and this calculation corrected with the help of an additional current control process. This precalculation and correction can be carried out based on the positive input voltage (positive half-wave) or the negative input voltage (negative half-wave), because the information required to be able to regulate the current thresholds is contained in both cases.

the 8th shows the current control process with a positive input voltage. The current measured via the measuring resistor is plotted along the ordinate. The time t is plotted along the abscissa. The course of the current measured via the measuring resistor R1 is with I _b designated. The time T _on To magnetize the inductor L, the AC input voltage is kept constant during the positive half-cycle. During this time there is a semiconductor switch S1 closed and semiconductor switch S2 open. The remaining time of the control cycle T _P is variable and is used to demagnetize the inductor L and to discharge the transistor capacitance of semiconductor switches S1 with the pre-calculated value and to correct the deviations. The rest of the time from T _P is the semiconductor switch S1 open and the semiconductor switch S2 closed. A settling time is in the 8th shown during the second control cycle shown and with T _offset designated. This corresponds to a correction value by which the time calculated in advance after the previous control process T _P is corrected. In the 8th can also be seen that the period T _P is correspondingly shortened in the second control cycle shown. Because the previous control process showed that the pre-calculated time T _P but is too long because the measured current I _b not the defined reference value I _ref corresponds, but deviates by the value lerr (t-1) and only by shortening the period the reference value I _ref can be achieved. The required reference value is set in the third control cycle I _ref then actually achieved. The times at which the current values were recorded are marked with a "+" symbol. These times correspond to the precalculated and corrected values for T _P .

9 shows the corresponding control process with a negative input voltage at the end of the current edge. In this case, three correction _values T offset (t-2), T _offset (t-1) are shown. The pre-calculated length of the control cycle is corrected for each of the three control cycles shown. The precalculated value is shortened in the first cycle, extended in the second and shortened again in the third control cycle. The current measured values are also recorded at the points marked with the "+" symbol. The AD converter is triggered at the precalculated and corrected points in time to record the measured values.

10 finally shows a block diagram of an integrated circuit 110 , with which this type of regulation is implemented. The integrated circuit can be implemented in the form of a DSP (digital signal processor), FPGA (field programmable gate array), or ASIC (application specific integrated circuit) or with the aid of a standard microcontroller and corresponding software. The controller architecture applies in the event that the positive input voltage (half-wave) is applied.

berechnet werden, die bereits eingangs erläutert wurde. Diese Formel gilt immer dann, wenn der Stromverlauf durch die Drosselspule L1 an der Lückgrenze betrieben wird. Diese Regelungsstufe 112 arbeitet mit der Eingangsinformation über die Differenz zwischen gewünschter Zwischenkreisspannung von z.B. 400 V und der tatsächlich gemessenen Zwischenkreisspannung von der Subtraktionsstufe 111a. Die geregelte Aufmagnetisierungszeit T_on wird einerseits einer zweiten Timer-Einheit 115 zur Verfügung gestellt, die entsprechende Ereignisse ausgibt an die PWM-Signalerzeugungseinheit 119. Andererseits wird die Aufmagnetisierungszeit T_on an eine Berechnungseinheit 114 gegeben, die mit der Formel $$T_P=\frac{V_{in}}{V_{out}-V_{in}}\ast T_{on}+T_{on}$$

die Zeit für die Gesamtlänge von Aufmagnetisierungszeit und der Abmagnetisierungszeit berechnet. Der erste Teil der Formel entspricht dabei der Formel für die Berechnung der Abmagnetisierungszeit toff, die eingangs erwähnt wurde.The control signals are generated with the controller CTRL1 and CTRL2 for the semiconductor switches S1 and S2 of the boost converter 100 generated. The block diagram contains the following components: With the reference numbers 111a and 111b two subtraction levels are designated. In the stage 111a becomes the output voltage Vout from the reference voltage V _{out_ref} deducted. The output voltage should be kept as constant as possible at the value of 400 V. It is thus in the subtraction stage 111a determines the deviation from the target value. Depending on the load on the switched-mode power supply, the intermediate circuit voltage can vary from 400 V and it must be readjusted. In the subtraction stage 111b is determined by the reference value I _ref the current measured current I _b subtracted by the measuring resistor R1. As described, the current is always measured at the pre-calculated and corrected times. No further measured current values need to be recorded. Thus, in this subtraction stage 111b the respective deviation I _err from the setpoint I _ref definitely. This is the essential information for the subsequent control stage 113 in which the correction T _offset for the pre-calculated period T _P of the control cycle is calculated. A PI controller or PID controller, for example, can be used for this. Another controller can also be used, depending on how quickly the difference is to be corrected. The regulation stage 113 gives the correction value T _offset to the downstream master timer unit 116 out. It corresponds to a programmable timer unit that outputs an event after the set times have elapsed. The event could also be output in the form of a generated signal. In digital technology, the event can also be output in the form of a software event which, similar to an interrupt generated by software, calls up a specific program routine. In the master timer unit 116 the timers are set with which the duty cycle for the control signals CTRL1 and CTRL2 is calculated. The actual signal generation takes place in the PWM signal generation unit 119 . To the control signals CTRL1 and CTRL2 To be able to generate both with the desired pulse duty factor, the information about the pre-calculated magnetization time is still available T _on needed. This information is provided by the control stage 112 delivered. This time is kept constant for the positive half-wave. It is therefore a control stage that readjusts the manipulated variable only relatively slowly. It has been shown that even a 10 Hz PI controller is sufficient for this. The magnetization time T _on can with the help of the formula $$t_{On}=\frac{{\mathrm{P.}}_{in}\ast 2\ast \mathrm{L.}}{V_{in}{}^2}$$

are calculated, which was already explained at the beginning. This formula always applies when the current flow through the choke coil L1 is operated at the gap limit. This level of regulation 112 works with the input information about the difference between the desired intermediate circuit voltage of, for example, 400 V and the actually measured intermediate circuit voltage from the subtraction stage 111a . The regulated magnetization time T _on becomes on the one hand a second timer unit 115 made available, which outputs the corresponding events to the PWM signal generation unit 119 . On the other hand, the magnetization time becomes T _on to a calculation unit 114 given that with the formula $$T_{\mathrm{P.}}=\frac{V_{in}}{V_{Out}-V_{in}}\ast T_{On}+T_{On}$$

the time for the total length of magnetization time and demagnetization time is calculated. The first part of the formula corresponds to the formula for calculating the demagnetization time toff, which was mentioned at the beginning.

With the state machine 117 the state of the input voltage is recorded. This is sampled with a time grid of 25 kHz. The state machine 117 determines whether the positive half-wave is present or the negative half-wave of the input voltage. The determined state is sent to a configuration unit 118 forwarded the corresponding register settings for the various blocks of the integrated circuit, depending on the state 110 undertakes. At least the PWM signal generation unit 119 must be reconfigured, because with a negative input voltage the functions of the semiconductor switch S1 and S2 reversed.

In summary, the functionality of the integrated circuit is explained again. With the help of the integrated circuit 110 becomes from the information about the input voltage V _in and output voltage Vout and the voltage regulator 112 , which is the magnetization time T _on represents, in the calculation unit 114 a control cycle time T _P precalculated with which the choke current I _L would have to reach the lower current threshold. After this control cycle time has ended, both semiconductor switches are switched S1 and S2 switched off and a short time later the first semiconductor switch is activated S1 turned on again. The measuring resistor R1 is now live and the current flowing through the measuring resistor is measured immediately after switching on S1. If this deviates from the nominal reference value, which would have to be set for the complete discharge of the transistor capacitance, then the further control stage takes place 113 a correction value T _offset one that corresponds to the precalculated control cycle time T _P is added for the next control cycle. This results in a shortening or an extension of the control cycle time, depending on the correction value T _P . In this way the stream approaches in the next Control cycle to the reference value. So the control level is the same 113 the current in the measuring point to the reference current. The chosen reference value I _ref is constant over a half sine wave.

With this method, however, it would also be possible to use another point from the current edge for the control. To do this, the calculation of the current reference value must be adapted. This can have different advantages. For example, an average current control could also be implemented in which the circuit is not operated in BCM mode, but, for example, in CCM mode, corresponding to continuous conduction mode.

The disclosure is not restricted to the exemplary embodiments described here. There is room for various adaptations and modifications which those skilled in the art, based on their expert knowledge as well as belonging to the disclosure, would consider.

List of reference symbols

1

Line filter

2

Boost converter

3

Filter capacitor

4th

Switching stage

5

Transformer

6th

Regulator

7th

Optocoupler

10

active PFC circuit

20th

DC chopper

30th

Power transfer stage

40

Smoothing level

50

Control stage

60

Electrical isolation

70

steering

100

Boost converter

110

Signal generation unit

111a, 111b

Subtraction levels

112

further control level

113

Control level

114

Calculation unit

115

further timer unit

116

Timer unit

117

AC input voltage detection unit

118

Configuration unit

119

PWM signal generation unit

C1

Filter capacitor

CTRL1, CTRL2

Control signal

D.

diode

D1, D2

Rectifier diode

Cosc

Transistor capacitance

Ib

measured current

Ib_sense

Line for current measurement

Ierr

Deviation from the target current

IL

Coil current

Iref

Target current

L1

Choke coil

S1, S2, S3, S4

Semiconductor switch

SNG

Switching power supply

volume

Magnetization time

toff

Demagnetization time

tRes

Resonance oscillation time

TOffset

Correction value

volume

Magnetization time

TP

Control cycle time

Vin

Input voltage

Vout

Output voltage

Vout_ref

Output voltage reference value

QUOTES INCLUDED IN THE DESCRIPTION

This list of the documents listed by the applicant was generated automatically and is included solely for the better information of the reader. The list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions.

Patent literature cited

• US 8766605 B2 [0010]
• US 20070109822 A1 [0014]
• US 8026704 B2 [0014]

Non-patent literature cited

• "Current Mode Control structure: Current-Mode Control: Modeling and Digital Application", by Jian Li, April 14, 2009 [0015]
• "LED Application Design Using BCM Power Factor Correction (PFC) Controller for 100W Lightning System"; AN-9731, 02011 Fairchild Semiconductor Corporation Rev. 1.0.0, 3/24/11 [0016]

Claims (15)

Step-up converter for a power supply of an electrical consumer, having a rectifier or pole-changing circuit (D1, D2; S3, S4), an inductance (L1) and a filter capacitor (C1), the inductance (L1) being connected to one pole of the AC voltage source (AC _in ) is connected and to a node between two semiconductor switches (S1 and S2), characterized in that the first semiconductor switch (S1) is connected in series with a measuring resistor (R1), with a signal generation unit (110) for generating control signals for the two Semiconductor switch (S1, S2), the first semiconductor switch (S1) being closed and the second semiconductor switch (S2) being opened to drive a current through the inductance (L1) for magnetization to upconvert the input voltage when the input voltage (V _{in) is positive} the inductance (L1), the first semiconductor switch (S1) being opened to demagnetize the inductance (L1) and the second semiconductor switch (S2) is closed and the filter capacitor (C1) is charged accordingly, the signal generating unit (110) having means for detecting the current through the measuring resistor (R1) at a selected point in time of the phase for magnetizing the inductance (L1), in particular to the beginning of the magnetization phase. Boost converter according to Claim 1 , whereby the first semiconductor switch (S1) is opened and the second semiconductor switch (S2) is closed to drive a current through the inductance (L1) to magnetize the inductance (L1) for upward conversion of the input AC voltage with a negative input voltage (V _in), whereby to demagnetize the inductance (L1) the first semiconductor switch (S1) is closed and the second semiconductor switch (S2) is opened and the filter capacitor (C1) is charged accordingly, and the signal generation unit (110) has means for detecting the current through the measuring resistor (R1) at a selected point in time of the phase for demagnetization of the inductance (L1), in particular at the end of the phase for demagnetization. Boost converter according to Claim 1 or 2 , wherein the signal generation unit (110) has a calculation unit (114) which precalculates the control cycle time (T _P ) for the phases for magnetization and demagnetization per control cycle as a function of the input voltage (V _in ) and output voltage (V _out ), and the signal generation unit (110) furthermore has a control stage (113) which, based on the difference between the measured current value (I _b ) through the measuring resistor (R1) and a current reference value (I _ref ), generates a correction value (Toffset) for the control cycle time (T _P ) calculated. Boost converter according to Claim 3 , the correction value (T _offset ) being used in a timer unit (116) of the signal generation unit (110) for the subsequent control cycle, so that the timer unit (116) shortens or lengthen the control cycle time accordingly. Boost converter according to Claim 4 , wherein the signal generation unit (110) has a further control stage (112) which calculates _{a magnetization time (T on) from the difference between the specified output voltage and the measured output voltage.} Boost converter according to Claim 5 , wherein the signal generation unit (110) has a further timer unit (115) to which the calculated magnetization time (T _on ) is forwarded, in which the magnetization time (T _on ) is used for a number of subsequent control cycles. Boost converter according to Claim 6 , whereby the number of control cycles for which the calculated magnetization time (T _on ) is used is valid for a half-wave of the AC input voltage. Up converter according to one of the preceding claims, wherein the signal generation unit (110) is equipped with an input AC voltage detection unit (117) which is set up to determine the phase position of the input AC voltage, and the information about the phase position, in particular whether the positive half-wave or negative half-wave of the AC input voltage is applied to a configuration unit (118) of the signal generation unit (110). Boost converter according to Claim 8 , wherein the configuration unit (118) is set up to configure a number of the components of the signal generation unit (110) for operation with a positive input voltage or with a negative input voltage, depending on what the information about the phase position of the AC input voltage indicates. Boost converter according to one of the preceding claims, wherein the measuring resistor (R1) is connected between the first semiconductor _{switch (S1) and the return line to the input AC voltage source (AC in} ) to which the inductance (L1) is not connected. Boost converter according to one of the preceding claims, wherein the boost converter has a choke coil (L1) as inductance. Power supply of an electrical consumer, characterized in that the power supply has a boost converter according to one of the The preceding claims, wherein the step-up converter is used for power factor precontrol in the power supply. Power supply according to Claim 12 , whereby the power supply is designed as a switched-mode power supply. A method for up-converting the input voltage in a power supply of an electrical consumer, which has a step-up converter (100) with a rectifier or pole inverter circuit (D1, D2; S3, S4), an inductance (L1) and a filter capacitor (C1), the inductance (L1) is connected to one pole of the input voltage source (AC _in ) and to a node between two semiconductor switches (S1 and S2), and with a signal generation unit (110) for generating control signals (CTRL1, CTRL2) for the semiconductor switches (S1, S2 ), whereby the first semiconductor switch (S1) is closed and the second semiconductor switch (S2) is opened to drive a current through the inductance (L1) to magnetize the inductance (L1) for the upward conversion of the input voltage with a positive input voltage (V _in) , and wherein the first semiconductor switch (S1) is opened and the second semiconductor switch (S2) is used to demagnetize the inductance (L1) is closed and the filter capacitor (C1) is charged accordingly, characterized in that the current through the measuring resistor (R1) at a selected point in time of the phase for magnetizing the inductance (L1), in particular at the beginning of the phase for magnetizing the inductance (L1) is measured and a control cycle time (T _P ) for the phases for magnetization and demagnetization per control cycle depending on the input voltage (V _in ) and output voltage (V _out ) is calculated in advance, and by a control stage (113) based on the difference between the measured Current value (I _b ) a correction _{value (T Offset} ) for the control cycle time (T _P ) is calculated by the measuring resistor (R1) and a current reference value (I _ref ), by which the precalculated control cycle time (T _P ) is corrected. Procedure according to Claim 14 , the current (I _b ) through the measuring resistor (R1) being measured at predetermined times which are corrected by the precalculated control cycle time (T _P ) and corrected by the correction _{value (T offset} ).

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