DE10140747A1 - Control and regulating method for a three-point converter with active clamp switches and device therefor - Google Patents

Abstract

The invention relates to a controlling and regulating method for a single-phase or multi-phase three-level power converter, which is connected to a direct current link and which comprises two series-connected main switches (T1, T2, T3, T4)/inverse diodes (D1, D2, D3, D4) between each direct current connection and each load connection. The shared connection point of both internal main switches (T2, T3) form the load connection, and an active clamping switch (T5, T6) with an inverse diode (D5, D6) is located between each shared connection point of an internal main switch (T2, T3) with an external main switch (T1, T4) and the center tapping of the direct current link, whereby forming two possible paths for connecting a load connection to the center tapping. Independent of the direction of the load current, at least one of both active clamping switches (T5, T6), together with at least one internal main switch (T2, T3) for connecting a load connection to the center tapping, is switched on in order to guide the current in a directed manner through the upper, the lower or through both paths of the center tapping during a zero state.

Description

The invention relates to a control and regulating method for a self-guided th, three-point converter fed by a DC voltage intermediate circuit active clamp switches according to the preamble of claim 1 and on a front direction to this. Such converters can be used both as self-commutated rectifiers as well as self-commutated inverters. You will mostly be in electric drives of medium and large powers applied.

The topology of the self-guided, diode-clamped three-point converter on DC voltage intermediate circuit (three-point NPC converter) is generally known. For areas of application such as industrial or traction drives of high performance (with voltage drives), it is also used industrially. Doing this as the main switches, for example, Insulated Gate Bipolar Transistor (IGBT) modules with integrated Inverse diode used. For reasons of modularity, the simplification of the mechani structure or to ensure a uniform reverse voltage division in the series connection of semiconductor devices in such current Instead of the zero point clamping diodes (NPC diodes), IGBT Modules as NPC switches (hereinafter active NPC switches or active zero point Clamp switch or active clamp switch) installed. These are IGBTs  ge either by short-circuiting the gate-emitter path in the "off" state sets or operated to regulate the reverse voltage distribution in the active area ben, while the integrated inverse diode takes over the function of the NPC diode.

In Fig. 1, such a well-known self-guided, with NPC switches be populated three-point converter on the DC link or short three-point NPC converter is shown. An outer main switch T1U or T1V or T1W - hereinafter generally referred to as T1 - and an inner main switch T2U or T2V or T2W - hereinafter also generally referred to as T2 - are arranged in series between the positive DC voltage connection and the three load connections, wherein each outer main switch T1U or T1V or T1W has an inverse diode D1U or D1V or D1W - hereinafter also generally referred to as D1 - on parallel and each inner main switch T2U or T2V or T2W has an inverse diode D2U or D2V or D2W - hereinafter also generally referred to as D2 - lies on tip parallel.

Between the negative DC voltage connection and the three load connections, an outer main switch T4U or T4V or T4W - hereinafter also generally referred to as T4 - and an inner main switch T3U or T3V or T3W - hereinafter also generally referred to as T3 - are arranged in series , with each outer main switch T4U or T4V or T4W an inverse diode D4U or D4V or D4W - hereinafter also generally referred to as D4 - is antiparallel and each inner main switch T3U or T3V or T3W an inverse diode D3U or D3V or D3W - hereinafter also generally referred to as D3 - lies antiparallel. The load-side phase currents (load currents) are designated i _phU , i _phV , i _phW .

The common connection point of T1U, D1U, T2U and D2U is above an acti ven NPC switch T5U with anti-parallel inverse diode D5U to the center tap of the DC link connected. Likewise, the common lies Connection point of T1V, D1V, T2V and D2V via an active NPC switch T5V with anti-parallel inverse diode D5V at the center tap of the DC voltage Intermediate circuit. In the same way, the common connection point of T1W, D1W, T2W and D2W over an active NPC switch T5W with anti-parallel  Inverse diode D5W attached to the center tap of the DC link closed. The active NPC switches T5U, T5V, T5W become general below also referred to as T5. The inverse diodes D5U, D5V, D5W are also below designated D5.

The center tap is connected to the two DC voltage connections via two capacitors of the same capacitance. The voltage across the capacitors is V _dc / 2 (half _{DC link} voltage).

The common connection point of T3U, D3U, T4U and D4U is above an acti ven NPC switch T6U with anti-parallel inverse diode D6U to the center tap of the DC link connected. Likewise, the common lies Connection point of T3V, D3V, T4V and D4V via an active NPC switch T6V with anti-parallel inverse diode D6V at the center tap of the DC voltage Intermediate circuit. In the same way, the common connection point of T3W, D3W, T4W and D4W over an active NPC switch T6W with anti-parallel Inverse diode D6W attached to the center tap of the DC link closed. The active NPC switches T6U, T6V, T6W become general below also referred to as T6. The inverse diodes D6U, D6V, D6W are also below designated D6.

An investigation of diode-clamped three-point NPC converters with sinusoidal Modulation shows that the thermal design of these converters is critical by four Working points are determined, which are given in Table 1 below. In each of these four critical operating points is the phase current (load current) and thus the output power of the converter through the maximum permissible losses of the this most critical operating point borders. All other semiconductors reach the respective critical operating points only a lower junction temperature. Because the maximum losses and maximum Junction temperatures of the individual semiconductors in the critical for them reach comparable values, is a replacement of all components with larger ones are required if the output power of the converter is increased should.  

An additional critical operating point when using the converter in electrical applications drive systems, especially those with synchronous machines, is the start-up or shutdown state of the drive. This case is due to a very low output frequency Power converters up to zero Hertz and a low degree of modulation M marked. In this case, the phase current (load current) is determined by the losses in the NPC Diodes limited, which corresponds to case 2 in Table I below. Due the low output frequency may phase for a period of time with the spike value of the load current, which is sufficient to the thermally sta to reach the state. This reduces the load current that can be achieved compared to operating at high output frequencies considerably. Although this pro blem can be reduced by reducing the switching frequency at standstill can, with conventional medium voltage drives, a reduction of the load current at standstill compared to the rated current cannot be avoided. applicatio conditions such as hot and cold rolling mills typically require 200% Load torque and thus double load current when the drive is at a standstill. The fulfillment this condition consequently disadvantageously leads to a clear overdimensioning nation of the three-point NPC converter.

Table I

Critical operating points in the three-point converter

Referring to the above paper is the uneven distribution of loss a major disadvantage of the individual semiconductor components diode-clamped three-point NPC converter and like a diode-clamped Three-point NPC converter operated three-point converter with active NPC Switches. This also results in the relatively low utilization of the semiconductor components, especially the inner main switch. It must also be stated that  the possibilities of the active NPC diodes which are often installed instead of the NPC diodes Switches (with inverse diodes) to influence the distribution of losses in the half conductor components have not been used actively so far.

The invention has for its object a control and regulation method for one Three-point converter with active clamp switches of the type mentioned give that the loss distribution between the semiconductor devices of a phase component of the converter at all operating points and also when the drive is at a standstill bes evened out.

Furthermore, a device for this purpose is to be specified.

The task is related to the tax and regulation procedure in connection with the Features of the preamble according to the invention by the in the characteristics of the An solved 1 specified features.

The task is carried out with regard to the device in connection with the features of According to the invention in the characterizing part of claim 11 characteristics resolved.

The advantages that can be achieved with the invention are, in particular, that by equalizing the loss distribution between the NPC switches and the internal switches in cases 2 and 4 (motor or generator operation with a very small degree of modulation) according to Table I

• - while maintaining the output power of the converter through application Smaller semiconductor than inner main switches and active NPC switches on overall wall of semiconductors is significantly reduced or alternatively
• - With constant installed switch power, a reduced power reduction is made possible at standstill.

Furthermore, the reduction in the load on the outer main switches or Diodes in critical working points 1 and 3 (motor or generator loading driven with maximum degree of modulation) according to Table I above at the expense of in  The main switch and diodes have been reached and connected to it equalization of the loss distribution between the NPC switches and the inner switches in cases 2 and 4 - will increase the output power of the converter (increase in the power yield) or an increase in the switching frequency achieved without increased effort on semiconductor devices.

Further advantages are evident from the description below.

Advantageous embodiments of the invention are characterized in the subclaims net.

The invention is described below with reference to the embodiment shown in the drawing Examples explained. Show it:

Fig. 1 shows a three-point NPC converter with active NPC switches (prior art),

Fig. 2, 3 interest current waveforms at commutation,

Fig. 4 switching signals for the commutation with a positive modulation from input voltage,

Fig. 5 switching signals for the commutation at a negative modulation from output voltage,

Fig. 6 is a block diagram of an additional component for conventional control / regulation of a three-point NPC converter.

To explain the mode of operation of the control and regulating method according to the invention rens is supposed to focus on the differences between the possible states in one conventional three-point NPC converter without active clamp switch or without ak tive use of existing active clamp switches and a converter with active Using these NPC switches.  

Fig. 1 shows the construction of a three-point power converter with voltage intermediate circuit with active NPC switches (prior art), as already explained in the introduction. To modulate the output voltage, the AC-side connection of each phase is connected to the positive DC link rail (positive DC voltage connection), the zero point (center tap) or the negative DC link rail (negative DC voltage connection). These three states are labeled "+", "0" and "-". In the conventional three-point NPC converter, there is exactly one combination of switch positions for each of these three states, which are summarized in Table II below. In the "0" state, the current flows through the upper path of the center tap when the load current is positive, and the lower path when the direction is negative. Both T2 and T3 are always switched on.

Table II

Switching states in a conventional three-point NPC converter (without using the active clamp switches, state of the art)

However, if the active NPC switches are used actively, there are several alternatives Switch positions for realizing the state "0". The load current can pass through switching on T5 and T2 in both directions through the upper path of the Mit Tapping or by switching on T6 and T3 through the lower path of Funds are tapped. These states are subsequently identified with "0o2" (for the upper path) or "0u2" (for the lower path). With the one switching of T5 and T2 (T3 and T6 are or are switched off and can each because half the DC link voltage can block) T4 after commutation from "-" to "0o2" remain in the switched on state. The same applies to the Switch T1 after commutation from "+" to "0u2". These conditions are in the hereinafter referred to as "0o1" (for the upper path) and "0u1" (for the lower path). Furthermore, the conventional state is of course "0" as in the table above II switchable and there is the possibility to switch on T2, T3, T5 and T6 at the same time. In this case, the division of the current between the upper and lower path is the  Central tapping through parasitic elements, the dispersion of semiconductor properties as well as the temperature dependence of the semiconductor properties (e.g. the transmission voltage) determined. Both of the latter switching states are no longer be seeks.

For the "+" and "-" states, active use results in the active NPC switches are no alternatives. The total of six available Switching states are summarized in Table III below.

Table III

Switching states in the three-point converter using the active NPC switches

Obviously, with the targeted selection of the upper or lower NPC path Distribution of the routing losses during the "0" state can be influenced. The Leitver however, losses in the "+" and "-" states cannot be influenced. The commutation conditions to or from the new states determine the distribution of switching losses all semiconductors.

All commutations take place between two components. Even if several Switch are switched, significant losses always fall only in an active Switch and an inverse diode. The other switches switch in principle without Ver loss because they either do not carry any current before or after commutation or do not Accept reverse voltage.

The following are the four types of commutations of the proposed control procedure of conventional commutation in a three-point NPC converter compared and their influence on the distribution of losses explained. exemplary becomes a positive load current and the modulation of a positive output span  considered. The bridge branch is between the positive DC voltage rail (state "+") and the center tap (zero state or "0") there and back connected.

The conventional commutation "+" ↔ "0" is first considered below. Without active inclusion of the active NPC switches, the load current commutates between T1 and D5. Outer main switch T1 and inner main switch T3 are alternately switched on and off, while T2 and T4 remain in the on and off state. Switching losses occur in T1 and D5 (see also Fig. 2).

The commutation “+” ↔ “0o2” proposed according to the invention, in which the NPC switches are actively included, is considered below. The load current is specifically commutated to the upper path of the center tap, regardless of the direction of the current. To do this, T6 is first opened (switched off), which is preferably switched on in the "+" state. Then T1 is switched off and the terminal switch T5 is switched on, taking into account the required dead time, ie after commutation of the current. When commutating back to "+", the inverse switching operations take place in reverse order. As with conventional commutation, switching losses occur in T1 and D5 (see Fig. 2).

The commutation "+" ↔ "0u2" is considered below. Regardless of the direction of the current, the load current is specifically commutated to the lower path of the center tap by first switching off T1 and, taking into account the dead time, switching on the inner main switch T3 and then also opening T2. First, the load current will be distributed across the top and bottom paths of the center tap. The current in the upper path commutates to the already conductive lower path when T2 is opened. In the case of reverse commutation, T2 is closed first and then T3 is opened. When T1 is switched on, the entire load current commutates from the lower path of the center tap back to the "+" path. Significant switching losses occur in T1 and D3 (see Fig. 3).

The commutation "+" ↔ "0u1" is considered below. As with the commutation "+" ↔ "0u2" described above, the load current is commutated on the lower path of the center tap regardless of the current direction. The mutation is achieved by switching off T2. T3 is switched on after the dead time, T1 remains switched on. When commutating back to "+", the inverse switching operations take place in reverse order. Switching losses arise in each case in T2 and D3 (see Fig. 3).

With the use of commutation "+" ↔ "0u2" can be compared to commutation "+" ↔ "0o2" and the conventional commutation the switching losses from the Shift the NPC diode D5 to the inner inverse diode D3. With the use of commu "+" ↔ "0u1", the shaft losses can also be obtained from the outer switch T1 shift to the inner switch T2.

The commutation "+" ↔ "0o1" is considered below. This commutation is equivalent to the commutation "+" ↔ "0o2" and is only in the direction "0o1" → "+" used if the bridge branch after a modulation of a negative Output voltage is in the "0o1" state, followed by the "+" state is arranged. To do this, first open T4 and then continue as with commutation Move "0o2" → "+". Switching losses occur in T1 and D5.

The commutations between the "-" state and the various zero states are equivalent to the commutations described above. With a negative load current, the losses compared to the case of the positive load current occur in the parallel parallel semiconductor. Table IV below shows the lossy semiconductors for all commutations. The switching signals to be supplied to the semiconductor switches for the commutations when modulating a positive output voltage are shown in FIG. 4, while FIG. 5 shows the switching signals to be supplied to the semiconductor switches when modulating a negative output voltage.

Table IV

Switching losses for commutations in the three-point converter with active use of the active NPC switches

Through the targeted use of all of the commutations described above, it is possible the losses (and thus the junction temperatures) of two switch groups each to get closer to each other. At maximum load on external semiconductor components large degree of modulation (cases 1 and 3 according to Table I above) are appropriate selection of the zero states the junction temperatures of the outer and the inner semiconductor or main switch approximated. The junction temperature The NPC switch is at a lower level. At maximum bela The NPC diodes or the internal semiconductor switches with a low degree of modulation (Cases 2 and 4 according to Table I above) are selected by selecting the zero the junction temperatures of the NPC and internal semiconductors are mutually exclusive approximated. The junction temperature of the outer semiconductors or main lies here switches at a lower level.

The function explained above is achieved by regulating the junction temperature the semiconductor components or a control and regulation system, which is the loss and hence the junction temperature of all semiconductor devices  elements continuously determined from the switching commands of the superimposed current judge control (PWM, DTC) and information about the junction temperatures selects suitable switching states ("0o2", "0o1", "0u1" or "0u2") and uses them required control signals for the semiconductor switch generated. The control system with the active inclusion of the active clamp switch is only an additional compo conventional control of the three-point converter and replaces itself understandable not the modulator of a pulse width modulation (PWM) or the controller a direct regulation.

A block diagram of the proposed system is shown in FIG. 6. A modulator 1 (PWM or Pulse Width Modulation or DTC or Direct Torque Control) supplies 2 switching status commands (setpoints) to a temperature controller + automatic control. This temperature regulator and automatic drive 2 are the Sperrschichttemperatu reindeer of all the semiconductors and the load currents i _{PHU, PHV} i, i _PHW ago. The commutation processes and zero states are selected in the temperature controller in accordance with an optimal junction temperature distribution of the semiconductors. The automatic control system realizes the output of the required control signals for all semiconductor switches, taking into account the switching sequence during commutation.

The temperature controller + automatic control unit 2 outputs control signals for all semiconductor switches (outer main switch, inner main switch, NPC switch) on the output side. These control signals are further fed to an input of an on-line calculation 3 of the switching and control losses. On the input side, the on-line calculation 3 also _{supplies the junction temperatures of} all semiconductors, the intermediate _{circuit voltage} V _dc / 2, the load currents i _phU , i _phV , i _phW and the signals of a member 5 in which semiconductor loss approximations are stored.

The output signal of the on-line calculation 3 arrives at an on-line calculation 4 of the junction temperatures of all semiconductors, which receives the current coolant temperature of the semiconductors and signals of a thermal converter model 6 on the input side. The online calculation 4 outputs the junction temperatures of all semiconductors on the output side.

In Table V below, a method is given as an example suitable for the selection of the commutation processes. It is both for use with a PWM as well as with direct control methods such as Direct Torque Control (DTC) or Suitable for direct self-regulation (DSR). It ensures that always the same semiconductor the currently highest junction temperature during the following commutation is burdened with switching losses. The leading losses of the semiconductors are in this way election process not considered. For the usual case that the routing losses alone do not lead to the heating of a semiconductor to the maximum junction temperature, This process ensures that the junction temperature is as uniform as possible distribution.

Table V

Decision board for commutations in the zero state

An improvement of the above procedure is achieved by including the In the upcoming zero state, the expected conductor losses of the semiconductors in the stationary Operation reached in the calculation. When used in a PMW, the duration of the fol known zero state when using a direct control method, such as for example DTC, the duration of which can be calculated in advance from the machine model  become. The type of commutation in the zero state can thus be selected such that the highest occurring after commutation and the subsequent zero state The junction temperature of a semiconductor is minimal.

The proposed control method creates greatest advantages in circuits where the semiconductors work at the limit of their thermal performance, but in the Are able to switch higher currents on and off, as is the case with IGBTs in the general is the case. Then the method increases the out output power of the converter without increased effort on semiconductor components achieved. Are the active NPC switches already installed, such as IGBT modules, who but the method is particularly useful if it is not actively used. The procedure is but also useful for converters where the active NPC switch is also on have to be built because this additional effort compared to the achievable climb The output power of the converter is small. Work the used half conductor already at the limit of its maximum permissible current that can be switched off, so that An increase in the output power is out of the question when using the proposed control method an increase in the switching frequency of the converter oh ne increased expenditure on semiconductor elements possible. The second goal, the reduction the necessary power reduction at low fundamental frequencies also reached.

It can be seen from Table III discussed above that the NPC switches are always switched on when in the conventional three-point NPC converter without active NPC switches, the corresponding NPC diodes clamp the voltage across the outer switches to V _dc / 2, ie in the "+" state T6 is switched on and in the "-" state T5 is switched on. In contrast to the conventional three-point NPC converter without active NPC switch, the even voltage distribution between T3 and T4 in the "+" state and between T1 and T2 in the "-" state is independent of the distribution of the leakage currents of the semiconductors and guaranteed without additional passive balancing resistors. Another advantage of the method is the saving of passive components and the loss of symmetry.

The proposed method and the control device can be used in all common three point NPC converters can be implemented with active NPC switches, in which all active switches are realized by switchable semiconductor components, for. B. by IGBTs, IGCTs, MCTs, MTOs, MOSFETs or silicon carbide (SiC) components in the such as medium voltage converters for industrial applications, traction or HVDC Light.

Claims (13)

1.Control and regulation procedure for a single or multi-phase three-point converter connected to a DC link, with two main switches (T1, T2, T3, T4) / inverse diodes (D1, D2, D3, D4) in series between each DC voltage connection and each load connection, the common connection point of the two inner main switches (T2, T3) forming the load connection and wherein between each common connection point an inner (T2, T3) with an outer main switch (T1, T4) and the center tap of the DC intermediate circuit is an active clamp switch (T5, T6) with an inverse diode (D5, D6), whereby two possible paths for connecting a load connection to the center tap are formed, characterized in that, regardless of the direction of the load current, at least one of the two active clamp switches (T5, T6) together with at least one inner main switch (T2, T3) for connecting a load connection to the Center tap is turned on to direct the current during a zero state through the upper, the lower or both paths of the center tap. 2. Control and regulating method according to claim 1, characterized in that that a commutation of one of the outer - positive or negative - equals Voltage connections to the middle DC voltage connection or the Mittelan tapping takes place in such a way that first the outer main switch (T1, T4) that with the relevant external DC voltage connection is directly connected is switched and that after a dead time the active clamp switch (T5, T6) is switched on in the same half of the bridge. 3. Control and regulating method according to claim 1, characterized in that a commutation of one of the outer - positive or negative - equals Voltage connections to the middle DC voltage connection or the Mittelän tapping takes place in such a way that first the outer main switch (T1, T4) that with  the relevant external DC voltage connection is directly connected is switched that after a dead time the inner main switch (T2, T3) in the other half of the bridge is turned on and that after another dead time the that inner main switch (T2, T3), which is in the same half of the bridge as the external main switch (T1, T4) is switched off, is switched off. 4. Control and regulating method according to claim 1, characterized in that a commutation of one of the outer - positive or negative - equals Voltage connections to the middle DC voltage connection or the Mittelan tapping takes place in such a way that first the inner main switch (T2, T3) with the relevant external DC voltage connection via an external main Switch (T1, T4) is connected, is turned off and then after a Dead time of the inner main switch (T2, T3) switched on in the other half of the bridge becomes. 5. control and regulating method according to one of the preceding claims, characterized in that the activation of the active clamp switches (T5, T6) in Dependence of the current thermal load on the semiconductors (T1 to T6, D1 to D6) takes place. 6. Control and regulating method according to claim 5, characterized in that that the activation of the active clamp switches (T5, T6) takes place in such a way that always ner semiconductor (T1 to T6, D1 to D6) with the currently highest junction temperature switching commutation is not burdened with switching losses. 7. Control and regulating method according to claim 6, characterized in that that from the switching status commands of a superimposed converter control, the Phase currents and the junction temperatures of the semiconductors (T1 to T6, D1 to D6) the control signals for the semiconductor switches (T1 to T6) are formed, which the Take into account the current thermal load on the semiconductors. 8. Control and regulating method according to claim 7, characterized in that that the junction temperatures of those semiconductors (T1 to T6, D1 to D6) coexist  are compared, which depend on the voltage to be modulated and the direction of the load current to zero at the next commutation stood potentially with switching losses and that the next zero state is selected so that that of the compared semiconductors (T1 to T6, D1 to D6) with the highest junction temperature during the following commutation is burdened with switching losses. 9. Control and regulating method according to claim 7 or 8, characterized records that an on-line calculation of switching and control losses depending the control signals, the intermediate circuit voltage, the phase currents, the junction temperatures and loss approximations of the semiconductors (T1 to T6, D1 to D6) he follows. 10. Control and regulating method according to claim 9, characterized in that an on-line calculation of the junction temperatures depending on the Switching and control losses, the coolant temperature and a thermal converter term model takes place. 11.Control and regulating device for a single or multi-phase three-point converter connected to a DC voltage intermediate circuit, with two main switches (T1, T2, T3, T4) / inverse diodes (D1, D2, D3, D4) in series between each DC voltage connection and each load connection, the common connection point of the two inner main switches (T2, T3) forming the load connection and wherein between each common connection point of an inner (T2, T3) with an outer main switch (T1, T4) and the center tap of the DC voltage intermediate circuit is an active clamp switch (T5, T6) with an inverse diode (D5, D6), which forms two possible paths for connecting a Lastanschlus ses with the center tap, characterized in that a temperature controller + control device ( 2 ) is provided, which from the switching status commands of a modulator ( 1 ), the phase currents and the junction temperatures of the semiconductors (T1 to T6, D1 to D6) forms control signals for the semiconductor switches (T1 to T6). 12. Control and regulating device according to claim 11, characterized in that a first on-line calculation ( 3 ) on the input side, the control signals for the semiconductor switches (T1 to T6), the junction temperatures of the semiconductors (T1 to T6, D1 to D6) , the phase currents, the intermediate circuit voltage and the signals of a member ( 5 ), in which semiconductor loss approximations are stored, received and outputs switching and control losses calculated on the output side. 13. Control and regulating device according to claim 12, characterized in that a second on-line calculation ( 4 ) on the input side, the signals of the first on-line calculation ( 4 ), the coolant temperature and signals of a thermal power converter model ( 6 ) receives and outputs the junction temperatures of the semiconductors (T1 to T6, D1 to D6) on the output side.