CN206865369U - Three level multiple-pulses export transformerless inverter circuit - Google Patents
Three level multiple-pulses export transformerless inverter circuit Download PDFInfo
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- CN206865369U CN206865369U CN201720656890.0U CN201720656890U CN206865369U CN 206865369 U CN206865369 U CN 206865369U CN 201720656890 U CN201720656890 U CN 201720656890U CN 206865369 U CN206865369 U CN 206865369U
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- Y02E10/56—Power conversion systems, e.g. maximum power point trackers
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Abstract
The utility model provides a kind of three level multiple-pulses output transformerless inverter circuit, comprising：Power frequency link, high frequency link, filtering link；Power frequency link includes two DC capacitors, four switching tubes；High frequency link is made up of multiple high frequency link units；Each high frequency link unit includes two switching tubes；Filtering link includes multiple filter inductances and a filter capacitor, the corresponding filter inductance of each high frequency link unit.The utility model is directed to Transformer-free grid-connected photovoltaic inverter, it is proposed that a new direct current is converted into the circuit of exchange, and it is three level pulses that multichannel is interlocked that can realize every contrary variable voltage output, so as to reduce output inductor and electric capacity；The utilization rate of low frequency power switching device is improved simultaneously, reduces electromagnetic interference and the switching loss of device for power switching；Higher transformation efficiency, power density and lower cost are realized, is relatively easy to expand system power capacity.
Description
Technical field
The utility model belongs to new energy grid-connected power technical field, is related to a kind of DC voltage and is converted into alternating voltage
Circuit, more particularly to a kind of three level multiple-pulses output transformerless inverter circuit.
Background technology
Important component of the solar power generation as new energy, obtains increasing development.In solar power generation system
In system, DC conversion that solar panel is sent for alternating current inversion change-over circuit as solar power system
Core, there is very important effect.
Solar energy system can be generally divided into self and grid type, and the latter is due to can farthest utilize solar energy
The energy that cell panel is sent, therefore be the main application type of current photovoltaic system.Inverter topology can totally be divided into band and become
Depressor is isolated and Transformer-free.Isolating transformer can realize the effect of isolation and boosting, but Industrial Frequency Transformer volume weight, effect
Rate is low, cost is high, installation inconvenience；Although high frequency transformer volume and weight declines, often system complex, and output current
DC component be present, efficiency is similarly relatively low；Inverter without transformer due to system architecture is simple, efficiency high, small volume and
The low acquisition of cost quickly development, turn into the main flow of grid-connected photovoltaic power generation.
At present, three-level inverter circuit topology is widely used in three-phase Transformer-free combining inverter.With respect to two electricity
Flat topology, has lower power switching voltage, lower high frequency common mode voltage, so as to reduce switching loss and filtered electrical
Sense, improves conversion efficiency and power density.But device for power switching all works in HF switch state, device for power switching
Performance optimization still relative difficulty, utilization rate is relatively low, limits the further raising of inverter conversion efficiency and power density.
Active neutral-point-clamped three-level inverter circuit topology, can by Partial Power switching tube low frequency switch, so as to
The on state characteristic and switching characteristic of selection device for power switching is separately optimized, further increases conversion efficiency and power density.
But the ON time utilization rate of low frequency power switching tube only has about 50%, and the parallel current-sharing of high frequency power switching tube is relatively tired
Difficulty, cause the maximum power capabilities rather low-frequency power switch pipe of high frequency power switching tube low, limit the peak power of system
Capacity.
Relatively single inverter circuit, interleaving technique can reduce filter inductance and filter capacitor, while be easier to carry
High power system capacity.Based on interleaving technique, using magnetic coupling inductance, it can also further reduce the volume and again of filter inductance
Amount, optimize inverter performance.But the service behaviour and utilization rate of device for power switching can not be improved.
Three-level inverter circuit is widely used in three-phase Transformer-free combining inverter.With two level inverter circuit phases
Than inductance small volume, conversion efficiency and power density are higher.At present, three-phase Transformer-free combining inverter uses I types more
The T-shaped three-level inverter circuit topology of three-level inverter circuit topological sum.Classical T-shaped three electricity of I types three-level inverter circuit topological sum
Each power switch pipe in flat inverter topology, works in HF switch state in half of power frequency period, half in addition
Constant conduction state is worked in power frequency period.The design selection of power switch pipe needs to take into account switching characteristic simultaneously and conducting is special
Property, the optimization switched with conduction loss can not be realized.
In active neutral-point-clamped three-level inverter circuit topology, four low frequency power switching tube power frequency switches, two height
Frequency switching tube HF switch, so as to which on state characteristic and switching characteristic is separately optimized, further increases conversion efficiency and work(
Rate density.But four low frequency power switch device conductive time availabilities only have 50%, and the parallel connection of high frequency power switching tube is
Relative difficulty is flowed, causes the maximum power capabilities rather low-frequency power switch pipe of high frequency power switching tube low, limits system
Maximum power capabilities, hinder the further lifting of conversion efficiency and power density.
Traditional three-phase inverting circuit topology only exports a row pulse voltage per phase.It is every mutually to make using interleaving technique
Multiple pulse trains in parallel are exported with multiple inverter circuit crisscross parallels, filter element utilization rate can be improved, reduce filtering
Inductance and filter capacitor, it is also relatively easy to improve system power capacity.But the utilization rate of device for power switching does not improve, hinder
The lifting of power density.
Utility model content
The technical problems to be solved in the utility model is how to reduce the output that DC voltage is converted into alternating voltage circuit
Filter inductance and electric capacity, the utilization rate of low frequency power switching device is improved, reduce the switching loss of device for power switching, realized more
High transformation efficiency, power density and lower cost.
In order to solve the above-mentioned technical problem, the technical solution of the utility model is to provide a kind of three level multiple-pulses output nothing
Transformer type inverter circuit, it is characterised in that：Comprising：Power frequency link, high frequency link, filtering link；
Power frequency link includes two DC capacitor C1~C2, four 1~T4 of switch transistor T；High frequency link is by n high frequency link
Unit is formed, and n is the positive integer not less than 2；Each high frequency link unit includes two switch transistor Ts x1, Tx2, and x is high frequency link
Element number, x=1,2 ... n；Filtering link includes n filter inductance Lf1, Lf2 ..., Lfn and filter capacitor Cf, often
The corresponding filter inductance of individual high frequency link unit；
In power frequency link, the electric capacity C1 anode of one end connection direct voltage source and one end of switch transistor T 1, it is designated as " 1 "；
The electric capacity C1 other ends are connected to electric capacity C2 one end, one end of switch transistor T 2, one end of switch transistor T 3, are designated as " 0 "；Electric capacity C2's
The other end is connected to the negative terminal of direct voltage source, one end of switch transistor T 4, is designated as " 2 "；Switch transistor T 1 and the series connection of switch transistor T 2 end
It is designated as " 3 ", switch transistor T 3 and the series connection of switch transistor T 4 end are designated as " 4 "；
In high frequency link, including n high frequency link unit, each high frequency link unit, switch transistor T x1 and Tx2 series connection,
Series connection end is designated as " x5 "；The switch transistor T x1 other end is connected to power frequency link switch transistor T 1, T2 series connection end " 3 ", switching tube
The Tx2 other end is connected to power frequency link switch transistor T 3, T4 series connection end " 4 "；
In link is filtered, including a n filter inductance Lf1~Lfn and filter capacitor Cf；The one of filter inductance Lfx
End is connected to the series connection end " x5 " of high frequency link unit x switch transistor T x1, Tx2, and the Lfx other end is connected to filter capacitor Cf
One end and the phase line Lg of power network be designated as " 6 "；Filter capacitor Cf one end of a termination inductance Lf1~Lfn and the phase line of power network
Lg " 6 ", filter capacitor Cf another termination DC capacitor C1, C2 series connection end " 0 ".
Preferably, the 1~T4 of switch transistor T, switch transistor T x1, switch transistor T x2 are anti-by internal band and the switch of diode is brilliant
Body pipe forms.
Preferably, the 1~T4 of switch transistor T, switch transistor T x1, switch transistor T x2 by inside opening without anti-paralleled diode
Formed after closing transistor and separate diode inverse parallel.
Preferably, the 1~T4 of switch transistor T, switch transistor T x1, switch transistor T x2 switch crystal by same type or different type
Formed after pipe parallel connection.Switching tube is also likely to be the parallel combination of various switching devices.As IGBT is in parallel with MOSFET；Multiple IGBT
It is in parallel；Multiple MOSFET are in parallel；IGBT and MOSFET, diodes in parallel etc..
Preferably, the 1~T4 of switch transistor T, switch transistor T x1, switch transistor T x2 are that IGBT is managed or MOSFET is managed.
Preferably, the 1~T4 of switch transistor T, switch transistor T x1, switch transistor T x2 managed by IGBT, MOSFET pipe, diode simultaneously
Formed after connection.Such as：IGBT is in parallel with MOSFET；Or IGBT and MOSFET, diodes in parallel, it is two kinds of conventional parallel combinations.
Preferably, the filter capacitor Cf is single electric capacity, or the combination that multiple electric capacity are in parallel.
Preferably, the filter inductance Lf1~Lfn is separate inductor, or magnetic coupling each other be present using integrated magnetic
The inductance of conjunction.
Preferably, each electric capacity C1, C2 of the power frequency link are single electrochemical capacitor or thin-film capacitor, or multiple electrolysis
Electric capacity or the combination of thin-film capacitor parallel connection, or the combination that electrochemical capacitor is in parallel with thin-film capacitor.
Preferably, 1~T4 of the power frequency link switch transistor T switchs according to electric network voltage phase power frequency, and wherein T1 and T3 is same
Step switch, T2 and T4 synchro switches, T1, T3 and T2, T4 complementary switch；
High frequency link switch transistor T x1, Tx2 is according to line voltage and the needs of power factor according to power network sine wave modulation
Pulse width HF switch switches；A pair of switches pipe Tx1, Tx2 complementary switch of wherein each high frequency link unit；Each high frequency link
Without special timing requirements between switching tube, but switching time mutually staggers, and makes wave filter volume weight minimum.
Preferably, in the positive half period of power network, power frequency link switch transistor T 1, T3 are open-minded, T2, T4 shut-off；Direct voltage source
Output voltage Vdc half 0.5Vdc be applied directly on high frequency link, moved by the HF switch of high frequency link switching tube
Realize conversion of the direct current to alternating voltage.
Preferably, in the negative half-cycle of power network, power frequency link switch transistor T 1, T3 shut-offs, T2, T4 are open-minded；Direct voltage source
Output voltage Vdc half -0.5Vdc be applied directly on high frequency link, moved by the HF switch of high frequency link switching tube
Realize conversion of the direct current to alternating voltage.
The utility model is directed to Transformer-free grid-connected photovoltaic inverter, it is proposed that a new direct current is converted into exchange
Circuit, can realize every contrary variable voltage output be multichannel interlock three level pulses, so as to reduce output inductor and
Electric capacity；The utilization rate of low frequency power switching device is improved simultaneously, reduces electromagnetic interference and the switch damage of device for power switching
Consumption；Higher transformation efficiency, power density and lower cost are realized, is relatively easy to expand system power capacity.
Brief description of the drawings
Fig. 1 is that three level multiple-pulses export transformerless inverter circuit structural representation；
Fig. 2 is the three-phase inverter schematic diagram that transformerless inverter circuit composition is exported using three level multiple-pulses；
Fig. 3 is each switching tube drive signal schematic diagram in translation circuit；
Fig. 4 a are the active circuit diagram of positive half cycle；
Fig. 4 b are the idle continuous current circuit schematic diagram of positive half cycle；
Fig. 5 a are the active continuous current circuit schematic diagram of positive half cycle；
Fig. 5 b are the idle circuit diagram of positive half cycle；
Fig. 6 a are the active circuit diagram of negative half period；
Fig. 6 b are the idle continuous current circuit schematic diagram of negative half period；
Fig. 7 a are the active continuous current circuit schematic diagram of negative half period；
Fig. 7 b are the idle circuit diagram of negative half period；
Fig. 8 is the level voltage schematic diagram of inversion output multi-channel three；
Fig. 9 is different type switching transistor parallel combination schematic diagram；
Figure 10 is that power frequency link uses the small IGBT of Large Copacity conduction loss to use switch as switching device, high frequency link
The less MOSFET of small but capacity is lost as switching device schematic diagram；
Figure 11 is the schematic diagram that filter inductance Lf1, Lf2 ... Lfn are a magnetic coupling inductance；
Figure 12 is that filter inductance Lf1, Lf2 are a magnetic coupling inductance in the same direction, and Lf3, Lf4 are a magnetic coupling inductance in the same direction
Schematic diagram；
Figure 13 is that filter inductance Lf1, Lf2 are a reverse magnetic coupling inductance, and Lf3, Lf4 are a reverse magnetic coupling inductance
Schematic diagram.
Embodiment
With reference to specific embodiment, the utility model is expanded on further.
The utility model provides the circuit that a kind of direct current is converted into exchange, available for solar grid-connected generating.Such as Fig. 1 institutes
Show, the input of the circuit is solar generator SG, and output end is AC network Ug.It includes three links, is work respectively
Frequency link, high frequency link, filtering link.
Wherein, high frequency link circuit is made up of 2~n high frequency link unit, and n is setting value, and actual quantity can basis
Design it needs to be determined that.Power frequency link includes two DC capacitor C1~C2, four 1~T4 of switch transistor T.Each high frequency link unit
Including two switch transistor Ts x1, Tx2, wherein x is high frequency link element number, x=1,2 ....Filtering link includes multiple filtering
Inductance Lf1, Lf2 ..., Lfn and filter capacitor Cf, wherein the corresponding filter inductance of each high frequency link unit.
In power frequency link, electric capacity C1~C2 is sequentially connected in series, and 1~T4 of switch transistor T is sequentially connected in series.Wherein, electric capacity C1 one end
Solar generator SG anode and one end of switch transistor T 1 are connected to, is designated as " 1 "；The electric capacity C1 other ends are connected to electric capacity C2's
One end, one end of switch transistor T 2, one end of switch transistor T 3 are designated as " 0 ".Electric capacity C2 one end is connected to C1 one end, switch transistor T 2
One end, one end of switch transistor T 3, i.e. " 0 "；The electric capacity C2 other end is connected to solar generator SG negative terminal, switch transistor T 4
One end, be designated as " 2 ".Switch transistor T 1 and the series connection of switch transistor T 2 end are designated as " 3 ", and switch transistor T 3 and the series connection of switch transistor T 4 end are designated as
" 4 ", the other end connection solar generator SG anode of switch transistor T 1 and electric capacity C1 one end " 1 ", the T4 other end connect
Solar generator SG negative terminal and electric capacity C2 one end " 2 " are connect, switch transistor T 2, T3 series connection end connect electric capacity C1, C2
Connect end " 0 ".
Two electric capacity C1, C2 series connection, and it is in parallel with solar generator SG, when solar generator SG output voltage
For Vdc when, the voltage on electric capacity C1, C2 is 0.5Vdc.A reference potential can be set, series connection end " 0 " is designated as " 0V ",
Then electric capacity C1 anodes " 1 ", C2 negative terminals " 2 " are respectively+0.5Vdc and -0.5Vdc relative to the voltage of 0V points.
In high frequency link, including 2~n high frequency link unit.In each high frequency link unit, switch transistor T x1 and Tx2
Series connection, series connection end are designated as " x5 ", and the Tx1 other end is connected to power frequency link switch transistor T 1, T2 series connection end " 3 ", and Tx2's is another
End is connected to power frequency link switch transistor T 3, T4 series connection end " 4 ".
In link is filtered, including 2~n filter inductance Lf1, Lf2~Lfn and filter capacitor Cf.Filter inductance
Lfx one end is connected to the series connection end " x5 " of high frequency link unit x switch transistor T x1, Tx2, and the Lfx other end is connected to filtering
Electric capacity Cf one end and the phase line Lg of power network are designated as " 6 ".Filter capacitor Cf termination inductance Lf1~Lfn one end and power network
Phase line Lg " 6 ", another termination DC capacitor C1, C2 series connection end " 0 ".
Shown in Fig. 2, three contraries of transformerless inverter circuit composition are exported for three proposed level multiple-pulses of application
Become device schematic diagram, three described level multiple-pulses output inverter without transformer, according to electric network voltage phase and power because
The difference that number is set, in positive and negative grid cycle, power frequency link respectively has two kinds of groundwork states, and high frequency link unit respectively has
Two kinds of groundwork states.
It is succinct to describe, the working condition of circuit is discussed in detail by taking two high frequency link units as an example, but in practical application
It can use according to the design needs with more high frequency link units.
In a grid cycle, the sequential of the driving pulse of each switching tube as shown in Figure 3, wherein T1~T4, T11,
T12, T21, T22 represent 1~T4 of switch transistor T, T11, T12, T21, T22 driving pulse respectively.If high frequency link switching tube is opened
The pass cycle is Ts.Power frequency 1~T4 of link switch transistor T switchs according to electric network voltage phase power frequency, wherein T1 and T3 synchro switches, T2
With T4 synchro switches, T1, T3 and T2, T4 complementary switch.High frequency link switch transistor T 11, T12, T21, T22 according to line voltage and
The needs of power factor switch according to the pulse width HF switch of power network sine wave modulation.The one of wherein each high frequency link unit
Switch tube Tx1, Tx2 complementary switch, such as T11, T12 complementary switch, T21, T22 complementary switch.Each high frequency link switching tube
Between without special timing requirements, but the switching time Ts/N that mutually staggers can realize staggeredly complementary switch, improve filter circuit
Utilization rate.
(1) working condition of positive half period
In the positive half period of power network, as shown in positive half period in Fig. 3.Power frequency link switch transistor T 1, T3 are open-minded, and T2, T4 are closed
It is disconnected.The half of solar generator SG output voltage ,+0.5Vdc are applied directly to high frequency link 1, on high frequency link 2.Pass through
The switch transistor T 11 of high frequency link 1, T12, the HF switch action (such as 30kHz) of the switch transistor T 21 of high frequency link 2, T22, realize straight
Flow to the conversion of alternating voltage.
State 1：
When high frequency link switch transistor T x1 is opened, Tx2 is turned off, electric current holds outflow from electric capacity C1 " 1 ", successively by power frequency
Switch transistor T 1, HF switch pipe Tx1, inductance Lfx, power network Ug, filter capacitor Cf, electric capacity C1 " 0 " end is then flowed into again, this
When inverter output voltage Vinv (voltage between high frequency link output end " x5 " and reference point 0) be 0.5Vdc.Export active
Current direction is shown in Fig. 4 a during electric current, and current direction is shown in Fig. 4 b when exporting reactive current.
State 2：
When high frequency link switch transistor T x1 shut-offs, Tx2 are opened, because inductive current can not be mutated, electric current is from electric capacity C1's
The outflow of " 0 " end, successively through power frequency switch transistor T 3, HF switch pipe Tx2, inductance Lfx, power network Ug, filter capacitor Cf, then flows again
Enter " 0 " end to electric capacity C1, now the inverter output voltage Vinv (electricity i.e. between high frequency link output end " x5 " and reference point 0
Pressure) be 0Vdc, current direction is shown in Fig. 5 a during output watt current, and current direction is shown in Fig. 5 b during output reactive current.
Each high frequency link unit in high frequency link, working condition is independent, therefore according to the quantity of high frequency link unit, this electricity
Road maximum may have 2 " kind working conditions.
By high frequency link unit in two kinds of working conditions of positive half period, realize multiple-channel output inverter voltage pulse and exist
Switching between 0V, 0.5Vdc, and the switching time of each high frequency link unit can mutual wrong Ts/N.
(2) working condition of negative half-cycle
In the negative half-cycle of power network, as shown in negative half-cycle in Fig. 3.Power frequency link switch transistor T 1, T3 shut-offs, T2, T4 are opened
It is logical.The half of solar generator SG output voltage, -0.5Vdc are applied directly to high frequency link 1, on high frequency link 2.Pass through
The switch transistor T 11 of high frequency link 1, T12, the HF switch action (such as 30kHz) of the switch transistor T 21 of high frequency link 2, T22, realize straight
Flow to the conversion of alternating voltage.
State 1：
When high frequency link switch transistor T x1 shut-offs, Tx2 are opened, electric current holds outflow from electric capacity C2 " 2 ", successively by power frequency
Switch transistor T 4, HF switch pipe Tx2, inductance Lfx, power network Ug, filter capacitor Cf, electric capacity C2 " 0 " end is then flowed into again, this
When inverter output voltage Vinv (voltage between high frequency link output end " x5 " and reference point 0) be -0.5Vdc.Export active
Current direction is shown in Fig. 6 a during electric current, and current direction is shown in Fig. 6 b when exporting reactive current.
State 2：
When high frequency link switch transistor T x1 is opened, Tx2 is turned off, because inductive current can not be mutated, electric current is from electric capacity C2's
The outflow of " 0 " end, successively through power frequency switch transistor T 2, HF switch pipe Tx1, inductance Lfx, power network Ug, filter capacitor Cf, then flows again
Enter " 0 " end to electric capacity C2, now the inverter output voltage Vinv (electricity i.e. between high frequency link output end " x5 " and reference point 0
Pressure) be 0Vdc, current direction is shown in Fig. 7 a during output watt current, and current direction is shown in Fig. 7 b during output reactive current.
Each high frequency link unit in high frequency link, working condition is independent, therefore maximum according to the quantity of high frequency link unit
There may be 2nKind working condition.
By high frequency link unit in two kinds of working conditions of negative half-cycle, realize multiple-channel output inverter voltage pulse and exist
Switching between 0V, -0.5Vdc, and the switching time of each high frequency link unit can mutual wrong Ts/N.
So in a grid cycle, each high frequency link unit inverter output voltage include -0.5Vdc, 0V,
Tri- voltage class of 0.5Vdc, inverter voltage waveform is as shown in Figure 8.In the circuit, high frequency link inverter output voltage waveform is
Three level of multichannel crisscross parallel, harmonic content is few, and required filtering inductance is small, advantageously reduces system cost and power damage
Consumption.
Such as above state description, power frequency link switch transistor T 1, T2, T3, T4 power frequencies switches, can emphasis optimization switching tube lead
General character energy, the more preferable switching device of prioritizing selection on state characteristic.Each high frequency link cell operation state is independent, can be by parallel connection more
More high frequency links realize capacity extensions, therefore require relatively low to the conduction property of high frequency link unit switch device, and high frequency
Link switch Tx1, Tx2 HF switch all the time, thus can emphasis optimization high frequency link switching tube switch performance, prioritizing selection switch
The more preferable switching device of characteristic.The electric current of all high frequency link units flows through the power frequency switching tube of power frequency link, therefore power frequency switchs
The utilization rate of pipe is high, it is possible to achieve higher power density.
It should be understood that above-described embodiment is merely to illustrate the utility model rather than limitation the scope of the utility model.This
Outer to should be understood that after the content of the utility model instruction has been read, those skilled in the art can make each to the utility model
Kind change or modification, these equivalent form of values equally fall within the application appended claims limited range.It is such as following several
Change：
1st, power switch pipe can and the switching transistor of diode anti-by internal band form, or use internal without instead simultaneously
Formed after the switching transistor of di- pole pipe and separate diode inverse parallel, or it is brilliant using same type or different types of switch
Body pipe composes in parallel.Above-mentioned switching transistor can be IGBT (Insulation Gate Bipolar Transistor) or
MOSFET (Metal Oxide Semiconductor Field-effect transistor) or other switching devices.For example,
Power switch pipe can be MOSFET shown in Fig. 9 a, or IGBT shown in Fig. 9 b and separate diode inverse parallel, or Fig. 9 c institutes
Show that IGBT is in parallel with MOSFET, or IGBT is in parallel with MOSFET again with separate diode inverse parallel shown in Fig. 9 d.
It is identical with active neutral-point-clamped three-level inverter circuit topology, the high frequency link switching device in the circuit proposed
Tx1, Tx2 are optimal using high-speed switching devices such as MOSFET, SiC MOSFET, and power frequency link switching element T 1, T2, T3, T4 make
With Large Copacities such as IGBT compared with low speed switching device more preferably.Figure 10 show more preferably scheme, and power frequency link is turned on using Large Copacity
Small IGBT is lost as switching device, high frequency link uses that switching loss is small but the less MOSFET of capacity is as derailing switch
Part.
2nd, filtering link circuit can add filter capacitor Cf to form by filter inductance Lf1, Lf2 ... Lfn, can also be by filtering
Inductance Lf1, Lf2 ... Lfn are formed.Filter capacitor Cf can be the combination of single electric capacity or the parallel connection of multiple electric capacity.Filtering
Inductance Lf1~Lfn can be that separate inductor can also magnetic-coupled inductance each other be present using integrated magnetic.
Lower mask body enumerates 3 kinds of possible inductance schemes, easily direct class can release inductance quantity, inductive quantity
Different alternative solutions.
It is the scheme that filter inductance Lf1, Lf2 ... Lfn are a magnetic coupling inductance shown in Figure 11.
It is that filter inductance Lf1, Lf2 are a magnetic coupling inductance in the same direction, Lf3, Lf4 are a magnetic coupling in the same direction shown in Figure 12
Close the scheme of inductance.More magnetic coupling inductance may also be used, each magnetic coupling inductance can be by more inductives.
It is a reverse magnetic coupling inductance that Figure 13, which show filter inductance Lf1, Lf2, and Lf3, Lf4 are a reverse magnetic coupling
The scheme of inductance.It may also use more magnetic coupling inductance, each magnetic coupling inductance can be by more inductives.
3rd, " 1 ", " 2 " can also be connected to by carrying filter capacitor Cf and being connected to the one end of " 0 ", have identical filter effect.
Under some application conditions, floating after being also connected to the exchange neutral conductor, the earth or being connected with the filter capacitor Cf of other phases.
4th, each electric capacity C1, the C2 for putting forward power frequency link can be single electrochemical capacitor or thin-film capacitor or more
The combination in parallel of individual electrochemical capacitor or thin-film capacitor, can also be the electrochemical capacitor combination in parallel with thin-film capacitor.
5th, mutually wrong Ts/N is switched between high frequency link switching tube described in this circuit, is realized and is reduced filter inductance, filtering
The purpose of electric capacity, but also can synchro switch or other mutual wrong any delay switch.
6th, the input of the circuit proposed can be solar cell or other direct voltage sources.
7th, the output " 6 " of the circuit proposed can be get access to grid or other load.
Claims (7)
1. a kind of three level multiple-pulses output transformerless inverter circuit, it is characterised in that include：Power frequency link, high frequency ring
Section, filtering link；
Power frequency link includes two DC capacitor C1~C2, four 1~T4 of switch transistor T；High frequency link is by n high frequency link unit
Form, n is the positive integer not less than 2；Each high frequency link unit includes two switch transistor Ts x1, Tx2, and x is high frequency link unit
Numbering, x=1,2 ... n；Filtering link includes n filter inductance Lf1, Lf2 ..., Lfn and filter capacitor Cf, Mei Gegao
The corresponding filter inductance of frequency link unit；
In power frequency link, the electric capacity C1 anode of one end connection direct voltage source and one end of switch transistor T 1, it is designated as " 1 "；Electric capacity
The C1 other ends are connected to electric capacity C2 one end, one end of switch transistor T 2, one end of switch transistor T 3, are designated as " 0 "；Electric capacity C2's is another
End is connected to negative terminal, one end of switch transistor T 4 of direct voltage source, is designated as " 2 "；Switch transistor T 1 and the series connection of switch transistor T 2 end are designated as
" 3 ", switch transistor T 3 and the series connection of switch transistor T 4 end are designated as " 4 "；
In high frequency link, including n high frequency link unit, each high frequency link unit, switch transistor T x1 and Tx2 series connection, series connection
End is designated as " x5 "；The switch transistor T x1 other end is connected to power frequency link switch transistor T 1, T2 series connection end " 3 ", switch transistor T x2's
The other end is connected to power frequency link switch transistor T 3, T4 series connection end " 4 "；
In link is filtered, including a n filter inductance Lf1~Lfn and filter capacitor Cf；Filter inductance Lfx one end connects
The series connection end " x5 " of high frequency link unit x switch transistor T x1, Tx2 is connected to, the Lfx other end is connected to the one of filter capacitor Cf
The phase line Lg of end and power network is designated as " 6 "；Filter capacitor Cf one end of a termination inductance Lf1~Lfn and the phase line Lg of power network
" 6 ", filter capacitor Cf another termination DC capacitor C1, C2 series connection end " 0 ".
2. one kind as claimed in claim 1 three level multiple-pulses output transformerless inverter circuit, it is characterised in that：It is described
1~T4 of switch transistor T, switch transistor T x1, switch transistor T x2 are anti-by internal band and the switching transistor of diode forms.
3. one kind as claimed in claim 1 three level multiple-pulses output transformerless inverter circuit, it is characterised in that：It is described
1~T4 of switch transistor T, switch transistor T x1, switch transistor T x2 are by inside without the switching transistor of anti-paralleled diode and independent two poles
Formed after pipe inverse parallel.
4. one kind as claimed in claim 1 three level multiple-pulses output transformerless inverter circuit, it is characterised in that：It is described
1~T4 of switch transistor T, switch transistor T x1, switch transistor T x2 are that IGBT is managed or MOSFET is managed.
5. one kind as claimed in claim 1 three level multiple-pulses output transformerless inverter circuit, it is characterised in that：It is described
Filter capacitor Cf is single electric capacity, or the combination that multiple electric capacity are in parallel.
6. one kind as claimed in claim 1 three level multiple-pulses output transformerless inverter circuit, it is characterised in that：It is described
Filter inductance Lf1~Lfn is separate inductor, or magnetic-coupled inductance each other be present using integrated magnetic.
7. one kind as claimed in claim 1 three level multiple-pulses output transformerless inverter circuit, it is characterised in that：It is described
Each electric capacity C1, C2 of power frequency link are single electrochemical capacitor or thin-film capacitor, or multiple electrochemical capacitors or thin-film capacitor it is in parallel
Combination, or the combination that electrochemical capacitor is in parallel with thin-film capacitor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720656890.0U CN206865369U (en) | 2017-06-07 | 2017-06-07 | Three level multiple-pulses export transformerless inverter circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720656890.0U CN206865369U (en) | 2017-06-07 | 2017-06-07 | Three level multiple-pulses export transformerless inverter circuit |
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| Publication Number | Publication Date |
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| CN206865369U true CN206865369U (en) | 2018-01-09 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201720656890.0U Withdrawn - After Issue CN206865369U (en) | 2017-06-07 | 2017-06-07 | Three level multiple-pulses export transformerless inverter circuit |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107134937A (en) * | 2017-06-07 | 2017-09-05 | 上海正泰电源系统有限公司 | A kind of three level multiple-pulses output transformerless inverter circuit |
| EP3726722A1 (en) * | 2019-04-18 | 2020-10-21 | Siemens Aktiengesellschaft | Interleaved power converter |
| CN112910297A (en) * | 2021-01-21 | 2021-06-04 | 山东大学 | Three-level SNPC converter system and two-stage model prediction control method |
-
2017
- 2017-06-07 CN CN201720656890.0U patent/CN206865369U/en not_active Withdrawn - After Issue
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107134937A (en) * | 2017-06-07 | 2017-09-05 | 上海正泰电源系统有限公司 | A kind of three level multiple-pulses output transformerless inverter circuit |
| CN107134937B (en) * | 2017-06-07 | 2023-07-11 | 上海正泰电源系统有限公司 | Three-level multi-pulse output transformerless inverter circuit |
| EP3726722A1 (en) * | 2019-04-18 | 2020-10-21 | Siemens Aktiengesellschaft | Interleaved power converter |
| CN112910297A (en) * | 2021-01-21 | 2021-06-04 | 山东大学 | Three-level SNPC converter system and two-stage model prediction control method |
| CN112910297B (en) * | 2021-01-21 | 2022-02-15 | 山东大学 | Three-level SNPC converter system and two-stage model prediction control method |
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