CN203645538U - Signal dither system based on switching period change - Google Patents
Signal dither system based on switching period change Download PDFInfo
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- CN203645538U CN203645538U CN201320857475.3U CN201320857475U CN203645538U CN 203645538 U CN203645538 U CN 203645538U CN 201320857475 U CN201320857475 U CN 201320857475U CN 203645538 U CN203645538 U CN 203645538U
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Abstract
The utility model discloses a signal dither system based on a switching period change. The signal dither system comprises a DC-DC switching power supply circuit, the DC-DC switching power supply circuit includes an analog-digital converter, a compensator and a pulse width modulator, the analog-digital converter is connected with the pulse width modulator through the compensator, and the system also comprises a signal dither circuit, the signal dither circuit includes an oscillator control module and an oscillator connected with the oscillator control module, an input end of the oscillator control module is connected with an output end of the compensator, and an output end of the oscillator is connected with an input end of the pulse width modulator. The signal dither system based on the switching period change enables the pulse width modulator with a relatively low resolution ratio to be used in the DC-DC switching power supply circuit, the chip area can be effectively saved, and the resolution ratio of a signal is obviously increased at the same time, and thus the signal dither system has good application prospects.
Description
Technical field
The utility model relates to signal process field, is specifically related to a kind of signal jitter system changing based on switch periods.
Background technology
Signal jitter (Dither) technology has been applied in a lot of aspects, as utilized shake (Dither) to carry out the adaptive equalization of radar antenna in control system; In digital audio vision signal, utilize shake (Dither) to reduce quantization effect; Image processing system utilization shake (Dither) signal, makes the analogue-to-digital converters (ADC) of 3 ~ 4 bit resolutions show the good image of 6 ~ 7 bit resolving accuracies.The scope of application of signal jitter (Dither) technology is more and more wider, the beneficial effect bringing is more and more subject to people's attention, but signal jitter (Dither) technology in current Digital Signal Processing is by signal least significant bit (LSB), the duty ratio of several switch periods adjacent signal to be done on average, to obtain mean value, improve the precision of control signal duty ratio, such way needs a large amount of additional circuits, and digitized equalization implementation method is inevitably introduced shake ripple.
Utility model content
In order to solve problems of the prior art, the utility model provides the signal jitter system changing based on switch periods, by operating frequency being added to certain disturbance, the frequency of switch controlling signal is introduced to shake (Dither), carry out the quantization error of compensating switch signal, in the case of not increasing the area of chip, application shake (Dither) effect, makes the control signal of low resolution obtain the control effect of high-resolution.
In order to achieve the above object, the technical scheme that the utility model adopts is:
The signal jitter system changing based on switch periods, comprise DC-DC switching power circuit, described DC-DC switching power circuit comprises simulation--digital quantizer, compensator and pulse-width modulator, described analogue-to-digital converters are connected with pulse-width modulator by compensator, it is characterized in that: also comprise signal jitter circuit, described signal jitter circuit comprises oscillator control module and the oscillator being connected with oscillator control module, the input of described oscillator control module is connected with the output of compensator, the output of described oscillator is connected with the input of pulse-width modulator.
The aforesaid signal jitter system changing based on switch periods, is characterized in that: under equal bit wide, the resolution of described pulse-width modulator is greater than the resolution of analogue-to-digital converters.
The aforesaid signal jitter system changing based on switch periods, is characterized in that: the least significant bit of the output of described compensator provides noise signal for oscillator control module.
The beneficial effects of the utility model are: the signal jitter system changing based on switch periods that the utility model provides, mainly comprise signal jitter circuit, in the time that DC-DC switching power circuit is connected with signal jitter circuit, the input of the oscillator control module in signal jitter circuit is connected with the output of the compensator in DC-DC switching power circuit, and the output of the oscillator in signal jitter circuit is connected with the input of the pulse-width modulator in DC-DC switching power circuit.Least significant bit by judging compensator output signal is to switching frequency perturbation, the signal of least significant bit is connected with oscillator control module, add noise signal to oscillator control module, produce disturbance voltage, then be input in oscillator, oscillator is according to disturbance voltage, produce switching frequency, and then change switching signal, realize the shake of signal, the resolution that improves signal, can be used in DC-DC switching power circuit the pulse-width modulator of low resolution, obtains good circuit stability.Thus, in the situation that not increasing additional circuit, by operating frequency being added to shake (Dither), carry out optimal control effect, both can effectively save chip area, obviously increase the resolution of signal simultaneously.
Accompanying drawing explanation
Fig. 1 is the topological diagram of the signal jitter system changing based on switch periods of the present utility model.
Reference numeral implication is as follows:
1: simulation--digital quantizer; 2: compensator; 3: pulse-width modulator; 4: oscillator control module; 5: oscillator.
Embodiment
Below in conjunction with accompanying drawing, the utility model is further described.
As shown in Figure 1, the signal jitter system changing based on switch periods, comprise DC-DC switching power circuit and signal jitter circuit, DC-DC switching power circuit comprises simulation--digital quantizer 1, compensator 2 and pulse-width modulator 3, analogue-to-digital converters 1 are connected with pulse-width modulator 3 by compensator 2.From control principle, for fear of the generation of limit cycles oscillations, under equal bit wide, the resolution of pulse-width modulator 3 must be greater than the resolution of analogue-to-digital converters 1, and this just requires the pulse-width modulator that uses resolution higher.Because resolution and the timing relationship of pulse-width modulator are close, the resolution of pulse-width modulator and the size of clock are directly proportional, the resolution of pulse-width modulator is high, the requirement of clock is improved thereupon, in the situation that not increasing additional circuit, increase signal jitter circuit, signal jitter circuit comprises oscillator control module 4 and the oscillator 5 being connected with oscillator control module 4, oscillator control module 4 is the digital control circuit of oscillator 5, for controlling the output of oscillator 5 frequencies, the input of oscillator control module 4 is connected with the output of compensator 2, the output of oscillator 5 is connected with the input of pulse-width modulator 3, the least significant bit of the output of compensator 2 provides noise signal for oscillator control module 4, making oscillator control module 4 produce by the control voltage of disturbance is disturbance voltage, disturbance voltage is input in oscillator 5, oscillator 5 is according to disturbance voltage, produce switching frequency, and then generation dither signal, improve the resolution of signal, signal inputs in pulse-width modulator, make whole circuit in the situation that not connecting additional circuit, also can obtain good stability.The utility model adopts the method for control switch frequency to produce signal jitter, increases the resolution of signal, has saved the loaded down with trivial details and power consumption that connects a large amount of additional circuits, effectively increases the stability of circuit, has a good application prospect.
The dither method of the signal jitter system changing based on switch periods, comprises the following steps,
Step 6, inputs to the signal of realizing shake in the pulse-width modulator in DC-DC switching power circuit, improves the resolution of pulse-width modulator, realizes the stable of circuit.
Wherein, in step 2, signal jitter circuit with the connected mode of DC-DC switching power circuit is: the input of the oscillator control module in signal jitter circuit is connected with the output of the compensator in DC-DC switching power circuit, the output of the oscillator in signal jitter circuit is connected with the input of the pulse-width modulator in DC-DC switching power circuit.
The principle of signal jitter system of the present utility model is: the least significant bit of compensator output signal is as the low bit dither signal of one, the digital controlled signal of itself and oscillator is added, the output frequency of oscillator is added to a kind of low-frequency excitation signal, be input in pulse-width modulator as its work clock by the frequency of disturbance, produce thus a switch controlling signal that is introduced into low-frequency noise, by this shake (Dither) effect, reach compensation quantization error, improve the precision of output voltage and the effect that improves stability.
More than show and described basic principle of the present utility model, principal character and advantage.The technical staff of the industry should understand; the utility model is not restricted to the described embodiments; that in above-described embodiment and specification, describes just illustrates principle of the present utility model; do not departing under the prerequisite of the utility model spirit and scope; the utility model also has various changes and modifications, and these changes and improvements all fall within the scope of claimed the utility model.The claimed scope of the utility model is defined by appending claims and equivalent thereof.
Claims (3)
1. the signal jitter system changing based on switch periods, comprise DC-DC switching power circuit, described DC-DC switching power circuit comprises simulation--digital quantizer, compensator and pulse-width modulator, described analogue-to-digital converters are connected with pulse-width modulator by compensator, it is characterized in that: also comprise signal jitter circuit, described signal jitter circuit comprises oscillator control module and the oscillator being connected with oscillator control module, the input of described oscillator control module is connected with the output of compensator, the output of described oscillator is connected with the input of pulse-width modulator.
2. the signal jitter system changing based on switch periods according to claim 1, is characterized in that: under equal bit wide, the resolution of described pulse-width modulator is greater than the resolution of analogue-to-digital converters.
3. the signal jitter system changing based on switch periods according to claim 1, is characterized in that: the least significant bit of the output of described compensator provides noise signal for oscillator control module.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320857475.3U CN203645538U (en) | 2013-12-24 | 2013-12-24 | Signal dither system based on switching period change |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320857475.3U CN203645538U (en) | 2013-12-24 | 2013-12-24 | Signal dither system based on switching period change |
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| Publication Number | Publication Date |
|---|---|
| CN203645538U true CN203645538U (en) | 2014-06-11 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201320857475.3U Expired - Fee Related CN203645538U (en) | 2013-12-24 | 2013-12-24 | Signal dither system based on switching period change |
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| CN (1) | CN203645538U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103731024A (en) * | 2013-12-24 | 2014-04-16 | 苏州易能微电子科技有限公司 | Signal dither system and method based on switching period changes |
| TWI678059B (en) * | 2018-05-14 | 2019-11-21 | 通嘉科技股份有限公司 | Switching-mode power supplies and power controllers capable of jittering switching frequency |
-
2013
- 2013-12-24 CN CN201320857475.3U patent/CN203645538U/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103731024A (en) * | 2013-12-24 | 2014-04-16 | 苏州易能微电子科技有限公司 | Signal dither system and method based on switching period changes |
| TWI678059B (en) * | 2018-05-14 | 2019-11-21 | 通嘉科技股份有限公司 | Switching-mode power supplies and power controllers capable of jittering switching frequency |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20140611 Termination date: 20191224 |