CN115372680A - Charging current sampling method - Google Patents
Charging current sampling method Download PDFInfo
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- CN115372680A CN115372680A CN202211007878.9A CN202211007878A CN115372680A CN 115372680 A CN115372680 A CN 115372680A CN 202211007878 A CN202211007878 A CN 202211007878A CN 115372680 A CN115372680 A CN 115372680A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/0092—Arrangements for measuring currents or voltages or for indicating presence or sign thereof measuring current only
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/25—Arrangements for measuring currents or voltages or for indicating presence or sign thereof using digital measurement techniques
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/007—Regulation of charging or discharging current or voltage
- H02J7/00711—Regulation of charging or discharging current or voltage with introduction of pulses during the charging process
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/007—Regulation of charging or discharging current or voltage
- H02J7/00712—Regulation of charging or discharging current or voltage the cycle being controlled or terminated in response to electric parameters
- H02J7/00714—Regulation of charging or discharging current or voltage the cycle being controlled or terminated in response to electric parameters in response to battery charging or discharging current
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J2207/00—Indexing scheme relating to details of circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J2207/50—Charging of capacitors, supercapacitors, ultra-capacitors or double layer capacitors
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Abstract
The invention relates to the field of super capacitor charging, and discloses a charging current sampling method, which is characterized by comprising the following steps: collecting a current waveform generated when a pulse width modulation signal flows through an inductor; determining current sampling time according to a preset first compensation formula or a preset second compensation formula; and collecting the charging current according to the current sampling time. The invention dynamically adjusts and calculates the sampling time of the charging current based on the duty ratio compensation of the pulse width modulation signal, ensures that the intermediate value of the inductive current can be accurately acquired by each sampling, and solves the fluctuation problem of the sampling current.
Description
Technical Field
The embodiment of the invention relates to the field of super capacitor charging, in particular to a charging current sampling method.
Background
The super capacitor charging technology in the wind power pitch control is another key control technology except a motor control technology, and charging current sampling is the most key technical key except a charging algorithm in the charging technology, because one charging algorithm is good, if the charging current sampling has deviation, the charging current is not stable, and a very large error exists in calculation of the charging electric quantity of the capacitor. In the prior art, an IGBT switch is adopted for capacitor charging, a pulse width modulation signal is sent out for charging, and hardware circuit capacitor filtering or software mean filtering, first-order filtering or Kalman filtering is generally adopted for sampling charging current. The above techniques do not dynamically adjust the sampling of the charging capacitor, but only perform a filtering process on the sampled sampling value, and these filtering effects are not ideal enough, and the sampling value of the charging current has a large deviation.
Disclosure of Invention
The charging current sampling method provided by the invention can dynamically adjust and calculate the sampling time of the charging current, ensure that the sampling current can accurately acquire the intermediate value of the inductive current, and solve the problem of charging current fluctuation caused by the fluctuation of the sampling current.
In order to achieve the above object, the embodiments of the present invention provide the following technical solutions:
in a first aspect, an embodiment of the present invention provides a charging current sampling method, which is applied to charging a super capacitor, and is characterized by including:
collecting a current waveform generated when a pulse width modulation signal flows through an inductor; determining current sampling time according to a preset first compensation formula or a preset second compensation formula; and collecting the charging current according to the current sampling time.
Optionally, the charging current sampling method further includes: the charging current sampling method further comprises: judging whether the duty ratio of the pulse width modulation signal is less than or equal to a preset threshold value or not; if so, determining the current sampling time according to a preset first compensation formula; otherwise, determining current sampling time according to a preset second compensation formula; and collecting the charging current according to the current sampling time.
Optionally, the collecting the charging current according to the current sampling time includes: if the current sampling time is determined according to a preset first compensation formula, the current sensor collects a falling edge intermediate value of the inductive current to obtain the charging current; or, if the current sampling time is determined according to a preset second compensation formula, the current sensor collects a middle value of a rising edge of the inductive current to obtain the charging current.
Optionally, the preset first compensation formula is:
wherein, T BPRD A is the compensation factor generated by the last period of the PWM signal, T BCLK Is a clock cycle.
Optionally, the preset second compensation formula is:
wherein, T BPRD A is a compensation coefficient generated by the pulse width modulation signal of the last period, T BCLK Is a clock cycle.
Optionally, the collecting the charging current according to the current sampling time includes: if the duty ratio of the pulse width modulation is smaller than or equal to a preset threshold value, the current sensor collects a middle value of a falling edge of the inductive current; or if the duty ratio of the pulse width modulation is larger than a preset threshold value, the current sensor collects the middle value of the rising edge of the inductive current.
In a second aspect, an embodiment of the present invention further provides a super capacitor charging method, including: applying the charging current sampling method according to the first aspect to obtain a charging current; calculating to obtain corresponding output current by using a preset charging algorithm on the basis of the charging current, wherein the charging algorithm comprises double-loop PID control of a voltage loop and a current loop; and charging the super capacitor by using any one of three modes of constant current, constant voltage and floating charge of the output current.
In a third aspect, an embodiment of the present invention further provides a charging current sampling device, which is applied to charging a super capacitor, and includes: the current acquisition module is used for acquiring a current waveform generated when the pulse width modulation signal flows through the inductor and acquiring a charging current according to the first current sampling time or the second current sampling time; and the capacitor charging module is used for providing electric energy for the super capacitor.
In a fourth aspect, an embodiment of the present invention further provides an electronic device, where the electronic device includes:
at least one processor; and
a memory communicatively coupled to the at least one processor; wherein, the first and the second end of the pipe are connected with each other,
the memory stores instructions executable by the at least one processor to enable the at least one processor to perform the charging current sampling method of the first aspect and/or the supercapacitor charging method of the second aspect.
In a fifth aspect, the present invention further provides a non-volatile computer-readable storage medium, where the computer-readable storage medium stores computer-executable instructions, and when the computer-executable instructions are executed, the charging current sampling method according to the first aspect and/or the super capacitor charging method according to the second aspect can be performed.
The implementation mode of the invention has the beneficial effects that: different from the situation in the prior art, an embodiment of the present invention provides a charging current sampling method applied to charging a super capacitor, including: collecting a current waveform generated when a pulse width modulation signal flows through an inductor; determining current sampling time according to a preset first compensation formula or a preset second compensation formula; and collecting the charging current according to the current sampling time. The invention dynamically adjusts and calculates the sampling time of the charging current based on the duty ratio compensation of the pulse width modulation signal, ensures that the intermediate value of the inductive current can be accurately acquired by each sampling, and solves the fluctuation problem of the sampling current.
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One or more embodiments are illustrated by way of example in the accompanying drawings, which correspond to the figures in which like reference numerals refer to similar elements and which are not to scale unless otherwise specified.
Fig. 1 is a flowchart of a charging current sampling method according to an embodiment of the present invention;
FIG. 2 is a waveform of a current generated by a PWM signal flowing through an inductor according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of calculating a duty cycle of a first PWM signal according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of sampling by an ADC sampler according to an embodiment of the present invention;
FIG. 5 is a flowchart of a method of step S102 in FIG. 1 according to an embodiment of the present invention;
fig. 6 is a flowchart of a super capacitor charging method according to an embodiment of the present invention;
fig. 7 is a diagram illustrating a sampling effect of a current triangular waveform rising edge current median value of an inductor current in a constant voltage charging mode according to an embodiment of the present invention;
fig. 8 is a diagram of a charging current sampling apparatus according to an embodiment of the present invention;
fig. 9 is a schematic structural diagram of an electronic device according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention. It should be noted that, if not conflicted, the various features of the embodiments of the invention may be combined with each other within the scope of protection of the invention. Additionally, while a division of functional blocks is made within a device diagram, with a logical order shown in the flowchart, in some cases, the steps shown or described may be performed in a different order than the division of blocks in the device diagram, or the order in the flowchart.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
Referring to fig. 1, fig. 1 is a flowchart of a charging current sampling method according to an embodiment of the present invention, the method includes the following steps:
s101, collecting a current waveform generated when a pulse width modulation signal flows through an inductor;
in some embodiments, the super capacitor is charged by using an IGBT (Insulated Gate Bipolar Transistor) switch, and the DSP chip sends out a pulse width modulation signal to act on the IGBT switch, and when the pulse width modulation signal flows through the inductor, the waveform of the inductor current appears as a triangular waveform. Specifically, referring to fig. 2, fig. 2 is a current waveform generated by a pwm signal flowing through an inductor according to an embodiment of the present invention. The pulse width modulation signal is a rectangular waveform, the waveform of the inductive current is in a linear rising state within the high effective time t1 of the pulse width modulation signal, and the waveform of the inductive current is in a linear falling state within the low effective time t2 of the pulse width modulation signal. The waveform of the inductor current exhibits a triangular wave type during one period Tcyc of the pulse width modulation signal, and the triangular wave shape of the inductor current is affected by the high active time t1 and the low active time t2 of the pulse width modulation signal, and Ic is an intermediate value of the triangular wave current.
S102, determining current sampling time according to a preset first compensation formula or a preset second compensation formula;
the expression of the preset first compensation formula is as follows:
wherein, T adc For current sampling time, T BPRD A is a compensation coefficient generated by the pulse width modulation signal of the last period, T BCLK Is a clock cycle.
The expression of the preset second compensation formula is as follows:
wherein, T adc To the current sampling time, T BPRD A is the compensation factor generated by the last period of the PWM signal, T BCLK Is a clock cycle.
To facilitate understanding of step S102, the inventors further detail as follows:
in some embodiments, during one charging cycle of the super capacitor, a DSP (digital signal processing technology) chip generates two pulse width modulated signals with the same frequency: a first pulse width modulation signal for calculating a duty ratio and a second pulse width modulation signal for calculating a current sampling time T adc 。
Specifically, the DSP chip obtains the duty ratio of the first pwm signal by changing the value of the comparator Cmp, please refer to fig. 3, and fig. 3 is a schematic diagram for calculating the duty ratio of the first pwm signal according to the embodiment of the present invention. In some embodiments, the DSP sets the radix value T of the PWM signal triggering ADC sampling using the Up _ Down mode BPRD And 4, the Cmp value of the comparator is 3, and on the basis of the setting condition, the DSP generates a first pulse width modulation signal according to a duty ratio calculation formula: (T) BPRD -Cmp)/T BPRD * Calculating the duty ratio of the first pulse width modulation signal to obtain 100%Is 25%, i.e. t1/Tcyc is 25%, where t1 is the high active time of the first pwm signal and Tcyc is the period of the first pwm.
Specifically, referring to fig. 4, fig. 4 is a sampling schematic diagram of the ADC sampler according to an embodiment of the present invention, in some embodiments, the DSP sets a radix value T of the pwm signal triggering the ADC sampling in an Up mode BPRD A value of Cmp of the comparator is 7, and the current sampling time point is T on the basis of the setting condition adc 。
In a charging cycle of charging the super capacitor, if the electric quantity of the super capacitor is very low, the voltage difference between the super capacitor and a bus is very large at this time, if a constant current charging mode is adopted to charge the super current, at this time, the duty ratio of a first pulse width modulation signal generated by a DSP is low, a current triangular waveform generated when the first pulse width modulation signal flows through an inductive current has a large rising edge slope and a small falling edge slope, in some embodiments, a first compensation formula is adopted to determine a current sampling time point, specifically, the DSP sets a comparator Cmp value, and formula 1 is:
Cmp＝T BPRD /2+a*T BPRD /2
wherein, T BPRD For the base value of the pwm signal triggering the ADC sampling, a is a compensation factor generated by the pwm signal of the previous period, a =0.8 (1-du), and du is the duty cycle of the first pwm signal of the previous period.
Then, the ADC triggers the sampler to sample the second PWM signal and calculates the sampling time point T adc Equation 2 is:
T adc ＝Cmp/(T BPRD +1)*T BCLK
wherein Cmp is calculated by formula 1, T BCLK Is a clock cycle. In some embodiments, T BCLK Is 0.5ns. And combining the formula 1 and the formula 2 to carry out collation and simplification to obtain a first compensation formula. Calculating the sampling timePoint T adc The rear current sensor acquires a current intermediate value of a current triangular wave falling edge generated when the first pulse width modulation signal flows through the inductive current, and the current intermediate value is acquired by the current sensor as a charging current.
In some embodiments, after the voltage of the super capacitor is charged for a period of time, the voltage of the super capacitor rises, and after the duty ratio of the first pulse width modulation signal reaches a preset threshold, the rising slope of a current triangular waveform generated when the first pulse width modulation signal flows through the inductor is relatively small, and the falling slope is relatively large, and a second compensation formula is adopted to determine a current sampling time point, specifically, the DSP sets a comparator Cmp value, and formula 3 is:
Cmp＝a*T BPRD /2
wherein, T BPRD For the base value of the pwm signal triggering the ADC sampling, a is a compensation factor generated by the pwm signal of the previous period, a =0.8 (1-du), and du is the duty cycle of the first pwm signal of the previous period.
Then, the ADC triggers the sampler to sample the second pwm signal, and the sampling time T is calculated according to equation 2 adc And combining the formula 2 and the formula 3 to carry out sorting and simplification to obtain a second compensation formula. Calculating to obtain a sampling time point T adc The rear current sensor collects a current intermediate value of a rising edge of a current triangular wave generated when the first pulse width modulation signal flows through the inductive current, and the current intermediate value is collected by the current sensor as a charging current.
And S103, collecting charging current according to the current sampling time.
In some embodiments, the current sampling time point T if the current median of the triangular rising edge is to be obtained adc Then Cmp = T needs to be set first BPRD And/2, if a current sampling time point T of the middle value of the triangular wave falling edge current is to be obtained adc Then Cmp = T needs to be set BPRD 。
Referring to fig. 5, fig. 5 is a flowchart of a method of step S102 in fig. 1 according to an embodiment of the present invention, including:
and S1021, judging whether the duty ratio of the pulse width modulation signal is less than or equal to a preset threshold value. If yes, go to step S1023, otherwise go to step S1022.
In some embodiments, the preset threshold is set at 50%.
And S1023, if so, determining the current sampling time according to a preset first compensation formula.
And S1022, otherwise, determining the current sampling time according to a preset second compensation formula.
And S103, collecting charging current according to the current sampling time.
In some embodiments, said collecting a charging current according to said current sampling time further comprises: if the duty ratio of the pulse width modulation is smaller than or equal to a preset threshold value, the current sensor collects a middle value of a rising edge of the inductive current; or if the duty ratio of the pulse width modulation is larger than a preset threshold value, the current sensor acquires the middle value of the falling edge of the inductive current.
Referring to fig. 6, fig. 6 is a flowchart of a super capacitor charging method according to an embodiment of the present invention, which applies the charging current sampling method according to the above embodiment, and includes:
and S301, obtaining a charging current.
The current sensor collects the current intermediate value of the rising edge and/or the falling edge of the current triangular wave generated when the first pulse width modulation signal flows through the inductive current as the charging current.
S302, calculating to obtain corresponding output current based on the charging current by using a preset charging algorithm.
In some embodiments, the charging algorithm includes dual-loop PID control of the voltage loop and the current loop, for the PID control of the current loop, the charging current in the current cycle is adjusted by using the output current in the previous cycle, and the adjusting process includes addition of three links of proportion, integral and differentiation to obtain the output current in the current cycle.
Specifically, the PID controller is a linear controller that forms a deviation from the given value r (t) and the actual output value y (t): e (t) = r (t) -y (t). The proportion (P), integral (I) and differential (D) of the deviation are linearly combined to form a control quantity, and the controlled object is controlled. The PID controller has the following correction links: (1) proportional link: the controller generates the control action to reduce the error as soon as the deviation is generated, which is proportional to the deviation signal e (t) of the control system. When the deviation e =0, the control action is also 0. Thus, the proportional control is adjusted based on the deviation, i.e. there is a difference adjustment. (2) an integration link: the error can be memorized, the method is mainly used for eliminating static error and improving the non-difference degree of a system, the strength of the integral action depends on an integral time constant Ti, the larger the Ti is, the weaker the integral action is, and the stronger the integral action is otherwise. And (3) a differential step: the change trend (change rate) of the deviation signal can be reflected, and an effective early correction signal can be introduced into the system before the value of the deviation signal becomes too large, so that the action speed of the system is accelerated, and the adjusting time is shortened. From the perspective of time, the proportional action is used for controlling the current error of the system, the integral action is used for aiming at the history of the system error, and the differential action reflects the change trend of the system error, and the combination of the proportional action, the integral action and the differential action is the perfect combination of the past, the present and the future.
PID output function u (t):
the transfer function formula of the PID control is as follows:
in the formula, kp is a proportionality coefficient, ti is an integral time constant, and Td is a differential time constant; ki = Kp/Ti, as an integral coefficient; kd = Kp × Td, a differential coefficient.
Regarding the selection of PID parameters: (1) The proportional action makes the input and output of the controller proportional, and in order to minimize the deviation and to speed up the response and shorten the adjustment time, it is necessary to increase Kp. But too much scaling can degrade system dynamics and even destabilize closed loop systems. (2) The introduction of the integration function is beneficial to eliminate steady-state errors, but causes the stability of the system to be reduced. Especially, the integration in the large deviation stage often causes the system to generate excessive overshoot, and the adjusting time is prolonged. (3) The introduction of the differential action enables the system to react according to the trend of deviation change, and the proper differential action can accelerate the system response, effectively reduce overshoot, improve the dynamic characteristic of the system and increase the stability of the system. The disadvantage is that the differential effect is sensitive to disturbances, which reduces the disturbance rejection capability of the system. Therefore, the parameter selection of the PID controller must meet the requirements of dynamic and static performance indexes, and satisfactory control performance can be obtained only by reasonably setting three parameters of Kp, ki and Kd. The PID controller parameter setting is to set and adjust the parameters of the controller, and the PID controller parameter setting method comprises the following steps: (1) A setting method based on controlled process object parameter identification firstly identifies a parameter model of an object and then calculates setting by using theories such as a pole configuration setting method, a cancellation principle method and the like. (2) And outputting a response characteristic parameter setting method based on the extracted object, such as a Z-N parameter setting method (also called a critical proportionality method). And (3) a parameter optimization method. (4) An expert system method based on pattern recognition and a controller parameter online setting method based on the control behavior of the controller.
And S303, charging the super capacitor in any one of three modes of constant current, constant voltage and floating charge by using the output current.
Referring to fig. 7, fig. 7 is a diagram illustrating an effect of sampling a current median of a rising edge of a current triangle wave of an inductor current in a constant voltage charging mode according to an embodiment of the present invention, where fig. 7 schematically illustrates current triangle waves of two adjacent inductor currents, ic is the median of the rising edge of the current triangle wave, T adc 1 is the previous cycle sampling time point, T adc And 2 is a sampling time point of a next period.
Accordingly, an embodiment of the present invention further provides a charging current sampling apparatus, which is applied to charging a super capacitor, as shown in fig. 8, in some embodiments, the charging current sampling apparatus 80 includes:
the current acquisition module 801 is used for acquiring a current waveform generated when the pulse width modulation signal flows through the inductor and acquiring a charging current according to the first current sampling time or the second current sampling time;
and a capacitor charging module 802 for providing electric energy for the super capacitor.
As another aspect of the embodiments of the present invention, an electronic device is provided in the embodiments of the present invention, as shown in fig. 8, which is a schematic diagram of a hardware structure of the electronic device 90, please refer to fig. 9, and the electronic device includes: one or more processors 901 and a memory 902, where one processor 901 is taken as an example in fig. 9.
The processor 901 and the memory 902 may be connected by a bus or other means, and fig. 9 illustrates the connection by a bus as an example.
The memory 902, which is a non-volatile computer-readable storage medium, may be used to store non-volatile software programs, non-volatile computer-executable programs, and modules, such as program instructions/modules corresponding to a charging current sampling apparatus in the embodiments of the present application (for example, the current collecting module 801 and the capacitance charging module 802 shown in fig. 7). The processor 801 executes various functional applications and data processing of the electronic device, that is, the charging current sampling method and/or the super capacitor charging method of the above method embodiments, by running the nonvolatile software program, instructions and modules stored in the memory 902.
The memory 902 may include a program storage area and a data storage area, wherein the program storage area may store an operating system, an application program required for at least one function; the storage data area may store data created according to use of the controller, and the like. Further, the memory 902 may include high speed random access memory, and may also include non-volatile memory, such as at least one magnetic disk storage device, flash memory device, or other non-volatile solid state storage device. In some embodiments, the memory 802 optionally includes memory located remotely from the processor 901, which may be connected to the electronic device via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
The one or more modules are stored in the memory 902 and when executed by the one or more processors 901 perform the charging current sampling method and/or the super capacitor charging method of any of the above method embodiments.
The product can execute the method provided by the embodiment of the application, and has corresponding functional modules and beneficial effects of the execution method. For technical details that are not described in detail in this embodiment, reference may be made to the methods provided in the embodiments of the present application.
Embodiments of the present invention provide a non-volatile computer-readable storage medium, where computer-executable instructions are stored, and the computer-executable instructions are executed by an electronic device to perform a charging current sampling method and/or a super capacitor charging method in any of the above method embodiments.
Embodiments of the present invention provide a computer program product comprising a computer program stored on a non-transitory computer readable storage medium, the computer program comprising program instructions which, when executed by a computer, cause the computer to perform the charging current sampling method and/or the supercapacitor charging method of any of the above method embodiments.
The above-described embodiments of the apparatus are merely illustrative, and the units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
Through the above description of the embodiments, those skilled in the art will clearly understand that each embodiment may be implemented by software plus a general hardware platform, and may also be implemented by hardware. With this understanding in mind, the above technical solutions may be embodied in the form of a software product, which can be stored in a computer-readable storage medium such as ROM/RAM, magnetic disk, optical disk, etc., and includes instructions for executing the method according to each embodiment or some parts of the embodiments by at least one computer (which may be a personal computer, a server, a network, etc.).
Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, and not to limit it; within the idea of the invention, where technical features in the above embodiments or in different embodiments are also combinable, the steps can be implemented in any order and there are many other variations of the different aspects of the invention as described above, which are not provided in detail for the sake of brevity; although the present invention has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and these modifications or substitutions do not depart from the spirit of the corresponding technical solutions of the embodiments of the present invention.
Claims (10)
1. A charging current sampling method is applied to charging of a super capacitor, and is characterized by comprising the following steps:
collecting a current waveform generated when a pulse width modulation signal flows through an inductor;
determining current sampling time according to a preset first compensation formula or a preset second compensation formula;
and collecting the charging current according to the current sampling time.
2. The method of claim 1, wherein the charging current sampling method further comprises:
judging whether the duty ratio of the pulse width modulation signal is less than or equal to a preset threshold value or not;
if so, determining current sampling time according to a preset first compensation formula;
otherwise, determining the current sampling time according to a preset second compensation formula;
and collecting the charging current according to the current sampling time.
3. The method of claim 1, wherein collecting the charging current according to the current sampling time comprises:
if the current sampling time is determined according to a preset first compensation formula, acquiring a falling edge intermediate value of the inductive current by using a current sensor to obtain the charging current;
or, if the current sampling time is determined according to a preset second compensation formula, the current sensor collects a middle value of a rising edge of the inductive current to obtain the charging current.
4. The method of claim 1, wherein the preset first compensation formula is:
wherein, T BPRD A is a compensation coefficient generated by the pulse width modulation signal of the last period, T BCLK Is a clock cycle.
5. The method of claim 1, wherein the preset second compensation formula is:
wherein, T BPRD A is a compensation coefficient generated by the pulse width modulation signal of the last period, T BCLK Is a clock cycle.
6. The method of claim 2, wherein collecting the charging current according to the current sampling time comprises:
if the duty ratio of the pulse width modulation is less than or equal to a preset threshold value, the current sensor collects a middle value of a falling edge of the inductive current;
or if the duty ratio of the pulse width modulation is larger than a preset threshold value, the current sensor collects the middle value of the rising edge of the inductive current.
7. A super capacitor charging method is characterized by comprising the following steps:
obtaining a charging current by applying the charging current sampling method according to any one of claims 1 to 6;
calculating to obtain corresponding output current by using a preset charging algorithm on the basis of the charging current, wherein the charging algorithm comprises double-loop PID control of a voltage loop and a current loop;
and charging the super capacitor by using any one of three modes of constant current, constant voltage and floating charge of the output current.
8. The utility model provides a charging current sampling device, is applied to super capacitor and charges which characterized in that includes:
the current acquisition module is used for acquiring a current waveform generated when the pulse width modulation signal flows through the inductor and acquiring a charging current according to the first current sampling time or the second current sampling time;
and the capacitor charging module is used for providing electric energy for the super capacitor.
9. An electronic device, characterized in that the electronic device comprises:
at least one processor; and
a memory communicatively coupled to the at least one processor; wherein the content of the first and second substances,
the memory stores instructions executable by the at least one processor, the instructions
Causing execution by the at least one processor to enable the at least one processor to perform the charging current sampling method of any one of claims 1-6 and/or the supercapacitor charging method of claim 7.
10. A non-transitory computer-readable storage medium, wherein the computing is performed
A computer readable storage medium storing computer executable instructions which, when executed, are capable of performing the charging current sampling method of any one of claims 1-6 and/or the supercapacitor charging method of claim 7.
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| CN202211007878.9A CN115372680A (en) | 2022-08-22 | 2022-08-22 | Charging current sampling method |
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