CN114977861A - Bus voltage compensation method, electronic equipment and system thereof - Google Patents

Bus voltage compensation method, electronic equipment and system thereof Download PDF

Info

Publication number
CN114977861A
CN114977861A CN202210909462.XA CN202210909462A CN114977861A CN 114977861 A CN114977861 A CN 114977861A CN 202210909462 A CN202210909462 A CN 202210909462A CN 114977861 A CN114977861 A CN 114977861A
Authority
CN
China
Prior art keywords
phase
wave
phase voltage
compensated
voltage command
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202210909462.XA
Other languages
Chinese (zh)
Inventor
罗方利
王涛
龙涛
刘江波
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shenzhen Sofarsolar Co Ltd
Original Assignee
Shenzhen Sofarsolar Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shenzhen Sofarsolar Co Ltd filed Critical Shenzhen Sofarsolar Co Ltd
Priority to CN202210909462.XA priority Critical patent/CN114977861A/en
Publication of CN114977861A publication Critical patent/CN114977861A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483Converters with outputs that each can have more than two voltages levels
    • H02M7/487Neutral point clamped inverters
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/0003Details of control, feedback or regulation circuits
    • H02M1/0038Circuits or arrangements for suppressing, e.g. by masking incorrect turn-on or turn-off signals, e.g. due to current spikes in current mode control
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/32Means for protecting converters other than automatic disconnection
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/5387Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
    • H02M7/53871Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current
    • H02M7/53875Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current with analogue control of three-phase output
    • H02M7/53876Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current with analogue control of three-phase output based on synthesising a desired voltage vector via the selection of appropriate fundamental voltage vectors, and corresponding dwelling times
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/56Power conversion systems, e.g. maximum power point trackers

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)

Abstract

The embodiment of the invention discloses a bus voltage compensation method, electronic equipment and a system thereof. The method comprises the following steps: calculating a positive half-wave compensation coefficient and a negative half-wave compensation coefficient of the voltage instruction according to the bus voltage, the positive half bus voltage and the negative half bus voltage: filtering and amplitude limiting are carried out on the positive half-wave compensation coefficient and the negative half-wave compensation coefficient: calculating to obtain a three-phase voltage instruction; obtaining a compensated three-phase voltage instruction according to the positive half-wave compensation coefficient after filtering and amplitude limiting and the negative half-wave compensation coefficient after filtering and amplitude limiting; performing pulse broadband modulation on the compensated three-phase voltage command to obtain a three-phase pulse width modulation wave; and obtaining the conduction duty ratio of the three-phase bridge arm according to the three-phase pulse width modulation wave. Through the mode, the embodiment of the invention can compensate the on duty ratio of the switching device of the inverter according to the neutral point potential fluctuation of the bus, and can still inhibit the distortion of the output current of the inverter when the neutral point potential fluctuation amplitude of the bus is large.

Description

Bus voltage compensation method, electronic equipment and system thereof
Technical Field
The embodiment of the invention relates to the field of inverters, in particular to a bus voltage compensation method, electronic equipment and a system thereof.
Background
T-type three-level inverters have many advantages: the photovoltaic power generation system has the advantages of high voltage withstanding grade, small dV/dt, small power device switching ripple wave and the like, and is widely applied to the field of photovoltaic power generation. But the T-shaped three-level topology also has the problem of the fluctuation of the midpoint potential of the bus. The fluctuation of the neutral point potential of the bus can cause the output current of the inverter to be distorted, and the adverse effect is caused to the quality of the electric energy. In addition, in practical application, the service life of the direct current bus capacitor is short, and the service life of a product depends on the service life of the direct current bus. The electrolytic capacitance with the same volume has higher capacitance value than the film capacitance, but the service life is far lower than the film capacitance. The service life and the power density are comprehensively considered, and the bus adopts the thin film capacitor and has a small capacitance value. The capacitance value reduction of the capacitor further aggravates the fluctuation range of the midpoint potential of the bus, and the distortion problem of the output current is further amplified.
In order to solve the problem of current distortion caused by midpoint potential fluctuation, hardware and software methods are respectively adopted to reduce the bus midpoint fluctuation range from the aspect of inhibiting the bus midpoint potential fluctuation. However, the hardware approach requires additional circuitry, which increases cost and volume. The essence of the software method is realized by reasonably selecting a redundant vector or injecting zero-sequence voltage, and the software method cannot be applied to DPWM and other modulation modes.
Disclosure of Invention
In order to solve the above technical problems, an embodiment of the present invention adopts a technical solution: the bus voltage compensation method is applied to a three-phase inverter and comprises the following steps: calculating a positive half-wave compensation coefficient and a negative half-wave compensation coefficient according to the bus voltage, the positive half bus voltage and the negative half bus voltage: filtering and amplitude limiting are carried out on the positive half-wave compensation coefficient and the negative half-wave compensation coefficient: obtaining a U-phase voltage instruction, a V-phase voltage instruction and a W-phase voltage instruction through vector control; according to the positive half-wave compensation coefficient after filtering and amplitude limiting and the negative half-wave compensation coefficient after filtering and amplitude limiting, respectively distinguishing a positive half-wave from a negative half-wave for the U-phase voltage command, the V-phase voltage command and the W-phase voltage command, and performing compensation calculation to obtain a compensated U-phase voltage command, a compensated V-phase voltage command and a compensated W-phase voltage command; respectively carrying out pulse broadband modulation on the compensated U-phase voltage instruction, the compensated V-phase voltage instruction and the compensated W-phase voltage instruction to obtain a U-phase pulse width modulation wave, a V-phase pulse width modulation wave and a W-phase pulse width modulation wave; and obtaining the conduction duty ratios of the U-phase bridge arm, the V-phase bridge arm and the W-phase bridge arm according to the U-phase pulse width modulation wave, the V-phase pulse width modulation wave and the W-phase pulse width modulation wave.
In some embodiments, the calculating the positive half-wave compensation coefficient and the negative half-wave compensation coefficient according to the bus voltage, the positive half bus voltage and the negative half bus voltage includes: acquiring the bus voltage, the positive half bus voltage and the negative half bus voltage; calculating the positive half-wave compensation coefficient according to the following formula:
Figure 167370DEST_PATH_IMAGE001
wherein the content of the first and second substances,
Figure 124962DEST_PATH_IMAGE002
for the compensation coefficient of the positive half-wave,
Figure DEST_PATH_IMAGE003
for the purpose of the bus voltage, it is,
Figure 799657DEST_PATH_IMAGE004
is the positive half bus voltage; calculating the negative half-wave compensation coefficient according to the following formula:
Figure DEST_PATH_IMAGE005
wherein the content of the first and second substances,
Figure 526304DEST_PATH_IMAGE006
for the negative half-wave compensation coefficient,
Figure DEST_PATH_IMAGE007
is the negative half bus voltage.
In some embodiments, the filtering and clipping the positive half-wave compensation coefficient and the negative half-wave compensation coefficient includes: filtering the positive half-wave compensation coefficient according to the following filter transfer function:
Figure 159411DEST_PATH_IMAGE008
wherein the content of the first and second substances,
Figure DEST_PATH_IMAGE009
is the filter cut-off frequency, s is the complex frequency of the laplace transform; filtering the negative half-wave compensation coefficient according to the filter transfer function; and then respectively carrying out amplitude limiting on the filtered positive half-wave compensation coefficient and the filtered negative half-wave compensation coefficient.
In some embodiments, the calculating to obtain the U-phase voltage command, the V-phase voltage command, and the W-phase voltage command includes: acquiring the U-phase current, the V-phase current and the W-phase current of the three-phase inverter; according to the U-phase current, the V-phase current and the W-phase current, obtaining a D-axis current and a Q-axis current under a rotating coordinate system through Clark conversion and Park conversion, obtaining a control voltage on a D axis and a control voltage on a Q axis through vector control, and obtaining a U-phase voltage instruction, a V-phase voltage instruction and a W-phase voltage instruction through Park inverse conversion and Clark inverse conversion calculation respectively.
In some embodiments, the performing compensation calculation for distinguishing positive half waves and negative half waves of the U-phase voltage command, the V-phase voltage command and the W-phase voltage command respectively includes: and carrying out compensation calculation on the U-phase voltage command by distinguishing a positive half wave and a negative half wave according to the following formula:
Figure 338719DEST_PATH_IMAGE010
wherein the content of the first and second substances,
Figure DEST_PATH_IMAGE011
for the compensated U-phase voltage command,
Figure 805387DEST_PATH_IMAGE012
in order to command the U-phase voltage,
Figure DEST_PATH_IMAGE013
for the positive half-wave compensation coefficients after filtering and clipping,
Figure 652120DEST_PATH_IMAGE014
the compensation coefficient is a negative half-wave compensation coefficient after filtering and amplitude limiting; and carrying out compensation calculation on the V-phase voltage command by distinguishing a positive half wave and a negative half wave according to the following formula:
Figure DEST_PATH_IMAGE015
wherein the content of the first and second substances,
Figure 190549DEST_PATH_IMAGE016
for the compensated V-phase voltage command,
Figure DEST_PATH_IMAGE017
a voltage command for the V-phase; and carrying out compensation calculation on the W-phase voltage command by distinguishing a positive half wave and a negative half wave according to the following formula:
Figure 857153DEST_PATH_IMAGE018
wherein the content of the first and second substances,
Figure DEST_PATH_IMAGE019
for the compensated W-phase voltage command,
Figure 139230DEST_PATH_IMAGE020
the W-phase voltage command is issued.
In some embodiments, the pulse-width modulating the compensated U-phase voltage command, the compensated V-phase voltage command, and the compensated W-phase voltage command, respectively, includes: respectively carrying out discontinuous pulse broadband modulation on the compensated U-phase voltage command, the compensated V-phase voltage command and the compensated W-phase voltage command; or the compensated U-phase voltage command, the compensated V-phase voltage command and the compensated W-phase voltage command are subjected to sinusoidal pulse broadband modulation respectively; or respectively carrying out space vector pulse broadband modulation on the compensated U-phase voltage command, the compensated V-phase voltage command and the compensated W-phase voltage command.
In order to solve the above technical problem, another technical solution adopted by the embodiment of the present invention is: there is provided an electronic device including: at least one processor; and a memory communicatively coupled to the at least one processor; wherein the memory stores instructions executable by the at least one processor to enable the at least one processor to perform a bus voltage compensation method as described above.
In order to solve the above technical problem, another technical solution adopted by the embodiment of the present invention is: a non-transitory computer storage medium is provided that stores computer-executable instructions that, when executed by one or more processors, cause the one or more processors to perform a bus voltage compensation method as described above.
In order to solve the above technical problem, another technical solution adopted by the embodiment of the present invention is: there is provided a bus voltage compensation system, the system comprising: the three-phase inverter is used for converting the direct-current bus voltage into alternating-current power to be output; the sampling equipment is used for acquiring the bus voltage, the positive half bus voltage, the negative half bus voltage, the U-phase voltage, the V-phase voltage, the W-phase voltage, the U-phase current, the V-phase current and the W-phase current of the three-phase inverter; an electronic device as described above for performing a bus voltage compensation method as described above, the electronic device being connected to the sampling device.
In some embodiments, the topology of the three-phase inverter comprises: t-type three-level topology, I-type three-level topology, and diode-clamped three-level topology.
The beneficial effects of the embodiment of the invention are as follows: different from the situation in the prior art, the embodiment of the invention can compensate the conduction duty ratio of the inverter according to the neutral point potential fluctuation of the bus, can still inhibit the distortion of the output current of the inverter when the neutral point potential fluctuation amplitude of the bus is large, and is suitable for modulation modes such as DPWM, SPWM and SVPWM.
Drawings
FIG. 1 is a schematic illustration of an application environment for an embodiment of the present invention;
fig. 2 is a schematic flow chart of a bus voltage compensation method according to an embodiment of the present invention;
fig. 3 is a circuit configuration diagram of a main circuit of the T-type three-level inverter;
FIG. 4 is a waveform diagram of the output current of a photovoltaic inverter before compensation provided by an embodiment of the present invention;
FIG. 5 is a waveform diagram of the output current of a compensated photovoltaic inverter provided by an embodiment of the present invention;
FIG. 6 is a data plot of the output current of a photovoltaic inverter prior to compensation provided by an embodiment of the present invention;
FIG. 7 is a data plot of the output current of a compensated photovoltaic inverter provided by an embodiment of the present invention;
fig. 8 is a schematic structural diagram of an electronic device according to an embodiment of the present invention;
fig. 9 is a schematic structural diagram of a bus voltage compensation system according to an embodiment of the present invention.
Detailed Description
The present invention will be described in detail with reference to specific examples. The following examples will assist those skilled in the art in further understanding the invention, but are not intended to limit the invention in any way. It should be noted that variations and modifications can be made by persons skilled in the art without departing from the spirit of the invention. All falling within the scope of the present invention.
In order to make the objects, technical solutions and advantages of the present application more clearly understood, the present application is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.
Fig. 1 is an application environment provided by an embodiment of the present invention. As shown in fig. 1, the application environment is exemplified by a three-phase inverter power supply system, which includes a three-phase inverter 10, a dc power source 20, and a load 30.
The inverter is a converter which converts direct current electric energy (batteries and storage batteries) into constant-frequency constant-voltage or frequency-modulation voltage-regulation alternating current (generally 220V,50Hz sine wave).
The three-phase inverter 10 may be of any type including, but not limited to, a T-type three-level inverter, an I-type three-level inverter, and a diode-clamped type three-level inverter. In the present embodiment, a T-type three-level inverter is taken as an example for description. The three-phase inverter 10 may be equipped with several different functional modules, which may be software modules, hardware modules, or a combination of software and hardware, and may be a modular device for implementing one or more functions.
In some embodiments, the three-phase inverter 10 may include an input interface, a voltage start loop, a PWM generator, a dc conversion circuit, an LC filter and output loop, and input-output voltage and current feedback circuits, auxiliary power supply circuits. Wherein, the input interface part: the input part has 3 signals, which are respectively: high voltage direct current input terminal, communication control command input terminal, panel control terminal.
A PWM generator: the system consists of the following functional modules: the device comprises a triangular carrier signal generator, a modulation wave input interface, a comparator and a PWM output interface.
DCAC conversion circuit: a voltage conversion circuit is formed by a switching tube IGBT (or MOS tube), an energy storage inductor and a filter capacitor, pulses with sine rules are amplified by a driving chip and then drive the IGBT (or MOS tube) to perform switching action, and therefore the other end of the inductor can obtain alternating voltage.
LC ratio ripple and output loop: the high frequency part in the sinusoidal PWM voltage is filtered, and the wave voltage with a sinusoidal rule, namely the sinusoidal alternating voltage, is reserved.
A feedback circuit: when the inverter works, the output voltage and current of the inverter are collected in real time and are transmitted to the controller after signal conditioning, and the output voltage and current are used as feedback quantity of closed-loop control of the controller. The dc power source 20 may be of any type for providing dc power to the three-phase inverter 10, such as a solar photovoltaic panel, a battery, a dc voltage source, etc.
The load 30 may be an ac power grid or any type of power consuming device configured to consume power output by the three-phase inverter 30. The load 30 includes home appliances such as an air conditioner, a home theater, an electric grinding wheel, an electric tool, a sewing machine, a DVD, a VCD, a computer, a television, a washing machine, a range hood, a refrigerator, a video recorder, a massager, and a fan.
In other embodiments, the load 30 also includes industrial equipment.
Based on the application environment provided by the above embodiment, an embodiment of the present invention provides a bus voltage compensation method, please refer to fig. 2, which includes the following steps:
step S100: and calculating a positive half-wave compensation coefficient and a negative half-wave compensation coefficient according to the bus voltage, the positive half bus voltage and the negative half bus voltage.
The bus voltage is generally referred to as the bus voltage, which is the voltage of the line of the initial connection section of the power output having the plurality of branches. Measured by a bus voltage transformer.
And after the bus voltage transformer measures the bus voltage, acquiring the bus voltage from the bus voltage transformer, and acquiring a positive half bus voltage and a negative half bus voltage according to the bus midpoint potential. The positive half-bus voltage is equal to the positive bus potential minus the bus midpoint potential, and the negative half-bus voltage is equal to the bus midpoint potential minus the negative bus potential.
Then, calculating a positive half-wave compensation coefficient according to the following formula (1) by using the obtained bus voltage and the positive half bus voltage:
Figure DEST_PATH_IMAGE021
(1)
wherein the content of the first and second substances,
Figure 840470DEST_PATH_IMAGE022
is the compensation coefficient of the positive half wave,
Figure 815379DEST_PATH_IMAGE023
in order to be the bus voltage,
Figure 500438DEST_PATH_IMAGE024
is the positive half bus voltage.
And then calculating a negative half-wave compensation coefficient according to the following formula (2) by using the obtained bus voltage and the negative half-bus voltage:
Figure 117364DEST_PATH_IMAGE025
(2)
wherein the content of the first and second substances,
Figure 938690DEST_PATH_IMAGE026
is a negative half-wave compensation coefficient,
Figure 615659DEST_PATH_IMAGE027
is the negative half bus voltage.
Step S200: and filtering and limiting the positive half-wave compensation coefficient and the negative half-wave compensation coefficient.
It should be noted that, the filtering and amplitude limiting for the positive half-wave compensation coefficient and the negative half-wave compensation coefficient refers to calculating the positive half-wave compensation coefficient and the negative half-wave compensation coefficient according to a preset filter transfer function, so as to achieve the effect that the positive half-wave compensation coefficient and the negative half-wave compensation coefficient are filtered by the filter, and amplitude limiting is performed after filtering.
In this embodiment, the filter is a passive first-order low-pass filter.
Specifically, the positive half-wave compensation coefficients are filtered according to the following filter transfer function:
Figure 522435DEST_PATH_IMAGE028
(3)
obtaining the filtered positive half-wave compensation coefficient, and then carrying out amplitude limiting on the filtered positive half-wave compensation coefficient to obtain the filtered positive half-wave compensation coefficient and the amplitude-limited positive half-wave compensation coefficient
Figure 411894DEST_PATH_IMAGE029
Wherein, the first and the second end of the pipe are connected with each other,
Figure 87726DEST_PATH_IMAGE030
is the filter cut-off frequency, s is the complex frequency of the laplace transform.
Filtering the negative half-wave compensation coefficient according to the filter transfer function (3) to obtain a filtered positive half-wave compensation coefficient, and then carrying out amplitude limiting on the filtered negative half-wave compensation coefficient to obtain a filtered and limited negative half-wave compensation coefficient
Figure 670017DEST_PATH_IMAGE031
Step S300: and calculating to obtain a three-phase voltage instruction.
The three-phase current of the three-phase inverter is the U-phase current, the V-phase current and the W-phase current respectively, and after the U-phase current, the V-phase current and the W-phase current are obtained through sampling, a U-phase voltage instruction, a V-phase voltage instruction and a W-phase voltage instruction are obtained through calculation in a vector control mode.
Specifically, the U-phase current, the V-phase current and the W-phase current of the three-phase inverter are subjected to Clark conversion (three-phase to two-phase stationary conversion is 3S/2S), and then subjected to Park conversion to be equivalent to alternating currents Id and Iq in a two-phase stationary coordinate system, wherein the alternating currents Id and Iq are respectively used as feedback quantities of a D-axis current regulator and a Q-axis current regulator. The feedback quantity of the D-axis current regulating machine and the Q-axis current regulator is commanded to
Figure 64089DEST_PATH_IMAGE032
And
Figure 22818DEST_PATH_IMAGE033
the outputs of the D-axis current regulating machine and the Q-axis current regulator are respectively
Figure 818735DEST_PATH_IMAGE034
And
Figure 571928DEST_PATH_IMAGE035
Figure 453296DEST_PATH_IMAGE036
and
Figure 950136DEST_PATH_IMAGE037
and obtaining a U-phase voltage instruction, a V-phase voltage instruction and a W-phase voltage instruction according to Park inverse transformation and Clark inverse transformation. This process is called vector control
The Clark transformation, Park transformation, vector control, and other means are conventional techniques, and will not be explained in detail here.
Step S400: and obtaining a compensated three-phase voltage instruction according to the positive half-wave compensation coefficient after filtering and amplitude limiting and the negative half-wave compensation coefficient after filtering and amplitude limiting.
Through the positive half-wave compensation coefficient after filtering and amplitude limiting and the negative half-wave compensation coefficient after filtering and amplitude limiting, the compensation calculation is carried out on the U-phase voltage command by distinguishing the positive half-wave from the negative half-wave according to the following formula (4):
Figure 600561DEST_PATH_IMAGE038
(4)
wherein the content of the first and second substances,
Figure 524654DEST_PATH_IMAGE039
for the compensated U-phase voltage command,
Figure 158898DEST_PATH_IMAGE040
for the U-phase voltage command,
Figure 193850DEST_PATH_IMAGE041
for filteringAnd the positive half-wave compensation coefficient after amplitude limiting,
Figure 964360DEST_PATH_IMAGE042
and compensating the coefficient for the negative half wave after filtering and amplitude limiting.
Through the positive half-wave compensation coefficient after filtering and amplitude limiting and the negative half-wave compensation coefficient after filtering and amplitude limiting, the compensation calculation is carried out on the positive half-wave and the negative half-wave which are distinguished from the V-phase voltage command according to the following formula (5):
Figure 59355DEST_PATH_IMAGE043
(5)
wherein the content of the first and second substances,
Figure 915315DEST_PATH_IMAGE044
for the compensated V-phase voltage command,
Figure 488379DEST_PATH_IMAGE045
is a V-phase voltage command.
Through the positive half-wave compensation coefficient after filtering and amplitude limiting and the negative half-wave compensation coefficient after filtering and amplitude limiting, the W-phase voltage command is distinguished into a positive half-wave and a negative half-wave for compensation calculation according to the following formula (6):
Figure 378975DEST_PATH_IMAGE046
(6)
wherein the content of the first and second substances,
Figure 644871DEST_PATH_IMAGE047
to compensate for the phase voltage command after W,
Figure 988128DEST_PATH_IMAGE048
is the W-phase voltage command.
Step S500: and performing pulse broadband modulation on the compensated three-phase voltage command to obtain a three-phase pulse width modulation wave.
The compensated U-phase voltage command, the compensated V-phase voltage command, and the compensated W-phase voltage command may be modulated by Discontinuous Pulse Width Modulation (DPWM) to obtain corresponding modulated waves.
And the compensated U-phase voltage command, the compensated V-phase voltage command and the compensated W-phase voltage command can be respectively modulated through Sinusoidal Pulse Width Modulation (SPWM) to obtain corresponding Modulation waves.
PWM varies the equivalent output voltage by varying the duty cycle of the output square wave. The method is widely used for motor speed regulation and valve control, for example, the mode is used for motor speed regulation of an electric vehicle.
The SPWM changes the pulse modulation mode on the basis of PWM, and the pulse width time duty ratio is arranged according to a sine rule, so that sine wave output can be realized by properly filtering an output waveform.
There are a variety of implementations of the SPWM including, but not limited to:
1. the equal area method: the method uses the basic principle of SPWM control as a starting point, can accurately calculate the on-off time of each switching element, and the obtained waveform is very close to a sine wave, but has the defects of complex calculation, large data occupation memory and incapability of real-time control.
2. Hardware modulation method: the principle is to use a desired waveform as a modulation signal, use a signal subjected to modulation as a carrier, and modulate the carrier to obtain a desired PWM waveform. An isosceles triangular wave is generally used as a carrier wave, and when the modulation signal wave is a sine wave, an SPWM waveform is obtained. The method is simple, a triangular wave carrier wave and a sine modulation wave generating circuit can be formed by an analog circuit, the intersection point of the triangular wave carrier wave and the sine modulation wave is determined by a comparator, and the SPWM wave can be generated by controlling the on-off of a switching device at the moment of the intersection point. However, such an analog circuit is complicated in structure and difficult to achieve precise control.
3. The software generation method comprises the following steps: the development of microcomputer technology has made it relatively easy to generate SPWM waveforms using software, and therefore software generation methods have come to work. The software generation method is actually a method for realizing modulation by software, and has two basic algorithms: namely, natural sampling and regular sampling.
(1) A natural sampling method: the method has the advantages that the obtained SPWM waveform is closest to the sine wave, but the intersection points of the triangle wave and the sine wave have arbitrariness, and the pulse centers are not equidistant in a period, so that a pulse width expression is an transcendental equation, the calculation is complex, and the real-time control is difficult.
(2) And (3) regular sampling method: a triangular wave is generally used as a carrier wave. When the triangular wave samples the sinusoidal wave only at the top point (or bottom point) position, the pulse width determined by the intersection point of the stepped wave and the triangular wave is symmetrical in the position of a carrier period (namely, sampling period), and the method is called as symmetrical regular sampling. When the triangular wave samples the sinusoidal wave at the time of both the top and bottom points thereof, the pulse width determined by the intersection of the step wave and the triangular wave is generally asymmetric in position within one carrier period (in this case, twice the sampling period), which is called asymmetric regular sampling.
Besides the two Modulation methods, the compensated U-phase voltage command, the compensated V-phase voltage command and the compensated W-phase voltage command can be modulated respectively by Space Vector Pulse Width Modulation (SVPWM) to obtain corresponding Modulation waves.
The SVPWM takes the ideal flux linkage circle of the stator of a three-phase symmetrical motor as a reference standard when three-phase symmetrical sine-wave voltage is used for supplying power, and different switching modes of a three-phase inverter are properly switched, so that PWM waves are formed.
Step S600: and respectively obtaining the conduction duty ratio of the three-phase bridge arm according to the three-phase pulse width modulation wave.
And obtaining the conduction duty ratios of the U-phase bridge arm, the V-phase bridge arm and the W-phase bridge arm according to the U-phase pulse width modulation wave, the V-phase pulse width modulation wave and the W-phase pulse width modulation wave.
It should be noted that the bus voltage compensation method provided by the embodiment of the present invention may be applied to a photovoltaic inverter, an energy storage PCS, a rectifier, a charger, a UPS, an ac power supply, a frequency converter, a servo driver, an active power filter, a static var generator, a dynamic voltage compensator, and the like, in addition to a three-phase inverter.
Based on the bus voltage compensation method, the compensation principle of the T-type three-level inverter is analyzed, the circuit structure diagram of the main circuit of the T-type three-level inverter is shown in FIG. 3,
the U-phase bridge arm is composed of a switching tube Q1, a switching tube Q2, a switching tube Q3 and a switching tube Q4, and is connected to a first inductor L1; the V-phase bridge arm is composed of a switching tube Q5, a switching tube Q6, a switching tube Q7 and a switching tube Q8, and the V-phase bridge arm is connected to a second inductor L2; the W-phase bridge arm is composed of a switching tube Q9, a switching tube Q10, a switching tube Q11 and a switching tube Q12, and the W-phase bridge arm is connected to a third inductor L3;
taking a U-phase bridge arm as an example for analysis:
assuming that a U-phase bridge arm of the T-type three-level inverter operates in a certain positive half-wave period, the conduction duty ratio of a switching tube Q1 is equal to
Figure 630462DEST_PATH_IMAGE049
Then during this switching period, the desired voltage output by the bridge arm
Figure 109985DEST_PATH_IMAGE050
Comprises the following steps:
Figure 812361DEST_PATH_IMAGE051
(7)
and the actual voltage output by the bridge arm
Figure 377335DEST_PATH_IMAGE052
Comprises the following steps:
Figure 557781DEST_PATH_IMAGE053
(8)
the positive half bus voltage is generated due to the larger fluctuation of the bus midpoint potential
Figure 157389DEST_PATH_IMAGE054
Not equal to bus voltage
Figure 765088DEST_PATH_IMAGE055
One half of (a), resulting in an actual output voltage
Figure 817358DEST_PATH_IMAGE056
Is not equal to
Figure 535915DEST_PATH_IMAGE057
Similarly, assuming that the U-phase bridge arm of the inverter operates in a certain switching period of the negative half-wave, the switching tube Q4 is turned on at a duty ratio of
Figure 255609DEST_PATH_IMAGE058
Then during this switching period, the desired voltage output by the bridge arm
Figure 34209DEST_PATH_IMAGE059
Comprises the following steps:
Figure 839354DEST_PATH_IMAGE060
(9)
and the actual voltage output by the bridge arm
Figure 361603DEST_PATH_IMAGE052
Comprises the following steps:
Figure 670224DEST_PATH_IMAGE061
(10)
negative half bus voltage due to large fluctuation of bus midpoint potential
Figure 619726DEST_PATH_IMAGE062
Not equal to bus voltage
Figure 381008DEST_PATH_IMAGE063
One half of (a), resulting in an actual output voltage
Figure 972527DEST_PATH_IMAGE064
Is not equal to
Figure 135655DEST_PATH_IMAGE065
The fluctuation of the midpoint voltage of the bus causes the actual output voltage to deviate from the expected value, so that the actual output voltage is distorted, and the output current is distorted. In order to correct the output voltage value and inhibit the distortion of the output current, the technical scheme compensates the conduction duty ratio, namely the compensated conduction duty ratio
Figure 521637DEST_PATH_IMAGE066
Comprises the following steps:
Figure 35795DEST_PATH_IMAGE067
(11)
the actual output voltage of the positive half-wave after compensation
Figure 634266DEST_PATH_IMAGE052
Comprises the following steps:
Figure 651901DEST_PATH_IMAGE068
(12)
compensated positive half-wave actual output voltage
Figure 474363DEST_PATH_IMAGE069
Equal to the desired output voltage
Figure 210238DEST_PATH_IMAGE057
. Same compensated negative half-wave actual output voltage
Figure 612401DEST_PATH_IMAGE070
Comprises the following steps:
Figure 750121DEST_PATH_IMAGE071
(13)
compensated negative half-wave actual output voltage
Figure 743485DEST_PATH_IMAGE072
Is also equal to
Figure 701076DEST_PATH_IMAGE073
. By compensation, the influence of the neutral point potential fluctuation of the bus on the output voltage is counteracted, and the distortion rate of the output current is not influenced any more.
In order to fully explain the bus voltage compensation method of the embodiment of the present application, the bus voltage compensation effect is described in detail below with reference to specific examples.
The photovoltaic simulator is characterized in that a photovoltaic simulator power supply is connected with a direct current side of a photovoltaic inverter, an alternating current side of the photovoltaic inverter is connected with an alternating current power grid, and the photovoltaic inverter is started to operate to rated power so as to construct an application environment.
The waveform of the output current of the photovoltaic inverter in the application environment at this time is tested by using an oscilloscope, and a waveform diagram of the output current of the photovoltaic inverter before compensation is obtained, as shown in fig. 4.
The distortion rate THD of the output current of the photovoltaic inverter at this time was measured using a power analyzer, and a data graph of the output current of the photovoltaic inverter before compensation was obtained, as shown in fig. 6. After the bus voltage compensation method of the embodiment is applied to the constructed application environment for bus voltage compensation, an oscilloscope is used for testing the waveform of the output current of the photovoltaic inverter at the moment, and a waveform diagram of the output current of the compensated photovoltaic inverter is obtained, as shown in fig. 5. The THD of the output current of the photovoltaic inverter at this time was measured using a power analyzer, and a data graph of the output current of the compensated photovoltaic inverter was obtained, as shown in fig. 7.
As is apparent from a comparison between the waveform diagrams shown in fig. 4 and fig. 5, the waveform smoothing degree of the output current of the photovoltaic inverter after the bus voltage compensation method of the embodiment of the present application is applied to the bus compensation is obviously better than the waveform smoothing degree of the output current of the photovoltaic inverter before the compensation.
In addition, as shown in fig. 6, before bus voltage compensation is performed, the THD of the output current of the photovoltaic inverter in the application environment is 2.729%; as shown in fig. 7, the THD of the output current of the photovoltaic inverter in the application environment is reduced to 0.877% after the bus voltage compensation is performed.
Therefore, the THD of the output current of the photovoltaic inverter is effectively suppressed after the bus voltage compensation method provided by the embodiment of the invention is applied.
The technical scheme allows the midpoint potential to have a certain fluctuation range and then respectively follows the following steps
Figure 438088DEST_PATH_IMAGE074
And is currently
Figure 430315DEST_PATH_IMAGE075
Half bus voltage and negative half bus voltage
Figure 63422DEST_PATH_IMAGE076
The ratio of (c) to (d) compensates the inverter conduction duty cycle. Even if the bus voltage fluctuates by 20%, the output current still has better sine degree and lower distortion rate. In the prior art, the sine degree and the distortion rate of output current are ensured by strictly controlling the fluctuation amplitude of the midpoint potential of a bus through a hardware or software algorithm.
It should be noted that, in order to obtain higher efficiency, the modulation method often adopts DPWM modulation. DPWM modulation, on the one hand switching frequency is low and reduces switching loss, and on the other hand has higher direct current busbar voltage utilization ratio, can reduce MPPT's step-up ratio, improves MPPT's efficiency. With DPWM modulation, the ability of redundant vectors or zero sequence voltages to adjust the bus midpoint potential is severely impaired. Since the DPWM modulated wave is essentially generated by selecting a specific redundancy vector or injecting a specific zero sequence voltage. Therefore, the technical scheme of inhibiting the neutral point potential fluctuation of the bus by adopting a software method is not applicable to modulation modes such as DPWM and the like.
Compared with the prior art, the method and the device can compensate the conduction duty ratio of the inverter according to the neutral point potential fluctuation of the bus, can still inhibit the distortion of the output current of the inverter when the neutral point potential fluctuation amplitude of the bus is large, and are suitable for modulation modes such as DPWM, SPWM and SVPWM. Compared with the mode of an additional hardware circuit, the current distortion is overcome, and the cost and the product volume are reduced; and the defect that the traditional software method is not suitable for modulation modes such as DPWM and the like is overcome.
Based on the above-mentioned bus voltage compensation method, the present invention provides another embodiment, please refer to fig. 8, fig. 8 is a schematic structural diagram of an electronic device 100 according to an embodiment of the present invention, where the electronic device 100 includes:
one or more processors 101 and a memory 102, with one processor 101 being illustrated in fig. 8.
The processor 101 and the memory 102 may be connected by a bus or other means, and fig. 8 illustrates the connection by a bus as an example.
Memory 102, which is a non-volatile computer-readable storage medium, may be used to store non-volatile software programs, non-volatile computer-executable programs, and modules. The processor 101 executes various functional applications and data processing of the electronic device by executing the nonvolatile software program, instructions and units stored in the memory 602, that is, implements a bus voltage compensation method of the above-described method embodiment.
The memory 102 may include a storage program area and a storage data area, wherein the storage program area may store an operating system, an application program required for at least one function; the storage data area may store data created according to the use of the electronic device, and the like. Further, the memory 102 may include high speed random access memory, and may also include non-volatile memory, such as at least one magnetic disk storage device, flash memory device, or other non-volatile solid state storage device. In some embodiments, memory 102 may optionally include memory located remotely from processor 101, which may be connected to an electronic device via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
The one or more units are stored in the memory 102 and, when executed by the one or more processors 101, perform a bus voltage compensation method of any of the above-described method embodiments.
The electronic device can execute the bus voltage compensation method provided by the embodiment of the invention, and has the corresponding program module and beneficial effects of the execution method. For technical details that are not described in detail in the embodiments of the electronic device, reference may be made to a bus voltage compensation method provided in the embodiments of the present invention.
An embodiment of the present invention further provides a nonvolatile computer-readable storage medium, which may be included in the device described in the above embodiment; or may be separate and not incorporated into the device. The non-transitory computer readable storage medium carries one or more programs which, when executed, implement the methods of embodiments of the present disclosure.
Based on the bus voltage compensation method, the embodiment of the invention further provides a bus voltage compensation system, as shown in fig. 9, which includes a three-phase inverter 10, a sampling device 40, and the electronic device 100 mentioned in the above embodiment, wherein,
the three-phase inverter 10 is used for converting a direct-current bus voltage into an alternating-current power and outputting the alternating-current power; the sampling device 40 is used for collecting the bus voltage, the positive half bus voltage, the negative half bus voltage, the U-phase voltage, the V-phase voltage and the W-phase voltage of the three-phase inverter 10. The three-phase inverter 10 is connected to a sampling device 40.
It should be noted that the sampling device 40 may include a bus voltage transformer in the three-phase inverter 10, and thus the bus voltage, the positive half bus voltage and the negative half bus voltage may be directly obtained from the bus voltage transformer. The sampling device 40 may be any type of voltage measuring instrument.
The electronic device 100 is connected to the sampling device 40, and performs a bus voltage compensation method as described above according to the bus voltage sampled by the sampling device 40, the positive half bus voltage, the negative half bus voltage, the U-phase voltage, the V-phase voltage, and the W-phase voltage.
It should be noted that the electronic device according to the embodiment of the present application exists in various forms, including but not limited to:
(1) the ultra-mobile personal computer equipment belongs to the category of personal computers, has calculation and processing functions and generally has the characteristic of mobile internet access. Such terminals include PDA, MID, and UMPC devices, such as ipads.
(2) The server is similar to a general computer architecture, but has higher requirements on processing capability, stability, reliability, safety, expandability, manageability and the like because of the need of providing highly reliable services.
(3) Other electronic devices.
The above-described embodiments of the apparatus are merely illustrative, and the units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of the present embodiment.
Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; within the idea of the invention, also technical features in the above embodiments or in different embodiments may be combined, steps may be implemented in any order, and there are many other variations of the different aspects of the invention as described above, which are not provided in detail for the sake of brevity; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present application.

Claims (10)

1. A bus voltage compensation method is applied to a three-phase inverter and is characterized by comprising the following steps:
calculating a positive half-wave compensation coefficient and a negative half-wave compensation coefficient according to the bus voltage, the positive half bus voltage and the negative half bus voltage:
filtering and amplitude limiting are carried out on the positive half-wave compensation coefficient and the negative half-wave compensation coefficient:
obtaining a U-phase voltage instruction, a V-phase voltage instruction and a W-phase voltage instruction through vector control;
according to the positive half-wave compensation coefficient after filtering and amplitude limiting and the negative half-wave compensation coefficient after filtering and amplitude limiting, respectively distinguishing a positive half-wave from a negative half-wave for the U-phase voltage command, the V-phase voltage command and the W-phase voltage command, and performing compensation calculation to obtain a compensated U-phase voltage command, a compensated V-phase voltage command and a compensated W-phase voltage command;
respectively carrying out pulse broadband modulation on the compensated U-phase voltage instruction, the compensated V-phase voltage instruction and the compensated W-phase voltage instruction to obtain a U-phase pulse width modulation wave, a V-phase pulse width modulation wave and a W-phase pulse width modulation wave;
and obtaining the conduction duty ratios of the U-phase bridge arm, the V-phase bridge arm and the W-phase bridge arm according to the U-phase pulse width modulation wave, the V-phase pulse width modulation wave and the W-phase pulse width modulation wave.
2. The method of claim 1, wherein calculating positive and negative half-wave compensation coefficients from the bus voltage, the positive half-bus voltage, and the negative half-bus voltage comprises:
acquiring the bus voltage, the positive half bus voltage and the negative half bus voltage;
calculating the positive half-wave compensation coefficient according to the following formula:
Figure 546029DEST_PATH_IMAGE001
wherein the content of the first and second substances,
Figure 801561DEST_PATH_IMAGE002
for the compensation coefficient of the positive half-wave,
Figure 316856DEST_PATH_IMAGE003
in order to be able to measure the bus voltage,
Figure 770971DEST_PATH_IMAGE004
is the positive half bus voltage;
calculating the negative half-wave compensation coefficient according to the following formula:
Figure 549571DEST_PATH_IMAGE005
wherein, the first and the second end of the pipe are connected with each other,
Figure 89137DEST_PATH_IMAGE006
for the negative half-wave compensation coefficient,
Figure 345806DEST_PATH_IMAGE007
is the negative half bus voltage.
3. The method of claim 2, wherein said filtering and clipping the positive half-wave compensation coefficient and the negative half-wave compensation coefficient comprises:
filtering the positive half-wave compensation coefficient according to the following filter transfer function:
Figure 654427DEST_PATH_IMAGE008
wherein the content of the first and second substances,
Figure 603929DEST_PATH_IMAGE009
is the filter cut-off frequency, s is the complex frequency of the laplace transform;
filtering the negative half-wave compensation coefficient according to the filter transfer function;
and then respectively carrying out amplitude limiting on the filtered positive half-wave compensation coefficient and the filtered negative half-wave compensation coefficient.
4. The method of claim 3, wherein the calculating obtains a U-phase voltage command, a V-phase voltage command, and a W-phase voltage command, comprising:
acquiring the U-phase current, the V-phase current and the W-phase current of the three-phase inverter;
according to the U-phase current, the V-phase current and the W-phase current, obtaining a D-axis current and a Q-axis current under a rotating coordinate system through Clark conversion and Park conversion, obtaining a control voltage on a D axis and a control voltage on a Q axis through vector control, and obtaining a U-phase voltage instruction, a V-phase voltage instruction and a W-phase voltage instruction through Park inverse conversion and Clark inverse conversion calculation respectively.
5. The method according to claim 4, wherein the performing compensation calculations for the U-phase voltage command, the V-phase voltage command, and the W-phase voltage command separately distinguishing between a positive half wave and a negative half wave comprises:
and carrying out compensation calculation on the U-phase voltage command by distinguishing a positive half wave and a negative half wave according to the following formula:
Figure 365212DEST_PATH_IMAGE010
wherein the content of the first and second substances,
Figure 487888DEST_PATH_IMAGE011
for the compensated U-phase voltage command,
Figure 651016DEST_PATH_IMAGE012
in order to command the U-phase voltage,
Figure 771419DEST_PATH_IMAGE013
for the positive half-wave compensation coefficients after filtering and clipping,
Figure 285577DEST_PATH_IMAGE014
the compensation coefficient is a negative half-wave compensation coefficient after filtering and amplitude limiting;
and carrying out compensation calculation on the V-phase voltage command by distinguishing a positive half wave and a negative half wave according to the following formula:
Figure 884049DEST_PATH_IMAGE015
wherein the content of the first and second substances,
Figure 901683DEST_PATH_IMAGE016
for the compensated V-phase voltage command,
Figure 458567DEST_PATH_IMAGE017
is the V-phase voltage command;
and carrying out compensation calculation on the W-phase voltage command by distinguishing a positive half wave and a negative half wave according to the following formula:
Figure 194441DEST_PATH_IMAGE018
wherein the content of the first and second substances,
Figure 862183DEST_PATH_IMAGE019
for the compensated W-phase voltage command,
Figure 531062DEST_PATH_IMAGE020
the W-phase voltage command is obtained.
6. The method of claim 5, wherein said pulse-width modulating said compensated U-phase voltage command, said compensated V-phase voltage command, and said compensated W-phase voltage command, respectively, comprises:
performing discontinuous pulse broadband modulation on the compensated U-phase voltage command, the compensated V-phase voltage command and the compensated W-phase voltage command; or
Performing sinusoidal pulse broadband modulation on the compensated U-phase voltage command, the compensated V-phase voltage command and the compensated W-phase voltage command; or
And carrying out space vector pulse broadband modulation on the compensated U-phase voltage command, the compensated V-phase voltage command and the compensated W-phase voltage command.
7. An electronic device, comprising:
at least one processor; and the number of the first and second groups,
a memory communicatively coupled to the at least one processor; wherein the content of the first and second substances,
the memory stores instructions executable by the at least one processor to enable the at least one processor to perform a bus voltage compensation method as claimed in any one of claims 1 to 6.
8. A non-transitory computer storage medium storing computer-executable instructions that, when executed by one or more processors, cause the one or more processors to perform a method of bus voltage compensation as claimed in any one of claims 1 to 6.
9. A bus voltage compensation system, comprising:
the three-phase inverter is used for converting the direct-current bus voltage into alternating-current power to be output;
the sampling equipment is used for acquiring the bus voltage, the positive half bus voltage, the negative half bus voltage, the U-phase voltage, the V-phase voltage, the W-phase voltage, the U-phase current, the V-phase current and the W-phase current of the three-phase inverter;
an electronic device as claimed in claim 7 for performing a bus voltage compensation method as claimed in any one of claims 1 to 6, the electronic device being connected to the sampling device.
10. The system of claim 9, wherein the topology of the three-phase inverter comprises: t-type three-level topology, I-type three-level topology, and diode-clamped three-level topology.
CN202210909462.XA 2022-07-29 2022-07-29 Bus voltage compensation method, electronic equipment and system thereof Pending CN114977861A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202210909462.XA CN114977861A (en) 2022-07-29 2022-07-29 Bus voltage compensation method, electronic equipment and system thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202210909462.XA CN114977861A (en) 2022-07-29 2022-07-29 Bus voltage compensation method, electronic equipment and system thereof

Publications (1)

Publication Number Publication Date
CN114977861A true CN114977861A (en) 2022-08-30

Family

ID=82969293

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202210909462.XA Pending CN114977861A (en) 2022-07-29 2022-07-29 Bus voltage compensation method, electronic equipment and system thereof

Country Status (1)

Country Link
CN (1) CN114977861A (en)

Citations (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10164856A (en) * 1996-11-29 1998-06-19 Hitachi Ltd Controller for tri-level inverter/tri-level converter
JP2002252984A (en) * 2001-02-23 2002-09-06 Hitachi Ltd Method and apparatus for controlling power converter
JP2003180079A (en) * 2001-12-07 2003-06-27 Mitsubishi Electric Corp Neutral clamp type power converter
US20160111975A1 (en) * 2014-10-20 2016-04-21 Kabushiki Kaisha Toshiba Control device of neutral-point-clamped power converter apparatus, and control method of neutral-point-clamped power converter apparatus
CN105900328A (en) * 2014-01-06 2016-08-24 东芝三菱电机产业系统株式会社 Electric power conversion system
JP2016214021A (en) * 2015-05-13 2016-12-15 株式会社明電舎 Control apparatus and control method for multilevel inverter
CN106253726A (en) * 2016-08-04 2016-12-21 中国船舶重工集团公司第七〇九研究所 A kind of three-level inverter direct current neutral-point voltage balance method
JP6131360B1 (en) * 2016-03-28 2017-05-17 三菱電機エンジニアリング株式会社 Power converter
CN107834885A (en) * 2017-11-22 2018-03-23 华南理工大学 Suppress the carrier modulating method of three level NPC type inverters midpoint potentials concussion
CN108879773A (en) * 2018-07-19 2018-11-23 湖南大学 Six phase wind-driven generator direct current grid connected structures of one kind and its control method
JP2019097366A (en) * 2017-11-28 2019-06-20 株式会社明電舎 Method for suppressing and controlling leakage current of power converter
CN110165952A (en) * 2019-04-30 2019-08-23 浙江工业大学 A kind of no electrolytic capacitor permanent magnet synchronous motor vector controlled busbar voltage fluctuation compensation method
CN113746389A (en) * 2021-11-03 2021-12-03 宁波奥克斯电气股份有限公司 Air conditioner, bus voltage compensation method and device and storage medium

Patent Citations (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10164856A (en) * 1996-11-29 1998-06-19 Hitachi Ltd Controller for tri-level inverter/tri-level converter
JP2002252984A (en) * 2001-02-23 2002-09-06 Hitachi Ltd Method and apparatus for controlling power converter
JP2003180079A (en) * 2001-12-07 2003-06-27 Mitsubishi Electric Corp Neutral clamp type power converter
CN105900328A (en) * 2014-01-06 2016-08-24 东芝三菱电机产业系统株式会社 Electric power conversion system
US20160111975A1 (en) * 2014-10-20 2016-04-21 Kabushiki Kaisha Toshiba Control device of neutral-point-clamped power converter apparatus, and control method of neutral-point-clamped power converter apparatus
JP2016214021A (en) * 2015-05-13 2016-12-15 株式会社明電舎 Control apparatus and control method for multilevel inverter
JP6131360B1 (en) * 2016-03-28 2017-05-17 三菱電機エンジニアリング株式会社 Power converter
CN106253726A (en) * 2016-08-04 2016-12-21 中国船舶重工集团公司第七〇九研究所 A kind of three-level inverter direct current neutral-point voltage balance method
CN107834885A (en) * 2017-11-22 2018-03-23 华南理工大学 Suppress the carrier modulating method of three level NPC type inverters midpoint potentials concussion
JP2019097366A (en) * 2017-11-28 2019-06-20 株式会社明電舎 Method for suppressing and controlling leakage current of power converter
CN108879773A (en) * 2018-07-19 2018-11-23 湖南大学 Six phase wind-driven generator direct current grid connected structures of one kind and its control method
CN110165952A (en) * 2019-04-30 2019-08-23 浙江工业大学 A kind of no electrolytic capacitor permanent magnet synchronous motor vector controlled busbar voltage fluctuation compensation method
CN113746389A (en) * 2021-11-03 2021-12-03 宁波奥克斯电气股份有限公司 Air conditioner, bus voltage compensation method and device and storage medium

Similar Documents

Publication Publication Date Title
Monfared et al. Direct active and reactive power control of single-phase grid-tie converters
JP6710810B2 (en) Three-phase converter and three-phase converter control method
Pouresmaeil et al. Control scheme of three-level NPC inverter for integration of renewable energy resources into AC grid
EP2003758B1 (en) Power conversion apparatus and module including the power conversion apparatus
CN110297182B (en) Power electronic load system for simulating open-winding permanent magnet synchronous motor
KR20160109745A (en) Motor driving apparatus
JP6465782B2 (en) Method for generating a space vector modulated signal
CN102023251A (en) Current detecting method, inverter device and convertor device using the same
He et al. Linear active disturbance rejection control for three-phase voltage-source PWM rectifier
US20190097559A1 (en) Power conversion device, motor drive device, and refrigerator using same
US11146181B2 (en) Control method and apparatus for common-mode modulated wave of single-phase five-level inverter
Cárdenas et al. A repetitive control system for four-leg matrix converters feeding non-linear loads
CN115037178A (en) Bus voltage balance capability adjusting method and device
CN113612398B (en) Nonlinear control method and system for high-frequency chain matrix converter under power grid distortion working condition
Marinus et al. A bridgeless controlled rectifier for single split-phase systems
Lin et al. A novel NPC inverter for harmonics elimination and reactive power compensation
Sangsefidi et al. Model predictive control of single-phase grid-connected voltage-sourced converters
CN114301361B (en) Control method of electrolytic capacitor-free permanent magnet synchronous motor driving system based on bus current control
CN114977861A (en) Bus voltage compensation method, electronic equipment and system thereof
Jing et al. Discrete dynamical predictive control on current vector for three-phase PWM rectifier
CN109962659B (en) Motor drive control method, motor drive control device, motor drive control circuit and variable frequency air conditioner
Quan et al. An improved control method for cascaded multilevel inverters based on sliding mode control technique
CN112350595A (en) Analog impedance control method for inhibiting input unbalance influence of AC/DC matrix converter
Mehdi et al. Two vector based direct power control of AC/DC grid connected converters using a constant switching frequency
Mathur et al. Comparative study of total harmonic distortion on the current waveform by PWM fed and Vector controlled Induction motor drives

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
RJ01 Rejection of invention patent application after publication
RJ01 Rejection of invention patent application after publication

Application publication date: 20220830