CN114944750B

CN114944750B - Inverter circuit, driving method of switching tube and inverter

Info

Publication number: CN114944750B
Application number: CN202210862307.7A
Authority: CN
Inventors: 姜国中
Original assignee: Shenzhen Sofarsolar Co Ltd
Current assignee: Shenzhen Sofarsolar Co Ltd
Priority date: 2022-07-21
Filing date: 2022-07-21
Publication date: 2022-11-01
Anticipated expiration: 2042-07-21
Also published as: CN114944750A

Abstract

The application discloses an inverter circuit, a driving method of a switch tube and an inverter. The controller is used for outputting a pulse width modulation signal. The first bus capacitor is arranged on a direct-current bus in an inverter circuit, an inverter branch is respectively connected with a controller, a direct-current power supply and the direct-current bus in the inverter circuit, the inverter branch is used for responding to a pulse width modulation signal and converting the direct-current power supply into an alternating-current power supply, filtering the alternating-current power supply and then outputting power grid voltage, the inverter branch comprises a capacitive module for filtering, and K is an integer larger than or equal to 2. And the inductive branch is connected between the capacitive module and the direct current bus and used for reducing the resonance angular frequency of the inverter circuit. Through the mode, the effect of inhibiting the common-mode current can be improved.

Description

Inverter circuit, driving method of switching tube and inverter

Technical Field

The present disclosure relates to the field of inverter technologies, and in particular, to an inverter circuit, a driving method of a switching tube, and an inverter.

Background

In order to reduce the floor drain current of the photovoltaic inverter, the midpoint of a filter capacitor of the existing three-phase inverter is mostly connected to the midpoint of a direct-current bus, so that a low-impedance path is provided for the common-mode current. Therefore, most common-mode current flows back to the midpoint of the direct-current bus through the neutral line, and the current of the inverter to the ground drain is greatly reduced.

However, an internal common mode current loop of the inverter is easy to form LC resonance, so that the current stress of a switching tube is increased, and the waveform quality of the inverter inductance current is influenced. Therefore, the common mode current needs to be suppressed. At present, the common-mode current is usually suppressed by adopting a pure software mode.

However, the pure software method is only suitable for the application scenario when the resonance angular frequency of the inverter is low. And when the resonance angular frequency of the inverter is higher, the suppression effect on the common mode current is poorer.

Disclosure of Invention

The present application aims to provide an inverter circuit, a driving method of a switching tube, and an inverter, which can improve the effect of suppressing a common mode current.

To achieve the above object, in a first aspect, the present application provides an inverter circuit comprising:

a controller for outputting a pulse width modulated signal;

the first bus capacitor is arranged on a direct current bus in the inverter circuit;

the K-path inversion branch circuits are respectively connected with the controller, the direct-current power supply and a direct-current bus in the inversion circuit and used for responding to the pulse width modulation signals to convert the direct-current power supply into an alternating-current power supply and outputting power grid voltage after filtering the alternating-current power supply, wherein each inversion branch circuit comprises a capacitive module for filtering, and K is an integer greater than or equal to 2;

and the inductive branch is connected between the capacitive module and the direct current bus and is used for reducing the resonance angular frequency of the inverter circuit.

In an optional manner, the inverting branch further includes:

a voltage conversion module, a first end of the voltage conversion module and the dc power supply are connected to a first end of the dc bus, a second end of the voltage conversion module and the dc power supply are connected to a second end of the dc bus, a third end of the voltage conversion module is connected to the controller, and the voltage conversion module is configured to convert the dc power supply into an ac power supply in response to the pwm signal;

the first end of the first inductive module is connected with the first end of the second inductive module and the first end of the capacitive module, the second end of the capacitive module is connected with the first end of the inductive branch, the second end of the first inductive module is connected with the fourth end of the voltage conversion module, and the second end of the second inductive module is used for outputting the grid voltage;

the capacitive module, the first inductive module and the second inductive module form an LCL filter to filter the alternating current power supply and then output the power grid voltage.

In an optional manner, the voltage conversion module includes a first switch and a second switch;

the first end of the first switch and the first end of the second switch are both connected with the controller, the second end of the first switch is connected with the third end of the second switch, the third end of the first switch and the direct-current power supply are connected with the first end of the direct-current bus, and the second end of the second switch and the direct-current power supply are connected with the second end of the direct-current bus;

the third terminal of the first switch is the first terminal of the voltage conversion module, the second terminal of the second switch is the second terminal of the voltage conversion module, and the second terminal of the first switch is the fourth terminal of the voltage conversion module.

In an optional manner, the voltage conversion module further includes a third switch and a fourth switch;

the first end of the third switch and the first end of the fourth switch are both connected with the controller, the third end of the third switch is connected with the third end of the direct current bus, the second end of the third switch is connected with the second end of the fourth switch, and the third end of the fourth switch is connected with the second end of the first switch.

In an alternative, the first inductive module comprises a first inductor;

a first end of the first inductor is connected with a fourth end of the voltage conversion module, and a second end of the first inductor is respectively connected with a first end of the capacitive module and a first end of the second inductive module;

the second end of the first inductor is the first end of the first inductive module, and the first end of the first inductor is the second end of the first inductive module.

In an alternative, the second inductive module comprises a second inductor;

the first end of the second inductor is connected with the first end of the capacitive module and the first end of the first inductive module respectively, and the second end of the second inductor is used for outputting the power grid voltage;

the first end of the second inductor is the first end of the second inductive module, and the second end of the second inductor is the second end of the second inductive module.

In an alternative form, the capacitive module includes a first capacitor;

the first end of the first capacitor is connected with the first end of the first inductive module and the first end of the second inductive module respectively, and the second end of the first capacitor is connected with the first end of the inductive branch circuit;

the first end of the first capacitor is a first end of the capacitive module, and the second end of the first capacitor is a second end of the capacitive module.

In an alternative, the inductive branch comprises a third inductance;

the first end of the third inductor is connected with the second end of the capacitive module, and the second end of the third inductor is connected with the direct current bus;

the first end of the third inductor is the first end of the inductive branch, and the second end of the third inductor is the second end of the inductive branch.

In an optional manner, the inverter circuit further includes a second bus capacitor disposed on the dc bus;

the first end of the first bus capacitor is connected with the first end of the direct current bus, the second end of the first bus capacitor and the first end of the second bus capacitor are both connected with the third end of the direct current bus, and the second end of the second bus capacitor is connected with the second end of the direct current bus.

In a second aspect, the present application provides a driving method of a switching tube, applied to the inverter circuit described above, the method including:

obtaining the current of each path of inversion branch in the inversion circuit, and determining the common-mode current of the inversion circuit according to the average value of each current;

determining a common-mode voltage rejection component of the inverter circuit by the following equation:

U_c(t)=-R₀i_cm(t)

wherein, U_c(t) is the common mode voltage rejection component, R₀Is the resistance value of a dummy resistor, i_cm(t) is the common mode current, t is time;

driving the switching tube according to the common mode voltage rejection component

In an optional manner, before the obtaining a current of each inverting branch in the inverting circuit and determining a common-mode current of the inverting circuit according to an average value of the currents, the method further includes:

calculating a first resonance angular frequency according to a characteristic value of an electronic element of an inversion branch in the inversion circuit;

calculating a first impedance angle according to the first resonance angular frequency;

and if the first impedance angle is smaller than a first preset threshold value, short-circuiting an inductive branch in the inverter circuit.

In an optional manner, the method further comprises:

if the first impedance angle is greater than or equal to the first preset threshold, calculating a second resonance angular frequency according to a second preset threshold, and determining an inductance value of the inductive branch according to the second resonance angular frequency;

wherein the second preset threshold is smaller than the first preset threshold.

In a third aspect, the present application provides an inverter circuit comprising:

at least one switching tube;

the controller, the controller with the switch tube is connected, the controller is used for exporting pulse width modulation signal drive the switch tube, the controller includes:

at least one processor and a memory communicatively coupled to the at least one processor, the memory storing instructions executable by the at least one processor to enable the at least one processor to perform a method as described above.

In a fourth aspect, the present application provides an inverter comprising an inverter circuit as described above.

In a fifth aspect, the present application provides a non-transitory computer-readable storage medium having stored thereon computer-executable instructions that, when executed by a processor, cause the processor to perform the method as described above.

The beneficial effect of this application is: the application provides an inverter circuit includes controller, first bus capacitance, K way contravariant branch road and inductive branch road. The first bus capacitor is arranged on a direct-current bus in the inverter circuit, any one of the K inverter branches is connected with the controller, the direct-current power supply and the direct-current bus in the inverter circuit respectively, the inductive branch is connected between the capacitive module and the direct-current bus, the inverter branches comprise capacitive modules for filtering, and K is an integer larger than or equal to 2. The controller is used for outputting pulse width modulation signals, and the inversion branch circuit is used for responding to the pulse width modulation signals, converting the direct current power supply into the alternating current power supply and filtering the alternating current power supply, so that the inversion function is realized. Moreover, even if the current resonance angular frequency of the inverter circuit is higher, the resonance angular frequency of the inverter circuit can be reduced by adding the inductive branch circuit, so that the suppression effect on the common-mode current can be effectively improved.

Drawings

One or more embodiments are illustrated by way of example in the accompanying drawings which correspond to and are not to be construed as limiting the embodiments, in which elements having the same reference numeral designations represent like elements throughout, and in which the drawings are not to be construed as limiting in scale unless otherwise specified.

Fig. 1 is a schematic structural diagram of an inverter circuit according to an embodiment of the present disclosure;

fig. 2 is a schematic structural diagram of an inverter circuit according to another embodiment of the present disclosure;

fig. 3 is a schematic structural diagram of an inverter circuit according to yet another embodiment of the present application;

fig. 4 is a schematic circuit diagram of an inverter circuit according to an embodiment of the present disclosure;

fig. 5 is a schematic circuit diagram of an inverter circuit according to another embodiment of the present disclosure;

fig. 6 is a schematic circuit diagram of an inverter circuit according to another embodiment of the present disclosure;

fig. 7 is a schematic circuit diagram of an inverter circuit according to another embodiment of the present application;

fig. 8 is a schematic circuit diagram of an inverter circuit according to another embodiment of the present disclosure;

fig. 9 is a schematic circuit diagram of an inverter circuit according to yet another embodiment of the present application;

fig. 10 is a schematic circuit diagram of an inverter circuit according to yet another embodiment of the present application;

fig. 11 is a flowchart of a driving method of a switching tube according to an embodiment of the present disclosure;

FIG. 12 is a flowchart of a method performed before step 1101 shown in FIG. 11 is executed according to an embodiment of the present application;

fig. 13 is a schematic diagram of currents flowing through an inductive branch according to an embodiment of the present application;

fig. 14 is a flowchart of a method for determining a resistance value of a virtual resistor according to an embodiment of the present disclosure;

FIG. 15 is a schematic diagram of an equivalent model of a common mode loop according to an embodiment of the present application;

fig. 16 is a schematic diagram of a current flowing through a first inductor according to an embodiment of the present disclosure;

fig. 17 is a schematic diagram of a current flowing through a first inductor according to another embodiment of the present application;

fig. 18 is a flowchart of a driving method of a switching tube according to another embodiment of the present application;

fig. 19 is a schematic structural diagram of a driving device of a switching tube according to an embodiment of the present application;

fig. 20 is a schematic structural diagram of a driving apparatus of a switching tube according to another embodiment of the present application;

fig. 21 is a schematic structural diagram of a controller according to an embodiment of the present application.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. All other embodiments obtained by a person of ordinary skill in the art based on the embodiments in the present application without making any creative effort belong to the protection scope of the present application.

Referring to fig. 1, fig. 1 is a schematic structural diagram of an inverter circuit according to an embodiment of the present disclosure. As shown in fig. 1, the inverter circuit includes a controller 10, an inductive branch 20, a dc bus 30, K inverting branches, and a first bus capacitor C₁And K is an integer not less than 2.

Wherein the controller 10 is configured to output a pulse width modulation signal.

First bus capacitor C₁A first bus capacitor C disposed on the DC bus 30₁Is connected to a first end of the dc bus 30 (i.e., the connection point P), a first bus capacitor C₁Is connected to a second end of the dc bus 30 (i.e., the connection point N).

The K-path inversion branch comprises a first inversion branch A1, a second inversion branch A2 \ 8230and a K-path inversion branch AK. The first inversion branch A1, the second inversion branch A2 \8230andany inversion branch in the Kth inversion branch AK are respectively connected with the controller 10, the direct current power supply 200 and the direct current bus 30. The first inversion branch circuit A1 and the second inversion branch circuit A2 \8230, any inversion branch circuit in the K inversion branch circuit AK comprises a capacitive module for filtering, namely the first inversion branch circuit A1 comprises a capacitive module A11, the second inversion branch circuit A2 comprises a capacitive module A21 \8230, the K inversion branch circuit AK comprises a capacitive module AK1, the impedance characteristic of each capacitive module is capacitive, namely each capacitive module is a module conforming to the current lead voltage characteristic. Specifically, each inverting branch (including a first inverting branch A1, a second inverting branch A2 \8230anda K inverting branch AK) is controlled by the controller 10, and each inverting branch can respond to a pulse width modulation signal output by the controller 10 to convert the dc power supply 200 into an ac power supply and filter the ac power supply to output a grid voltage.

The inductive branch 20 is connected between each capacitive module (including the capacitive module a11 of the first inverting branch A1, the capacitive module a21 \8230ofthe second inverting branch A2, and the capacitive module AK1 of the K inverting branch AK) and the dc bus 30, that is, the first end of the inductive branch 20 is connected to each capacitive module, and the second end of the inductive branch 20 is connected to the first end of the dc bus 30. The impedance characteristic of the inductive branch 20 is inductive, i.e. the inductive branch 20 is a branch conforming to the voltage leading current characteristic. Wherein the inductive branch 20 is capable of reducing the resonant angular frequency of the inverter circuit 100.

It is understood that in this embodiment, one structure of the dc bus 30 is exemplarily shown, but in other embodiments, the dc bus 30 may have other structures, which is not particularly limited in this embodiment, and it is only necessary that the second end of the inductive branch 20 is connected to the dc bus. For example, in an embodiment, a dc bus is also provided between the dc power supply 200 and the connection point P, and a dc bus is also provided between the dc power supply 200 and the connection point N, in which case, the second end of the inductive branch 20 may be connected between the dc power supply 200 and the connection point P, or between the dc power supply 200 and the connection point N.

Meanwhile, in this embodiment, the second end of the inductive branch 20 is connected to the first end of the dc bus 30 as an example, but in other embodiments, the second end of the inductive branch 20 can also be connected to other positions of the dc bus 30, for example, as shown in fig. 2, the second end of the inductive branch 20 is connected to the second end of the dc bus 30.

In the related art, in order to suppress the common mode current, the common mode current is usually implemented by pure software, for example, proportional, integral, differential, etc. However, the pure software method is only suitable for the application scenario when the resonance angular frequency of the inverter is low. When the resonance angular frequency of the inverter is higher, the effect on improving the system damping is smaller in a proportional mode; for the way of integration, the controller used to achieve integration is easily saturated; for the differential approach, high frequency interference is easily introduced. On one hand, the common mode current is poor in suppression effect due to the factors, on the other hand, a high requirement is also put on the sampling precision of the control system, and the common mode current is difficult to achieve in practical application.

In the embodiment of the present application, in an application scenario where the resonant angular frequency of the inverter circuit is high, the inductive branch 20 is added, so that the resonant angular frequency of the whole inverter circuit 100 can be reduced, and the suppression effect on the common mode current can be effectively improved. The inverter circuit resonant frequency control method is not only suitable for application scenes with lower resonant angular frequency of the inverter circuit, but also suitable for application scenes with higher resonant angular frequency of the inverter circuit, and has stronger applicability and practicability. Moreover, on the premise of adding the inductive branch 20, software is adopted for control, which is also beneficial to improving the effect of suppressing the common-mode current by a software mode and is easier to realize.

In an embodiment, referring to fig. 3 in conjunction with fig. 2, fig. 3 illustrates an example of a structure of the first inverting branch A1. For the inverting branches of other branches, such as the second inverting branch A2 \8230andthe K inverting branch AK, the specific implementation manner of these inverting branches is similar to that of the first inverting branch A1, and the following detailed description of the first inverting branch A1 in fig. 2 may be referred to.

As shown in fig. 3, the first inverting branch A1 further includes a voltage converting module a12, a first inductive module a13, and a second inductive module a14. The first end of the voltage conversion module a12 and the dc power supply 200 are connected to the first end of the dc bus (i.e., the connection point P), the second end of the voltage conversion module a12 and the dc power supply 200 are connected to the second end of the dc bus (i.e., the connection point N), and the third end of the voltage conversion module a13 is connected to the controller 10. The voltage conversion module a12 is used for converting a dc power into an ac power in response to the pulse width modulation signal output by the controller 10.

The first end of the first inductive module a13 is connected to the first end of the second inductive module a14 and the first end of the capacitive module a11, the second end of the capacitive module a11 is connected to the first end of the inductive branch 20, the second end of the first inductive module a13 is connected to the fourth end of the voltage conversion module a12, and the second end of the second inductive module a14 is configured to output the grid voltage. The capacitive module a11, the first inductive module a13, and the second inductive module a14 form an LCL filter to filter the ac power and output the power grid voltage. The LCL filter utilizes the characteristic that the inductance and the capacitance have different impedances for different frequency components, and can effectively reduce harmonic components in an alternating current power supply injected into a power grid.

In an embodiment, please refer to fig. 4, and fig. 4 is a schematic circuit structure diagram of an inverter circuit according to an embodiment of the present disclosure. In this embodiment, for example, the inverter circuit 100 includes two inverter branches, namely a first inverter branch A1 and a second inverter branch A2, where K =2. As mentioned above, for the case that the inverter circuit 100 includes more inverting branches, the specific implementation manner of the other inverting branches is similar to that of the first inverting branch A1 or the second inverting branch A2, and is not described herein again. In addition, the dc power supply 200 is exemplified by a dc power supply on a PV (photovoltaic) solar panel.

As shown in FIG. 4, the voltage conversion module A12 includes a first switch Q₁₁And a second switch Q₁₂. Wherein the first switch Q₁₁First terminal of and second switch Q₁₂Are all connected with a controller, a first switch Q₁₁Second terminal of (2) and second switch Q₁₂Is connected to the third terminal of the first switch Q₁₁Is connected to the first end (i.e., the connection point P) of the dc bus 30 with the dc power supply 200, and a second switch Q₁₂And the dc power supply 200 is connected to the second end of the dc bus 30 (i.e., the connection point N). Wherein the first switch Q₁₁The third terminal of (A) is the first terminal of the voltage conversion module A12, and the second switch Q₁₂The second terminal of the first switch is the second terminal of the voltage conversion module A12, the first switch Q₁₁Is the fourth terminal of the voltage conversion module a 12.

In this embodiment, the first switch Q₁₁A second switch Q₁₂Are controlled by the pwm signal output from the controller 10 to convert the dc power 200 into ac power.

In the embodiment of the present application, each switch is an IGBT switch tube, for example, the first switch Q in fig. 4 is taken as an example₁₁A second switch Q₁₂Are all IGBT switching tubes. With a first switch Q₁₁For example, the gate of the IGBT switch tube is a first switch Q₁₁The emitter of the IGBT switch tube is a first switch Q₁₁The collector of the IGBT switching tube is a first switch Q₁₁And a third terminal. Arrangement of the terminals of the other switches and the first switch Q₁₁The same is not described here.

In other embodiments, the switches may be any controllable switches, such as Integrated Gate Commutated Thyristor (IGCT) devices, gate turn-off thyristor (GTO) devices, silicon Controlled Rectifier (SCR) devices, and the like.

In one embodiment, the first inductive module a13 comprises a first inductor L₁₁. Wherein, the first inductance L₁₁Is connected with the fourth terminal of the voltage conversion module A12, and a first inductor L₁₁Respectively connected to the first end of the capacitive module a11 and the first end of the second inductive module a14. Wherein, the first inductance L₁₁The second terminal of (2) is the first terminal of the first inductive module A13, the first inductance L₁₁Is the second end of the first inductive module a 13.

In an embodiment, the second inductive module a14 comprises a second inductance L_g1. Second inductance L_g1Respectively connected to the first terminal of the capacitive module a11 and the first terminal of the first inductive module a13, and a second inductor L_g1For outputting a voltage e_a. Wherein the second inductance L_g1Is the first terminal of the second inductive module a14, the second inductance L_g1Is the second end of the second inductive module a14.

In one embodiment, the capacitive module A11 includes a first capacitor C_f1. Wherein the first capacitor C_f1Respectively with the first inductive module a13A first end connected to the first end of the second inductive module A14, a first capacitor C_f1Is connected to the first end of the inductive branch 20. Wherein the first capacitor C_f1The first terminal of (A) is the first terminal of the capacitive module A11, the first capacitor C_f1Is the second end of the capacitive module a 11.

Likewise, in the second inverting branch A2, the voltage conversion module a22 includes a first switch Q₂₁A second switch Q₂₂And a third switch Q₂₃And a fourth switch Q₂₄. The first inductive module A13 comprises a first inductance L₁₂. The second inductive module A24 comprises a second inductance L_g2. The capacitive module A21 comprises a first capacitor C_f2. The specific circuit connection relationship is similar to that of the first inverting branch A1, and is not described herein again.

Fig. 4 also illustrates a structure of the inductive branch 20, and as shown in fig. 4, the inductive branch 20 comprises a third inductance L₃。

Wherein the third inductance L₃Is connected with the second end of the capacitive module a11 and the second end of the capacitive module a21, and a third inductor L₃Is connected to the dc bus 30 (fig. 4 shows a third inductance L₃Is connected with a negative direct current bus, the negative direct current bus refers to a first bus capacitor C₁A portion between the second end and the connection point N; understandably, the third inductance L₃Can also be replaced to be connected with a positive direct current bus which is the first bus capacitor C₁The portion between the first end and the connection point P). Wherein the third inductance L₃Is the first end of the inductive branch 20, and a third inductance L₃Is the second end of the inductive branch 20.

In this embodiment, a third inductor L is added₃Previously, the resonant angular frequency of the inverter circuit 100 may be expressed as

Wherein L is L excluding the third inductor₃Total inductance, C, of the inverter circuit 100_fIs the total capacitance of the inverter circuit 100.While adding a third inductance L₃Then, the resonance angular frequency of the inverter circuit 100 can be expressed as

. Therefore, ω₁＜ω₀By adding a third inductance L₃The resonant angular frequency of the inverter circuit 100 can be reduced, which is advantageous for more effectively suppressing the common mode current.

In one embodiment, as shown in fig. 5, the inverter circuit 100 further includes a second bus capacitor C disposed on the dc bus 30₂. Wherein, the first bus capacitor C₁Is connected to a first end (i.e., connection point P) of the dc bus 30, and a first bus capacitor C₁Second terminal and second bus capacitor C₂Are connected to a third terminal (i.e., a connection point O) of the dc bus 30, and a second bus capacitor C₂Is connected to a second end of the dc bus 30 (i.e., the connection point N). First bus capacitor C₁And a second bus capacitor C₂The energy storage device is used for storing energy and reducing the peak of the direct current power supply 200 so as to keep the direct current power supply 200 as a stable power supply.

In one embodiment, as shown in fig. 6, the voltage conversion module a12 further includes a third switch Q₁₃And a fourth switch Q₁₄. Wherein the third switch Q₁₃First terminal and fourth switch Q₁₄Are all connected to the controller 10, a third switch Q₁₃Is connected to a third terminal (i.e., a connection point O) of the dc bus 30, and a third switch Q₁₃Second terminal and fourth switch Q₁₄Is connected to the second terminal of the fourth switch Q₁₄And the third terminal of the first switch Q₁₁Is connected to the second end of the first housing.

In this embodiment, a first switch Q₁₁A second switch Q₁₂And a third switch Q₁₃And a fourth switch Q₁₄Are controlled by the pwm signal output from the controller 10 to convert the dc power 200 into ac power.

It should be noted that the hardware configuration of the inverter circuit 100 as shown in fig. 4-6 is merely an example, and that the inverter circuit 100 may have more or fewer components than shown in the figures, may combine two or more components, or may have a different configuration of components, and that the various components shown in the figures may be implemented in hardware, software, or a combination of hardware and software, including one or more signal processing and/or application specific integrated circuits.

For example, the embodiments shown in fig. 4 to fig. 6 are all single-phase inverter circuits, and in another implementation, one additional inverter branch may be added to the circuit structure shown in fig. 4, fig. 5, or fig. 6, so that the circuit structure is a three-phase inverter circuit. Taking the third inverter circuit A3 added to the circuit structure shown in fig. 6 as an example, as shown in fig. 7, in the inverter branch A3, the voltage conversion module a32 includes a first switch Q₃₁A second switch Q₃₂And a third switch Q₃₃And a fourth switch Q₃₄. The first inductive module A33 comprises a first inductance L₁₃. The second inductive module A34 comprises a second inductance L_g3. The capacitive module A31 comprises a first capacitance C_f3. The specific circuit connection relationship is similar to that of the first inverting branch A1, and is not described herein again.

For another example, the three-phase inverter circuit shown in fig. 7 is a T-type inverter circuit, and in other embodiments, other types of inverter circuits such as an I-type inverter circuit may also be used, so long as the inductive branch is connected between the capacitive module and the bus capacitor.

Meanwhile, in the embodiment shown in fig. 7, the third inductance L₃Second end of the first bus capacitor is connected to the second bus capacitor C₂And a dc bus bar between the first end of (a) and the connection point O. While in other embodiments, the third inductor L₃Can also be connected to other positions of the dc bus, as shown in fig. 8, and the third inductor L₃Second end of the first bus capacitor is connected to the second bus capacitor C₂And the dc bus between the second end of (b) and the connection point N, which is also substantially the third inductor L₃Is connected with the second end of the direct current bus (namely, the connection point N); or as shown in FIG. 9, a third inductance L₃Is connected to the first bus capacitor C₁And the connection point O, and substantially also a third inductorL₃Is connected with the third end (namely the connection point O) of the direct current bus; or as shown in FIG. 10, a third inductance L₃Is connected to the first bus capacitor C₁And the connection point P, and substantially the third inductance L₃Is connected to the first end of the dc bus (i.e., connection point P). Of course, the third inductance L₃The second end of the second terminal may also be connected to other positions of the dc bus, which is not particularly limited in the embodiments of the present application.

Fig. 11 is a flowchart of a driving method of a switching tube according to an embodiment of the present application, where the driving method is applied to the inverter circuit 100 according to any embodiment of the present application, and here, the structure of the inverter circuit 100 may refer to the detailed description given above with reference to fig. 1 to fig. 10, which is not repeated here. The driving method of the switching tube comprises the following steps:

step 1101: the method comprises the steps of obtaining the current of each path of inversion branch in the inversion circuit, and determining the common-mode current of the inversion circuit according to the average value of all the currents.

Taking the circuit structure shown in fig. 7 as an example, the current of each inverting branch in the inverting circuit is the current i of the first inverting branch A1_LaCurrent i of the second inverter branch A2_LbCurrent i to third inverting branch A3_LcThen the common mode current i of the inverter circuit_cmIs i_cm＝(i_La＋i_Lb＋i_Lc)/3. Taking the circuit structure shown in fig. 6 as an example, the current of each inverting branch in the inverting circuit is the current i of the first inverting branch A1_LaCurrent i of the second inverting branch A2_LbThen the common mode current i of the inverter circuit_cmIs i_cm＝(i_La＋i_Lb)/2。

In one embodiment, before step 1101 is performed, it can also be determined whether the third inductor L needs to be used₃And determining a more suitable inductance value for the third inductor L3 to more effectively suppress the common mode current.

Specifically, as shown in fig. 12, the driving method of the switching tube further includes the steps of:

1201: and calculating the first resonance angular frequency according to the characteristic value of the electronic element of the inversion branch in the inversion circuit.

1202: a first impedance angle is calculated based on the first resonant angular frequency.

1203: and if the first impedance angle is smaller than a first preset threshold value, short-circuiting an inductive branch in the inverter circuit.

The first resonance angular frequency refers to a resonance angular frequency of each inverting branch, that is, the first resonance angular frequency is independent of the inductive branches.

Taking the circuit structure shown in fig. 7 as an example, the first resonant angular frequency is the inverter circuit 100 without the third inductor L₃Can be expressed as

Wherein L is L excluding the third inductor₃Total inductance, C, of the inverter circuit 100_fIs the total capacitance of the inverter circuit 100.

Then, in one embodiment, the first resonant angular frequency ω is further adjusted₀Substituting formula θ = α ω T_sA first impedance angle may be obtained. If the calculated first impedance angle is smaller than the first preset threshold, the current impedance angle can be determined to be in a smaller level, and even if the virtual resistor is directly adopted to suppress the common-mode current, a better suppression effect can be achieved. Thus, in this case, the inductive branch in the inverter circuit can be short-circuited to simplify the control method. In some embodiments, a switching branch connected in parallel with the inductive branch may be provided to short-circuit the inductive branch by controlling the conduction of the switching branch.

In other embodiments, after determining that the first impedance angle is smaller than the first preset threshold, the user may also be reminded by displaying on a display or the like, and then the user may directly set up each first capacitor (e.g., the first capacitor C in the first inverting branch A1) when the user sets up the inverting circuit 100_f1) Is connected to the bus voltage, thereby reducing the third inductance L₃And is beneficial to reducing the cost.

Then, on the premise that the inductive branch is not connected to the inverter circuit, step 1101, namely, the driving method of the switching tube is executed.

Conversely, in an embodiment, if the first impedance angle is not smaller than the first predetermined threshold, the inductance of the third inductor L3 can be further determined. Specifically, referring to fig. 12, the driving method of the switching tube further includes the following steps:

step 1204: and if the first impedance angle is greater than or equal to a first preset threshold value, the inductive branch is connected to the inverter circuit.

Step 1205: and calculating a second resonance angular frequency according to a second preset threshold value.

Step 1206: and determining the inductance value of the inductance branch according to the second resonance angular frequency.

The first impedance angle is greater than or equal to a first preset threshold value, and can be at a larger level corresponding to the current impedance angle, and at this time, if the virtual resistor is directly adopted to suppress the common-mode current, the suppression effect is poor. In this case, the inductive branch needs to be connected to the inverter circuit to reduce the impedance angle. Meanwhile, a second preset threshold may be set according to actual requirements, and the second preset threshold may correspond to the decreased impedance angle, for example, if the calculated first impedance angle is 60 °, the second preset threshold may be set to be smaller than 60 °, for example, 50 °. Substituting the new impedance angle into the formula theta = alpha omega T according to a second preset threshold value_sTo obtain a second resonance angular frequency.

Furthermore, when the inverter circuit includes an inductive branch, the resonant angular frequency of the inverter circuit 100 can be expressed as

Substituting the second resonance angular frequency into ω in the equation_rAt L, C_fWhen the inductance value L of the inductive branch can be reversely deduced₀The size of (2) is beneficial to setting the corresponding inductive branch according to different application scenes, so that not only can the volume increase and the cost increase caused by too large inductance value of the inductive branch be prevented, but also the poor effect of inhibiting the common-mode current caused by too small inductance value of the inductive branch can be prevented. Changeable pipeIn other words, by providing the appropriate inductive branch, the size of the inductive branch can be reduced to reduce the size of the inverter circuit, and the cost of the inductive branch can be reduced, and the effect of suppressing the common mode current can be better.

For example, in one embodiment, referring to fig. 13, fig. 13 shows the detected current flowing through the inductive branch in practical application. As shown in fig. 13, the peak value of the current flowing through the serially connected inductive branches does not exceed 15A, the effective value does not exceed 10A, and the current flows through each first inductor (e.g. the first inductor L in the first inverting branch A1)₁₁) The current flowing through the inductive branch is usually about 100A, and the current flowing through the inductive branch is much smaller than the current flowing through each first inductor, so that compared with the scheme of increasing the inductance value of each first inductor, the scheme of increasing the inductive branch provided by the present application has advantages in both the size and the cost of the inductive branch, that is, the scheme provided by the present application can make the size of the inverter circuit smaller and the cost lower.

After that, on the premise of keeping the inductive branch connected to the inverter circuit, step 1101, namely, the driving method of the switching tube, may be executed.

Step 1102: determining a common mode voltage rejection component of the inverter circuit by: u shape_c(t)=-R₀i_cm(t)。

Wherein, U_c(t) is the common mode voltage rejection component, R₀Is the resistance value of a dummy resistor, i_cmIs the common mode current, t is time. R₀R is a resistance value of a dummy resistor virtually set by software, i.e., the dummy resistor is not an actual electronic component₀No loss of power in the inverter circuit. Therefore, the inverter circuit can keep the original working efficiency unchanged while suppressing the common-mode current through the common-mode voltage suppression component.

Since each current in the inverter circuit can be directly obtained by detection, the common mode current is also a parameter that can be directly obtained, and for the formula in step 1102, the resistance value R of the virtual resistor needs to be determined in order to suppress the common mode voltage component₀The size of (2).

In a real worldIn the embodiment, the resistance value R of the dummy resistor is determined₀As shown in fig. 14, the driving method of the switching tube further includes the following steps:

step 1401: and obtaining the common-mode voltage of the inverter circuit.

In one embodiment, the common mode voltage can be determined by the common mode current, and the circuit structure shown in fig. 7 is still taken as an example.

From kirchhoff's law:

（1）

wherein L is₀Is a third inductor (e.g. third inductor L)₃) L is the first inductor (e.g. the first inductor L in the first inverting branch A1)₁₁) Inductance value of, R₁Being switching devices (e.g. first switch Q)₁) Loss and inductance (e.g. first inductance L in first inverting branch A1)₁₁And a second inductor L in the first inversion branch A1_g1) Equivalent resistance of loss, R_esrIs a first capacitor (e.g. the first capacitor C in the first inverting branch A1)_f1) Parasitic resistance, C_fIs a first capacitor (e.g. the first capacitor C in the first inverting branch A1)_f1) Capacitance value of i_La、i_LbAnd i_LcRespectively flowing through the first inductance L in the first inversion branch A1₁₁A first inductor L in the second inversion branch A2₁₂And the first inductor L in the third inverting branch A3₁₃Current value of i_Ca、i_CbAnd i_CcRespectively flowing through the first capacitor C in the first inversion branch A1_f1A first capacitor C in the second inversion branch A2_f2And the first capacitor C in the third inverting branch A3_f3Current value of (U)_AOIs the voltage between points A and O, U_BOIs the voltage between point B and point O, U_COIs the voltage between point C and point O.

The three equations in equation (1) are added and all the voltage current signals are decomposed into differential mode components and common mode components. Wherein, according to the differential mode component in the current signal being 0, it can obtain:

（2）

wherein i_LadmRepresents i_LaDifferential mode component of (i)_LbdmRepresents i_LbDifferential mode component of (i)_LcdmRepresents i_LcDifferential-mode component of (ii), i_CadmRepresents i_CaDifferential mode component of (i)_CbdmRepresents i_CbDifferential mode component of (i)_CcdmRepresents i_CcDifferential mode component of (i)_gadmRepresents i_gaDifferential-mode component of (ii), i_gbdmRepresents i_gbDifferential mode component of (i)_gcdmRepresents i_gcThe differential mode component of (a).

The three equations in equation (1) are added to remove the differential mode component, which can be obtained as follows:

3(L(di_Lcm/dt)＋R₁i_Lcm＋(1/C_f)∫i_Ccmdt＋R_esri_Ccm＋3L₀(di_Ccm/dt))＝3U_cm（3）

wherein i_LcmRepresents i_La、i_LbOr i_LcDifferential mode component of (i)_CcmRepresents i_Ca、i_CbOr i_CcThe differential mode component of (a). It can be understood that if the circuit structure shown in fig. 6 is adopted, for the formula (1), only the first two equations of the formula (1) need to be selected; for formula (2), i is expressed_gadm、i_gbdm、i_gcdmPartial deletion; for (3), then 3 is modified to 2 (in the following embodiments, also modified correspondingly, e.g. 3 in equations (4), (5), (8), (9), (10), (11), (13) also modified correspondingly to 2), and i_LcmRepresents i_LaOr i_LbDifferential mode component of (i)_CcmRepresents i_CaOr i_CbThe differential mode component of (a).

Let R = R₁＋R_esrRepresents the total loop resistance of the inverter circuit and is due to the first capacitor (e.g. the first capacitor C in the first inverter branch A1)_f1) Is far larger than Y capacitor and battery plate parasitic in inverter circuitCapacitance, which can be approximated as i_Lcm=i_CcmThen i can be converted into_LcmAnd i_CcmAre collectively denoted as i_cmThus, equation (3) can be simplified as:

U_cm＝(L＋3L₀)(di_cm/dt)＋(1/C_f)∫i_cmdt＋Ri_cm（4）

wherein i_cmRepresenting common-mode current, U, of an inverter circuit_cmRepresenting the common mode voltage of the inverter circuit. L, C when the circuit structure of the inverter circuit is determined_fR and R are known values, and if the common mode current i is determined, the formula (4) shows_cmCan determine the common mode voltage U_cmOf (c) is used.

Then, a common mode loop equivalent model is obtained from the formula (4), and the common mode loop equivalent model is shown in fig. 15. Wherein L is₁₂₃Is an equivalent inductor with an inductance value of L; c_f123Is an equivalent capacitor with a capacitance value of C_f；R₁₂₃The resistance value is R. The common mode loop is a typical second-order RLC series circuit, and the system is a second-order weak damping system under the condition of not adding extra control because the resistance value of the equivalent resistor is small. In the working process, each switching tube in the inverter circuit is in a switching state, and the common-mode voltage contains more high-frequency components, so that the circuit can form a common-mode current oscillating for a long time. The virtual resistor provided by the embodiment of the application can suppress the common-mode current, so that the working stability of the inverter circuit is improved.

Step 1402: and determining the system impedance of the inverter circuit according to the common-mode voltage and the common-mode voltage rejection component.

Step 1403: the imaginary part of the system impedance is controlled to be smaller than a third preset threshold value to determine a third resonance angular frequency.

After the common-mode voltage is determined, the total voltage of the common-mode loop in the inverter circuit can be determined according to the common-mode voltage and the common-mode voltage rejection component, and therefore the system impedance of the inverter circuit can be determined according to the total voltage of the common-mode loop in the inverter circuit. The circuit structure shown in fig. 7 is taken as an example.

The formula (4) is rewritten into an s function form, and the total voltage of the common mode loop in the inverter circuit can be obtained by combining the common mode voltage rejection component as follows:

（5）

wherein, the first and the second end of the pipe are connected with each other,

is the total voltage of the common mode loop in the inverter circuit,

for common-mode voltage rejection components, T_sControlling period for a controller, alpha is a delay coefficient, alpha T_sIn order to control the system delay, the control system delay comprises controller sampling calculation delay and zero-order retainer equivalent delay. A value of α is related to a control scheme, that is, α may be set according to an actual application, which is not specifically limited in the embodiments of the present application, for example, in an embodiment, α is 1.

Substituting s by j ω, the system impedance can be found as:

Z(jω)＝U_cm(jω)/i_cm(jω)（6）

where Z (j ω) represents the system impedance and ω represents the resonance angular frequency.

Substituting s in equation (5) with j and substituting into equation (6) yields:

Re(Z(jω))＝R＋R₀cos(ɑωT_s) （7）

Im(Z(jω))＝ω(L＋3L₀)－1/(ωC_f)－R₀sin(ɑωT_s)（8）

where Re (Z (j ω)) represents the real part of the system impedance and Im (Z (j ω)) represents the imaginary part of the system impedance.

The larger the real part of the system impedance is, the stronger the resistance is, and the stronger the resonance suppression capability is. Then, in an embodiment, the imaginary part of the system impedance may be controlled to be smaller than a third preset threshold value to promote the resonance suppression capability, and a third resonance angular frequency may be determined.

In an embodiment, controlling the imaginary part of the system impedance to be smaller than the third preset threshold in step 1403, to determine the third resonance angular frequency specifically includes the following steps: the imaginary part of the system impedance is defined as a first function, and the first function is differentiated to obtain a second function. And calculating the fourth resonance angular frequency according to the characteristic value of the electronic component in the inverter circuit. And determining a third resonance angular frequency according to the fourth resonance angular frequency, the first function and the second function. And if the inductance value of the inductance branch is determined by the second resonance angular frequency, the fourth resonance angular frequency is equal to the second resonance angular frequency.

When the resonant frequency is lower, that is, when the resonant frequency is lower, as shown by combining the formula (7) and the formula (8)

And the resistance is strong, and the system damping can be obviously improved. Further, the resistance value R of the dummy resistor is not changed under other conditions₀And increasing, the resonant frequency will increase. And, at the new resonance frequency, when α ω T_sIf the resistance is greater than pi/2, the dummy resistor generates negative damping, which deteriorates the system performance. The resistance value R of the dummy resistor₀There is a better parameter to improve the system damping more effectively, i.e. the suppression effect on the common mode current is better.

The specific process is that, firstly, the imaginary part of the system impedance (i.e. equation (8)) is defined as a first function, and differential operation is performed on the first function to obtain a second function, which can be obtained as follows:

f(ω)＝ω(L＋3L₀)－1/(ωC_f)－R₀sin(ɑωT_s) （9）

f´(ω)＝L＋3L₀－1/(ω²C_f)－ɑR₀T_scos(ɑωT_s) （10）

wherein f (ω) is the first function and f ″ (ω) is the second function.

And then, calculating according to the characteristic value of the electronic element in the inverter circuit to obtain a fourth resonance angular frequency. In one embodiment, the fourth resonant angular frequency may be obtained according to the following equation:

（11）

the characteristic values of the electronic components in the inverter circuit include inductances (e.g., the first inductance L in the first inverter branch A1)₁₁And a second inductor L in the first inversion branch A1_g1) L, each first capacitor (e.g. the first capacitor C in the first inverting branch A1)_f1) Capacitance value C of_fAnd a third inductance L₃Inductance value L of₀。

Furthermore, the third resonance angular frequency can be determined according to the fourth resonance angular frequency, the first function and the second function, and the specific implementation process is as follows: first, the resistance value of the dummy resistor is set as a first value, the first value and the fourth resonance angular frequency are respectively substituted into a first function (i.e., formula (9)) and a second function (i.e., formula (10)) to be calculated, and whether the absolute value of the calculation result of the first function is smaller than a fourth preset threshold value is determined. And if the absolute value of the calculation result of the first function is smaller than a fourth preset threshold, taking the current resonance angular frequency as a final third resonance angular frequency. If the absolute value of the calculation result of the first function is not less than the fourth preset threshold, the current resonance angular frequency, the difference value between the first numerical value and the ratio between the first function and the second function are respectively substituted into the first function and the second function for calculation, specifically, the ratio between the first function and the second function (marked as a first ratio) is calculated, the difference value between the current resonance angular frequency and the first ratio is calculated, and the difference value is respectively substituted into the first function and the second function. And then, judging whether the absolute value of the calculation result of the first function is smaller than a fourth preset threshold value is performed again. Similarly, if the absolute value of the calculation result of the first function is smaller than the fourth preset threshold, the current resonance angular frequency is taken as the final third resonance angular frequency. And continuously repeating the steps until the absolute value of the calculation result of the first function is smaller than a fourth preset threshold value, and determining the final resonance angular frequency.

The first value is a given value, and may be set correspondingly according to different application situations, which is not specifically limited in the embodiments of the present application. At the same time, it is understood that given different first values according to different applications, the resulting calculated resonance angular frequency should be the same or close to the same.

In addition, the fourth preset threshold may be set according to an actual application situation, and the embodiment of the present application does not specifically limit this. For example, in one embodiment, the fourth predetermined threshold may be set to 0.001 to obtain a more accurate resonant angular frequency.

Step 1404: and determining the system impedance and the system damping ratio according to the third resonance angular frequency so as to determine the resistance value of the virtual resistor.

After the final third resonance angular frequency is obtained, the system impedance and the system damping ratio can be further determined according to the third resonance angular frequency.

In one embodiment, the system impedance to system damping ratio may satisfy the following equation:

R_sys＝R＋R₀cos(ɑωT_s)（12）

λ＝R_sys/ω(L＋3L₀)（13）

wherein R is_sysλ is the system damping ratio, which is the system impedance.

In this embodiment, after all the electronic components of the inverter circuit are determined, if the resonant angular frequency is also determined, then R and α ω T_sCan be considered to be a known value. A first curve of the system impedance as a function of the virtual resistance can be obtained by equation (12) and a second curve of the system damping ratio as a function of the virtual resistance can be obtained by equation (13). According to the first curve and the second curve, the resistance value R of the virtual resistor can be determined₀For example, the first curve and the second curve can determine the resistance value R of the virtual resistor corresponding to the system impedance and the system damping ratio being relatively large₀The resistance value R can be obtained₀Resistance value R as a virtual resistor for practical use₀Thereby, a better effect of suppressing the common mode current can be obtained.

Please refer to FIG. 7,Fig. 16 and 17, wherein fig. 16 shows that the inverter circuit does not include an inductive branch and the resistance R₀When the current is 0, the current flows through the first inductor (including the first inductor L)₁₁A first inductor L₁₂And a first inductor L₁₃) The current value of (1). FIG. 17 shows an inverter circuit including an inductive branch and a resistance R₀Flows through the first inductor (including the first inductor L) at time 3₁₁A first inductor L₁₂And a first inductor L₁₃) The current value of (2).

As shown in fig. 16 and 17, the inverter circuit includes an inductive branch and a resistance R₀When the current value is 3, the current value flowing through the first inductor almost has no harmonic of the oscillation frequency, the inverter circuit does not include an inductive branch, and the resistance value R₀When the value is 0, a current value flowing through the first inductor has a harmonic of a larger oscillation frequency order. It can be seen that by adding the inductive branch and the virtual resistor, the harmonic of the original oscillation frequency can be eliminated, so as to improve the quality of the waveform, which also means that by adopting the scheme provided by the embodiment of the present application, the common mode current can be suppressed, and a better suppression effect is achieved.

Step 1103: and driving the switching tube according to the common mode voltage rejection component.

The magnitude of each parameter in the first impedance can be determined through the above embodiments, so that the magnitude of the common mode voltage rejection component can be further determined. Then, in the working process of the inverter circuit, because the switching process of the switching tube can realize the control of the common mode current, the switching tube is driven by combining the common mode voltage suppression component, and the suppression process of the common mode current can be realized.

In an embodiment, in an operating process of the inverter circuit, a signal for driving the switching tube includes not only a common mode voltage rejection component, but also an inverter voltage and a zero sequence component of each inverter branch in the inverter circuit. That is, the driving the switch tube according to the common mode voltage rejection component in step 1103 may specifically include the following methods: and driving the switching tube according to the inversion voltage, the zero sequence component and the common mode voltage suppression component of each inversion branch in the inversion circuit.

As shown in fig. 18, in this embodiment, since the inverted voltage and the zero-sequence component of each inverting branch in the inverting circuit need to be used, the driving method of the switching tube further includes the following steps:

step 1801: and acquiring the voltage of the power grid, and determining the angle of the voltage of the power grid according to the voltage of the power grid.

In one embodiment, if the inverter circuit includes a three-phase inverter circuit as shown in fig. 7, the voltage includes the first grid voltage e_aSecond grid voltage e_bTo a third network voltage e_c(ii) a If the inverter circuit comprises a single-phase inverter circuit as shown in fig. 6, the voltage comprises the first grid voltage e_a。

Step 1802: and obtaining the inversion voltage of each inversion branch in the inversion circuit based on the angle of the power grid voltage and the current of each inversion branch in the inversion circuit.

Taking the circuit structure shown in fig. 7 as an example, the current of each inverting branch in the inverting circuit includes a current i of the first inverting branch A1 in the abc coordinate_LaCurrent i of the second inverting branch A2_LbCurrent i to third inverting branch A3_Lc(ii) a Taking the circuit structure shown in fig. 6 as an example, the current of each inverting branch in the inverting circuit includes the current i of the first inverting branch A1 under abc coordinates_LaCurrent i to the second inverting branch A2_Lb。

In an embodiment, the specific implementation process of step 1802 is: and based on the angle of the power grid voltage and the current of each inverting branch, converting the current of each inverting branch through an abc/dq coordinate system to obtain the current under the dq coordinate system. And obtaining the inversion voltage in the dq coordinate system according to the current in the dq coordinate system. And transforming the inversion voltage under the dq coordinate system through the dq/abc coordinate system to obtain the inversion voltage of each path of inversion branch under the abc coordinate system.

Specifically, a circuit configuration shown in fig. 7 will be described as an example.

Firstly, on the premise of obtaining the angle of the grid voltage, the method is based onAngle of network voltage, for each current of inverting branch circuit (including current i of first inverting branch circuit A1) under abc coordinate system_LaCurrent i of the second inverting branch A2_LbCurrent i to third inverting branch A3_Lc) Converting into a first current i under a dq coordinate system through conversion of an abc/dq coordinate system_dAnd a second current i_q. Wherein the abc/dq coordinate system transformation means converting a parameter in the abc coordinate system into a parameter in the dq coordinate system. Then, according to the first current i in the dq coordinate system_dAnd a second current i_qObtaining a first inversion voltage U under dq coordinate system_dAnd a second inverse voltage U_q. Then the first inversion voltage U is applied_dAnd a second inverse voltage U_qObtaining a first inversion voltage U under an abc coordinate system through inverse coordinate change (namely dq/abc coordinate system transformation)_aA second inverter voltage U_bAnd a third inverter voltage U_c. Wherein, the first inversion voltage U under the abc coordinate system_aThe inversion voltage of the first inversion branch A1 and the second inversion voltage U_bThe inverted voltage of the second inversion branch A2 and the third inverted voltage U_cIs the inversion voltage of the third inversion branch A3.

Of course, in the circuit configuration shown in fig. 6, the current of each inverting branch in the abc coordinate system includes the current i of the first inverting branch A1_LaCurrent i to the second inverting branch A2_LbAnd finally the first inversion voltage U under the abc coordinate system is obtained_aAnd a second inverter voltage U_b. Wherein, the first inversion voltage U under abc coordinate system_aThe inversion voltage of the first inversion branch A1 and the second inversion voltage U_bIs the inversion voltage of the second inversion branch A2.

Step 1803: and calculating a zero sequence component according to the inversion voltage and the modulation strategy of each path of inversion branch in the inversion circuit.

In this embodiment, the Modulation strategy may be SVPWM (Space Vector Pulse Width Modulation), DPWM (Discontinuous Pulse Width Modulation), or the like, which is not specifically limited in this embodiment of the present application. The SVPWM is adopted to improve the utilization rate of the bus voltage; the DPWM can reduce the loss of the switching tube, and further improve the overall efficiency of the inverter.

In an embodiment, if the modulation strategy is SVPWM modulation, the zero-sequence component is a negative value of half of a sum of a maximum value and a minimum value of the inverter voltage in the inverter circuit. Still taking the circuit structure shown in fig. 7 as an example, according to the above embodiment, the inverted voltage of each inverting branch in the inverting circuit includes the first inverted voltage U in the abc coordinate system_aA second inverter voltage U_bAnd a third inverter voltage U_cThen, the first inversion voltage U under the abc coordinate system is obtained_aA second inverter voltage U_bAnd a third inverter voltage U_cThe zero sequence component can be obtained by summing the maximum value and the minimum value and multiplying the sum by-0.5. For example, in one embodiment, the first inverse voltage U in the abc coordinate system_aAt maximum value, and a third inverse voltage U in abc coordinate system_bFor the minimum value, the zero sequence component is:

U_inj=-0.5(U_a+U_b)（14）

it can be understood that, in the case of the circuit junction structure shown in fig. 6, the inversion voltage of each inversion branch in the inversion circuit includes the first inversion voltage U in the abc coordinate system_aAnd a second inverter voltage U_bThen, the first inversion voltage U under the abc coordinate system is obtained_aAnd a second inverter voltage U_bAt this time, only two values are needed, one is the maximum value and the other is the minimum value, so that the first inversion voltage U is converted into the second inversion voltage U_aAnd a second inverter voltage U_bAfter summing, multiplying by-0.5 to obtain the zero sequence component.

Furthermore, after determining the inversion voltage, the zero sequence component and the common mode voltage suppression component of each of the inversion branches in the inverter circuit, in an embodiment, the inversion voltage, the zero sequence component and the common mode voltage suppression component of each of the inversion branches in the inverter circuit are added, and then the corresponding pulse width modulation signal is output according to a result obtained by the addition. The pulse width modulation signal is used for driving a switching tube in the inverter circuit so as to inhibit the common-mode current of the inverter circuit while keeping the inverter circuit in normal operation.

The embodiment of the application provides a driving device of a switching tube, which is applied to an inverter circuit in any embodiment of the application. Referring to fig. 19, which shows a schematic structural diagram of a driving apparatus of a switching tube according to an embodiment of the present application, a driving apparatus 1900 of the switching tube includes: a common mode current calculating module 1901, a common mode current suppressing module 1902 and a driving module 1903.

The common-mode current calculating module 1901 is configured to obtain a current of each inverting branch in the inverting circuit, and determine a common-mode current of the inverting circuit according to an average value of the currents.

The common mode current rejection module 1902 is configured to determine a common mode voltage rejection component of the inverter circuit by: u shape_c(t)=-R₀i_cm(t) of (d). Wherein, U_c(t) is the common mode voltage rejection component, R₀Is the resistance value of a dummy resistor, i_cmCommon mode current, t is time.

The driving module 1903 is configured to drive the switching tube according to the common mode voltage rejection component.

In an embodiment, as shown in fig. 20, the driving apparatus 1900 of the switching tube further includes a parameter calculating module 1904, a phase-locked loop module 1905, a coordinate transforming module 1906, an output current controlling module 1907, an inverse coordinate transforming module 1908, and a zero-sequence component injecting module 1909.

Taking the circuit structure shown in fig. 7 as an example, the parameter calculating module 1904 is used for calculating the resistance value of the dummy resistor. The phase-locked loop module 1905 is configured to obtain a grid voltage, determine an angle of the grid voltage according to the grid voltage, and input the angle of the grid voltage to the coordinate transformation module 1906, where the grid voltage includes a first grid voltage e_aSecond grid voltage e_bTo a third network voltage e_c. The coordinate transformation module 1906 is configured to transform the current of each inverting branch in the inverting circuit through an abc/dq coordinate system based on the angle of the grid voltage and the current of each inverting branch in the inverting circuit, so as to obtain a current in a dq coordinate system, where the current of each inverting branch in the inverting circuit includes the current of the first inverting branch A1i_LaCurrent i of the second inverting branch A2_LbCurrent i to third inverting branch A3_LcThe current in dq coordinate system includes a first current i_dAnd a second current i_q. The output current control module 1907 is configured to obtain an inverse voltage in the dq coordinate system according to the current in the dq coordinate system, and specifically, calculate a first preset current id1 and a first current i_dAnd calculating a second predetermined current iq2 and a second current i_qObtaining an inversion voltage under the dq coordinate system according to the first difference and the second difference, wherein the inversion voltage under the dq coordinate system comprises a first inversion voltage U under the dq coordinate system_dAnd a second inverter voltage U_q. The inverse coordinate transformation module 1908 is configured to obtain the first inverse voltage U in the dq coordinate system_dAnd a second inverter voltage U_qAnd then, transforming the inversion voltage in the dq coordinate system through the dq/abc coordinate system to obtain the inversion voltage of each path of inversion branch in the abc coordinate system. The zero-sequence component injection module 1909 is configured to calculate a zero-sequence component according to the inversion voltage and the modulation strategy of each inversion branch in the inversion circuit, and inject the zero-sequence component into the driving module 1903. The driving module 1903 is further configured to output the first inverted voltage U according to the abc coordinate system_aA second inverter voltage U_bAnd a third inverter voltage U_cAnd outputting a pulse width modulation signal by the zero sequence component and the common-mode voltage suppression component so as to drive each switching tube in the inverter circuit according to the pulse width modulation signal.

Taking the circuit structure shown in fig. 6 as an example, the process difference from the circuit structure shown in fig. 7 is: wherein the grid voltage comprises a first grid voltage e_aSecond grid voltage e_b(ii) a The current of each inversion branch in the inversion circuit comprises the current i of the first inversion branch A1_LaCurrent i of the second inverting branch A2_Lb(ii) a The driving module 1903 is further configured to output a pulse width modulation signal according to the first inverter voltage Ua, the second inverter voltage Ub, the zero-sequence component, and the common-mode voltage suppression component in the abc coordinate system, so as to drive each switching tube in the inverter circuit according to the pulse width modulation signal. The rest of the process is similar to the process of the circuit result shown in fig. 7, and here is no longer describedThe description is given in detail.

The product can execute the method provided by the embodiment of the application, and has the corresponding functional modules and beneficial effects of the execution method. For technical details that are not described in detail in this embodiment, reference may be made to the methods provided in the embodiments of the present application.

The application also provides an inverter circuit, which comprises a controller and at least one switching tube. The controller is connected with each switching tube and used for outputting pulse width modulation signals to drive each switching tube. The controller may be a Micro Controller Unit (MCU) or a Digital Signal Processing (DSP) controller.

Referring to fig. 21, one configuration of the controller 10 is illustrated in fig. 21. As shown in fig. 21, the controller 10 includes at least one processor 11 and a memory 12, where the memory 12 may be built in the controller 10 or external to the controller 10, and the memory 12 may also be a remotely located memory, and is connected to the controller 10 through a network.

Memory 12, which is a non-volatile computer-readable storage medium, may be used to store non-volatile software programs, non-volatile computer-executable programs, and modules. The memory 12 may include a storage program area and a storage data area, wherein the storage program area may store an operating system, an application program required for at least one function; the storage data area may store data created according to the use of the terminal, and the like. Further, the memory 12 may include high speed random access memory, and may also include non-volatile memory, such as at least one magnetic disk storage device, flash memory device, or other non-volatile solid state storage device. In some embodiments, the memory 12 may optionally include memory located remotely from the processor 11, which may be connected to the terminal over a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.

The processor 11 executes various functions of the terminal and processes data by running or executing software programs and/or modules stored in the memory 12 and calling data stored in the memory 12, so as to perform overall monitoring on the terminal, for example, implement the driving method of the switching tube according to any embodiment of the present application.

The number of the processors 11 may be one or more, and one processor 11 is illustrated in fig. 21. The processor 11 and the memory 12 may be connected by a bus or other means. The processor 11 may include a Central Processing Unit (CPU), digital Signal Processor (DSP), application Specific Integrated Circuit (ASIC), controller, field Programmable Gate Array (FPGA) device, or the like. The processor 11 may also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration.

The present application also provides an inverter including the inverter in any of the embodiments of the present application.

Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present application, and not to limit the same; within the context of the present application, where technical features in the above embodiments or in different embodiments can also be combined, the steps can be implemented in any order and there are many other variations of the different aspects of the present application as described above, which are not provided in detail for the sake of brevity; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present application.

Claims

1. An inverter circuit, comprising:

a controller for outputting a pulse width modulated signal;

the K-path inversion branch circuit is respectively connected with the controller, the direct-current power supply and the direct-current bus, and is used for responding to the pulse width modulation signal, converting the direct-current power supply into an alternating-current power supply, filtering the alternating-current power supply and outputting a power grid voltage, wherein the inversion branch circuit comprises a capacitive module for filtering, and K is an integer greater than or equal to 2;

the inductive branch is connected between the capacitive module and the direct current bus and used for reducing the resonance angular frequency of the inverter circuit;

the controller is further configured to:

calculating a first resonance angular frequency according to the characteristic value of the electronic element of the inverting branch circuit;

if the first impedance angle is smaller than a first preset threshold value, the inductive branch circuit is short-circuited;

obtaining the current of each path of inverting branch circuit, and determining the common-mode current of the inverting circuit according to the average value of each current;

determining a common mode voltage rejection component of the inverter circuit by:

U_c(t)=-R₀i_cm(t)

wherein, U_c(t) is the common mode voltage rejection component, R₀Is the resistance value of a dummy resistor, i_cmIs the common mode current, t is time;

and driving a switching tube in the inverter circuit according to the common mode voltage rejection component.

2. The inverter circuit according to claim 1, wherein the inverting branch further comprises:

3. The inverter circuit according to claim 2, wherein the voltage conversion module comprises a first switch and a second switch;

4. The inverter circuit according to claim 3, wherein the voltage conversion module further comprises a third switch and a fourth switch;

5. The inverter circuit of claim 2, wherein the first inductive module comprises a first inductor;

6. The inverter circuit of claim 2, wherein the second inductive module comprises a second inductor;

the first end of the second inductor is a first end of the second inductive module, and the second end of the second inductor is a second end of the second inductive module.

7. The inverter circuit of claim 2, wherein the capacitive module comprises a first capacitor;

the first end of the first capacitor is connected with the first end of the first inductive module and the first end of the second inductive module respectively, and the second end of the first capacitor is connected with the first end of the inductive branch;

8. The inverter circuit of claim 1, wherein the inductive branch comprises a third inductor;

9. The inverter circuit according to claim 1, further comprising a second bus capacitor disposed on the dc bus;

10. A driving method of a switching tube, applied to the inverter circuit according to any one of claims 1 to 9, the method comprising:

if the first impedance angle is smaller than a first preset threshold value, an inductive branch in the inverter circuit is short-circuited;

obtaining the current of each inverting branch in the inverting circuit, and determining the common-mode current of the inverting circuit according to the average value of each current;

U_c(t)=-R₀i_cm(t)

wherein, U_c(t) is the common mode voltage rejection component, R₀Is the resistance value of the dummy resistor, i_cmIs the common mode current, t is time;

and driving the switch tube according to the common mode voltage rejection component.

11. The method of claim 10, further comprising:

wherein the second preset threshold is smaller than the first preset threshold.

12. An inverter circuit, comprising:

at least one switching tube;

at least one processor and a memory communicatively coupled to the at least one processor, the memory storing instructions executable by the at least one processor to enable the at least one processor to perform the method of any of claims 10-11.

13. An inverter comprising the inverter circuit according to any one of claims 1 to 9 and 12.