CN114421748B - Asymmetric area power optimization device and photovoltaic module - Google Patents
Asymmetric area power optimization device and photovoltaic module Download PDFInfo
- Publication number
- CN114421748B CN114421748B CN202210309734.2A CN202210309734A CN114421748B CN 114421748 B CN114421748 B CN 114421748B CN 202210309734 A CN202210309734 A CN 202210309734A CN 114421748 B CN114421748 B CN 114421748B
- Authority
- CN
- China
- Prior art keywords
- circuit
- voltage
- output
- voltage reduction
- main filter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000005457 optimization Methods 0.000 title claims abstract description 45
- 238000010248 power generation Methods 0.000 claims abstract description 41
- 239000003990 capacitor Substances 0.000 claims description 56
- 230000009467 reduction Effects 0.000 claims description 42
- 230000008878 coupling Effects 0.000 claims description 2
- 238000010168 coupling process Methods 0.000 claims description 2
- 238000005859 coupling reaction Methods 0.000 claims description 2
- 238000006243 chemical reaction Methods 0.000 abstract description 24
- 238000001914 filtration Methods 0.000 abstract description 21
- 239000000428 dust Substances 0.000 description 5
- 230000008901 benefit Effects 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 238000009434 installation Methods 0.000 description 3
- 230000000295 complement effect Effects 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 230000001939 inductive effect Effects 0.000 description 2
- 238000009825 accumulation Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 230000002035 prolonged effect Effects 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 230000001360 synchronised effect Effects 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/14—Arrangements for reducing ripples from dc input or output
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/66—Regulating electric power
- G05F1/67—Regulating electric power to the maximum power available from a generator, e.g. from solar cell
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02S—GENERATION OF ELECTRIC POWER BY CONVERSION OF INFRARED RADIATION, VISIBLE LIGHT OR ULTRAVIOLET LIGHT, e.g. USING PHOTOVOLTAIC [PV] MODULES
- H02S40/00—Components or accessories in combination with PV modules, not provided for in groups H02S10/00 - H02S30/00
- H02S40/30—Electrical components
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02S—GENERATION OF ELECTRIC POWER BY CONVERSION OF INFRARED RADIATION, VISIBLE LIGHT OR ULTRAVIOLET LIGHT, e.g. USING PHOTOVOLTAIC [PV] MODULES
- H02S40/00—Components or accessories in combination with PV modules, not provided for in groups H02S10/00 - H02S30/00
- H02S40/30—Electrical components
- H02S40/32—Electrical components comprising DC/AC inverter means associated with the PV module itself, e.g. AC modules
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/56—Power conversion systems, e.g. maximum power point trackers
Abstract
The invention discloses an asymmetric regional power optimization device and a photovoltaic module, relates to the technical field of photovoltaic power generation, and aims to solve the problems of regional mismatch, regional power optimization efficiency and low current quality of the photovoltaic module. The invention mainly adopts the scheme that in a plurality of paths of buck conversion circuits which are connected in series at the output, part of the buck conversion circuits are not provided with inductors and carry out filtering by utilizing a main filter inductor along with the series circuit, and part of the buck conversion circuits are provided with auxiliary filter circuits for carrying out filtering, so that when the independent power is reduced due to shielding of the lower area of a photovoltaic module, the filtering can be carried out by the main filter inductor with higher inductance along with the series circuit, meanwhile, the filtering is carried out by the auxiliary filter inductor with lower inductance in the upper area with normal power in the photovoltaic module, and the superposition of ripples to the series circuit is avoided, thereby leading an optimization device to have better adaptability, higher conversion efficiency and higher current quality.
Description
Technical Field
The invention relates to the technical field of photovoltaic power generation, in particular to an asymmetric area power optimization device, a photovoltaic module and a photovoltaic module comprising the same.
Background
The double-path area power optimization scheme is to apply an MPPT power optimization circuit to replace a traditional bypass diode to respectively optimize the upper cell string area and the lower cell string area of a photovoltaic module (vertically installed). Compared with the traditional photovoltaic module level power optimization scheme, the scheme can prevent the hot spot effect to the maximum extent and prolong the service life of the photovoltaic module. In addition, the photovoltaic module with the optimized double-path regional power also has stronger environmental adaptability, and is convenient to adopt vertical installation with lower cost. The photovoltaic module adopting the vertical installation mode can reduce the power loss caused by the shadow shielding or dust deposition on the surface of the photovoltaic module and reduce the operation and maintenance cost of a photovoltaic system. Meanwhile, the array interval of the vertically-arranged photovoltaic modules is smaller, and the space utilization rate of a roof or the ground can be greatly improved, so that the installation cost and the benefit of the photovoltaic power generation system are comprehensively optimized.
In the current double-circuit area power optimization scheme, two MPPT power optimization circuits connected to an upper battery string area and a lower battery string area (vertically installed) are generally symmetrical, namely, the same circuit structure is adopted, and an inductor and a capacitor for storing energy in the circuit structure are also the same. However, the surface dust deposition, front-back row shadow shading, power loss and internal module mismatch of the photovoltaic module are usually developed from bottom to top. In other words, the strings of cells in the lower region of the photovoltaic module typically drop in power prior to the upper region. In order to solve the mismatch problem caused by the power drop of the lower area and ensure that the output current of the power optimized upper and lower areas is consistent, the BUCK-type BUCK power optimization circuit generally adjusts the output power of the lower area in a BUCK-boost manner, that is, the duty ratio of the power optimization circuit of the lower area is adjusted to be low, and the duty ratio of the power optimization circuit of the upper area is kept unchanged or is adjusted to be high.
Therefore, the existing symmetrical double-path power optimization device cannot well meet the requirements of application scenes of photovoltaic modules, the inductor and the capacitor in the upper-region power optimization circuit do not play a role, and the inductor and the capacitor in the lower-region power optimization circuit are insufficient in general performance, so that the output ripple current of the power optimization device is too high, and the efficiency of power conversion is low.
Disclosure of Invention
The invention provides an asymmetric area power optimization device and a photovoltaic module comprising the same in order to overcome the problems in the prior art, so that the area power optimization can well solve the problems of area mismatch and power loss caused by surface dust accumulation and front and back row shadow shielding of the module, and the photovoltaic module has higher power conversion efficiency and better output current quality.
In order to achieve the purpose, the invention adopts the following technical scheme:
in a first aspect, the present invention provides an asymmetric area power optimization device, comprising a device body for coupling to a photovoltaic module, the device body comprising at least two paths of buck conversion circuits; the input end of each step-down conversion circuit is used for correspondingly accessing different regional power generation units in the photovoltaic module, the output ends of the step-down conversion circuits are connected with each other to form a series circuit, and the series circuit is provided with a main filter inductor; in each of the buck conversion circuits, at least one of the buck conversion circuits is configured with an auxiliary filter inductor, and the rest of the buck conversion circuits are configured to be filtered by the main filter inductor without being configured with the auxiliary filter inductor, wherein the inductance of the main filter inductor is higher than that of the auxiliary filter inductor.
Preferably, the buck converter circuit is provided with two paths, namely a first buck circuit and a second buck circuit, the second buck circuit is provided with an auxiliary filter inductor, and the first buck circuit is configured to be filtered by the main filter inductor without being configured with the auxiliary filter inductor.
In the above apparatus, preferably, the positive terminal of the output terminal of the second voltage-reducing circuit is connected to the negative terminal of the output terminal of the first voltage-reducing circuit so as to be connected as a series circuit; the positive pole of first step-down circuit's output and second step-down circuit's output negative pole regard as series circuit's output, wherein one end of main filter inductance is connected in the positive pole of first step-down circuit's output, assist the filter inductance and establish ties and set up at second step-down circuit's output positive pole.
Preferably, the series circuit is configured with a main filter capacitor, the main filter capacitor is arranged at the other end of the main filter inductor in parallel, the second voltage-reducing circuit is configured with an auxiliary filter capacitor, and the auxiliary filter capacitor is arranged between the positive electrode and the negative electrode of the output end of the second voltage-reducing circuit in parallel.
Preferably, the device body further includes a control circuit, the first voltage-reducing circuit includes a first output capacitor, one end of the first output capacitor is connected to the positive electrode of the output end of the main filter circuit, the other end of the first output capacitor is connected to the negative electrode of the output end of the first voltage-reducing circuit, and the control circuit is configured to obtain voltage signals at two ends of the first output capacitor.
Preferably, in the above apparatus, the second voltage-reducing circuit includes a second output capacitor, and the second output capacitor is arranged in parallel between an anode and a cathode of an output terminal of the second voltage-reducing circuit; the control circuit is used for acquiring voltage signals at two ends of the second output capacitor.
Preferably, in the above apparatus, the first voltage-reducing circuit includes a first high-side switch and a first low-side switch, the first high-side switch is connected in series between the input and output terminals of the first voltage-reducing circuit, and the first low-side switch is connected in parallel between the positive and negative poles of the output terminal of the first voltage-reducing circuit; the second voltage reduction circuit comprises a second high-side switch and a second low-side switch, the second high-side switch is arranged between the input end and the output end of the second voltage reduction circuit in series, and the second low-side switch is arranged between the anode and the cathode of the output end of the second voltage reduction circuit in parallel.
Preferably, the apparatus body further includes a control circuit, the control circuit is configured to generate a first pwm signal, and configure the duty ratio of the first pwm signal independently according to a parameter signal of the first voltage-reducing circuit; and the control circuit is used for generating a second pulse width modulation signal and independently configuring the duty ratio of the second pulse width modulation signal according to the parameter signal of the second voltage reduction circuit.
In a second aspect, the invention provides a photovoltaic module, which includes a module body and the device body, wherein the module body includes regional power generation units formed by dividing all cell strings equally according to regions, the number of the regional power generation units is the same as that of the buck conversion circuits, and output ends of the regional power generation units are connected to input ends of the buck conversion circuits in a one-to-one correspondence manner.
Above-mentioned photovoltaic module is preferred, the step-down transform circuit is provided with two the tunnel, is first step-down circuit and second step-down circuit respectively, second step-down circuit is provided with assists filter inductance, first step-down circuit is configured as by main filter inductance filters and does not dispose and assist filter inductance, the subassembly body includes first power generation unit and the second power generation unit that constitutes according to regional two equal divisions by all battery pieces cluster, the subassembly body is installed with the mode that first power generation unit is located second power generation unit below, the input in second step-down circuit is connected to the output of first power generation unit, the output of second power generation unit is connected in first step-down circuit input.
Compared with the prior art, the invention has the following beneficial effects:
according to the power optimization device and the photovoltaic module, the first voltage reduction circuit and the second voltage reduction circuit which are connected in series in output are arranged, the first voltage reduction circuit is configured to be free of inductance and filter with the main filter inductance along with the series circuit, and the second voltage reduction circuit is configured with the auxiliary filter circuit, so that when the independent power is reduced due to shielding in the lower area of the photovoltaic module, the corresponding first voltage reduction circuit can filter with the main filter inductance with higher inductance along with the series circuit, and meanwhile, the power in the upper area of the photovoltaic module is normal, so that the corresponding second voltage reduction circuit filters with the auxiliary filter inductance with lower inductance to avoid overlapping ripples on the series circuit.
The invention is further described below with reference to the accompanying drawings.
Drawings
Fig. 1 is a schematic functional structural diagram of an asymmetric area power optimization apparatus according to an embodiment of the present invention.
Fig. 2 is a schematic circuit diagram of an asymmetric area power optimization apparatus according to an embodiment of the present invention.
Fig. 3 is a schematic structural diagram of a photovoltaic module including an asymmetric-area power optimization device according to an embodiment of the present invention.
Detailed Description
To better illustrate the objects, technical solutions and advantages of the present invention, the following detailed description of the embodiments of the present invention is provided with reference to the accompanying drawings and examples. The following examples are intended to illustrate the invention, but are not intended to limit the scope of the invention.
As shown in fig. 1, an asymmetric area power optimization device according to an embodiment of the invention includes a device body 20 with two photovoltaic power inputs. The device body 20 includes a first voltage-dropping circuit 21a, a second voltage-dropping circuit 21b, an auxiliary filter circuit 23, a main filter circuit, and a control circuit 40. Wherein, the output terminals of the first step-down circuit 21a and the second step-down circuit 21b are connected to each other as a series circuit. The main filter circuit comprises a main filter inductor L1 arranged at the output end of the series circuit. The auxiliary filter circuit 23 includes an auxiliary filter inductor L2 disposed at the output terminal of the second voltage-reducing circuit 21b. The first voltage-reducing circuit 21a is not provided with an inductor, but is filtered by the main filter inductor L1 along with the series circuit. The inductance of the main filter inductor L1 is higher than the inductance of the auxiliary filter inductor L2.
The voltage reduction circuit in this embodiment has a specific structure, and the first voltage reduction circuit 21a and the second voltage reduction circuit 21b are both BUCK-type voltage reduction conversion circuits, and are used for converting photovoltaic input power into output power with a lower voltage. The first voltage-decreasing circuit 21a is provided with an input terminal including an I1+ terminal as a positive pole of the input terminal and an I1-terminal as a negative pole of the input terminal. The second voltage-decreasing circuit 21b is provided with an input terminal including an I2+ terminal as the positive pole of the input terminal and an I2-terminal as the negative pole of the input terminal. The I1+ terminal and the I1-terminal are used for correspondingly connecting to a regional power generation unit of one of the photovoltaic modules, and are also one of the input terminals of the device body 20. The I2+ terminal and the I2-terminal are used for correspondingly connecting to another regional power generation unit of the same photovoltaic module, and are also another input terminals of the device body 20. The first voltage-decreasing circuit 21a is provided with an output terminal including an O1+ terminal as an anode of the output terminal and an O1-terminal as a cathode of the output terminal. The second voltage-decreasing circuit 21b is provided with an output terminal including an O2+ terminal as an anode of the output terminal and an O2-terminal as a cathode of the output terminal. In other words, the output terminals of the first voltage-reducing circuit 21a and the second voltage-reducing circuit 21b are connected to each other as a series circuit. The O1+ terminal serves as the positive output terminal of the series circuit, and the O2-terminal serves as the negative output terminal of the series circuit.
In the present embodiment, the first voltage-reducing circuit 21a and the second voltage-reducing circuit 21b perform voltage-reducing conversion by means of dc chopping. Specifically, the control circuit 40 is configured to generate a first pwm signal, and independently configure the duty ratio of the first pwm signal according to the parametric signal of the first voltage-dropping circuit 21 a; and the second pwm signal generated by the control circuit 40 configures the duty ratio of the second pwm signal independently according to the parametric signal of the second voltage-dropping circuit 21b. The first pulse width modulation signal and the second pulse width modulation signal respectively enable the voltage or the current of the two paths of input power to be configured at the maximum power point. Meanwhile, the conversion of the two voltage reduction circuits is completed through direct current chopping, so that the output power needs to be filtered.
In order to filter the converted photovoltaic power, the embodiment specifically includes that the input end of the main filter circuit includes an anode I3+ end and a cathode I3-end. The output end of the main filter circuit comprises a positive electrode O3+ end and a negative electrode O3-end. The two ends of the main filter inductor L1 are connected in series between the end I3+ and the end O3 +. Meanwhile, the I3+ terminal and the O3+ terminal serve as output terminals of the device body 20. The input positive pole of the series circuit is connected to the output positive pole of the first voltage-reducing circuit 21a, i.e., the O1+ terminal is connected to the I3+ terminal. In other words, the chopped waveforms converted by the first step-down circuit 21a are merged in the series circuit, and the ripples in the series circuit are output to the main filter circuit, filtered by the main filter inductor L1 having a high inductance, and filtered. The auxiliary filter inductor L2 is provided in series between the I1-terminal and the I1+ terminal of the second voltage-decreasing circuit 21b. In other words, the second step-down circuit 21b converts the formed chopped waveform, filters the waveform by the auxiliary filter inductor L2 having a low inductance, and merges the waveform into the series circuit after the filtering. Therefore, it can be seen that the first voltage-reducing circuit 21a is not provided with an inductor, and the second voltage-reducing circuit 21b is provided with an auxiliary filter inductor L2 with a lower inductance, which can meet the general filtering requirements of the second voltage-reducing circuit 21b. Meanwhile, a series circuit of the output ends of the first voltage reduction circuit 21a and the second voltage reduction circuit 21b is configured with a main filter inductor L1, and the non-inductive first voltage reduction circuit 21a performs filtering by means of the main filter inductor L1. The inductance of the main filter inductor L1 is higher than that of the auxiliary filter inductor L2, and can meet the higher filtering requirement of the first voltage-reducing circuit 21a without inductor.
The effects of the present embodiment are exemplarily explained: when the photovoltaic module is shielded by the front and rear rows of shadows, the output power of the maximum power point of the photovoltaic power of the lower region of the photovoltaic module is lower than that of the upper region. In order to solve the problem of output power mismatch of the upper region and the lower region, the operation duty ratio of the step-down circuit of the lower region is set to be lower, so that the turn-off time of the step-down circuit is relatively prolonged, and the current change through the inductor is increased. The first voltage-reducing circuit 21a of the present embodiment is configured to perform filtering by the main filter inductor L1 with a higher inductance value along with the series circuit, and can cope with the case where the lower region duty ratio is set to be low (e.g., 0.7 or lower). Meanwhile, the duty ratio of the upper area is relatively high (such as near 0.9), and the second voltage-reducing circuit 21b is configured with the auxiliary filter inductor L2 with a lower inductance, so that the filtering requirement of the duty ratio setting of the upper area can be met. And under the effect of the auxiliary filter inductor L2, the output ripple of the series circuit is mainly formed by the first voltage-reducing circuit 21a, and the ripple generated by the second voltage-reducing circuit 21b can be prevented from being superposed on the series circuit, so that the filter work of the series circuit can be completed without the main filter inductor L1 with high performance.
Therefore, the asymmetric area power optimization device provided by the embodiment of the invention can solve the parameter mismatch problem of different areas in the photovoltaic module, can realize better power conversion efficiency under the condition of cost effective control of the filter device, and has better output current quality.
It can be understood that, the asymmetric area power optimization device of this embodiment adopts two buck conversion circuits, which can implement independent power optimization on the upper and lower areas in a photovoltaic module. According to other embodiments of the present invention, the power optimization apparatus may further include three buck conversion circuits, where at least one of the three buck conversion circuits is configured without an inductor, and the remaining buck conversion circuits are provided with the auxiliary filter circuit 23. Obviously, the provision of a three-way buck converter circuit would result in increased cost of the device. However, this embodiment also works very well in the face of multi-zone mismatch problems such as back-light reflection in double-sided photovoltaics.
It can be understood that, in the asymmetric area power optimization apparatus of this embodiment, the two voltage-reducing circuits are connected in series, and the anode of the output terminal of the second voltage-reducing circuit 21b is connected to the cathode of the output terminal of the first voltage-reducing circuit 21 a. Thereby, the voltage transformation formed by the non-inductive first voltage-dropping circuit 21a will act on the main filter circuit. According to other embodiments of the present invention, the two voltage-reducing circuits may be connected in series, where an anode of an output terminal of the first voltage-reducing circuit 21a is connected to a cathode of an output terminal of the second voltage-reducing circuit 21b, an anode of an output terminal of the second voltage-reducing circuit 21b is connected to the main filter inductor L1, and a cathode of an output terminal of the second voltage-reducing circuit 21b is connected to a cathode of the main filter circuit.
As shown in fig. 2, an embodiment according to the invention is an asymmetric area power optimization apparatus with a more specific structure. The asymmetric area power optimization apparatus includes a first voltage-dropping circuit 21a, a second voltage-dropping circuit 21b, an auxiliary filter circuit 23, a main filter circuit, and a control circuit 40. The first voltage-reducing circuit 21a includes a first input capacitor Ci1, a first high-side switch M11, a first low-side switch M12, and a first output capacitor Co1. Obviously, the first voltage-reducing circuit 21a has no inductance. The second voltage-reducing circuit 21b includes a second input capacitor Ci2, a second high-side switch M21, a second low-side switch M22, an auxiliary filter inductor L2, an auxiliary filter capacitor C2, and a second output capacitor Co2. The first high-side switch M11, the first low-side switch M12, the second high-side switch M21, and the second low-side switch M22 are MOSFET transistors. The auxiliary filter inductor L2 and the auxiliary filter capacitor C2 are an auxiliary filter circuit 23 disposed in the second voltage-reducing circuit 21b. The main filter circuit comprises a main filter inductor L1 and a main filter capacitor C1. The control circuit 40 includes a first controller 41 and a second controller 42.
Specifically, the first input capacitor Ci1 is disposed in parallel between the I1+ terminal and the I1-terminal, the first high-side switch M11 is disposed in series between the I1+ terminal and the O1+ terminal, the first low-side switch M12 is disposed in parallel between the O1+ terminal and the O1-terminal, and the first output capacitor Co1 is disposed in parallel between the O3+ terminal and the O1-terminal. The first controller 41 acquires the input voltage U _ i1 of the first voltage-reducing circuit 21a by acquiring signals at two ends of the first input capacitor Ci 1; acquiring signals at two ends of a first output capacitor Co1 to obtain an output voltage U _ o1 of a first voltage reduction circuit 21 a; acquiring signals at two ends of a first high-side switch M11 to obtain input current I _ I1 of a first voltage reduction circuit 21 a; the output current I _ o1 of the first voltage-reducing circuit 21a is obtained by collecting signals at two ends of the first low-side switch M12. The first controller 41 is configured to generate a first pulse width modulation signal (PWM 1_ HG signal) to control the first high-side switch M11, and to generate a complementary signal (PWM 1_ LG signal) of the first pulse width modulation signal to control the first low-side switch M12.
Specifically, the second input capacitor Ci2 is connected in parallel to an I2+ terminal and an I2-terminal, the second high-side switch M21 and the auxiliary filter inductor L2 are sequentially connected in series between the I2+ terminal and the O2+ terminal, one end of the second low-side switch M22 is connected between the second high-side switch M21 and the auxiliary filter inductor L2, the other end of the second low-side switch M22 is connected to the O2-terminal, and the auxiliary filter capacitor C2 and the second output capacitor Co2 are respectively connected in parallel between the O2+ terminal and the O2-terminal. The second controller 42 acquires the input voltage U _ i2 of the second voltage-reducing circuit 21b by acquiring signals at two ends of the second input capacitor Ci 2; acquiring signals at two ends of a second output capacitor Co2 to obtain an output voltage U _ o2 of a second voltage reduction circuit 21 b; acquiring signals at two ends of a second high-side switch M21 to obtain an input current I _ I2 of a second voltage reduction circuit 21 b; the output current I _ o2 of the second voltage-reducing circuit 21b is obtained by collecting signals at two ends of the second low-side switch M22. The second controller 42 is configured to generate a second pulse width modulation signal (PWM 2_ HG signal) to control the second high-side switch M21, and to generate a complementary signal (PWM 2_ LG signal) of the second pulse width modulation signal to control the second low-side switch M22. The O2+ end of the second voltage-reducing circuit 21b is connected to the O1-end of the first voltage-reducing circuit 21a, the O1+ end of the first voltage-reducing circuit 21a is connected to one end (I3 + end) of the main filter inductor L1, the other end (O3 + end) of the main filter inductor L1 is connected to one end (O3 + end) of the main filter capacitor C1, and the other end (O3-end) of the main filter capacitor C1 is connected to the O2-end of the second voltage-reducing circuit 21b.
In this embodiment, the main filter capacitor C1 and the main filter inductor L1 are used to stabilize the output ripple of the two-path buck circuit connected in series. The inductance of the main filter inductor L1 is higher than that of the auxiliary filter inductor L2, for example, the inductance of the main filter inductor L1 is 1-3 microhenries, and the inductance of the auxiliary filter inductor L2 is 0.2-0.8 microhenries. Therefore, the main filter inductor L1 can deal with the filtering work of the voltage reduction circuit with lower operation duty ratio, and the auxiliary filter inductor L2 can deal with the condition with higher operation duty ratio. In a specific scheme of this embodiment, the capacity of the main filter capacitor C1 is higher than the capacity of the auxiliary filter capacitor C2, for example, the capacity of the main filter capacitor C1 is 50-100 μ farads, and the capacity of the corresponding auxiliary filter capacitor C2 is 10-30 μ farads. In other specific schemes of this embodiment, the main filter capacitor C1 may be set lower because the main filter inductor L1 is higher.
It should be noted that the first voltage-reducing circuit 21a of the present embodiment is not provided with an inductor, but is provided with a first output capacitor Co1 for sensing U _ o1. One end of the first output capacitor Co1 is connected to the O3+ terminal, the potential difference between the O3+ terminal and the O1-terminal can be represented as the output voltage of the first voltage-dropping circuit 21a, and the O3+ terminal is filtered by the main filter inductor L1 and the main filter capacitor C1, so that the sensing of the output voltage of the first voltage-dropping circuit 21a is more stable and accurate.
It should be noted that the first voltage-reducing circuit 21a and the second voltage-reducing circuit 21b are both synchronous BUCK architectures, that is, a high-side switch and a low-side switch are provided, and when the high-side switch of one of the voltage-reducing circuits is turned off, the low-side switch is synchronously switched to be on and provides a follow current for the series circuit, so that the other voltage-reducing circuit can be turned on to the output end of the series circuit. In order to realize that each voltage reduction circuit is controlled by a pulse width modulation signal, an input capacitor and an output capacitor are correspondingly arranged in the voltage reduction circuit, so that the measured input voltage and the measured output voltage are accurate. The second voltage-reducing circuit 21b is controlled by the second pulse width modulation signal, and the formed chopped wave waveform is filtered by the auxiliary filter inductor L2 and the auxiliary filter capacitor C2. Since the operation duty ratio of the second voltage-reducing circuit 21b is at a high level, the auxiliary filter circuit 23 can perform a filtering operation with high quality even if the inductance is low, and supply a dc power with high quality to the series circuit. Thus, the ripple peak of the serial circuit bus is not amplified by the second step-down circuit 21b. The first voltage-reducing circuit 21a is controlled by the first pulse width modulation signal, and the formed chopping waveform is filtered by the main filter inductor L1 and the main filter capacitor C1. The inductance of the main filter inductor L1 is higher, and even if the operation duty ratio of the first voltage-reducing circuit 21a is at a low level, the main filter inductor L1 can stably complete the filtering operation.
As shown in fig. 3, an embodiment according to the invention is a photovoltaic module including a module body 10. The module body 10 comprises a rectangular array of solar cells arranged in a packaging structure, the array of solar cells is connected in series along the short side direction of the rectangle to form a cell string 101, and the cell string 101 is provided with 12 strings along the long side direction of the rectangle. The 6 strings of cell strings 101 in the lower half area are connected to each other to form a first power generation unit 11a, and the 6 strings of cell strings 101 in the upper half area are connected to each other to form a second power generation unit 11b. The first power generation unit 11a has a positive PV1+ terminal and a negative PV 1-terminal, and the second power generation unit 11b has a positive PV2+ terminal and a negative PV 2-terminal. As can be seen, all the cell strings 101 in the pack body 10 are divided into two by regions, forming two regional power generation units, i.e., the second power generation unit 11b and the first power generation unit 11a. The assembly body 10 also includes the asymmetric-area power optimization device of each of the embodiments described above. The power optimization device is also provided with two step-down conversion circuits, namely a first step-down circuit 21a and a second step-down circuit 21b. Therefore, the power generation units in the regions are connected to the step-down conversion circuit in a one-to-one correspondence manner. Specifically, the input terminals, i.e., the I1+ terminal and the I1-terminal, of the first voltage-reducing circuit 21a are respectively connected to the PV1+ terminal and the PV 1-terminal of the first power generating unit 11a. The input terminals of the second voltage-reducing circuit 21b, i.e., the I2+ terminal and the I2-terminal, are respectively and correspondingly connected to the bPV2+ terminal and the PV 2-terminal of the second power generation unit 11.
It is worth noting that, in general, in order to obtain direct solar radiation, photovoltaic modules are generally configured to be mounted obliquely. In this embodiment, the module body 10 is installed in such a manner that the first power generation unit 11a is located below the second power generation unit 11b, that is, the first power generation unit 11a is located at a lower position and the second power generation unit 11b is located at an upper position. If the photovoltaic module is prone to be covered by more dust, the first power generating unit 11a at a lower position is shielded by more dust. If the photovoltaic module is shielded in front of and behind the rows in the morning and evening, the first power generation unit 11a is mainly influenced by the shielding.
In an operation example of the present embodiment, the asymmetric area power optimization device and the photovoltaic module of the present invention have advantages. When the power optimization device is operated, the first voltage reduction circuit 21a obtains the U _ I1 input voltage, the U _ o1 output voltage, the I _ I1 input current and the I _ o1 output current, so as to adjust the duty ratio D1 of the pulse width modulation signal. The U _ I1 input voltage and the I _ I1 input current also respectively represent the output voltage and the output current of the first power generation unit 11a. The duty ratio D1 of the operation of the first voltage-decreasing circuit 21a satisfies the relationship D1= U _ o1/U _ I1, and satisfies the relationship D1= I _ I1/I _ o1. The adjustment of the duty ratio D1 configures the output voltage of the first power generation unit 11a at the maximum power point. Similarly, the second voltage-decreasing circuit 21b sets the duty ratio D2 to configure the second power generation unit 11b at the maximum power point. When the photovoltaic module is shielded in front and back rows in the morning and evening, the second power generation unit 11b is at a higher position and is not influenced by shielding, and the duty ratio D2 can continuously operate near 0.9. In other words, the second high-side switch M21 is in the off state only 10% of the time within the cycle. In this embodiment, the auxiliary filtering unit with a lower inductance can smoothly filter the chopped wave signal, thereby reducing the output ripple current and reducing the dc resistance loss of the auxiliary filtering unit. The first power generating unit 11a is located at a lower position, and will be influenced by the shielding to reduce the output power. Therefore, the input current I _ I1 of the first step-down circuit 21a will drop greatly, and the duty ratio D1 of the first step-down circuit 21a will drop from around 0.9, which is normal, to 0.7 in order to maintain the consistency of the output current I _ o1. In other words, the first high-side switch M11 is off 30% of the time in the cycle. In the embodiment, the main filtering unit has a relatively strong filtering capability, and when the chopping signal of the first voltage-reducing circuit 21a is output along with the series circuit, the main filtering unit can smoothly filter the chopping signal of the series circuit. Meanwhile, the auxiliary filtering unit filters the chopping signal with D2=0.9, and the chopping signal of the second voltage-reducing circuit 21b is filtered to be smooth, so that the peak value superposition of the chopping signal of the first voltage-reducing circuit 21a does not exist, and therefore, the main filtering inductor can select a device with lower cost and more appropriate filtering effect.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or to implicitly indicate the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of the feature. In the description of the present invention, "a plurality" means at least two, e.g., two, three, etc., unless specifically limited otherwise.
The foregoing embodiments have been described primarily for the purposes of illustrating the general principles, and features and advantages of the invention. It will be understood by those skilled in the art that the present invention is not limited to the embodiments described above, which are described in the specification and illustrated only to illustrate the principle of the present invention, but that various changes and modifications may be made therein without departing from the spirit and scope of the present invention, which fall within the scope of the invention as claimed.
Claims (8)
1. An asymmetric area power optimization device, comprising a device body (20) for coupling to a photovoltaic module, characterized in that the device body (20) comprises two paths of buck converter circuits, a first buck circuit (21 a) and a second buck circuit (21 b), respectively;
the input end of the first voltage reduction circuit (21 a) is used for being connected to a regional power generation unit in the lower half region of the photovoltaic module, the input end of the second voltage reduction circuit (21 b) is used for being connected to a regional power generation unit in the upper half region of the photovoltaic module, the output ends of the first voltage reduction circuit (21 a) and the second voltage reduction circuit (21 b) are mutually connected to form a series circuit, and the series circuit is provided with a main filter inductor (L1); the second voltage reduction circuit (21 b) is configured with an auxiliary filter inductor (L2), the first voltage reduction circuit (21 a) is configured to be filtered by the main filter inductor (L1) without being configured with the auxiliary filter inductor (L2), and the inductance of the main filter inductor (L1) is higher than the inductance of the auxiliary filter inductor (L2).
2. The asymmetric-area power optimization device as claimed in claim 1, wherein the output anode of the second voltage-dropping circuit (21 b) is connected to the output cathode of the first voltage-dropping circuit (21 a) to be connected as a series circuit; the positive pole of the output end of the first voltage reduction circuit (21 a) and the negative pole of the output end of the second voltage reduction circuit (21 b) are used as the output end of the series circuit, one end of the main filter inductor (L1) is connected to the positive pole of the output end of the first voltage reduction circuit (21 a), and the auxiliary filter inductor (L2) is connected to the positive pole of the output end of the second voltage reduction circuit (21 b) in series.
3. The asymmetric-area power optimization device as claimed in claim 2, wherein the series circuit is configured with a main filter capacitor (C1), the main filter capacitor (C1) is arranged in parallel at the other end of the main filter inductor (L1), the second voltage-dropping circuit (21 b) is configured with an auxiliary filter capacitor (C2), and the auxiliary filter capacitor (C2) is arranged in parallel between the positive and negative poles of the output end of the second voltage-dropping circuit (21 b).
4. The asymmetric-area power optimization device as claimed in claim 1, wherein the device body (20) further comprises a control circuit (40), the first voltage-dropping circuit (21 a) comprises a first output capacitor (Co 1), one end of the first output capacitor (Co 1) is connected to the positive electrode of the output end of the main filter circuit (22), the other end of the first output capacitor (Co 1) is connected to the negative electrode of the output end of the first voltage-dropping circuit (21 a), and the control circuit (40) is configured to obtain a voltage signal across the first output capacitor (Co 1).
5. The asymmetric-area power optimization device as claimed in claim 4, wherein the second voltage-reducing circuit (21 b) comprises a second output capacitor (Co 2), and the second output capacitor (Co 2) is arranged in parallel between the positive and negative poles of the output end of the second voltage-reducing circuit (21 b); the control circuit (40) is used for acquiring voltage signals at two ends of the second output capacitor (Co 2).
6. The asymmetric-area power optimization device as claimed in claim 1, wherein the first voltage-reducing circuit (21 a) comprises a first high-side switch (M11) and a first low-side switch (M12), the first high-side switch (M11) is arranged in series between the input and output terminals of the first voltage-reducing circuit (21 a), and the first low-side switch (M12) is arranged in parallel between the positive and negative terminals of the output terminal of the first voltage-reducing circuit (21 a); the second voltage reduction circuit (21 b) comprises a second high-side switch (M21) and a second low-side switch (M22), the second high-side switch (M21) is arranged between the input end and the output end of the second voltage reduction circuit (21 b) in series, and the second low-side switch (M22) is arranged between the anode and the cathode of the output end of the second voltage reduction circuit (21 b) in parallel.
7. The asymmetric-area power optimization device as recited in claim 1, wherein the device body (20) further comprises a control circuit (40), the control circuit (40) configured to generate a first pulse width modulated signal having a duty cycle independently configured according to a parametric signal of the first voltage dropping circuit (21 a); and the control circuit (40) is used for generating a second pulse width modulation signal and independently configuring the duty ratio of the second pulse width modulation signal according to the parameter signal of the second voltage reduction circuit (21 b).
8. A photovoltaic module comprising a module body (10) and the asymmetric-area power optimization device according to any one of claims 1 to 7, wherein the module body (10) comprises a first power generation unit (11 a) and a second power generation unit (11 b) which are composed of all cell strings (101) in two equal parts by area, the module body (10) is installed in a manner that the first power generation unit (11 a) is located below the second power generation unit (11 b), the output end of the first power generation unit (11 a) is connected to the input end of a second voltage reduction circuit (21 b), and the output end of the second power generation unit (11 b) is connected to the input end of the first voltage reduction circuit (21 a).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210309734.2A CN114421748B (en) | 2022-03-28 | 2022-03-28 | Asymmetric area power optimization device and photovoltaic module |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210309734.2A CN114421748B (en) | 2022-03-28 | 2022-03-28 | Asymmetric area power optimization device and photovoltaic module |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN114421748A CN114421748A (en) | 2022-04-29 |
| CN114421748B true CN114421748B (en) | 2023-02-28 |
Family
ID=81263670
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202210309734.2A Active CN114421748B (en) | 2022-03-28 | 2022-03-28 | Asymmetric area power optimization device and photovoltaic module |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN114421748B (en) |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102510231A (en) * | 2011-11-05 | 2012-06-20 | 山东电力研究院 | Diode clamp type five-level photovoltaic inverter and power supply system using the same |
| CN108123633A (en) * | 2016-11-25 | 2018-06-05 | 南京航空航天大学 | A kind of high efficiency photovoltaic combining inverter of no electrolytic capacitor Ripple Suppression |
| CN112737310A (en) * | 2020-12-17 | 2021-04-30 | 珠海格力电器股份有限公司 | Electromagnetic interference suppression device and method for hybrid power supply system and automobile air conditioner |
| CN112910242A (en) * | 2021-01-27 | 2021-06-04 | 浙江大学 | Decoupling voltage duty cycle compensation strategy applied to H bridge |
| CN215498883U (en) * | 2021-04-21 | 2022-01-11 | 广州中旭新能源有限公司 | Photovoltaic module with regional power optimization device |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8503200B2 (en) * | 2010-10-11 | 2013-08-06 | Solarbridge Technologies, Inc. | Quadrature-corrected feedforward control apparatus and method for DC-AC power conversion |
| US10396684B2 (en) * | 2014-12-16 | 2019-08-27 | Virginia Tech Intellectual Properties, Inc | Coupled inductor for interleaved multi-phase three-level DC-DC converters |
| CN204967747U (en) * | 2015-09-28 | 2016-01-13 | 常熟理工学院 | Alternating voltage type photovoltaic cell converting circuit |
| US11233397B2 (en) * | 2017-05-16 | 2022-01-25 | The Board Of Trustees Of The University Of Alabama | Systems, methods, and devices for simultaneous conversion and inversion of electrical power |
-
2022
- 2022-03-28 CN CN202210309734.2A patent/CN114421748B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102510231A (en) * | 2011-11-05 | 2012-06-20 | 山东电力研究院 | Diode clamp type five-level photovoltaic inverter and power supply system using the same |
| CN108123633A (en) * | 2016-11-25 | 2018-06-05 | 南京航空航天大学 | A kind of high efficiency photovoltaic combining inverter of no electrolytic capacitor Ripple Suppression |
| CN112737310A (en) * | 2020-12-17 | 2021-04-30 | 珠海格力电器股份有限公司 | Electromagnetic interference suppression device and method for hybrid power supply system and automobile air conditioner |
| CN112910242A (en) * | 2021-01-27 | 2021-06-04 | 浙江大学 | Decoupling voltage duty cycle compensation strategy applied to H bridge |
| CN215498883U (en) * | 2021-04-21 | 2022-01-11 | 广州中旭新能源有限公司 | Photovoltaic module with regional power optimization device |
Also Published As
| Publication number | Publication date |
|---|---|
| CN114421748A (en) | 2022-04-29 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN100433525C (en) | Soft switch back exciting converter used for solar energy photovoltaic generation incorporate in power network | |
| CN103166239A (en) | Centralized-distributed mixed novel energy power generation system and maximum power point tracking control method | |
| CN107834886B (en) | A kind of single-stage boost inverter and its control method | |
| CN102158081B (en) | Three-level boosting DC converter and modulation method thereof | |
| CN102946194A (en) | High-gain interleaving boost converter | |
| CN215498883U (en) | Photovoltaic module with regional power optimization device | |
| CN108400709A (en) | A kind of two-way DC/DC converters of integrated three level of bipolarity of crisscross parallel magnetic | |
| CN217824288U (en) | Photovoltaic off-grid and grid-connected system with energy storage device | |
| CN106130352A (en) | The micro-inverter of intermediate current type double tube positive exciting and numerical control device thereof | |
| CN105529925A (en) | Boost convertor based on switch inductor | |
| CN203522307U (en) | Wind-light-storage battery supplementary electricity generation device based on coupling inductance inverter | |
| CN203660883U (en) | Electrical energy conversion device | |
| CN109412406B (en) | Voltage conversion circuit integrated with carrier sending function and applied to photovoltaic module | |
| CN114421748B (en) | Asymmetric area power optimization device and photovoltaic module | |
| CN110086340B (en) | Coupling inductance bidirectional large-transformation-ratio DC-DC converter | |
| CN209419304U (en) | Power supply unit and system | |
| CN202167865U (en) | Charging controller with photovoltaic maximum power output | |
| CN217848965U (en) | Photovoltaic off-grid and grid-connected system | |
| CN113783455B (en) | Photovoltaic inverter capable of inhibiting leakage current and control method thereof | |
| CN111669057B (en) | DC boost converter and control method thereof | |
| CN204103827U (en) | Solar energy synergy energy-storage system | |
| CN102983718B (en) | The power-switching circuit of multiple input waveform can be supported | |
| CN211579879U (en) | Expandable gain unit type high-capacity DC/DC converter | |
| CN203056936U (en) | Power switching circuit supporting multiple input waveforms | |
| CN203056856U (en) | Power conversion circuit capable of automatically identifying and orientating polarity |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |