CN114006446B - TWS earphone charging circuit and TWS earphone - Google Patents

TWS earphone charging circuit and TWS earphone Download PDF

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Publication number
CN114006446B
CN114006446B CN202111640053.6A CN202111640053A CN114006446B CN 114006446 B CN114006446 B CN 114006446B CN 202111640053 A CN202111640053 A CN 202111640053A CN 114006446 B CN114006446 B CN 114006446B
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transistor
charging
voltage
electrically connected
terminal
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CN114006446A (en
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龚坤林
崔国庆
贾鹏
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Suzhou Saixin Electronic Technology Co ltd
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Suzhou Saixin Electronic Technology Co ltd
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/0013—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries acting upon several batteries simultaneously or sequentially
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/0047—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with monitoring or indicating devices or circuits
    • H02J7/0048—Detection of remaining charge capacity or state of charge [SOC]
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/0047—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with monitoring or indicating devices or circuits
    • H02J7/0048—Detection of remaining charge capacity or state of charge [SOC]
    • H02J7/0049—Detection of fully charged condition
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/007—Regulation of charging or discharging current or voltage
    • H02J7/00712—Regulation of charging or discharging current or voltage the cycle being controlled or terminated in response to electric parameters
    • H02J7/00714—Regulation of charging or discharging current or voltage the cycle being controlled or terminated in response to electric parameters in response to battery charging or discharging current
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/007—Regulation of charging or discharging current or voltage
    • H02J7/00712—Regulation of charging or discharging current or voltage the cycle being controlled or terminated in response to electric parameters
    • H02J7/007182—Regulation of charging or discharging current or voltage the cycle being controlled or terminated in response to electric parameters in response to battery voltage
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
    • H04R1/00—Details of transducers, loudspeakers or microphones
    • H04R1/10—Earpieces; Attachments therefor ; Earphones; Monophonic headphones
    • H04R1/1025—Accumulators or arrangements for charging
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J2207/00—Indexing scheme relating to details of circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J2207/20—Charging or discharging characterised by the power electronics converter

Abstract

The invention discloses a TWS earphone charging circuit and a TWS earphone, wherein the charging circuit comprises a charging module, a first transistor and a first control module; the input end of the charging module is electrically connected with the power supply, the output end of the charging module outputs charging voltage to the first end of the first transistor, the second end of the first transistor is electrically connected with the earphone battery, and the charging module is used for switching the charging mode according to the voltage of the earphone battery; the first end of the first control module is electrically connected with the second end of the first transistor, the second end of the first control module is electrically connected with the control end of the first transistor, and the first control module is used for controlling the first transistor to be conducted when the voltage of the earphone battery is smaller than the saturation voltage and controlling the first transistor to work in a saturation region when the charging current is smaller than a first preset current. The technical scheme provided by the invention can improve the overall charging efficiency of the earphone charging circuit, thereby increasing the charging times of the front-end power supply of the charging module for charging the earphone.

Description

TWS earphone charging circuit and TWS earphone
Technical Field
The invention relates to the technical field of electronics, in particular to a TWS earphone charging circuit and a TWS earphone.
Background
With the progress of science and technology, lithium batteries have been popularized as power supply devices for electronic products such as mobile phones, electronic cigarettes, mobile power sources, TWS (True Wireless Stereo, TWS) earphones, smart band watches, and the like.
TWS headsets are increasingly sold in consumer electronics, but in the prior art, the number of times the headset can be charged becomes a problem that the TWS headset is needed to solve under the limited battery capacity of the charging bin.
Disclosure of Invention
The invention provides a TWS earphone charging circuit and a TWS earphone, which are used for improving the charging efficiency of the TWS earphone so as to increase the charging times of the earphone.
In a first aspect, the present invention provides a TWS headset charging circuit for charging a left ear headset or a right ear headset independently, including: the charging module, the first transistor and the first control module;
the input end of the charging module is electrically connected with a power supply, the output end of the charging module outputs charging voltage to the first end of the first transistor, the second end of the first transistor is electrically connected with the earphone battery, and the charging module is used for switching a charging mode according to the voltage of the earphone battery;
the first end of the first control module is electrically connected with the second end of the first transistor, the second end of the first control module is electrically connected with the control end of the first transistor, and the first control module is used for controlling the first transistor to be switched on when the voltage of the earphone battery is smaller than the saturation voltage and controlling the first transistor to work in a saturation region when the charging current is smaller than a first preset current.
Optionally, the earphone further comprises a second transistor and a second control module, a first end of the second transistor is electrically connected to the output end of the charging module, a second end of the second transistor is electrically connected to a first end of the first transistor, a control end of the second transistor is electrically connected to the second control module, and the second control module is configured to control the second transistor to turn off when the earphone battery voltage is greater than the charging voltage.
Optionally, a feedback end of the charging module is electrically connected to an output end of the charging module, and the charging module is configured to control the charging voltage to increase to a first voltage when the charging current received by the feedback end is smaller than the first preset current.
Optionally, the first voltage satisfies: VCC1= Vcv +300mV, where VCC1 is the first voltage and Vcv is the saturation voltage.
Optionally, the earphone further comprises a charging detection module, a first end of the charging detection module is electrically connected with a first end of the first transistor, a second end of the charging detection module is electrically connected with a second end of the first transistor, and the charging detection module is configured to determine whether the earphone battery is fully charged according to a charging current flowing through the first transistor.
Optionally, the charging detection module is configured to determine that the earphone battery is fully charged when the charging current is less than a second preset current and the earphone battery voltage is greater than 0.95 times the charging voltage.
Optionally, the first control module includes a comparison unit and a signal output unit, a first input end of the comparison unit is connected to the earphone battery voltage, a second input end of the comparison unit is connected to the reference voltage, a first output end of the comparison unit is electrically connected to a first control end of the signal output unit, a second output end of the comparison unit is electrically connected to a second control end of the signal output unit, and an output end of the signal output unit is connected to a control end of the first transistor.
Optionally, the comparison unit includes a first resistor, a second resistor, a current source, a third transistor, a fourth transistor, a fifth transistor, and a sixth transistor;
a first end of the first resistor is connected to the battery voltage of the earphone, a second end of the first resistor is grounded through the second resistor, a control end of the third transistor is electrically connected with a second end of the first resistor, a first end of the third transistor is electrically connected with a second end of the fourth transistor, a second end of the fourth transistor is connected to a fixed voltage, a control end of the fourth transistor is electrically connected with a first end of the fourth transistor, and a second end of the third transistor is grounded through the current source;
a control end of the fifth transistor is connected to the reference voltage, a second end of the fifth transistor is grounded through the current source, a first end of the fifth transistor is electrically connected with a first end of the sixth transistor, a second end of the sixth transistor is connected to the fixed voltage, and a control end of the sixth transistor is electrically connected with a first end of the sixth transistor;
the signal output unit comprises a seventh transistor, an eighth transistor, a ninth transistor, a tenth transistor, a third resistor and a first capacitor;
a first terminal of the seventh transistor and a first terminal of the eighth transistor are both electrically connected to the fixed voltage, a second terminal of the seventh transistor is electrically connected to a first terminal of the ninth transistor, a control terminal of the seventh transistor is electrically connected to a first terminal of the sixth transistor, a second terminal of the ninth transistor is grounded, and a control terminal of the ninth transistor is electrically connected to a first terminal of the ninth transistor;
the control end of the eighth transistor is electrically connected with the first end of the fourth transistor, the second end of the eighth transistor is electrically connected with the first end of the tenth transistor, the second end of the tenth transistor is grounded, the control end of the tenth transistor is electrically connected with the control end of the ninth transistor, the first end of the tenth transistor is further electrically connected with the control end of the first transistor, the first end of the third resistor is electrically connected with the control end of the first transistor, and the second end of the third resistor is grounded through the first capacitor.
Optionally, the charging module includes a voltage conversion unit, an inductor, a second capacitor, and a fourth resistor;
the input end of the voltage conversion unit is electrically connected with the power supply, the output end of the voltage conversion unit is electrically connected with the first end of the fourth resistor, the second end of the fourth resistor outputs the charging voltage, the first end of the second capacitor is electrically connected with the second end of the fourth resistor, the second end of the second capacitor is grounded, the inductor is connected between the first end and the second end of the voltage conversion unit, and the feedback end of the voltage conversion unit is electrically connected with the second end of the fourth resistor.
In a second aspect, the invention also provides a TWS headset comprising a TWS headset charging circuit as provided in any embodiment of the invention; the TWS earphone further comprises a charging bin, a left ear earphone and a right ear earphone, the charging module is arranged in the charging bin, and the left ear earphone and the right ear earphone correspond to the TWS earphone charging circuit respectively.
The TWS earphone charging circuit provided by the invention adopts a mode of independently charging the left ear earphone or the right ear earphone, and the charging efficiency is improved through the mutual matching of the first control module and the charging module. When the voltage of the earphone battery is smaller than the full charging voltage, the first control module controls the first transistor to be in a conducting state, the charging current is determined by the charging module instead of depending on the voltage of the earphone battery, so that the charging efficiency of the voltage of the earphone battery when the voltage of the earphone battery does not reach the full charging voltage can be improved, the problem that the charging efficiency is low under the condition that the earphone battery is not fully charged is effectively solved, the whole charging efficiency of the earphone charging circuit is improved, and the charging times of the front-end power supply of the charging module for charging the earphone can be increased. When the charging current is smaller than the first preset current, the first control module controls the first transistor to work in a saturation region so as to further reduce the charging current, so that the voltage of the battery of the earphone is gradually increased, and the charging precision is ensured.
Drawings
FIG. 1 is a schematic diagram of a TWS headset according to the prior art;
FIG. 2 is a schematic diagram of a TWS headset charging circuit according to the present invention;
fig. 3 is a graph illustrating a charging mode of a charging module according to the present invention;
FIG. 4 is a schematic diagram of another TWS headset charging circuit according to the present invention;
FIG. 5 is a schematic diagram of another TWS headset charging circuit according to the present invention;
fig. 6 is a schematic structural diagram of a charging control chip according to the present invention;
FIG. 7 is a schematic structural diagram of a first control module according to the present invention;
FIG. 8 is a schematic diagram of another TWS headset charging circuit according to the present invention;
fig. 9 is a schematic structural diagram of a TWS headset according to the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.
As mentioned in the background, the charging times of the TWS headset of the prior art are low, and the inventors have found that the above problems occur because the maximum charging times of the TWS headset are limited by the low charging efficiency. Fig. 1 is a schematic structural diagram of a TWS headset in the prior art, which includes a charging circuit, and referring to fig. 1, in the technical scheme provided by the prior art, a charging bin battery 1 in a charging bin charges a left ear headset battery 4 and a right ear headset battery 6 at the same time, in a specific implementation, the charging bin battery 1 is boosted to 5V through a boost converter 2, when the headset is connected to the charging bin, the headset is charged through a self-integrated linear charger, wherein the left ear headset corresponds to a first linear charger 3, and the right ear headset corresponds to a second linear charger. The boost converter 2 is a switching power supply, the maximum efficiency of the boost converter can reach 95%, and the efficiency of the linear charger is equal to the ratio of the voltage of the earphone battery to the voltage input to the earphone end by the boost converter 2, so that the efficiency of the linear charger depends on the voltage of the earphone battery. When the voltage of the battery of the earphone is 3V, the charging efficiency is only 60%; when the battery voltage of the earphone is 4.2V, the charging efficiency is 84%, the charging efficiency is low, a large amount of electricity is wasted, the charging times of the battery 1 in the charging bin for charging the earphone is limited, and the experience effect of a user is seriously influenced.
In view of the above problems, the present invention provides a TWS headset charging circuit to improve charging efficiency and charging times. Fig. 2 is a schematic structural diagram of a TWS headset charging circuit provided in the present invention, and referring to fig. 2, the TWS headset charging circuit provided in the present invention includes a charging module 10, a first transistor Q1 and a first control module 20; an input end a1 of the charging module 10 is electrically connected to a power supply, an output end a2 of the charging module 10 outputs a charging voltage VIN to a first end of a first transistor Q1, a second end of the first transistor Q1 is electrically connected to the earphone battery, and the charging module 10 is configured to switch a charging mode according to an earphone battery voltage VBAT; the first terminal B1 of the first control module 20 is electrically connected to the second terminal of the first transistor Q1, the second terminal B2 of the first control module 20 is electrically connected to the control terminal of the first transistor Q1, and the first control module 20 is configured to control the first transistor Q1 to be turned on when the earphone battery voltage VBAT is less than the charging voltage Vcv, and control the first transistor Q1 to operate in a saturation region when the charging current is less than a first preset current.
Specifically, a charging circuit corresponds an earphone battery, that is, the left ear earphone is supplied with power by one charging circuit alone, the right ear earphone is supplied with power by the other charging circuit alone, and the two charging circuits do not influence each other, so that the phenomenon that one earphone is fully charged and the other earphone is continuously charged under the condition that the electric quantity of the left and right earphones is unequal is avoided, or the phenomenon that the earphone with low electric quantity cannot be fully charged is avoided. The service life of the earphone battery can be prolonged through two independent charging circuits.
In this embodiment, the power source may be a lithium battery, disposed in the charging chamber, for providing a power voltage for the earphone. The charging module 10 is configured to convert a power supply voltage into a charging voltage VIN for output, and the first transistor Q1 is a main power transistor for controlling a charging path of the earphone battery.
In the charging process, the charging module 10 may also directly acquire the earphone battery voltage VBAT (an acquisition path is not shown in the figure, for example, the charging module 10 may be connected to a corresponding earphone battery), and switch the charging mode according to the acquired earphone battery voltage VBAT. Fig. 3 is a graph of a charging mode of a charging module according to the present invention, in which a solid line represents a voltage curve and a dotted line represents a charging current curve. Referring to fig. 3, the charging mode includes a trickle mode, a constant current mode and a constant voltage mode, when the earphone battery voltage VBAT is lower than a preset voltage (e.g. 2.8V), the charging module 10 operates in the trickle region, and the charging current is I2; when the battery voltage VBAT of the earphone is higher than the preset voltage, the charging module 10 operates in a constant current region, and the charging current is I1; when the earphone battery voltage VBAT approaches the saturation voltage Vcv, the charging module 10 operates in a constant voltage region, and the charging current gradually decreases.
When the earphone battery voltage VBAT is lower than the saturation voltage Vcv, the earphone battery is charged, so the earphone battery voltage VBAT cannot reach the saturation voltage Vcv in a short time, and the first control module 20 detects that the earphone battery is chargedWhen the voltage VBAT is at a lower level, the first control module 20 pulls down the voltage at the control terminal of the first transistor Q1 to 0V, and controls the first transistor Q1 to be in a conducting state, and the first transistor Q1 acts as a switch to provide a charging path, so that the charging current provided by the charging module 10 increases the earphone battery voltage VBAT. Therefore, when the earphone battery voltage VBAT is lower than the charging voltage Vcv, the charging current of the earphone battery is determined by the charging module 10, and the charging current is determined according to the magnitude of the earphone battery voltage VBAT. Here, the impedance between the output terminal a2 of the charging module 10 and the earphone battery is the impedance of the first transistor Q1 (without considering the line resistance), and the charging efficiency is improved
Figure 209622DEST_PATH_IMAGE001
Can be represented by the following formula:
Figure 861183DEST_PATH_IMAGE002
where Icc is the present charging current, RQ1Is the on internal resistance of the first transistor Q1. In the constant current charging mode, the charging current Icc is usually 0.2A, the earphone battery voltage VBAT is usually 3.8V, and the on-resistance of the first transistor Q1 is 0.1 Ω, so the charging efficiency is high
Figure 109762DEST_PATH_IMAGE003
99.4%, and the charging efficiency of the charging module 10 is usually 95%, so that the charging efficiency of the technical scheme provided by the invention can reach about 96%, and the charging efficiency is greatly improved.
In the constant current charging mode, the charging module 10 charges at the first current I1, i.e. the charging current is equal to the first current I1. When the earphone battery voltage VBAT approaches the saturation voltage Vcv, the charging module 10 switches to the constant-voltage charging mode, at this time, the charging current decreases, and the charging module 10 continues to charge the earphone battery with the charging voltage Vcv. When the charging module 10 detects that the charging current is smaller than a first preset current, where the first preset current may be a first current I1, the first control module 20 may pull up the voltage of the control terminal of the first transistor Q1 to enable the first transistor Q1 to operate in a saturation region, and the charging current is controlled by the first transistor Q1 to further reduce the charging current, so as to improve the charging effect, and thus the charging voltage VIN may enable the earphone battery to continue to be charged to the saturation voltage under a small current, so as to improve the charging effect.
The TWS earphone charging circuit provided by the invention adopts a mode of independently charging the left ear earphone or the right ear earphone, and the charging efficiency is improved through the mutual matching of the first control module and the charging module. When the voltage of the earphone battery is lower than the charging voltage, the first control module controls the first transistor to be in a conducting state, the charging current is determined by the charging module instead of depending on the voltage of the earphone battery, so that the charging efficiency of the voltage of the earphone battery when the charging voltage is not reached to the charging voltage is improved, the problem of low charging efficiency under the condition that the earphone battery is not fully charged is effectively avoided, and the charging times of the earphone battery charged by a front-end power supply of the charging module can be increased. When the charging current is smaller than the first preset current, the first control module controls the first transistor to work in a saturation region so as to further reduce the charging current, so that the voltage of the battery of the earphone is gradually increased, and the charging precision is ensured.
Optionally, fig. 4 is a schematic structural diagram of another TWS headset charging circuit provided in the present invention, and in the following description, only one charging circuit is taken as an example for explanation. Referring to fig. 4, based on the above technical solution, the feedback terminal A3 of the charging module 10 is electrically connected to the output terminal a2 of the charging module 10, and the charging module 10 is configured to control the charging voltage VIN to increase to the third voltage VCC3 when the charging current received by the feedback terminal A3 is smaller than a first preset current.
Specifically, the first predetermined current may be the first current I1, that is, when the charging mode of the charging module 10 is switched from the constant-current charging mode to the constant-voltage switching mode, the charging voltage VIN output by the output terminal a2 of the charging module 10 is pulled up to the first voltage, so that the earphone battery is charged with the first voltage in the constant-voltage charging mode. In order to accurately charge the earphone battery voltage VBAT to the charging voltage Vcv due to the contact resistance and the line resistance between the earphone and the charging module 10, in the present embodiment, the first voltage VCC1 is set to Vcv +300 mV. In other words, in the constant voltage charging mode, due to the existence of the line impedance, the charging voltage Vcv is used as the charging voltage VIN, and the earphone battery cannot be charged to the charging voltage Vcv, so that when the charging module 10 detects that the fed-back charging current is smaller than the first preset current, the feedback current can quickly increase the charging voltage output by the charging module 10 to Vcv +300 mV. In the constant voltage charging mode, since the first transistor Q1 is already operating in the saturation region, when the charging voltage VIN rises, the charging current generated by the first transistor Q1 will decrease, so that the earphone battery voltage VBAT can be accurately charged to the saturation voltage Vcv with a small current drop, and the charging accuracy is improved.
Further, in the constant voltage charging mode, since the voltage is constant, the charging efficiency of the earphone battery is improved
Figure 973812DEST_PATH_IMAGE004
The charging voltage Vcv is usually set to 4.2V, and therefore, the charging efficiency at this time is 93.3%. In conclusion, the charging circuit provided by the invention can realize the charging efficiency of more than 93% no matter in the constant-current charging mode, the trickle charging mode or the constant-voltage charging mode, and can effectively increase the charging times of the earphone battery.
Optionally, with continued reference to fig. 4, the TWS headset charging circuit provided by the present invention further includes a second transistor Q2 and a second control module 30, wherein a first terminal of the second transistor Q2 is electrically connected to the output terminal a2 of the charging module 10, a second terminal of the second transistor Q2 is electrically connected to a first terminal of the first transistor Q1, a control terminal of the second transistor Q2 is electrically connected to the second control module 30, and the second control module 30 is configured to control the second transistor Q2 to turn off when the headset battery voltage VBAT is greater than the charging voltage VIN.
Specifically, the second transistor Q2 is connected between the first transistor Q1 and the charging module 10, and when the voltage at the earphone end is higher than the charging voltage VRAT output by the charging module 10, for example, when the earphone end is not connected to the charging circuit, the earphone end is in a high impedance state, and the second control module 30 controls the second transistor Q2 to be disconnected, so as to cut off the current path from the earphone end to the charging module 10 and prevent the current from flowing backwards.
Further, in the presence of the second transistor Q2, when the earphone battery voltage VBAT is lower than the saturation voltage Vcv, the impedance between the output terminal a2 of the charging module 10 and the earphone battery is the sum of the impedance of the first transistor Q1 and the impedance of the second transistor Q2 (without taking the line resistance into consideration), and the charging efficiency is then
Figure 257026DEST_PATH_IMAGE003
Can be represented by the following formula:
Figure 797598DEST_PATH_IMAGE005
where Icc is the present charging current, RQ1Is the on-resistance, R, of the first transistor Q1Q2Is the on internal resistance of the first transistor Q2. In the constant current charging mode, the charging current Icc is typically 0.2A, and the earphone battery voltage VBAT is typically 3.8V, RQ1+RQ2And 0.2 omega, the charging efficiency is high
Figure 799052DEST_PATH_IMAGE006
The charging efficiency of the charging module 10 is usually 95%, and 98.9%, therefore, the charging efficiency of the technical scheme provided by the invention can reach about 94%, and compared with the prior art, the charging efficiency is greatly improved.
In the constant voltage charging mode, since the voltage is constant, the charging efficiency of the earphone battery is improved
Figure 466794DEST_PATH_IMAGE007
The addition of the second transistor Q2 has no effect on the charging efficiency in this mode.
Optionally, fig. 5 is a schematic structural diagram of another TWS headset charging circuit provided by the present invention, referring to fig. 5, the TWS headset charging circuit provided by the present invention further includes a charging detection module 40, a first end D1 of the charging detection module 40 is electrically connected to a first end of the first transistor Q1, a second end D2 of the charging detection module 40 is electrically connected to a second end of the first transistor Q1, and the charging detection module 40 is configured to determine whether the headset battery is fully charged according to a charging current flowing through the first transistor Q1.
Specifically, after the charging module 10 switches from the constant current mode to the constant voltage charging mode, the charging detection module 40 detects the charging current flowing through the first transistor Q1 to determine whether the earphone battery is fully charged. In this embodiment, the condition for the charging detection module 40 to determine whether the earphone battery is fully charged may be: the charging current is less than a second predetermined current, and the earphone battery voltage VBAT is greater than 0.95 times the charging voltage Vcv, where the second predetermined current may be a current value less than the second current I2. The purpose of setting the charging saturation voltage Vcv of the earphone battery voltage VBAT which is more than 0.95 times is to prevent the earphone battery from being overcharged, and the service life of the earphone battery is prolonged. When the charging detection module 40 detects that the earphone battery is fully charged, a fully charging signal CHRG is sent to the charging circuit, for example, the fully charging signal CHRG is sent to the first control module 20, and the first control module 20 controls the first transistor Q1 to turn off after receiving the fully charging signal CHRG, so as to complete the entire charging process.
Alternatively, fig. 6 is a schematic structural diagram of a charging control chip provided by the present invention, and referring to fig. 6, in this implementation, the first transistor Q1, the second transistor Q2, the first control module 20, the second control module 30 and the charging detection module 40 together form a charging control unit, which can be integrated in the same charging control chip CV to reduce the occupied volume of the charging circuit, so as to facilitate the miniaturization of the whole TWS headset. The charging control chip CV at least comprises a charging voltage VIN input terminal, an earphone battery voltage VBAT output terminal, a full charging signal CHRG output terminal, a charging current collection terminal TERM, and a ground terminal GND.
Optionally, fig. 7 is a schematic structural diagram of a first control module provided by the present invention, and referring to fig. 7, based on the above technical solutions, the first control module 20 includes a comparing unit 210 and a signal output unit 220, a first input terminal of the comparing unit 210 is connected to an earphone battery voltage VBAT, a second input terminal of the comparing unit 210 is connected to a reference voltage VREF, a first output terminal of the comparing unit 210 is electrically connected to a first control terminal of the signal output unit 220, a second output terminal of the comparing unit 210 is electrically connected to a second control terminal of the signal output unit 220, and an output terminal of the signal output unit 220 is connected to a control terminal of a first transistor Q1.
Specifically, the comparing unit 210 includes a first resistor R1, a second resistor R2, a current source I1, a third transistor Q3, a fourth transistor Q4, a fifth transistor Q5, and a sixth transistor Q6. The first end of the first resistor R1 is connected to the earphone battery voltage VBAT, the second end of the first resistor R1 is connected to the ground through the second resistor R2, the control end of the third transistor Q3 is electrically connected to the second end of the first resistor R1, the first end of the third transistor Q3 is electrically connected to the second end of the fourth transistor Q4, the second end of the fourth transistor Q4 is connected to the fixed voltage VDD, the control end of the fourth transistor Q4 is electrically connected to the first end of the fourth transistor Q4, and the second end of the third transistor Q3 is connected to the ground through the current source I1.
A control terminal of the fifth transistor Q5 is connected to the reference voltage VREF, a second terminal of the fifth transistor Q5 is connected to the ground through the current source I1, a first terminal of the fifth transistor Q5 is electrically connected to a first terminal of the sixth transistor Q6, a second terminal of the sixth transistor Q6 is connected to the fixed voltage VDD, and a control terminal of the sixth transistor Q6 is electrically connected to a first terminal of the sixth transistor Q6.
The signal output unit 220 includes a seventh transistor Q7, an eighth transistor Q8, a ninth transistor Q9, a tenth transistor Q10, a third resistor R3, and a first capacitor C1. A first terminal of the seventh transistor Q7 and a first terminal of the eighth transistor Q8 are both electrically connected to the fixed voltage VDD, a second terminal of the seventh transistor Q7 is electrically connected to a first terminal of the ninth transistor Q9, a control terminal of the seventh transistor Q7 is electrically connected to a first terminal of the sixth transistor Q6, a second terminal of the ninth transistor Q9 is grounded, and a control terminal of the ninth transistor Q9 is electrically connected to a first terminal of the ninth transistor Q9.
A control terminal of the eighth transistor Q8 is electrically connected to the first terminal of the fourth transistor Q4, a second terminal of the eighth transistor Q8 is electrically connected to the first terminal of the tenth transistor Q10, a second terminal of the tenth transistor Q10 is grounded, a control terminal of the tenth transistor Q10 is electrically connected to the control terminal of the ninth transistor Q9, the first terminal of the tenth transistor Q10 is further electrically connected to the control terminal of the first transistor Q1, a first terminal of the third resistor R3 is electrically connected to the control terminal of the first transistor Q1, and a second terminal of the third resistor R3 is grounded via the first capacitor C1.
In this embodiment, the fixed voltage VDD may be inputted from an external power source, and the third transistor Q3, the fifth transistor Q5, the ninth transistor Q9 and the tenth transistor Q10 are NMOS transistors, and the other transistors are PMOS transistors, for example. The first resistor R1 and the second resistor R2 are voltage dividing resistors, and the resistance values of the first resistor R1 and the second resistor R2 are configured, so that when the earphone battery voltage VBAT is equal to the charging voltage Vcv, the voltage of the earphone battery voltage VBAT after voltage division by the first resistor R1 and the second resistor R2 is equal to the value of the reference voltage VREF. The current source I1 is a tail current source for providing a bias current. When the earphone battery voltage VBAT is lower than the saturation voltage Vcv, the voltage of the earphone battery voltage VBAT after voltage division by the first resistor R1 and the second resistor R2 is smaller than the reference voltage VREF, the pull-down capability of the fifth transistor Q5 is stronger than the pull-down capability of the third transistor Q3, the fifth transistor Q5 is turned on, the first end of the fifth transistor Q5 is at a low level, so the sixth transistor Q6 and the seventh transistor Q7 are turned on, under the pull-up action of the seventh transistor Q7, the second end of the seventh transistor Q7 outputs a high level, so that the tenth transistor Q10 is turned on, and the Q1_ GATE end outputs a low level (0V), thereby controlling the first transistor Q1 to be completely turned on, and the charging module 10 charges the earphone battery.
When the earphone battery voltage VBAT is higher than the saturation voltage Vcv, the voltage of the earphone battery voltage VBAT after voltage division by the first resistor R1 and the second resistor R2 is greater than the reference voltage VREF, the pull-down capability of the third transistor Q3 is stronger than the pull-down capability of the fifth transistor Q5, the third transistor Q3 is turned on, the first end of the third transistor Q3 is at a low level, so that the eighth transistor Q8 is turned on, under the pull-up action of the eighth transistor Q8, the Q1_ GATE end outputs a high level, so that the first transistor Q1 is turned off, the path between the charging module 10 and the earphone battery is disconnected, and the charging module 10 cannot charge the earphone battery.
When the earphone battery voltage VBAT approaches the charging voltage Vcv, a feedback loop of the first control module 20 acts, the earphone battery voltage VBAT forms feedback after being divided by the first resistor R1 and the second resistor R2, and a level signal output by the Q1_ GATE terminal makes the first transistor Q1 in a saturated state, so that the charging current is gradually reduced. The third resistor R3 and the first capacitor C1 are mainly used for loop compensation, and the stable operation of the whole circuit is ensured.
Optionally, fig. 8 is a schematic structural diagram of another TWS headset charging circuit provided in the present invention, and based on the above technical solutions, the charging module 10 includes a voltage converting unit 101, an inductor L, a second capacitor C2, and a fourth resistor R4; an input end a1 of the voltage conversion unit 101 is electrically connected to a power supply, an output end a2 of the voltage conversion unit 101 is electrically connected to a first end of a fourth resistor R4, a second end of the fourth resistor R4 outputs a charging voltage VIN, a first end of a second capacitor C2 is electrically connected to a second end of the fourth resistor R4, a second end of a second capacitor C2 is grounded, an inductor L is connected between the first end and the second end of the voltage conversion unit 101, and a feedback end a3 of the voltage conversion unit 101 is electrically connected to a second end of the fourth resistor R4.
The voltage conversion unit 101 is a BUCK-BOOST converter, which can BOOST and BUCK to meet multiple voltage requirements, and reference may be made to the related description of the above embodiment for a detailed description of the charging module 10.
Optionally, the invention further provides a TWS headset comprising the TWS headset charging circuit provided by any embodiment of the invention. Fig. 9 is a schematic structural diagram of a TWS headset according to the present invention, and referring to fig. 2 to 9, the TWS headset includes a charging chamber, a left ear headset and a right ear headset, the charging module 10 is disposed in the charging chamber, and the left ear headset and the right ear headset respectively correspond to a TWS headset charging circuit. The first transistor Q1, the second transistor Q2, the first control module 20, the second control module 30 and the charging detection module 40 together form a charging control unit, which can be integrated in the same charging control chip CV, which is disposed in the earphone and connected to the earphone battery to control the charging of the earphone battery.
In this embodiment, the inductor L1, the BUCK-BOOST1, the fourth resistor R4, the capacitor C21 and the charging control chip CV disposed in the left ear earphone together form a charging circuit for the left ear earphone, the inductor L2, the BUCK-BOOST2, the resistor R4', the capacitor C22 and the charging control chip CV disposed in the right ear earphone together form a charging circuit for the right ear earphone, and the two charging circuits operate independently without affecting each other.
Since the TWS headset comprises the TWS headset charging circuit provided by any embodiment of the invention, the TWS headset provided by the invention also has the advantages described in any embodiment.
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims (9)

1. A TWS headset charging circuit for charging a left ear headset or a right ear headset alone, comprising: the charging module, the first transistor and the first control module;
the input end of the charging module is electrically connected with a power supply, the output end of the charging module outputs charging voltage to the first end of the first transistor, the second end of the first transistor is electrically connected with the earphone battery, and the charging module is used for switching a charging mode according to the voltage of the earphone battery;
the first control module is used for controlling the first transistor to be conducted when the voltage of the earphone battery is smaller than a charging voltage, and controlling the first transistor to work in a saturation region when the charging current is smaller than a first preset current so as to reduce the charging current; wherein the first transistor is a PMOS transistor;
the feedback end of the charging module is electrically connected with the output end of the charging module, and the charging module is used for controlling the charging voltage to rise to a first voltage when the charging current received by the feedback end is smaller than the first preset current, so that the earphone battery is charged to the saturated voltage.
2. The TWS headset charging circuit of claim 1, further comprising a second transistor and a second control module, a first terminal of the second transistor being electrically connected to the output of the charging module, a second terminal of the second transistor being electrically connected to the first terminal of the first transistor, a control terminal of the second transistor being electrically connected to the second control module, the second control module being configured to control the second transistor to turn off when the headset battery voltage is greater than the charging voltage.
3. The TWS headset charging circuit of claim 1, wherein the first voltage satisfies: VCC1= Vcv +300mV, where VCC1 is the first voltage and Vcv is the saturation voltage.
4. The TWS earphone charging circuit of claim 1, further comprising a charge detection module, a first terminal of the charge detection module being electrically connected to a first terminal of the first transistor, a second terminal of the charge detection module being electrically connected to a second terminal of the first transistor, the charge detection module being configured to determine whether the earphone battery is fully charged based on a charge current flowing through the first transistor.
5. The TWS headset charging circuit of claim 4, wherein the charge detection module is configured to determine that the headset battery is fully charged when the charging current is less than a second predetermined current and the headset battery voltage is greater than 0.95 times the saturation voltage.
6. The TWS headset charging circuit of claim 1, wherein the first control module comprises a comparison unit and a signal output unit, a first input terminal of the comparison unit is connected to the headset battery voltage, a second input terminal of the comparison unit is connected to a reference voltage, a first output terminal of the comparison unit is electrically connected to a first control terminal of the signal output unit, a second output terminal of the comparison unit is electrically connected to a second control terminal of the signal output unit, and an output terminal of the signal output unit is connected to a control terminal of the first transistor.
7. The TWS headset charging circuit of claim 6, wherein the comparison unit comprises a first resistor, a second resistor, a current source, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor;
a first end of the first resistor is connected to the earphone battery voltage, a second end of the first resistor is grounded through the second resistor, a control end of the third transistor is electrically connected with a second end of the first resistor, a first end of the third transistor is electrically connected with a first end of the fourth transistor, a second end of the fourth transistor is connected to a fixed voltage, a control end of the fourth transistor is electrically connected with a first end of the fourth transistor, and a second end of the third transistor is grounded through the current source;
a control end of the fifth transistor is connected to the reference voltage, a second end of the fifth transistor is grounded through the current source, a first end of the fifth transistor is electrically connected with a first end of the sixth transistor, a second end of the sixth transistor is connected to the fixed voltage, and a control end of the sixth transistor is electrically connected with a first end of the sixth transistor;
the signal output unit comprises a seventh transistor, an eighth transistor, a ninth transistor, a tenth transistor, a third resistor and a first capacitor;
a first terminal of the seventh transistor and a first terminal of the eighth transistor are both electrically connected to the fixed voltage, a second terminal of the seventh transistor is electrically connected to a first terminal of the ninth transistor, a control terminal of the seventh transistor is electrically connected to a first terminal of the sixth transistor, a second terminal of the ninth transistor is grounded, and a control terminal of the ninth transistor is electrically connected to a first terminal of the ninth transistor;
the control end of the eighth transistor is electrically connected with the first end of the fourth transistor, the second end of the eighth transistor is electrically connected with the first end of the tenth transistor, the second end of the tenth transistor is grounded, the control end of the tenth transistor is electrically connected with the control end of the ninth transistor, the first end of the tenth transistor is further electrically connected with the control end of the first transistor, the first end of the third resistor is electrically connected with the control end of the first transistor, and the second end of the third resistor is grounded through the first capacitor.
8. The TWS headset charging circuit of claim 1, wherein the charging module comprises a voltage conversion unit, an inductor, a second capacitor, and a fourth resistor;
the input end of the voltage conversion unit is electrically connected with the power supply, the output end of the voltage conversion unit is electrically connected with the first end of the fourth resistor, the second end of the fourth resistor outputs the charging voltage, the first end of the second capacitor is electrically connected with the second end of the fourth resistor, the second end of the second capacitor is grounded, the inductor is connected between the first end and the second end of the voltage conversion unit, and the feedback end of the voltage conversion unit is electrically connected with the second end of the fourth resistor.
9. A TWS headset comprising the TWS headset charging circuit of any of claims 1-8;
the TWS earphone further comprises a charging bin, a left ear earphone and a right ear earphone, the charging module is arranged in the charging bin, and the left ear earphone and the right ear earphone correspond to the TWS earphone charging circuit respectively.
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