CN113472229B - Hybrid bridge arm topological structure with direct current fault clearing and voltage equalizing capabilities - Google Patents
Hybrid bridge arm topological structure with direct current fault clearing and voltage equalizing capabilities Download PDFInfo
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/483—Converters with outputs that each can have more than two voltages levels
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J3/00—Circuit arrangements for ac mains or ac distribution networks
- H02J3/36—Arrangements for transfer of electric power between ac networks via a high-tension dc link
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/32—Means for protecting converters other than automatic disconnection
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
- H02M7/5387—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
- H02M7/53871—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
- Y02E60/60—Arrangements for transfer of electric power between AC networks or generators via a high voltage DC link [HVCD]
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Abstract
The invention relates to a hybrid bridge arm topological structure with direct current fault clearing and voltage equalizing capabilities, and belongs to the technical field of high-voltage direct current transmission. The novel half-bridge hybrid submodule comprises a novel half-bridge hybrid submodule body and Quan Qiaozi submodules, wherein N submodules are mutually connected, the 1 st to K submodules are novel half-bridge hybrid submodules, the K+1 to N submodules are Quan Qiaozi modules, the K novel half-bridge hybrid submodule body is connected with the K+1 full-bridge submodule, the voltage positive input port of the K+1 full-bridge submodule body is connected with the voltage negative output port of the K novel half-bridge hybrid submodule body, and the voltage negative output port of the K+1 full-bridge submodule body is connected with the voltage positive input port of the K+2 full-bridge submodule body. Compared with a bridge arm formed by a traditional half-bridge submodule, the self-clearing device has the self-clearing capability of faults at the direct current side; under the condition that the self-clearing of fault current is met, compared with bridge arms formed by the full-bridge submodules and the half-bridge submodules, the number of the full-bridge submodules can be reduced.
Description
Technical Field
The invention relates to a hybrid bridge arm topological structure with direct current fault clearing and voltage equalizing capabilities, and belongs to the technical field of high-voltage direct current transmission.
Background
With the rapid development of renewable clean energy sources such as power electronics technology, wind energy and solar energy, insulated Gate Bipolar Transistors (IGBT) with self-turn-off capability are widely applied to the field of flexible direct current transmission. The adoption of a power transmission technology based on a modularized multi-level converter (MMC) has become an effective scheme for accessing large-scale clean energy into a power grid. The bridge arm structure of the MMC is formed by cascading a plurality of sub-modules with the same structure according to a certain arrangement and combination sequence, and at present, more common sub-modules comprise a half-bridge sub-module, a full-bridge sub-module, a clamping double sub-module and the like. The MMC has the advantages of flexible control of active power and reactive power, no commutation failure, small alternating current output voltage and current harmonic, high waveform quality and the like, and the modular structure is easy to package and expand, so that the MMC has the wide attention of various scientific research institutions and engineering technical fields.
Because the flexible direct current transmission system has lower damping characteristic than the alternating current system, under the condition of direct current fault, the short circuit current is larger, and the safe operation of the sub-module is seriously threatened, the direct current short circuit fault is a technical problem to be solved at present. In practical engineering, considering economic characteristics, some direct current transmission engineering adopts a half-bridge submodule, and when a short circuit fault occurs on a direct current side, fault current mainly comprises two parts: the fault current can be quickly cleared through the locking IGBT, and the other part of the fault current forms a short circuit loop through the anti-parallel diodes of the half-bridge sub-module in the longer time of the fault, and the fault current is uncontrolled rectification and can not be cleared through the locking transistor, so that the safety and stability of the system are seriously threatened. Meanwhile, the direct current does not have the characteristic of natural zero crossing point like an alternating current system, huge energy is stored in the direct current side reactor, the breaking difficulty of direct current fault current is increased, and the working condition of the breaking short-circuit device is bad. In order to solve the problem, related scholars propose a full-bridge submodule with direct-current fault current self-clearing capacity, and compared with a half-bridge submodule, half of switching devices are added, so that the switching loss is doubled, and the economic performance is poor. In the hybrid multi-terminal direct current transmission project of +/-800 kV Kun Liu Long, a bridge arm topology formed by cascading full-bridge and half-bridge submodules is firstly used, and the self-cleaning capability of fault current is better.
Disclosure of Invention
The invention aims to solve the technical problems that under a bridge arm topological structure formed by a full-bridge and a novel half-bridge hybrid submodule, an alternating current side discharges through a free-wheeling diode which is antiparallel to the half-bridge submodule to generate larger fault current, and the fault current cannot be cleared through a locked converter.
The invention provides a hybrid bridge arm topological structure with direct current fault clearing and voltage equalizing capabilities, which improves the original connection mode between half-bridge sub-modules and enables the hybrid bridge arm topological structure to self clear fault current like a full-bridge sub-module. Thus, the number of the full-bridge sub-modules in the original bridge arm topology can be reduced.
The technical scheme of the invention is as follows: a hybrid bridge arm topological structure with direct current fault clearing and voltage equalizing capabilities comprises a novel half-bridge hybrid sub-module and Quan Qiaozi modules which are connected in sequence, wherein the total number of the sub-modules is N. The novel half-bridge hybrid submodule and the full-bridge submodule both comprise ports, and the ports are divided into a voltage anode input port and a voltage cathode output port, so that the novel half-bridge submodule or the full-bridge submodule can be connected.
The voltage anode input end of the novel half-bridge hybrid sub-module is connected with the output end of the novel half-bridge hybrid sub-module or the full-bridge sub-module, and the voltage cathode output end is connected with the input end of the next novel half-bridge hybrid sub-module or the full-bridge sub-module; the voltage anode input end of Quan Qiaozi modules is connected with the output end of a novel half-bridge hybrid sub-module or a full-bridge sub-module, and the voltage cathode output end is connected with the input end of a next novel half-bridge hybrid sub-module or a full-bridge sub-module.
The 1 st to K sub-modules are novel half-bridge mixed sub-module cascade, the K+1 th to N sub-modules are full-bridge sub-module cascade, and the voltage negative electrode output end of the K novel half-bridge mixed sub-module is connected with the voltage positive electrode input end of the K+1 th full-bridge sub-module. The voltage positive electrode input end of the 1 st novel half-bridge hybrid sub-module is connected with the positive electrode of the direct current bus, and the output end of the N th full-bridge sub-module is connected with an alternating current system through a bridge arm inductance L 0.
The mixed bridge arm topological structure formed by the novel half-bridge mixed sub-module and the full-bridge sub-module can realize the cutting-off and clearing of direct current fault current and the voltage balance between the capacitors C 1 and C 2 in the novel half-bridge mixed sub-module.
In normal operation, the hybrid bridge arm topology structure can realize different level (0,U c,2Uc,……,N*Uc) output by controlling the on-off of the switching tube.
When a short circuit fault occurs, the novel half-bridge hybrid submodule fault loop switch S 3 and the voltage-equalizing switch S 4 in the control bridge arm are conducted, the capacitors C 1 and C 2 in the novel half-bridge hybrid submodule are connected in parallel, negative electromotive force-U c1∥Uc2 is formed at the positive voltage input port, fault current is removed, and meanwhile balance between capacitor voltages during the fault period is guaranteed. Therefore, the bridge arm topological structure provided by the invention can redistribute the loop to the fault current, realize the rapid self-cleaning of the fault current and ensure the balance of the capacitor voltage in the sub-module, and improve the problem of poor balance of the capacitor voltage in the traditional half-bridge sub-module.
When a short circuit fault occurs, the IGBT transistor of the full-bridge submodule is controlled to be turned off, fault current can form a loop through an anti-parallel diode of the IGBT, and negative electromotive force-U c0 is formed at an input/output port, so that the fault current can be cleared.
The invention changes the connection mode of the half-bridge submodules on the basis of bridge arm topology formed by the full-bridge submodules and the half-bridge submodules, so that the novel hybrid submodules formed by the half-bridge submodules can also play a role in clearing fault current under the condition that direct current fails, and can reduce the use quantity of the full-bridge submodules under the condition that the fault current is completely cleared, and the invention has good economic performance.
The novel half-bridge hybrid submodule comprises half-bridge submodules HBSM 1 and HBSM 2, a two-way switch, a fault loop switch S 3 and a voltage equalizing switch S 4; the positive electrode of a capacitor C 1 in the half-bridge submodule HBSM 1 is connected with the cathode of the voltage-sharing switch S 4, and the positive electrode of a capacitor C 2 in the half-bridge submodule HBSM 2 is connected with the anode of the voltage-sharing switch S 4; the output end of the half-bridge submodule HBSM 2 is connected with a two-way switch, the anode of the fault loop switch S 3 is connected with the voltage negative electrode output port of the novel half-bridge submodule, and the cathode is connected with the anode of the voltage equalizing switch S 4 and the anode of the capacitor C 2 in the half-bridge submodule HBSM 2;
The half-bridge submodule HBSM 1 includes insulated gate bipolar transistors T 1 and T 2, diodes D 1 and D 2, and a capacitor C 1; insulated gate bipolar transistor T 1 is antiparallel with diode D 1, T 1 emitter is connected with D 1 anode, T 1 collector is connected with D 1 cathode, insulated gate bipolar transistor T 2 is antiparallel with diode D 2, T 2 emitter is connected with D 2 anode, T 2 collector is connected with D 2 cathode; the anode and the cathode of the capacitor C 1 are respectively connected with the collector of the T 1 and the anode of the D 2.
The voltage anode input port of the novel half-bridge hybrid submodule is connected with the emitter and the collector of an insulated gate bipolar transistor T1, the anode and the cathode of a diode D1 are connected with each other, and the voltage cathode output port is connected with a bidirectional switch and a fault loop switch S3.
The half-bridge submodule HBSM 2 includes insulated gate bipolar transistors T 3 and T 4, diodes D 3 and D 4, and a capacitor C 2; insulated gate bipolar transistor T 3 is antiparallel with diode D 3, T 3 emitter is connected with D 3 anode, T 3 collector is connected with D 3 cathode, insulated gate bipolar transistor T 4 is antiparallel with diode D 4, T 4 emitter is connected with D 4 anode, T 4 collector is connected with D 4 cathode; the anode and the cathode of the capacitor C 2 are respectively connected with the collector of the T 3 and the anode of the D 4.
The bidirectional switch is formed by antiparallel thyristors S 1 and S 2, the anode of S 1 and the cathode of S 2 are commonly connected to the output port of the half-bridge submodule HBSM 2, and the cathode of S 1 and the anode of S 2 are commonly connected to the input port of the next submodule.
The anode of the fault loop switch S 3 is connected to the voltage negative output port of the novel half-bridge hybrid submodule, and the cathode of the fault loop switch S3 is connected to the anode of the capacitor C 2 and the anode of the voltage equalizing switch S 4 in the half-bridge submodule HBSM 2.
The anode of the equalizing switch S 4 is connected with the collector of T 3 in the half-bridge submodule HBSM 2, the cathode of the fault loop switch S 3 and the anode of the capacitor C 2 in the half-bridge submodule, and the cathode is connected with the cathode of D 1 in the half-bridge submodule HBSM 1 and the anode of the capacitor C 1.
The full-bridge submodule comprises insulated gate bipolar transistors T 5、T6、T7 and T 8, diodes D 5、D6、D7 and D 8 and a capacitor C 0; insulated gate bipolar transistor T 5 is antiparallel with diode D 5, T 5 emitter is connected with D 5 anode, T 5 collector is connected with D 5 cathode, insulated gate bipolar transistor T 6 is antiparallel with diode D 6, T 6 emitter is connected with D 6 anode, T 6 collector is connected with D 6 cathode, insulated gate bipolar transistor T 7 is antiparallel with diode D 7, T 7 emitter is connected with D 7 anode, T 7 collector is connected with D 7 cathode, insulated gate bipolar transistor T 8 is antiparallel with diode D 8, T 8 emitter is connected with D 8 anode, T 8 collector is connected with D 8 cathode, T 5 collector is connected with T 7 collector, T 6 emitter is connected with T 8 emitter, capacitor C 0 anode is connected with T 5 and T 7, capacitor C 0 cathode is connected with D 6 anode and D 8 anode.
The beneficial effects of the invention are as follows:
1. Compared with bridge arm topology formed by half-bridge submodules, the direct-current side fault clearing capacity is achieved;
2. Compared with a bridge arm topology formed by full-bridge submodules, the number of insulated gate bipolar transistors is reduced under the condition that fault clearing capacity is met, and cost is reduced.
Drawings
Fig. 1 is a schematic circuit diagram of a submodule constituting a hybrid bridge arm topology of the present invention.
FIG. 2 is a schematic diagram of an MMC topology constructed by a hybrid bridge arm topology of the present invention
Fig. 3 is a simulation block diagram of a double-ended hybrid dc system to which the present invention is applicable.
Fig. 4 is a schematic diagram of a single-phase current path under normal operation of a novel half-bridge hybrid submodule in a hybrid bridge arm topology of the present invention.
Fig. 5 is a schematic diagram of a single-phase current path under fault lockout of a novel half-bridge hybrid submodule in a hybrid bridge arm topology of the present invention.
Fig. 6 is a schematic diagram of a single-phase current path under normal operation of a full submodule in a hybrid bridge arm topology of the present invention.
Fig. 7 is a schematic diagram of a single-phase current path under fault lockout of all sub-modules within a hybrid bridge arm topology of the present invention.
Fig. 8 is a schematic diagram of a waveform of a valve side current clearing simulation under a short-circuit fault of a straight outflow port.
Fig. 9 is a schematic diagram of a simulation of the effect of balancing capacitor voltage in a submodule under the condition that a short circuit fault occurs at a direct-current outlet.
Detailed Description
The invention will be further described with reference to the drawings and detailed description.
Example 1: as shown in FIG. 1, the hybrid bridge arm topological structure with direct current fault clearing and voltage equalizing capabilities comprises a novel half-bridge hybrid submodule and Quan Qiaozi submodules, wherein the N submodules are mutually connected, the 1 st to K submodules are novel half-bridge hybrid submodules, the K+1 to N submodules are Quan Qiaozi modules, the K novel half-bridge hybrid submodule is connected with the K+1 full-bridge submodule, the voltage positive input port of the K+1 full-bridge submodule is connected with the voltage negative output port of the K novel half-bridge hybrid submodule, and the voltage negative output port of the K+1 full-bridge submodule is connected with the voltage positive input port of the K+2 full-bridge submodule.
The novel half-bridge hybrid submodule comprises half-bridge submodules HBSM 1 and HBSM 2, a two-way switch, a fault loop switch S 3 and a voltage equalizing switch S 4; the positive electrode of a capacitor C 1 in the half-bridge submodule HBSM 1 is connected with the cathode of the voltage-sharing switch S 4, and the positive electrode of a capacitor C 2 in the half-bridge submodule HBSM 2 is connected with the anode of the voltage-sharing switch S 4; the output end of the half-bridge submodule HBSM 2 is connected with a two-way switch, the anode of the fault loop switch S 3 is connected with the voltage negative electrode output port of the novel half-bridge submodule, and the cathode is connected with the anode of the voltage equalizing switch S 4 and the anode of the capacitor C 2 in the half-bridge submodule HBSM 2.
The full-bridge submodule comprises insulated gate bipolar transistors T 5、T6、T7 and T 8, diodes D 5、D6、D7 and D 8 and a capacitor C 0;
Insulated gate bipolar transistor T 5 is antiparallel with diode D 5, T 5 emitter is connected with D 5 anode, T 5 collector is connected with D 5 cathode, insulated gate bipolar transistor T 6 is antiparallel with diode D 6, T 6 emitter is connected with D 6 anode, T 6 collector is connected with D 6 cathode, insulated gate bipolar transistor T 7 is antiparallel with diode D 7, T 7 emitter is connected with D 7 anode, T 7 collector is connected with D 7 cathode, insulated gate bipolar transistor T 8 is antiparallel with diode D 8, T 8 emitter is connected with D 8 anode, T 8 collector is connected with D 8 cathode, T 5 collector is connected with T 7 collector, T 6 emitter is connected with T 8 emitter, capacitor C 0 anode is connected with T 5 and T 7, capacitor C 0 cathode is connected with D 6 anode and D 8 anode.
The half-bridge submodule HBSM 1 includes insulated gate bipolar transistors T 1 and T 2, diodes D 1 and D 2, and a capacitor C 1; insulated gate bipolar transistor T 1 is antiparallel with diode D 1, T 1 emitter is connected with D 1 anode, T 1 collector is connected with D 1 cathode, insulated gate bipolar transistor T 2 is antiparallel with diode D 2, T 2 emitter is connected with D 2 anode, T 2 collector is connected with D 2 cathode; the anode and the cathode of the capacitor C 1 are respectively connected with the collector of the T 1 and the anode of the D 2;
The voltage anode input port of the novel half-bridge hybrid submodule is connected with the emitter and the collector of an insulated gate bipolar transistor T1, the anode and the cathode of a diode D1 are connected with each other, and the voltage cathode output port is connected with a bidirectional switch and a fault loop switch S3.
The half-bridge submodule HBSM 2 includes insulated gate bipolar transistors T 3 and T 4, diodes D 3 and D 4, and a capacitor C 2; insulated gate bipolar transistor T 3 is antiparallel with diode D 3, T 3 emitter is connected with D 3 anode, T 3 collector is connected with D 3 cathode, insulated gate bipolar transistor T 4 is antiparallel with diode D 4, T 4 emitter is connected with D 4 anode, T 4 collector is connected with D 4 cathode; the anode and the cathode of the capacitor C 2 are respectively connected with the collector of the T 3 and the anode of the D 4.
The bidirectional switch is formed by antiparallel thyristors S 1 and S 2, the anode of S 1 and the cathode of S 2 are commonly connected to the output port of the half-bridge submodule HBSM 2, and the cathode of S 1 and the anode of S 2 are commonly connected to the input port of the next submodule.
The anode of the fault loop switch S 3 is connected to the voltage negative output port of the novel half-bridge hybrid submodule, and the cathode of the fault loop switch S3 is connected to the anode of the capacitor C 2 and the anode of the voltage equalizing switch S 4 in the half-bridge submodule HBSM 2.
The anode of the equalizing switch S 4 is connected with the collector of T 3 in the half-bridge submodule HBSM 2, the cathode of the fault loop switch S 3 and the anode of the capacitor C 2 in the half-bridge submodule, and the cathode is connected with the cathode of D 1 in the half-bridge submodule HBSM 1 and the anode of the capacitor C 1.
As shown in fig. 4, during normal operation, the thyristor S 1、S2 in the bidirectional switch of the novel half-bridge hybrid sub-module remains on, and the insulated gate bipolar transistors T 1、T2、T3 and T 4 are controlled to be turned on and off according to the recent level approximation modulation strategy, so as to control the switching of the capacitors C 1 and C 2. Three levels 2U c,Uc and 0 can be output, and the specific modes are as follows:
Mode 1: when the output voltage of the novel half-bridge hybrid submodule is required to be equal to the sum of the voltage difference between the anode and the cathode of the capacitor C 1 and the voltage difference between the anode and the cathode of the capacitor C 2, namely U c1+Uc2, the switching tube T 1,T3,S1,S2 is turned on, and the switching tube T 2,T4,S3,S4 is turned off;
When current is injected from the voltage positive electrode port of the novel half-bridge hybrid sub-module, i.e. i sm is more than 0, the current flow path is as follows: d 1→C1→D3→C2→S1;
When current is injected from a voltage negative electrode port of the novel half-bridge hybrid sub-module, i.e. i sm is less than 0, a current flow path is as follows: s 2→C2→T3→C1→T1;
mode 2: when the output voltage of the novel half-bridge hybrid submodule is required to be equal to the voltage difference between the anode and the cathode of the capacitor C 1, namely U c1, the switching tube T 1,T4,S1,S2 is turned on, and the T 2,T3,S3,S4 is turned off;
When i sm > 0, the current flow path is: d 1→C1→T4→S1;
when i sm < 0, the current flow path is: s 2→D4→C1→T1;
Mode 3: when the output voltage of the novel half-bridge hybrid submodule is required to be equal to the voltage difference between the anode and the cathode of the capacitor C 2, namely U c2, the switching tube T 2,T3,S1,S2 is turned on, and the T 1,T4,S3,S4 is turned off;
When i sm > 0, the current flow path is: t 2→D3→C2→S1;
when i sm < 0, the current flow path is: s 2→C2→T3→D2;
Mode 4: when the output voltage of the novel half-bridge hybrid submodule is required to be equal to 0, the switching tube T 2,T4,S1,S2 is turned on, and the switching tube T 1,T3,S3,S4 is turned off;
When i sm > 0, the current flow path is: t 2→T4→S1;
When i sm < 0, the current flow path is: s 2→D4→D2;
As shown in fig. 5, in the fault situation, the fault loop switch S 3 and the voltage equalizing switch S 4 are kept on, in the bidirectional switch, S 2 is turned off, S 1 is turned on, and the insulated gate bipolar transistor T 1、T2、T3、T4 is turned off, which is specifically as follows:
mode 1: when i sm > 0, the current flow path is: d 1→C1→D3→C2→S1, at which point the voltage U c1+Uc2 is output; when i sm < 0, the current flow path is: s 3→S4→C1→D2 and S 3→C2→D4→D2; at which point voltage-U c1∥Uc2 is output.
As shown in fig. 6, during normal operation, the full-bridge submodules T 5, T 6,T7 and T 8 are opposite in switching state, the on and off of the T 5、T6、T7、T8 are controlled according to the recent level approximation modulation strategy, and the switching of the capacitor C 0 is controlled, so that two levels U c and 0 can be output, and the specific modes are as follows:
Mode 1: when the output voltage of the full-bridge submodule is required to be equal to the voltage difference between the anode and the cathode of the capacitor C 0, namely U c0, the switching tube T 5,T8 is turned on, and the T 6,T7 is turned off;
When i sm > 0, the current flow path is: d 5→C0→D8;
when i sm < 0, the current flow path is: t 8→C0→T5;
Mode 2: when the output voltage of the novel half-bridge hybrid submodule is required to be equal to 0, the switching tube T 5,T7 is turned on, and the switching tube T 6,T8 is turned off;
When i sm > 0, the current flow path is: d 5→T7;
when i sm < 0, the current flow path is: d 7→T5;
As shown in fig. 7, in the fault situation, the insulated gate bipolar transistor T 5、T6、T7、T8 in the full-bridge sub-module is turned off, and the specific mode is as follows:
Mode 1: when i sm >0, the current flow path is: d 5→C0→D8, at which time the output voltage is U c0; when i sm < 0, the current flow path is: d 7→C0→D6, the submodule output voltage is-U c0.
In summary, the following table 1 and table 2 show the operation modes of the hybrid bridge arm topology with the capability of clearing dc fault and equalizing voltage:
Table 1: novel half-bridge hybrid submodule switch conduction state and current circulation path in bridge arm topology
Table 2: full-bridge submodule switch conduction state and current circulation path in bridge arm topology
The thick solid line in the table indicates the flow direction of the current.
In order to verify the capacity of the invention for clearing fault current and balancing capacitor voltage in the novel half-bridge hybrid sub-module under the condition of direct current fault, a +/-100 kV double-end LCC-MMC simulation model which is built in a MATLAB/Simulink simulation platform and shown in figure 3 is used for simulating bipolar short circuit at an inversion direct current side outlet. As shown in fig. 8, the short-circuit fault current on the valve side can be cleared in a short time, so that the impact on the converter equipment can be reduced; as shown in FIG. 9, the capacitor voltage simulation waveforms of the upper bridge arm submodule can be seen that the capacitor voltage has better balance degree in the non-fault period, and the capacitor voltage is kept unchanged in the fault period, so that the damage to the converter device caused by the fluctuation of the converter valve voltage is reduced.
Example 2: as shown in fig. 2, an MMC topology structure formed by the hybrid bridge arm topology structure shown in fig. 1 includes A, B, C upper and lower bridge arms with identical three phases, taking a C-phase upper bridge arm as an example: the system comprises K novel half-bridge hybrid sub-modules and (N-K) full-bridge sub-modules. The positive voltage input end of the 1 st novel half-bridge hybrid submodule is connected with a positive direct current bus, the negative voltage output end of the 1 st novel half-bridge hybrid submodule is connected with the positive voltage input end of the 2 nd submodule, the negative voltage output end of the 2 nd submodule is connected with the positive voltage input end of the 3 rd submodule, so that the positive voltage input end of the K novel half-bridge hybrid submodule is connected with the negative voltage output end of the K-1 th novel half-bridge hybrid submodule, the negative voltage output end of the K novel half-bridge hybrid submodule is connected with the positive voltage input end of the K+1 th full-bridge submodule, the negative voltage output end of the K+1 th full-bridge submodule is connected with the positive voltage input end of the K+2 th full-bridge submodule, and the positive voltage input end of the N full-bridge submodule is connected with the negative voltage input end of the N-1 th full-bridge submodule, so that the negative voltage output end of the N full-bridge submodule is connected with an alternating current system C through an inductor L 0.
While the present invention has been described in detail with reference to the drawings, the present invention is not limited to the above embodiments, and various changes can be made without departing from the spirit of the present invention within the knowledge of those skilled in the art.
Claims (2)
1. A hybrid bridge arm topological structure with direct current fault clearing and voltage equalizing capabilities is characterized in that: the novel half-bridge hybrid submodule comprises a novel half-bridge hybrid submodule and Quan Qiaozi submodules, wherein N submodules are mutually connected, the 1~K th submodule is the novel half-bridge hybrid submodule, the K+1-N submodule is Quan Qiaozi th submodule, the K novel half-bridge hybrid submodule is connected with the K+1 full-bridge submodule, the voltage positive input port of the K+1 full-bridge submodule is connected with the voltage negative output port of the K novel half-bridge hybrid submodule, and the voltage negative output port of the K+1 full-bridge submodule is connected with the voltage positive input port of the K+2 full-bridge submodule;
The novel half-bridge hybrid submodule comprises a half-bridge submodule HBSM 1, a half-bridge submodule HBSM 2, a bidirectional switch, a fault loop switch S 3 and a voltage equalizing switch S 4; the positive electrode of a capacitor C 1 in the half-bridge submodule HBSM 1 is connected with the cathode of the voltage-sharing switch S 4, and the positive electrode of a capacitor C 2 in the half-bridge submodule HBSM 2 is connected with the anode of the voltage-sharing switch S 4; the output end of the half-bridge submodule HBSM 2 is connected with a two-way switch, the anode of a fault loop switch S 3 is connected with the voltage negative output port of the novel half-bridge hybrid submodule, and the cathode of a fault loop switch S 3 is connected with the anode of a voltage equalizing switch S 4 and the anode of a capacitor C 2 in the half-bridge submodule HBSM 2;
The half-bridge submodule HBSM 1 includes an insulated gate bipolar transistor T 1, an insulated gate bipolar transistor T 2, a diode D 1, a diode D 2, and a capacitor C 1; insulated gate bipolar transistor T 1 is antiparallel with diode D 1, insulated gate bipolar transistor T 1 emitter is connected with the anode of diode D 1, insulated gate bipolar transistor T 1 collector is connected with the cathode of diode D 1, insulated gate bipolar transistor T 2 is antiparallel with diode D 2, insulated gate bipolar transistor T 2 emitter is connected with the anode of diode D 2, insulated gate bipolar transistor T 2 collector is connected with the cathode of diode D 2; the anode and the cathode of the capacitor C 1 are respectively connected with the collector of the insulated gate bipolar transistor T 1 and the anode of the diode D 2;
the novel half-bridge hybrid submodule voltage anode input port is connected with an emitter of an insulated gate bipolar transistor T 1, a collector of the insulated gate bipolar transistor T 2, an anode of a diode D 1 and a cathode of a diode D 2, and the novel half-bridge hybrid submodule voltage cathode output port is connected with a bidirectional switch;
The half-bridge submodule HBSM 2 includes an insulated gate bipolar transistor T 3, an insulated gate bipolar transistor T 4, a diode D 3, a diode D 4, and a capacitor C 2; insulated gate bipolar transistor T 3 is antiparallel with diode D 3, insulated gate bipolar transistor T 3 emitter is connected with the anode of diode D 3, insulated gate bipolar transistor T 3 collector is connected with the cathode of diode D 3, insulated gate bipolar transistor T 4 is antiparallel with diode D 4, insulated gate bipolar transistor T 4 emitter is connected with the anode of diode D 4, insulated gate bipolar transistor T 4 collector is connected with the cathode of diode D 4; the anode and the cathode of the capacitor C 2 are respectively connected with the collector of the insulated gate bipolar transistor T 3 and the anode of the diode D 4;
The full-bridge submodule comprises an insulated gate bipolar transistor T 5, an insulated gate bipolar transistor T 6, an insulated gate bipolar transistor T 7, an insulated gate bipolar transistor T 8, a diode D 5, a diode D 6, a diode D 7, a diode D 8 and a capacitor C 0';
The insulated gate bipolar transistor T is connected with the diode D in anti-parallel, the emitter of the insulated gate bipolar transistor T is connected with the anode of the diode D, the collector of the insulated gate bipolar transistor T is connected with the cathode of the diode D, the insulated gate bipolar transistor T is connected with the diode D in anti-parallel, the emitter of the insulated gate bipolar transistor T is connected with the anode of the diode D, the collector of the insulated gate bipolar transistor T is connected with the cathode of the diode D, the collector of the insulated gate bipolar transistor T is connected with the anode of the diode D, the collector of the insulated gate bipolar transistor T is connected with the collector of the insulated gate bipolar transistor T, the emitter of the insulated gate bipolar transistor T is connected with the cathode of the diode D, the anode of the capacitor C is connected with the anode of the insulated gate bipolar transistor T and the collector of the capacitor C is connected with the anode of the diode D.
2. The hybrid bridge arm topology with dc fault clearing and voltage sharing capability of claim 1, wherein: the bidirectional switch is formed by antiparallel connection of a thyristor S 1 and a thyristor S 2, the anode of the thyristor S 1 and the cathode of the thyristor S 2 are connected to the output end of the half-bridge submodule HBSM 2 together, and the cathode of the thyristor S 1 and the anode of the thyristor S 2 are connected to the voltage negative electrode output port of the novel half-bridge hybrid submodule together.
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