CN112953219A - Boost control circuit - Google Patents

Boost control circuit Download PDF

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Publication number
CN112953219A
CN112953219A CN202110093527.3A CN202110093527A CN112953219A CN 112953219 A CN112953219 A CN 112953219A CN 202110093527 A CN202110093527 A CN 202110093527A CN 112953219 A CN112953219 A CN 112953219A
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switch
control circuit
signal
boost control
voltage
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罗强
方烈义
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On Bright Electronics Shanghai Co Ltd
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On Bright Electronics Shanghai Co Ltd
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Priority to CN202110093527.3A priority Critical patent/CN112953219A/en
Priority to TW110115942A priority patent/TWI786620B/en
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/02Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/158Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
    • H02M3/1584Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load with a plurality of power processing stages connected in parallel

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)
  • Steering Control In Accordance With Driving Conditions (AREA)
  • Oscillators With Electromechanical Resonators (AREA)
  • Electronic Switches (AREA)

Abstract

The invention discloses a boost control circuit. This boost control circuit includes the inductance, with the first switch of inductance series connection between boost control circuit's input and output and with the second switch of inductance series connection between input and ground, its characterized in that still includes: a switch controller configured to generate first and second control signals for controlling on and off of the first and second switches, respectively, based on a voltage feedback signal representing an output voltage of the boost control circuit and a current sampling signal representing a current flowing through the second switch. According to the boost control circuit provided by the embodiment of the invention, the switch control signal is generated by the switch controller so as to control the on and off of the corresponding switch of the boost control circuit based on the switch control signal, and further the output voltage is subjected to modulation control.

Description

Boost control circuit
Technical Field
The invention belongs to the field of integrated circuits, and particularly relates to a boost control circuit.
Background
Generally, conventional voltage regulation systems are voltage modulation control systems that include current feedback. The biggest characteristic of the traditional system is that the traditional system needs to sample the inductive current to generate current feedback to participate in the voltage-current loop control of the voltage regulating system.
However, in order to perform current sampling, a complex circuit structure is often required to be introduced for current sampling, which greatly increases the circuit area and increases the complexity of circuit design.
Disclosure of Invention
The embodiment of the invention provides a boost control circuit, which does not use the traditional method for detecting and sampling the inductive current, but generates a switch control signal through a switch controller so as to control the on and off of a corresponding switch of the boost control circuit based on the switch control signal, thereby modulating and controlling the output voltage.
The embodiment of the invention provides a boost control circuit, which comprises an inductor, a first switch connected in series with the inductor between an input end and an output end of the boost control circuit, and a second switch connected in series with the inductor between the input end and the ground, and is characterized by further comprising: a switch controller configured to generate first and second control signals for controlling on and off of the first and second switches, respectively, based on a voltage feedback signal representing an output voltage of the boost control circuit and a current sampling signal representing a current flowing through the second switch.
According to the boost control circuit provided by the embodiment of the present invention, the switch controller includes a third switch, a fourth switch, and a capacitor, and the switch controller is further configured to: generating a second control signal for controlling the on and off of the second switch and the third switch based on the voltage feedback signal and the current sampling signal; generating a first control signal for controlling the turning on and off of the first switch and the fourth switch based on the second control signal and the voltage on the capacitor; wherein the charging and discharging of the capacitor is related to the turning on and off of the third switch and the fourth switch.
According to the boost control circuit provided by the embodiment of the invention, the switch controller is further configured to: the second control signal is generated based on a first comparison result between the voltage feedback signal and the first reference signal and the current sampling signal.
According to the boost control circuit provided by the embodiment of the invention, the switch controller is further configured to: the second control signal is generated based on the first comparison result and a second comparison result between the current sampling signal and a second reference signal.
According to the boost control circuit provided by the embodiment of the present invention, the third switch and the fourth switch are connected in series between the current source and the ground, the capacitor is connected in parallel to both ends of the fourth switch, and the switch controller further includes: a first comparator configured to generate a second comparison result based on the current sampling signal and a second reference signal; a flip-flop configured to generate a second control signal based on the first comparison result and the second comparison result; and a generator configured to generate the first control signal based on the second control signal and a voltage on the capacitor, wherein the voltage on the capacitor is a voltage on the capacitor in a discharge state.
According to the boost control circuit provided by the embodiment of the present invention, the on-time of the second switch and the third switch is determined by the following formula:
Figure BDA0002911465230000021
wherein, TonFor the on-time of the second switch and the third switch, Vref2 is a second reference signal, Rsns is a resistance value of a resistor for generating a current sampling signal, I0 is an inductor current corresponding to a time from the off-to-on time of the second switch, L is an inductance value of an inductor, and Vin is an input voltage of the boost control circuit.
According to the boost control circuit provided by the embodiment of the present invention, the turn-on time of the first switch and the fourth switch is determined by the following formula:
Figure BDA0002911465230000022
wherein Toff is the conduction time of the first switch and the fourth switch, and Vout is the output voltage.
According to the boost control circuit provided by the embodiment of the invention, the first switch, the second switch, the third switch and the fourth switch are all metal oxide semiconductor field effect transistors, and the trigger is an RS trigger.
According to the boost control circuit provided by the embodiment of the invention, the boost control circuit further comprises: a second comparator configured to generate a first comparison signal based on the voltage feedback signal and a first reference signal; a voltage dividing circuit configured to generate a voltage feedback signal by dividing an output voltage; the two poles of the first diode are respectively connected to the source electrode and the drain electrode of the first switch, and the grid electrode of the first switch receives a first control signal; and two poles of the second diode are respectively connected to the source and the drain of the second switch, and the grid of the second switch receives a second control signal.
According to the boost control circuit provided by the embodiment of the invention, the boost control circuit works in a continuous conduction mode or a discontinuous conduction mode.
According to the boost control circuit provided by the embodiment of the invention, the traditional method for detecting and sampling the inductive current is not used, but the switch control signal is generated through the switch controller, so that the corresponding switch of the boost control circuit is controlled to be switched on and off based on the switch control signal, and the output voltage is further modulated and controlled.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required to be used in the embodiments of the present invention will be briefly described below, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 shows a schematic structure diagram of a boost control circuit 100 provided in the prior art;
fig. 2 is a schematic structural diagram of a boost control circuit 200 according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of a switch controller in the boost control circuit according to an embodiment of the present invention;
FIG. 4 is a waveform diagram of various signals in the boost control circuit in continuous conduction mode according to an embodiment of the present invention; and
FIG. 5 is a waveform diagram of signals in the boost control circuit in the discontinuous conduction mode according to an embodiment of the present invention.
Detailed Description
Features and exemplary embodiments of various aspects of the present invention will be described in detail below, and in order to make objects, technical solutions and advantages of the present invention more apparent, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not to be construed as limiting the invention. It will be apparent to one skilled in the art that the present invention may be practiced without some of these specific details. The following description of the embodiments is merely intended to provide a better understanding of the present invention by illustrating examples of the present invention.
It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
For better understanding of the present invention, first, the prior art is introduced, and referring to fig. 1, fig. 1 shows a schematic diagram of a boost control circuit 100 provided in the prior art.
In fig. 1, the boost control circuit 100 includes an inductor L, a switch M1, a switch M2, a diode D1, a diode D2, and a capacitor C1, as shown in fig. 1, one end of the inductor L is connected to an input terminal of the circuit, the other end of the inductor L is connected to one end of a switch M1, the other end of the switch M1 is connected to an output terminal of the circuit, and the output terminal is grounded via a capacitor C1, one end of the switch M2 is connected to a common terminal of the inductor L and the switch M1, the other end of the switch M2 is grounded, and switch control signals for controlling on and off of the switches M1 and M2 are HG and LG, respectively, two poles of a diode D1 are connected between two terminals other than a terminal for receiving an HG signal in the switch M1, and two poles of a diode D2 are connected between two terminals other than a terminal for receiving an LG signal in the switch M39.
Wherein Vin is the input voltage of the boost control circuit 100, Vout is the output voltage of the boost control circuit 100, and for the boost control circuit 100, the output voltage Vout is greater than the input voltage Vin; m1 and M2 are switches for controlling boost, e.g., M1 is an output control switch, M2 is an inductive storage turn on switch; l is an inductance for controlling the boost; ton is the time that control switch M2 is on, and Toff is the time that control switch M1 is on.
In such a conventional circuit, a current sampling circuit is added to sample the inductor current to generate a current feedback signal, and the switches M1 and M2 are controlled to be turned on and off based on the current feedback signal to modulate the output voltage Vout such that the output voltage Vout can be larger than the input voltage Vin.
However, in the conventional method of sampling the inductor current by the current sampling circuit to generate current feedback and then modulating the output voltage based on the current feedback, the circuit area is greatly increased and the complexity of the circuit design is increased.
In order to solve the problem of the prior art, an embodiment of the invention provides a boost control circuit. The boost control circuit provided by the embodiment of the invention does not detect and sample the inductive current any more, but establishes modulation control on the output voltage by a volt-second balance principle.
It should be noted that the boost control circuit provided by the embodiment of the present invention is merely an exemplary implementation manner, and the present invention is not limited to this, for example, the principle provided by the embodiment of the present invention may also be applied to, for example, a buck control circuit, and the like, and equivalents and configurations thereof are within the scope of the present invention.
With continued reference to fig. 1, based on the volt-second balance principle, the change in current flowing through the inductor when the output switch M2 is turned on can be expressed as follows:
Figure BDA0002911465230000051
it can be seen that in formula (1), the inductor current IL is Vin and TonAs described above, in conventional configurations, this inductor current is sensed and sampled and a voltage is developed across a resistor (e.g., resistor R0) (as shown in equation (2)) and input to the loop control of the boost control circuit.
Figure BDA0002911465230000052
Where k is the coefficient of the inductor current after it is detected and sampled, which is a constant. The resistor R0 is a resistor for converting current into voltage, the resistor R0 may be a resistor connected in series with the inductor L, or a resistor for converting current into voltage in a current sampling circuit, Vin is the input voltage of the structure, TonIs the on time of switch M2.
As an example, referring to fig. 2, fig. 2 is a schematic structural diagram of a boost control circuit 200 according to an embodiment of the present invention.
As shown in fig. 2, the boost control circuit 200 may include an inductor L, a switch M3, a switch M4, a diode D3, a diode D4, a capacitor C2, a switch controller 210, a comparator 220, and a voltage divider circuit 230.
As one example, the switch controller 210 may be configured to generate the signal HG for controlling the on and off of the switch M3, respectively, and the signal LG for controlling the on and off of the switch M4, based on a voltage feedback signal (e.g., Vfb) representing the output voltage of the boost control circuit 200 and a current sampling signal (e.g., Vsns) representing the current flowing through the switch M4.
Specifically, in some embodiments, the switches M3 and M4 may be Metal-Oxide-Semiconductor (MOS) transistors.
As an example, one end of the inductor L may be connected to the input terminal of the circuit 200, the other end of the inductor L may be connected to one end of the switch M3, the other end of the switch M3 may be connected to the output terminal of the circuit 200, two poles of the diode D3 may be connected to two ends (e.g., the source and the drain) of the switch M3, one end of the switch M4 may be connected to a common end (e.g., the node a) of the inductor L and the switch M3, the other end of the switch M4 may be grounded via a resistor Rsns, two poles of the diode D4 may be connected to two ends (e.g., the source and the drain) of the switch M4, wherein the resistor Rsns is used for sampling a current flowing through the switch M4 to generate a current sampling signal (e.g., Vsns), wherein theramp1The switch controller 210 may be configured to receive a voltage feedback signal (e.g., Vfb) and a current sampling signal (e.g., Vsns) indicative of the output voltage of the circuit 200 to generate two switch control signals (e.g., LG and HG), wherein the gate of the switch M3 may receive the signal HG to turn on and off based on the signal HG, and the gate of the switch M4 may receive the signal LG to turn on and off based on the signal LG to modulate the output voltage Vout of the boost control circuit 200.
In some embodiments, the voltage dividing circuit 230 may be configured to divide the output voltage Vout of the boost control circuit 200 to generate a voltage feedback signal (e.g., Vfb), the comparator 220 may be configured to receive the reference signal Vref and the voltage feedback signal (e.g., Vfb), for example, a negative input of the comparator 220 may be configured to receive the reference signal Vref, and a positive input of the comparator may be configured to receive the voltage feedback signal Vfb, to compare the two signals, and to generate the signal Vc to be output to the switch controller 210, and the voltage dividing circuit 230 may include two resistors (e.g., R1 and R2) connected in series, which is not limited by the present disclosure.
According to the technical scheme provided by the embodiment of the invention, the inductive current does not need to be detected and sampled, the switch control signal is generated by the switch controller to control the on and off of the switch, so that the output voltage is modulated, the booster circuit with a small area is realized on the premise of ensuring the conversion efficiency, and the voltage modulation is realized by using less resources, so that the booster circuit is suitable for the application of limited resources.
As an example, referring to fig. 3, fig. 3 is a schematic structural diagram of a switch controller in a boost control circuit provided by an embodiment of the present invention.
In the embodiment shown in fig. 3, the switch controller 210 may include switches SW1 and SW2 and a capacitor C3, the switch controller 210 may be configured to generate a control signal LG for controlling on and off of the switches SW1 and M4 (see fig. 2) based on the voltage feedback signal Vfb and the current sampling signal Vsns, and further generate a control signal HG for controlling on and off of the switches SW2 and M3 (see fig. 2) based on the signal LG and the voltage on the capacitor C3, and the capacitor C3 is charged when the switch SW1 is turned on and the switch SW2 is turned off, and is discharged when the switch SW1 is turned off and the switch SW2 is turned on. In some embodiments, switches SW1 and SW2 may be MOS transistors.
As will be described in detail below by way of example, specifically, as shown in fig. 3, the switch controller 210 may further include a comparator 2101, a flip-flop 2102, a Toff generator, and the like, and in some embodiments, the flip-flop 2102 may be an RS flip-flop.
As an example, two input terminals of the comparator 2101 may receive the signal Vsns and the reference voltage Vref2, for example, a negative phase input terminal of the comparator 2101 may be used to receive the reference voltage Vref2, and a positive phase input terminal may be used to receive the signal Vsns to compare the two, an output terminal of the comparator 2101 may be connected to, for example, a reset terminal (labeled R) of the RS flip-flop 2102, an output terminal of the comparator 220 (see fig. 2) may be connected to a set terminal (labeled S) of the RS flip-flop 2102, an output terminal of the RS flip-flop 2102 may be connected to one terminal (e.g., a gate) of the switch SW1 to control the turn-on and turn-off of the switch SW1, the switch SW1 and the switch SW2 are connected in series between the current source (labeled I1) and the ground, the capacitor C3 is connected in parallel across the switch SW2, an output terminal of the RS flip-flop may also be connected to one input terminal of the Toff generator, another input terminal of the, to receive the voltage across capacitor C3 in the discharged state, the output of the Toff generator may be connected to one terminal (e.g., a gate) of switch SW2 to control the switching on and off of switch SW 2.
Specifically, the comparator 2101 may be configured to receive the current sampling signal Vsns and the reference signal Vref2 (for determining whether the current sampling signal Vsns rises to the reference signal Vref2) to compare them and output the comparison result to the RS flip-flop 2102, the RS flip-flop 2102 further receives the comparison result Vc from the comparator 220 (see fig. 2) to output the control signal LG to the switches SW1 and M4 based on the two comparison results to control the on and off of the switches SW1 and M4, that is, Ton is the on time of SW1 and M4, when the signal LG controls the switch SW1 to be turned on, the current source (e.g., I1, which may provide a current of a magnitude of Vin/R1) charges the capacitor C3, generates a rising ramp voltage on the capacitor C3 (which will be described in detail below), turns on the switch SW2 (or turns on over a predetermined period of time) at the time when the SW1 is switched from on to off, without limitation thereto, the present invention) when capacitor C3 is discharged, producing a falling ramp voltage on capacitor C3 (as will be described in detail below), which is labeled Vramp in fig. 3, Toff generator 2103 may be configured to generate signal HG based on signal LG and the voltage on capacitor C3 in the discharged state (i.e., the falling ramp voltage), and to control the turning on and off of switch SW2 based on signal HG.
In summary, Ton is determined by the time when the sampled current flowing through the switch M4 reaches the reference current, and the formula of Ton is as follows:
Figure BDA0002911465230000081
wherein, TonFor the on-time of the switches SW1 and M4, Vref2 is the reference signal, Rsns is the resistance of the resistor for generating the current sampling signal Vsns, I0 is the inductor current corresponding to the moment when the switch M4 turns off to on, I0 is 0, L is the inductance of the inductor, and Vin is the input voltage of the boost control circuit for Discontinuous Conduction (DCM) mode.
Since the inductor L, the voltage Vin, and the time Ton are known, in the circuit provided by the embodiment of the present invention, a similar current is generated and the inductor current can be characterized by the same functional relationship to Vin and Ton as the formula (1). When the switch SW1 is turned on and the switch SW2 is turned off, the capacitor C3 is in a charging state, the current I1 generates a rising ramp voltage on the capacitor C3, the holding time of the ramp voltage is Ton, and the ramp voltage on the capacitor C3 in the charging state can be represented as:
Figure BDA0002911465230000082
here, the first and second liquid crystal display panels are,
Figure BDA0002911465230000083
as long as selecting
Figure BDA0002911465230000084
Vramp2Can completely represent Vramp1
Similarly, according to the volt-second balance principle, in fig. 1, when the switch M2 is turned off and the switch M1 is turned on, the following equation is satisfied:
Figure BDA0002911465230000091
based on this principle, in the embodiment shown in fig. 3, when switch SW1 is turned off and switch SW2 is turned on, current I2 starts discharging capacitor C3 for a time Toff, the voltage on capacitor C3 drops linearly during the discharging phase, a falling ramp voltage is generated on capacitor C3, and switch SW2 is turned on for a pulse width Toff. It should be noted that the implementation of the circuit is not limited to the embodiments provided by the present invention, and those skilled in the art can design other implementations of the circuit based on the volt-second balance principle described above without departing from the spirit and scope of the present invention. Selecting I2 as the following equation, the volt-second equilibrium reflected by equation (5) can be satisfied.
Figure BDA0002911465230000092
Referring to fig. 3 and 4, fig. 4 is a schematic diagram of waveforms of respective signals in the boost control circuit in the continuous conduction mode according to the embodiment of the present invention. Wherein fig. 4(a) shows a graphical illustration of the voltage Vramp over the capacitor shown in fig. 3 versus time; fig. 4(b) shows a graph diagram of the relationship between the signal LG shown in fig. 3 and time; and fig. 4(c) shows a graph diagram of the relationship between the signal HG and time shown in fig. 3.
As an example, when the switch SW1 is turned on and the switch SW2 is turned off, the current I1 starts to charge the capacitor C3 for Ton (corresponding to the time period T0-T1 in fig. 4), the voltage Vramp across the capacitor C3 rises linearly during the time period T0-T1 (e.g., during the time period T0-T1, the voltage Vramp rises linearly from V1 (valley) to V2 (peak), see equation (4)), and the signal LG is at a high level, while the signal HG is at a low level; and when switch SW1 is turned off and switch SW2 is turned on, current I2 starts discharging capacitor C3 for Toff (corresponding to time period T1-T2), during time period T1-T2 the voltage across capacitor C3 (i.e., Vramp) drops linearly (e.g., during time period T1-T2 signal Vramp drops linearly from V2 (peak) to V1 (valley), see equation (6)), and signal LG is at low level while signal HG is at high level.
Referring to fig. 3 and 4, a Toff generator is used in fig. 3 to characterize the generation of control signal HG of switch SW 2. Among them, the rising edge of the signal HG may be generated by the falling edge of the signal LG (e.g., at time T1, the signal LG is switched from high level to low level, so that the signal HG is switched from low level to high level, see fig. 4), and the falling edge of the signal HG is generated at the time when the signal Vramp is decreased from the peak value V2 to the valley value V1 (e.g., at time T2, when the signal Vramp is decreased to the valley value V1, the signal HG is switched from high level to low level, see fig. 4).
The discharge current of the capacitor C3 is selected according to equation (6), and the time it takes for the signal Vramp to fall from the peak value V2 to the valley value V1 is the time Toff required to achieve volt-second equilibrium.
Thus, the current relationship between the switches M3 and M4, in which the inductor current is boosted at volt-second equilibrium as reflected by equation (5), can be converted into the voltage relationship shown in equation (7):
Figure BDA0002911465230000101
therefore, the first and second electrodes are formed on the substrate,
Figure BDA0002911465230000102
therefore, the input voltage Vin, the output voltage Vout, and the on-times Ton of the switches SW1 and M4 (see formula (3)) are known parameters, the on-times Toff of the switches SW2 and M3 are set based on formula (8), and the switches M3 and SW2 are turned on during the Toff period (e.g., from the time T1 to the time T2 in fig. 4).
As an example, the operation principle of the boost control circuit provided by the embodiment of the present invention is described with reference to fig. 2, when the voltage feedback signal Vfb is smaller than the reference signal Vref, the output signal Vc of the comparator 220 is inverted, and its rising edge can switch on the switch SW1 (see fig. 3) in the switch controller 210. Subsequently, the output signal Vc of the comparator 220 is reset. After the on-time Ton elapses, the switch SW1 is turned off, that is, the switch SW1 is kept in the on-state during the on-time Ton. In some embodiments, switch SW2 may be turned on after the time that switch SW1 is turned off, for example, tens of nanoseconds (which may be selected as desired), such that switch SW2 is turned off after the on-time Toff, i.e., switch SW2 remains in an on-state during the on-time Toff. In some other embodiments, the interval time may be zero, i.e., the switch SW2 may be turned on immediately at the time that the switch SW1 is turned off, so that the switch SW2 is turned off after the on-time Toff elapses, i.e., the switch SW2 remains in the on-state during the on-time Toff.
At the time when the switch SW2 is turned off, the output of the comparator 220 is enabled, and if the output signal Vc of the comparator 220 flips out a rising edge, the operation described above starts immediately for the next cycle, at which time the boost control circuit operates in Continuous Current Mode (CCM), as shown in fig. 4. Otherwise, the step-up control circuit waits until the output signal Vc of the comparator 220 flips out a rising edge, and then starts the operation in the next cycle, where the step-up control circuit operates in Discontinuous Conduction Mode (DCM), as shown in fig. 5, fig. 5 is a schematic waveform diagram of each signal in the step-up control circuit in discontinuous conduction Mode according to the embodiment of the present invention, where the time period (T3-T2) represents the waiting time.
In summary, the boost control circuit provided by the embodiment of the invention does not use the conventional method for detecting and sampling the inductor current, but establishes the boost adjustment control on the output voltage based on the volt-second balance principle. The purpose of the circuit is to realize a booster circuit with a small area on the premise of ensuring the conversion efficiency, namely to realize the modulation of output voltage by using minimum resources, and further to use the booster circuit in the application with limited resources.
The boost control circuit provided by the embodiment of the invention uses a universal constant on time (constant on time) structure, the modulation control of the output switch is realized based on a volt-second balance principle, the change of the inductor current is replaced by RC conversion, and the conduction time of the output switch of the boost control circuit is determined by the constant on time and the RC conversion substitution.
It is to be understood that the invention is not limited to the specific arrangements and instrumentality described above and shown in the drawings. A detailed description of known methods is omitted herein for the sake of brevity. In the above embodiments, several specific steps are described and shown as examples. However, the method processes of the present invention are not limited to the specific steps described and illustrated, and those skilled in the art can make various changes, modifications and additions or change the order between the steps after comprehending the spirit of the present invention.
The functional blocks shown in the above-described structural block diagrams may be implemented as hardware, software, firmware, or a combination thereof. When implemented in hardware, it may be, for example, an electronic circuit, an Application Specific Integrated Circuit (ASIC), suitable firmware, plug-in, function card, or the like. When implemented in software, the elements of the invention are the programs or code segments used to perform the required tasks. The program or code segments may be stored in a machine-readable medium or transmitted by a data signal carried in a carrier wave over a transmission medium or a communication link. A "machine-readable medium" may include any medium that can store or transfer information. Examples of a machine-readable medium include electronic circuits, semiconductor memory devices, ROM, flash memory, Erasable ROM (EROM), floppy disks, CD-ROMs, optical disks, hard disks, fiber optic media, Radio Frequency (RF) links, and so forth. The code segments may be downloaded via computer networks such as the internet, intranet, etc.
It should also be noted that the exemplary embodiments mentioned in this patent describe some methods or systems based on a series of steps or devices. However, the present invention is not limited to the order of the above-described steps, that is, the steps may be performed in the order mentioned in the embodiments, may be performed in an order different from the order in the embodiments, or may be performed simultaneously.
As described above, only the specific embodiments of the present invention are provided, and it can be clearly understood by those skilled in the art that, for convenience and brevity of description, the specific working processes of the system, the module and the unit described above may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again. It should be understood that the scope of the present invention is not limited thereto, and any person skilled in the art can easily conceive various equivalent modifications or substitutions within the technical scope of the present invention, and these modifications or substitutions should be covered within the scope of the present invention.

Claims (10)

1. A boost control circuit comprising an inductor, a first switch connected in series with the inductor between an input and an output of the boost control circuit, and a second switch connected in series with the inductor between the input and ground, further comprising:
a switch controller configured to generate first and second control signals for controlling on and off of the first and second switches, respectively, based on a voltage feedback signal representing an output voltage of the boost control circuit and a current sampling signal representing a current flowing through the second switch.
2. The boost control circuit of claim 1, wherein the switch controller comprises a third switch, a fourth switch, and a capacitor, the switch controller further configured to:
generating the second control signal for controlling the second switch and the third switch to be turned on and off based on the voltage feedback signal and the current sampling signal;
generating the first control signal for controlling the turning on and off of the first switch and the fourth switch based on the second control signal and the voltage on the capacitor; wherein the content of the first and second substances,
the charging and discharging of the capacitor is related to the turning on and off of the third switch and the fourth switch.
3. The boost control circuit of claim 2, wherein the switch controller is further configured to:
generating the second control signal based on a first comparison result between the voltage feedback signal and a first reference signal and the current sampling signal.
4. The boost control circuit of claim 3, wherein the switch controller is further configured to:
generating the second control signal based on the first comparison result and a second comparison result between the current sampling signal and a second reference signal.
5. A boost control circuit according to claim 4, in which the third switch and the fourth switch are connected in series between a current source and ground, the capacitor is connected in parallel across the fourth switch, and the switch controller further comprises:
a first comparator configured to generate the second comparison result based on the current sampling signal and the second reference signal;
a flip-flop configured to generate the second control signal based on the first comparison result and the second comparison result; and
a generator configured to generate the first control signal based on the second control signal and a voltage on the capacitor, wherein the voltage on the capacitor is a voltage on the capacitor in a discharge state.
6. A boost control circuit according to claim 5, wherein the conduction times of the second and third switches are determined by:
Figure FDA0002911465220000021
wherein, TonVref2 is the second reference signal for the on-time of the second switch and the third switch, Rsns is the resistance value of the resistor for generating the current sampling signal, I0 is the inductor current corresponding to the moment when the second switch is turned off to on, L is the inductance value of the inductor, and Vin is the input voltage of the boost control circuit.
7. A boost control circuit according to claim 5, wherein the conduction time of the first switch and the fourth switch is determined by:
Figure FDA0002911465220000022
wherein Toff is the conduction time of the first switch and the fourth switch, and Vout is the output voltage.
8. A boost control circuit according to claim 5, characterised in that the first, second, third and fourth switches are all MOSFETs and the flip-flop is an RS flip-flop.
9. A boost control circuit according to claim 8, further comprising:
a second comparator configured to generate the first comparison signal based on the voltage feedback signal and the first reference signal;
a voltage dividing circuit configured to generate the voltage feedback signal by dividing the output voltage;
two poles of the first diode are respectively connected to the source electrode and the drain electrode of the first switch, and the grid electrode of the first switch receives the first control signal; and
and two poles of the second diode are respectively connected to the source and the drain of the second switch, and the grid of the second switch receives the second control signal.
10. The boost control circuit of claim 1, wherein the boost control circuit operates in a continuous conduction mode or a discontinuous conduction mode.
CN202110093527.3A 2021-01-22 2021-01-22 Boost control circuit Pending CN112953219A (en)

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