CN112688274A - Fault wave sealing method for photovoltaic grid-connected inverter - Google Patents
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Abstract
The invention discloses a fault wave sealing method of a photovoltaic grid-connected inverter, relates to the photovoltaic grid-connected inverter, and provides a wave sealing method at the time of fault shutdown for the inverter. Therefore, the turn-off current of the inner pipe is smaller than that of the original wave sealing method, so that the stress and turn-off loss of the inner pipe are correspondingly reduced, and the inner pipe is protected from being damaged due to overcurrent or overheating.
Description
Technical Field
The invention belongs to the technical field of photovoltaic grid-connected inverters, and particularly relates to a fault wave sealing method of a photovoltaic grid-connected inverter.
Background
The photovoltaic grid-connected inverter is a core device for converting direct current into alternating current in a photovoltaic power generation system, and plays a vital role in the efficiency, stability and output electric energy quality of the photovoltaic power generation system. Therefore, the reliability of the photovoltaic grid-connected inverter is very important, and the inverter can be safely stopped by reliably sealing the wave at the fault moment.
The existing wave sealing mode of the photovoltaic grid-connected inverter has the condition that the inner tube is cut off when large current exists, the inner tube cut-off stress can be generated, the loss is large, and the reliable operation of the photovoltaic grid-connected inverter is not facilitated.
Disclosure of Invention
The invention provides a fault wave sealing method of a photovoltaic grid-connected inverter, which is used for reducing the stress and the turn-off loss of an inner pipe at the time of wave sealing.
In order to achieve the purpose, the fault wave sealing method of the photovoltaic grid-connected inverter provided by the invention has the advantages that when the photovoltaic grid-connected inverter breaks down and needs wave sealing, the photovoltaic grid-connected inverter enters a zero state firstly, and then wave sealing is carried out, so that the photovoltaic grid-connected inverter is in a reset state; the zero state refers to a working state that the output voltage of a three-phase bridge arm of the photovoltaic grid-connected inverter is 0.
Further, a fault wave blocking method of the photovoltaic grid-connected inverter comprises the following steps:
step 1: when the photovoltaic grid-connected inverter normally works, the photovoltaic grid-connected inverter is switched between a positive state and a zero state in a positive half period; in the negative half period, the driving state of the photovoltaic grid-connected inverter is switched between a negative state and a zero state; when the driving state is a positive state, the output voltage of a single-phase bridge arm of the photovoltaic grid-connected inverter is udcAnd/2, when the driving state is a negative state, the output voltage of a single-phase bridge arm of the photovoltaic grid-connected inverter is-udc/2；
Step 2: at the fault wave sealing moment, when the driving state is in a positive state, the wave sealing time sequence is as follows: the positive state-zero state-reset state, namely, the outer tube of the photovoltaic grid-connected inverter is firstly switched off until the current flowing through the inner tube is reduced, then the inner tube is switched off, and the driving state is changed into the reset state;
at the fault wave sealing moment, when the driving signal is in a negative state, the wave sealing time sequence is as follows: the negative state-zero state-reset state, namely, the outer tube is firstly turned off until the current flowing through the inner tube is reduced, then the inner tube is turned off, and the driving state is changed into the reset state.
In step 2, after an outer tube of the photovoltaic grid-connected inverter is turned off, the time t is set continuously to reduce the current flowing through the inner tube.
A fault wave sealing method of a photovoltaic grid-connected inverter is applied to a neutral point clamping three-level photovoltaic grid-connected inverter, the neutral point clamping three-level photovoltaic grid-connected inverter comprises an inverter circuit and an LC filter circuit, the inverter circuit comprises A, B phases and C phases, and each phase comprises a switch tube T1, a switch tube T2, a switch tube T3 and a switch tube T4;
the method comprises the following steps:
step 1: when the inverter normally works, in a positive half period, the driving signal switching sequence of the photovoltaic grid-connected inverter is as follows: 1100 → 0100 → 0110, the corresponding preamble timing state is: positive state → transition state a → zero state; in the negative half cycle, the driving signal switching sequence of the inverter is as follows: 0011 → 0010 → 0110, the corresponding wave-sealing sequence is: positive state → transition state B → zero state; the driving signal comprises four digits, the first digit is the working state of the switch tube T1, the second digit is the working state of the switch tube T2, the third digit is the working state of the switch tube T3, and the fourth digit is the working state of the switch tube T4; 1 represents that the switch tube is switched on, and 0 represents that the switch tube is switched off;
step 2: at the time of fault wave blocking, when the driving signal is 1100, the switching sequence of the driving signal is as follows: 1100 → 0100 → 0110 → 0000, the corresponding states are: positive state → transition state a → zero state → reset; firstly, the switch tube T1 is turned off, and after the time T is set continuously, the switch tube T2 and the switch tube T3 are turned off;
at the time of fault wave sealing, when the driving signal is 0011, the switching sequence of the driving signal is as follows: 0011 → 0010 → 0110 → 0000, the corresponding state is: the negative state → the transition state B → the zero state → the reset, i.e. the switching tube T4 is turned off first, then the switching tube T2 is turned on, and after the set time T, the switching tube T3 and the switching tube T2 are turned off.
In step 2, the set time t is calculated according to a formula (1),
Ldi/dt＝Vin-Vinv (1)
wherein i is the inductive current of the photovoltaic grid-connected inverter, L is the inductance value of the inductor in the filter circuit of the photovoltaic grid-connected inverter, and VinFor bridge arm output voltage, VinvThe voltage is the inversion capacitor voltage of the photovoltaic grid-connected inverter.
A fault wave sealing method of a photovoltaic grid-connected inverter is applied to an active neutral point clamping three-level photovoltaic grid-connected inverter, the active neutral point clamping three-level photovoltaic grid-connected inverter comprises an inverter circuit and an LC filter circuit, the inverter circuit comprises A, B and C phases, and each phase comprises a switch tube T1, a switch tube T2, a switch tube T3, a switch tube T4, a switch tube T5 and a switch tube T6;
the method comprises the following steps:
step 1: in the positive half cycle, the driving signal switching sequence of the inverter is: 110000 → 010000 → 010010 corresponding to output voltage udcAnd/2 or 0, the corresponding states are: p-state → transition state C → O + state; in the negative half cycle, the driving signal switching sequence of the inverter is as follows: 001100 → 001000 → 010010, the corresponding states are: n-state → transition state D → O-state, corresponding to an output voltage of-udcA/2 or 0;
the driving signal comprises six digits, the first digit is the working state of the switch tube T1, the second digit is the working state of the switch tube T2, the third digit is the working state of the switch tube T3, and the fourth digit is the working state of the switch tube T4; the fifth position is the working state of the switch tube T5, and the sixth position is the working state of the switch tube T6; 1 represents that the switch tube is switched on, and 0 represents that the switch tube is switched off; the drive signal 110000 means: the switch tube T1 and the switch tube T2 are switched on, and the switch tube T3, the switch tube T4, the switch tube T5 and the switch tube T6 are switched off;
step 2: at the time of fault wave-sealing, when the driving signal is 110000, the switching sequence of the driving signal is as follows: 110000 → 010000 → 010010 → 010000 → 000000, corresponding to the state: the P state → the transition state C → the O + state → the transition state C → the reset, namely, the switching tube T1 is turned off first, then the switching tube T5 is turned on for a set time, and then the switching tube T2 and the switching tube T5 are turned off;
at the time of fault wave-sealing, when the driving signal is 001100, the switching sequence of the driving signal is as follows: 001100 → 001000 → 001001 → 001000 → 000000, corresponding to the status: n-state → transition state D → O-state → transition state D → reset; the switch tube T4 is turned off first, then the switch tube T6 is turned on, and after the set time is continued, the switch tube T3 and the switch tube T6 are turned off.
Compared with the prior art, the invention has at least the following beneficial technical effects:
the invention adds a zero state in the original wave-sealing logic, when an overcurrent fault or other faults occur and need to be sealed, the drive signal is in the zero state for a period of time and then is changed into a reset state. Therefore, the turn-off current of the inner tube is smaller than that of the existing wave sealing method, so that the stress and turn-off loss of the inner tube can be correspondingly reduced, and the stress and turn-off loss of the inner tube at the time of fault shutdown can be effectively reduced, thereby protecting the inner tube from being damaged due to overcurrent or overheating.
Furthermore, the turn-off time of the inner tube is determined according to the delay time, the delay time can be calculated according to circuit parameters and operation conditions, the current flowing through the inner tube does not need to be measured, an additional current sensor does not need to be added, and the method is easy to implement and simple and convenient to operate.
Drawings
FIG. 1 is a photovoltaic grid-connected inverter NPC 3L topology;
FIG. 2 is a NPC module launch state machine;
the current path for the positive half cycle of the voltage of fig. 3 is (a) the current path for the switch state 0110 and (b) the current path for the switch state 1100;
the current path during the negative half cycle of the voltage of fig. 4, (a) is the current path during the switch state 0110, and (b) is the current path during the switch state 0011;
fig. 5 a three-phase topology of a photovoltaic grid-connected inverter ANPC;
FIG. 6 is a diagram of an ANPC module wave-launching state machine;
the current path in the positive half cycle of the voltage of fig. 7, (a) is the current path in the switching state of 010010, (b) is the current path in the switching state of 110000;
in fig. 8, the current path during the negative half cycle of the voltage is (a) the current path in the case where the switching state is 001001, and (b) the current path in the case where the switching state is "000011".
Detailed Description
In order to make the objects and technical solutions of the present invention clearer and easier to understand. The present invention will be described in further detail with reference to the following drawings and examples, wherein the specific examples are provided for illustrative purposes only and are not intended to limit the present invention.
In the description of the present invention, it is to be understood that the terms "first", "second" and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implying any number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present invention, "a plurality" means two or more unless otherwise specified. In the description of the present invention, it should be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art.
Referring to fig. 1, a method for blocking a fault of a photovoltaic grid-connected inverter includes the following steps:
step 1: when the inverter works normally, the output voltage of the single-phase bridge arm is udcWhen the corresponding driving signal state is positive state, when the output voltage of the single-phase bridge arm is 0, the corresponding driving signal state is zero state, and the output voltage of the single-phase bridge arm is-udcAnd when the current driving signal state is a negative state, switching between every two states needs to use a transition state, also called a dead zone state, and the two transition states are different and are marked as a transition state A and a transition state B. The inverter is switched between the five states when the inverter normally works.
Step 2: in the positive half cycle, the driving state of the inverter is switched between two states, a positive state and a zero state. In the negative half cycle, the driving state of the inverter is switched between two states, a negative state and a zero state.
And step 3: at the time of fault wave sealing, the driving state is assumed to be in a positive state, and the wave sealing time sequence is in a positive state- > zero state- > reset state. The wave-sealing time sequence firstly turns off the outer tube, and after the outer tube is continuously turned off for a period of time and the current flowing through the inner tube is reduced, the inner tube is turned off, and the driving state is changed into the reset state.
And 4, step 4: at the fault wave-sealing moment, the driving signal is supposed to be in a negative state, and the wave-sealing time sequence is in the negative state- > zero state- > reset state. The wave-sealing time sequence firstly turns off the outer tube, and after the outer tube is continuously turned off for a period of time and the current flowing through the inner tube is reduced, the inner tube is turned off, and the driving state is changed into the reset state.
Example 1
As shown in fig. 1, the dc bus is connected to an inverter circuit, and the output of the inverter circuit is connected to the grid after LC filtering. The inverter circuit inverts the direct current into alternating current and then sends the alternating current into a power grid. The inverter circuit comprises A, B phases and C phases, wherein each phase comprises a switching tube T1, a switching tube T2, a switching tube T3 and a switching tube T4; the switch tube T1 and the switch tube T4 are outer tubes, and the switch tube T2 and the switch tube T3 are inner tubes. The LC filter circuit comprises an inductor L and a capacitor C.
Fig. 2 is a state machine when the NPC 3L inverter circuit normally operates, and the specific working flow is as follows:
step 1: when the inverter works normally, the output voltage of the single-phase bridge arm is udc/2，0，-udcAnd/2, corresponding driving signals are 1100, 0110 and 0011 in sequence, and transition states 0100 and 0010 are needed for switching between every two states. The inverter is switched between the five states when the inverter normally works. The first position of the driving signal is the working state of the switch tube T1, the second position is the working state of the switch tube T2, the third position is the working state of the switch tube T3, and the fourth position is the working state of the switch tube T4; 1 represents that the switch tube is turned on, and 0 represents that the switch tube is turned off. The drive signal is "1100" meaning: the switch tube T1 and the switch tube T2 are turned on, and the switch tube T3 and the switch tube T4 are turned off.
Step 2: when the photovoltaic grid-connected inverter normally works, in a positive half period, the driving signal switching sequence of the inverter is as follows: "1100" -, a fiber-reinforced composite material>“0100”—>0110, corresponding to an output voltage of udcAnd/2, 0, the corresponding states are: positive state → transition state a → zero state. In the negative half cycle, the driving signal switching sequence of the inverter is as follows: ' 0011>"0010" (transition state B)>"0110", the corresponding state is: positive state → transition state B → zero state, corresponding to output voltage of-udc/2，0。
And step 3: at the time of the fault envelope, assuming that the driving signal is in the state of "1100", the driving signal switches over "1100" - > "0100" (transition state) - > "0110" - > "0000", and the corresponding state is: positive state → transition state a → zero state → reset. The outer tube T1 is first turned off, i.e. first "0100", then the driving signal becomes "0110", after a duration of 15 μ s, the current flowing through the inner tube T2 is reduced, and then the inner tube T2 and the inner tube T3 are turned off, and the driving signal becomes "0000".
And 4, step 4: at the time of fault wave sealing, assuming that the driving signal is in a state of '0011', the driving signal is switched to '0011' > '0010' (transition state) '0110' > '0000', and the corresponding state is as follows: the negative state → the transition state B → the zero state → the reset is to turn off the outer tube T4 first, that is, to turn "0010" first, then the driving signal becomes "0110", and after 15 μ s, the current flowing through the inner tube T3 is reduced, then the inner tube T3 is turned off, and then the driving signal becomes "0000".
Fig. 3 is a current path of the inverter circuit in the positive half cycle. The specific working principle is as follows:
assuming that the inductive current is i, the inductive value is L, and the output voltage of the bridge arm is VinThe voltage of the inverter capacitor C is VinvThen there is
Ldi/dt＝Vin-Vinv (1)
When the switch state is '1100', the bridge arm outputs a voltage VinIs udc/2, inverting capacitor voltage Vinv<udcThe current i at this time flows as shown in fig. 3(b), and flows out through the switching tube T1 — the switching tube T2, and in this state, the absolute value of the inductor current i increases. When the switch state is switched to '0110', the bridge arm outputs a voltage VinIs 0, inverting the capacitor voltage Vinv>0, so that the inductor current i decreases at this time. The current i at this time flows as shown in fig. 3(a), and the current freewheels through the D5-T2 tube.
Fig. 4 shows the current path of the inverter circuit in the negative half cycle, and the specific working principle is as follows:
when the switch state is '0011', the bridge arm outputs a voltage VinIs-udcIn this state, the inductor current i increases, and the current i flows through the switching tube T3 — the switching tube T4 as shown in fig. 4 (b). When the switch state is '0110', the bridge arm outputs a voltage VinIs 0, inverting the capacitor voltage Vinv<0, the absolute value of the inductor current i decreases. The current i at this time flows as shown in fig. 4 (a), and the current freewheels through T3-D6.
Example 2
Fig. 5 is an ANPC (active neutral point clamped) three-level a-phase topology with an inverter circuit comprising A, B and C phases, each phase comprising a switch T1, a switch T2, a switch T3, a switch T4, a switch T5, and a switch T6; the output end of the inverter circuit is connected with an LC filter circuit. The switch tube T1 and the switch tube T4 are outer tubes, and the switch tube T2 and the switch tube T3 are inner tubes. The LC filter circuit comprises an inductor L and a capacitor C. Fig. 6 is a state machine when the ANPC circuit normally works, and the specific working flow is as follows:
step 1: in the positive half period, the output voltage of the single-phase bridge arm is udc2, when the corresponding driving signal is 110000 and is recorded as a state P, and when the output voltage of the single-phase bridge arm is 0, the corresponding driving signal is 010010 and is recorded as a state O +; in the negative half period, the output voltage of the single-phase bridge arm is-udcWhen the driving signal is 001100, the state is recorded as N, and when the output voltage of the single-phase bridge arm is 0, the driving signal is 001001, and the state is recorded as O-. In addition, there are two transition states, "001000" and "010000", "001000" is denoted as transition state C and "010000" is denoted as transition state D, and the inverter is switched between these 6 states during normal operation. The first position of the driving signal is the working state of the switch tube T1, the second position is the working state of the switch tube T2, the third position is the working state of the switch tube T3, and the fourth position is the working state of the switch tube T4; the fifth position is the working state of the switch tube T5, and the sixth position is the working state of the switch tube T6; 1 represents that the switch tube is turned on, and 0 represents that the switch tube is turned off. The drive signal is "110000" meaning: the switch tube T1 and the switch tube T2 are turned on, and the switch tube T3, the switch tube T4, the switch tube T5 and the switch tube T6 are turned off.
Step 2: in the positive half cycle, the driving signal switching sequence of the inverter is: "110000" -)>“010000”—>010010 with output voltage udcAnd/2, 0, the corresponding states are: p-state → transition state C → O + state. During the negative half cycle, the drive signal of the inverter switches "001100" ->“001000”—>"010010", the corresponding state is: n-state → transition state D → O-state, corresponding to an output voltage of-udc/2，0。
And step 3: at the time of fault wave sealing, assuming that the driving signal is in a state of '110000', the switching sequence of the driving signal is as follows: "110000" - "010000" - "010010" - "010000" - "000000" -, the corresponding state is: p-state → transition state C → O + state → transition state C → reset. The switching tube T1 is turned off to be 010000, then the driving signal is changed to be 010010, after the duration lasts for 15ms, the current flowing through the switching tube T2 is reduced, then the switching tube T2 and the switching tube T5 are turned off, and the driving signal is changed to be 000000.
And 4, step 4: at the time of fault wave sealing, the driving signal is assumed to be in a state of '001100', the driving signal switching sequence is '001100' > '001000' > '001001' > '001000' > '000000', and the corresponding states are as follows: n-state → transition state D → O-state → transition state D → reset. The switching tube T4 is turned off to be '001000', then the driving signal is changed to be '001001', after 15ms, the current flowing through the switching tube T3 is reduced, then the switching tube T3 and the switching tube T6 are turned off, and the driving signal is changed to be '000000'.
Fig. 7 is a current path of the inverter circuit in the positive half cycle. The specific working principle is as follows:
when the switch state is '110000', the bridge arm outputs a voltage VinIs udc/2, inverting capacitor voltage Vinv<udcAnd/2, the current i at this time flows as shown in fig. 7 (b), and the current flows out through the switching tubes T1 to T2, and the absolute value of the inductor current i increases in this state. When the switch state is switched to' 010010inIs 0, inverting the capacitor voltage Vinv>0, so that the inductor current i decreases at this time. The current i at this time flows as shown in fig. 7 (a), and the current freewheels through the D5-T2 tube.
Fig. 8 shows the current path of the inverter circuit in the negative half cycle, and the specific working principle is as follows:
when the switch state is '000011', the bridge arm outputs a voltage VinIs-udcIn this state, the inductor current i rises, and the current i flows through T3 to T4 as shown in fig. 8 (b). When the switch state is '001001', the bridge arm outputs a voltage VinIs 0, inverting the capacitor voltage Vinv<0, the absolute value of the inductor current i decreases. The current i at this time flows as shown in fig. 8 (a), and the current freewheels through T3-D6.
The above-mentioned contents are only for illustrating the technical idea of the present invention, and the protection scope of the present invention is not limited thereby, and any modification made on the basis of the technical idea of the present invention falls within the protection scope of the claims of the present invention.
Claims (6)
1. A fault wave blocking method of a photovoltaic grid-connected inverter is characterized in that when the photovoltaic grid-connected inverter breaks down and needs wave blocking, the photovoltaic grid-connected inverter enters a zero state firstly and then carries out wave blocking, so that the photovoltaic grid-connected inverter is in a reset state; the zero state refers to a working state that the output voltage of a three-phase bridge arm of the photovoltaic grid-connected inverter is 0.
2. The method for blocking the fault of the photovoltaic grid-connected inverter according to claim 1, characterized by comprising the following steps:
step 1: when the photovoltaic grid-connected inverter normally works, the photovoltaic grid-connected inverter is switched between a positive state and a zero state in a positive half period; in the negative half period, the driving state of the photovoltaic grid-connected inverter is switched between a negative state and a zero state; when the driving state is a positive state, the output voltage of a single-phase bridge arm of the photovoltaic grid-connected inverter is udcAnd/2, when the driving state is a negative state, the output voltage of a single-phase bridge arm of the photovoltaic grid-connected inverter is-udc/2；
Step 2: at the fault wave sealing moment, when the driving state is in a positive state, the wave sealing time sequence is as follows: the positive state-zero state-reset state, namely, the outer tube of the photovoltaic grid-connected inverter is firstly switched off until the current flowing through the inner tube is reduced, then the inner tube is switched off, and the driving state is changed into the reset state;
at the fault wave sealing moment, when the driving signal is in a negative state, the wave sealing time sequence is as follows: the negative state-zero state-reset state, namely, the outer tube is firstly turned off until the current flowing through the inner tube is reduced, then the inner tube is turned off, and the driving state is changed into the reset state.
3. The method according to claim 2, wherein in the step 2, after the outer tube of the photovoltaic grid-connected inverter is turned off, the current flowing through the inner tube is reduced for a set time t.
4. The fault wave blocking method for the photovoltaic grid-connected inverter is characterized by being applied to a neutral point clamped three-level photovoltaic grid-connected inverter, wherein the neutral point clamped three-level photovoltaic grid-connected inverter comprises an inverter circuit and an LC filter circuit, the inverter circuit comprises A, B and C phases, and each phase comprises a switch tube T1, a switch tube T2, a switch tube T3 and a switch tube T4;
the method comprises the following steps:
step 1: when the inverter normally works, in a positive half period, the driving signal switching sequence of the photovoltaic grid-connected inverter is as follows: 1100 → 0100 → 0110, the corresponding preamble timing state is: positive state → transition state a → zero state; in the negative half cycle, the driving signal switching sequence of the inverter is as follows: 0011 → 0010 → 0110, the corresponding wave-sealing sequence is: positive state → transition state B → zero state; the driving signal comprises four digits, the first digit is the working state of the switch tube T1, the second digit is the working state of the switch tube T2, the third digit is the working state of the switch tube T3, and the fourth digit is the working state of the switch tube T4; 1 represents that the switch tube is switched on, and 0 represents that the switch tube is switched off;
step 2: at the time of fault wave blocking, when the driving signal is 1100, the switching sequence of the driving signal is as follows: 1100 → 0100 → 0110 → 0000, the corresponding states are: positive state → transition state a → zero state → reset; firstly, the switch tube T1 is turned off, and after the time T is set continuously, the switch tube T2 and the switch tube T3 are turned off;
at the time of fault wave sealing, when the driving signal is 0011, the switching sequence of the driving signal is as follows: 0011 → 0010 → 0110 → 0000, the corresponding state is: the negative state → the transition state B → the zero state → the reset, i.e. the switching tube T4 is turned off first, then the switching tube T2 is turned on, and after the set time T, the switching tube T3 and the switching tube T2 are turned off.
5. The method according to claim 4, wherein in the step 2, the set time t is calculated according to formula (1),
Ldi/dt＝Vin-Vinv (1)
wherein i is the inductive current of the photovoltaic grid-connected inverter, L is the inductance value of the inductor in the filter circuit of the photovoltaic grid-connected inverter, and VinFor bridge arm output voltage, VinvThe voltage is the inversion capacitor voltage of the photovoltaic grid-connected inverter.
6. The fault wave blocking method of the photovoltaic grid-connected inverter is characterized by being applied to an active neutral point clamping three-level photovoltaic grid-connected inverter, wherein the active neutral point clamping three-level photovoltaic grid-connected inverter comprises an inverter circuit and an LC filter circuit, the inverter circuit comprises A, B and C phases, and each phase comprises a switch tube T1, a switch tube T2, a switch tube T3, a switch tube T4, a switch tube T5 and a switch tube T6;
the method comprises the following steps:
step 1: in the positive half cycle, the driving signal switching sequence of the inverter is: 110000 → 010000 → 010010 corresponding to output voltage udcAnd/2 or 0, the corresponding states are: p-state → transition state C → O + state; in the negative half cycle, the driving signal switching sequence of the inverter is as follows: 001100 → 001000 → 010010, the corresponding states are: n-state → transition state D → O-state, corresponding to an output voltage of-udcA/2 or 0;
the driving signal comprises six digits, the first digit is the working state of the switch tube T1, the second digit is the working state of the switch tube T2, the third digit is the working state of the switch tube T3, and the fourth digit is the working state of the switch tube T4; the fifth position is the working state of the switch tube T5, and the sixth position is the working state of the switch tube T6; 1 represents that the switch tube is switched on, and 0 represents that the switch tube is switched off; the drive signal 110000 means: the switch tube T1 and the switch tube T2 are switched on, and the switch tube T3, the switch tube T4, the switch tube T5 and the switch tube T6 are switched off;
step 2: at the time of fault wave-sealing, when the driving signal is 110000, the switching sequence of the driving signal is as follows: 110000 → 010000 → 010010 → 010000 → 000000, corresponding to the state: the P state → the transition state C → the O + state → the transition state C → the reset, namely, the switching tube T1 is turned off first, then the switching tube T5 is turned on for a set time, and then the switching tube T2 and the switching tube T5 are turned off;
at the time of fault wave-sealing, when the driving signal is 001100, the switching sequence of the driving signal is as follows: 001100 → 001000 → 001001 → 001000 → 000000, corresponding to the status: n-state → transition state D → O-state → transition state D → reset; the switch tube T4 is turned off first, then the switch tube T6 is turned on, and after the set time is continued, the switch tube T3 and the switch tube T6 are turned off.
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