CN112485697A - High-voltage power supply ripple measurement and analysis system based on phase-locked amplification algorithm - Google Patents
High-voltage power supply ripple measurement and analysis system based on phase-locked amplification algorithm Download PDFInfo
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- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
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Abstract
The invention discloses a high-voltage power supply ripple measurement and analysis system based on a phase-locked amplification algorithm, which comprises a high-voltage input circuit, a blocking amplification circuit, a filter gain compensation circuit, an analog-to-digital conversion circuit and a digital signal processing circuit, wherein the blocking amplification circuit is connected with the high-voltage input circuit; the high-voltage input circuit is used for accessing a signal of a high-voltage power supply to be tested and providing different loads for the high-voltage power supply; the DC blocking amplifying circuit is used for isolating DC high voltage and amplifying AC ripples; the filter gain compensation circuit is used for carrying out frequency band limitation on an analog ripple signal acquired by the amplified alternating current ripple; the analog-to-digital conversion circuit is used for converting the analog ripple wave signal collected by the filter gain compensation circuit into a digital signal; the digital signal processing circuit acquires and processes the obtained digital signal by adopting a phase-locked amplification algorithm. The invention can accurately analyze the ripple condition of the precise high-voltage source and provides a measurement basis for the design and improvement of the precise high-voltage source.
Description
Technical Field
The invention relates to the technical field of precision power supply testing, in particular to a high-voltage power supply ripple measurement and analysis system based on a phase-locked amplification algorithm.
Background
The power supply is an important component in an electronic system, and for a precise electronic system, the ripple of the power supply must be controlled within a range that does not affect the normal operation of the circuit, so that when the power supply is designed, the ripple condition of the power supply needs to be accurately measured and evaluated.
The main sources of power supply ripple generation mainly include the following: firstly, the periodic switching noise generated by the switching of a switching tube possibly existing in a power supply, and the periodic output voltage fluctuation is generated when a capacitor inductor is charged and discharged under the action of the switching tube; the power frequency noise possibly introduced by the front stage is the noise possibly introduced by the indoor high-strength power frequency electromagnetic field, and can also directly enter a circuit of the rear stage through a rectification circuit of the front stage; thirdly, the voltage-current feedback loop may introduce a ripple with a specific frequency, which is related to the response speed of the feedback loop, and the frequency is not too high.
Summarizing the above several main mechanisms of generating the ripple of the switching power supply, we need to limit the measurement bandwidth to about-20 MHz by analog filtering, digital filtering, etc. for the ripple measurement system, and this limitation of the frequency band can reduce the interference of the electromagnetic noise emitted in the space to the measurement system under the condition of reducing the ripple information as much as possible, thereby reducing the ripple condition of the power supply as accurately as possible.
In the design of precision high voltage power supplies, the requirement for ripple is high. At relatively high operating voltages, the ripple should be much smaller than that of conventional power supplies (ripple peak to peak value is less than or equal to 1 mV), for such high voltage and high precision switching power supplies. As disclosed in chinese patent publication No.: CN 108549039 a, published: 2018.09.18, the invention relates to a ripple measurement circuit of switch power supply, which uses high speed comparator and high precision DAC to realize high precision ripple measurement under high frequency, the controller judges the relationship between the output value of DAC and the peak value or valley value of the ripple signal by detecting the existence and width of the pulse signal output by the high speed comparator, and adjusts the output of DAC accordingly, when the controller can not detect the pulse signal of the comparator, the peak value or valley value of the ripple signal is obtained, the two are subtracted to obtain the ripple voltage value.
The traditional detection means is difficult to meet the measurement requirement of the ripple, and the waveform characteristics of the ripple can reflect what kind of defects exist in the power supply design to a certain extent, so that a system for measuring and analyzing the high-voltage low-amplitude ripple is constructed, and the improvement direction of the precise power supply design can be guided reversely to a great extent.
Disclosure of Invention
The invention provides a high-voltage power supply ripple measurement and analysis system based on a phase-locked amplification algorithm, aiming at solving the problem that the traditional detection means is difficult to meet the ripple measurement requirement, and the system can accurately analyze the ripple condition of a precise high-voltage source so as to provide a measurement basis for the design and improvement of the precise high-voltage source.
In order to achieve the purpose of the invention, the technical scheme is as follows: a high-voltage power supply ripple measurement and analysis system based on a phase-locked amplification algorithm comprises a high-voltage input circuit, a blocking amplification circuit, a filter gain compensation circuit, an analog-to-digital conversion circuit and a digital signal processing circuit; wherein the content of the first and second substances,
the high-voltage input circuit is used for accessing a signal of a high-voltage power supply to be tested and providing different loads for the high-voltage power supply so as to realize ripple characteristic measurement under different loads;
the DC blocking amplifying circuit is used for isolating DC high voltage and amplifying AC ripples;
the filter gain compensation circuit is used for carrying out frequency band limitation on an analog ripple signal acquired by the amplified alternating current ripple;
the analog-to-digital conversion circuit is used for converting the analog ripple wave signal collected by the filter gain compensation circuit into a digital signal;
the digital signal processing circuit collects and processes the obtained digital signal by adopting a phase-locked amplification algorithm and further limits the frequency band of the collected digital signal.
Preferably, the high-voltage power supply ripple analysis system further comprises an upper computer ripple analysis device, and the upper computer ripple analysis device further analyzes the result processed by the digital signal processing circuit; and displaying the waveform of the collected ripple signal.
Furthermore, the high-voltage input circuit comprises a high-voltage input joint with protection and an adjustable load circuit formed by connecting a multi-way switch and a power resistor in series;
after the high-voltage input joint with the protection is connected with a high-voltage power supply, the high-voltage input joint is input into the blocking amplification circuit through the adjustable load circuit, and the ripple characteristics under different loads are measured through gating the multi-way switch.
Furthermore, the multi-way switch adopts a plurality of single-pole double-throw relays to be connected in series to realize multi-way selection.
Still further, the blocking amplifying circuit comprises a second-order high-pass filter circuit for filtering high-voltage direct-current signals, an operational amplifier A1 for amplifying alternating-current ripples, a single-pole double-throw relay for preventing overshoot surge from damaging the operational amplifier, a ground resistor, a first proportional amplifying resistor and a second proportional amplifying resistor;
the input end of the second-order high-pass filter circuit is connected to the output end of the high-voltage input circuit; the output end of the second-order high-pass filter circuit is connected with one gating end of the single-pole double-throw relay;
the gating end at the other end of the single-pole double-throw relay is grounded through a grounding resistor;
the central port of the single-pole double-throw relay is connected with the positive input end of an operational amplifier A1;
the first proportional amplifying resistor and the second proportional amplifying resistor are sequentially connected in series to form an output end of the operational amplifier A1;
the negative input end of the operational amplifier A1 is connected between the first proportional amplifying resistor and the second proportional amplifying resistor;
the output end of the operational amplifier A1 transmits the amplified AC ripple signal to the filter gain compensation circuit.
Still further, the filter gain compensation circuit comprises an active high-pass filter circuit and a passive low-pass filter circuit which are sequentially connected in series; the output end of the operational amplifier A1 is connected with the input end of the active high-pass filter circuit; the output end of the passive low-pass filter circuit is connected with the input end of the analog-to-digital conversion circuit.
Still further, the active high-pass filter circuit adopts a 10-order butterworth filter, the 10-order butterworth filter adopts a 5-level Sallen-Key circuit structure, and each level of the Sallen-Key circuit structure comprises an independent gain compensation circuit, so that the amplitude ratio of the output analog signal to the input analog signal is ensured to be 10: 1.
Still further, the Sallen-Key circuit structure comprises a capacitor, a positive feedback resistor, a grounding resistor, an amplifier and a resistor;
one end of the capacitor is connected with the output end of the operational amplifier A1; the other end of the capacitor is sequentially connected with the positive input end of the capacitor and the positive input end of the amplifier;
one end of the positive feedback resistor is connected between the capacitor and the capacitor; the other end of the positive feedback resistor is connected with the output end of the amplifier;
one end of the grounding resistor is connected between the capacitor and the positive input end of the amplifier;
the output end of the amplifier is connected with the output end of the Sallen-Key circuit structure of the next stage; meanwhile, the output end of the amplifier is grounded through the resistor and the resistor in sequence;
the negative input end of the amplifier is connected between the resistor and the resistor.
Still further, the passive low-pass filter circuit adopts a 14 th order elliptic filter, and the characteristic impedance of the passive low-pass filter circuit is 50 omega.
Still further, the analog-to-digital conversion circuit comprises an impedance matching network, a fully differential operational amplifier, a feedback resistor, a filter network, a reference voltage source and an analog-to-digital converter;
the positive input end of the fully differential operational amplifier is connected with the output ends of the impedance matching network and the passive low-pass filter circuit in sequence;
the negative input end of the fully differential operational amplifier is grounded through an impedance matching network;
the negative output end and the positive output end of the fully differential operational amplifier are connected with the analog-to-digital converter through a filter network;
one end of the feedback resistor is connected with the positive input end of the fully differential operational amplifier, and the other end of the feedback resistor is connected with the negative output end of the fully differential operational amplifier;
one end of the feedback resistor is connected with the negative input end of the fully differential operational amplifier, and the other end of the feedback resistor is connected with the positive output end of the fully differential operational amplifier;
the reference voltage source is input into the analog-to-digital converter.
Still further, the digital signal processing circuit comprises a main control chip and a storage unit;
the reading of the sampling data of the analog-to-digital converter by the main control chip is realized by 16-bit parallel differential LVDS; the control word of the main control chip read-write analog-digital converter is transmitted by adopting an SPI (serial peripheral interface) protocol; the main control chip is internally provided with a phase-locked amplification algorithm for analyzing the ripple frequency domain characteristics, so that the received data is processed;
and the storage unit is used for storing the data uploaded by the analog-to-digital converter and the data processed by the main control chip.
The invention has the following beneficial effects:
the principle of the invention is that a series of processing is carried out on a high-voltage power supply signal through a blocking amplification circuit and a filter gain compensation circuit, and ripples are collected and analyzed by a high-speed high-resolution analog-to-digital conversion circuit and a digital signal processing circuit with a built-in phase-locked amplification algorithm, so that the spectrum amplitude information of the ripples can be accurately analyzed. The invention can realize the measurement and analysis of the micro ripple in the precision power supply with higher direct current voltage, and is suitable for the ripple detection scene of the precision high-voltage power supply. Meanwhile, the invention can realize the test of the ripple characteristics of the high-voltage power supply under different load conditions.
Drawings
Fig. 1 is a schematic block diagram of a high-voltage power supply ripple analysis system according to the present embodiment.
Fig. 2 is a circuit connection diagram of the high-voltage input circuit according to the present embodiment.
Fig. 3 is a circuit connection diagram of the dc blocking amplifier circuit according to the present embodiment.
Fig. 4 is a circuit diagram of the active high-pass filter circuit according to the present embodiment.
Fig. 5 is a circuit diagram of the passive low-pass filter circuit according to the present embodiment.
Fig. 6 is a circuit connection diagram of the digital-to-analog conversion circuit according to this embodiment.
Fig. 7 is a circuit connection diagram of the digital processing circuit according to the present embodiment.
Fig. 8 is a schematic diagram illustrating the principle of the phase-locked amplification algorithm according to the present embodiment.
Detailed Description
The invention is described in detail below with reference to the drawings and the detailed description.
Example 1
As shown in fig. 1, a phase-locked amplification algorithm-based high-voltage power supply ripple measurement and analysis system includes a high-voltage input circuit, a dc blocking amplification circuit, a filter gain compensation circuit, an analog-to-digital conversion circuit, and a digital signal processing circuit; wherein the content of the first and second substances,
the high-voltage input circuit is used for accessing a signal of a high-voltage power supply to be tested and providing different loads for the high-voltage power supply so as to realize ripple characteristic measurement under different loads;
the DC blocking amplifying circuit is used for isolating DC high voltage and amplifying AC ripples;
the filter gain compensation circuit is used for carrying out frequency band limitation on an analog ripple signal acquired by the amplified alternating current ripple;
the analog-to-digital conversion circuit is used for converting the analog ripple wave signal collected by the filter gain compensation circuit into a digital signal;
the digital signal processing circuit collects and processes the obtained digital signal by adopting a phase-locked amplification algorithm and further limits the frequency band of the collected digital signal.
In a specific embodiment, the high-voltage power supply ripple analysis system further comprises an upper computer ripple analysis device, and the upper computer ripple analysis device further analyzes the result processed by the digital signal processing circuit; and displaying the waveform of the collected ripple signal.
In a specific embodiment, as shown in the circuit structure in fig. 2, the high-voltage input circuit includes a high-voltage input connector with protection, and an adjustable load circuit formed by connecting a multi-way switch and a power resistor in series; the protected high-voltage input connector 202 includes one of a triaxial interface with a shell connected to a protected ground and a double-coaxial interface with a shell connected to a protected ground. The high-voltage input connector 202 with protection connects the high-voltage power supply signal 201 to be measured into the high-voltage power supply ripple analysis system. When the high-voltage power supply to be measured enters the high-voltage power supply ripple analysis system, the adjustable load circuit 203 is formed by connecting a multi-way switch and a power resistor in series. The embodiment can test the ripple characteristics of the high-voltage power supply under different load conditions. In a specific embodiment, the gating of the multi-way switch is controlled by a digital signal processing circuit. The withstand voltage of the dual coaxial interface described in this embodiment is usually about 1500V, the multi-way switch should select the single-pole double-throw relay to be connected in series to realize the function of multi-way selection, except for realizing the logic of multi-way gating, it can also meet the requirement of high voltage input withstand voltage, the two-stage single-pole double-throw switches are connected in series, that is, four-way multi-way selection switches can be realized, and the withstand voltage value is 600V × 2 ═ 1200V. The highest resistance value should be selected when the multi-way switch is electrified, and the power source to be tested is prevented from being damaged by overload in the electrifying process.
In a specific embodiment, as shown in fig. 3, the dc blocking amplifier circuit includes a second-order high-pass filter circuit composed of a second-order RC circuit, an operational amplifier a1 for amplifying ac ripple, a single-pole double-throw relay 308 for preventing overshoot surge from damaging the operational amplifier, a ground resistor 305, a first proportional amplifying resistor 306, and a second proportional amplifying resistor 307; the second-order high-pass filter circuit is used for filtering high-voltage direct-current signals, the bandwidth of the signals to be admitted is limited to 10Hz to 20MHz due to the characteristic of ripple measurement, and the-3 dB frequency point of the second-order high-pass filter circuit in the DC blocking amplifying circuit is set to 10 Hz.
The input end of the second-order high-pass filter circuit is connected to the output end of the high-voltage input circuit; the output end of the second-order high-pass filter circuit is connected with one gating end of the single-pole double-throw relay 308;
the other end gating end of the single-pole double-throw relay 308 is grounded through a grounding resistor 305;
the central port of the single-pole double-throw relay 308 is connected with the positive input end of an operational amplifier A1;
the first proportional amplifying resistor 306 and the second proportional amplifying resistor 307 are sequentially connected in series to the output end of the operational amplifier A1;
the negative input end of the operational amplifier A1 is connected between the first proportional amplifying resistor 306 and the second proportional amplifying resistor 307;
the output end of the operational amplifier A1 transmits the amplified AC ripple signal to the filter gain compensation circuit.
The single pole double throw relay 308 should gate one end of the ground resistor 305 in order to prevent the overshoot surge from damaging the operational amplifier 309 when the external high voltage is input. The withstand voltage of the single-pole double-throw relay 308 should be greater than the maximum value of the input voltage, and only after the surge is stabilized during power-on, the port of the second-order high-pass filter circuit should be connected to the positive input terminal of the operational amplifier 309, and therefore, only after the power-on, about 0.5-1s, the second-order high-pass filter circuit should be connected to the positive input terminal of the operational amplifier 309, and the first proportional amplifying resistor 306 and the second proportional amplifying resistor 307 determine the amplification factor of the isolation amplifying circuit, and if the resistance value of the first proportional amplifying resistor 306 is R1 and the resistance value of the second proportional amplifying resistor 307 is R2, the amplification factor is:
the operational amplifier 309 selected in the dc blocking amplifying circuit should be an operational amplifier with low voltage noise, and the amplification factor should be as large as possible within the allowable range of the bandwidth, and the selection of the operational amplifier 309 should focus on the parameter of gain bandwidth product, in this embodiment, a signal within 20M needs to be amplified by 100 times, so the gain bandwidth product at least needs to reach 2GHz, an ultra-low distortion high-speed operational amplifier AD8099 of ADI company can be used, the gain bandwidth product can reach 3.8GHz, the gain of 20MHz is about 45dB, and is slightly larger than 100 times, thereby meeting the design requirement. The signal amplified by the blocking amplifying circuit enters a post-stage filter gain compensation circuit to more accurately limit the signal bandwidth. As shown in fig. 3, the parameters of the two-stage RC filtering in the second-order high-pass filtering circuit are: the capacitance 301 is 15.7uF, the resistance 302 is 1k Ω, the capacitance 303 is 15.7uF, and the resistance 304 is 1k Ω.
In a specific embodiment, as shown in fig. 4 and 5, the present embodiment needs to construct a filter gain compensation circuit of 10Hz to 20MHz, because factors such as the complexity of the hardware structure and the characteristics of the filter are considered. The filter gain compensation circuit comprises an active high-pass filter circuit and a passive low-pass filter circuit which are sequentially connected in series; the output end of the operational amplifier A1 is connected with the input end of the active high-pass filter circuit; the output end of the passive low-pass filter circuit is connected with the input end of the analog-to-digital conversion circuit.
As shown in fig. 4, the active high-pass filter circuit will use a 10-order butterworth filter, and the 10-order butterworth filter is characterized by small passband ripple and a steep drop of 6dB per frequency multiplication, so that when the passband-3 dB frequency point is set to 10Hz and the stopband-60 dB frequency point is set to 5Hz, the filter order is easily estimated to be 10 orders. The 10-order Butterworth filter adopts a five-level Sallen-Key circuit structure, and each level of Sallen-Key circuit structure comprises an independent gain compensation circuit so as to compensate the influence of an undesirable device on a filtered waveform and ensure that the amplitude ratio of an output analog signal to an input analog signal is 10: 1.
In a specific embodiment, taking the first stage as an example, as shown in fig. 4, the Sallen-Key circuit structure includes a capacitor 401, a capacitor 403, a positive feedback resistor 402, a ground resistor 404, an amplifier 405, a resistor 406, and a resistor 407;
one end of the capacitor 401 is connected with the output end of the operational amplifier A1; the other end of the capacitor 401 is sequentially connected with the positive input ends of the capacitor 403 and the amplifier 405;
one end of the positive feedback resistor 402 is connected between the capacitor 401 and the capacitor 403; the other end of the positive feedback resistor 402 is connected to the output end of the amplifier 405;
one end of the grounding resistor 404 is connected between the capacitor 403 and the positive input end of the amplifier 405;
the output end of the amplifier 405 is connected with the output end of the Sallen-Key circuit structure of the next stage; meanwhile, the output end of the amplifier 405 is grounded through a resistor 406 and a resistor 407 in sequence;
the negative input terminal of the amplifier 405 is connected between the resistor 406 and the resistor 407.
In addition, the resistor 406 and the resistor 407 are scaling resistors of the operational amplifier, which determine the amplification factor of the operational amplifier 405, for example, the structure of the first-stage Sallen-Key active high-pass filter has five stages in total, and the circuit structures thereof are identical, but the parameters of the selected devices are different. Preferably, the ideal parameters of the devices selected in the active high-pass filter circuit are shown in table 1, and should be adjusted according to the actual conditions of the waveforms during use:
TABLE 1 parameter table of active high-pass filter circuit
In a specific embodiment, the passive low-pass filter circuit adopts a 14-order elliptical filter, the passband-3 dB frequency point is 20MHz, the stopband-60 dB frequency point is set to 20.5MHz, and since the steep drop of the butterworth filter is small and the set attenuation index cannot be reached with a small number of orders, the structure of the low-pass filter is finally realized by adopting the filter with the largest steep drop, namely the elliptical filter. The structure of the whole circuit can be regarded as a multi-stage passive device filter network with a parallel structure of an inductor and a capacitor connected in series with the capacitor, as shown in the structure of fig. 5. The resistor 501 is an impedance matching resistor, the characteristic impedance of the passive low-pass filter circuit is 50 Ω, and the high-speed high-resolution analog-to-digital conversion circuit at the later stage also needs an impedance matching network for matching the output impedance of 50 Ω, so that the reflection of signals is reduced. The parameters of the 14 th order elliptic filter are shown in table 2:
table 214 order elliptic filter circuit parameter table
| Reference numerals | Device type | Parameters or |
|
| 501 | Resistance (RC) | 50Ω | |
| 502 | Inductance | 312.2 |
|
| 503 | Capacitor with a capacitor element | 169.9 |
|
| 504 | Inductance | 399.5 |
|
| 505 | Capacitor with a capacitor element | 94.18 |
|
| 506 | Capacitor with a capacitor element | 127.4 |
|
| 507 | Inductance | 212.2 |
|
| 508 | Capacitor with a capacitor element | 267.9 |
|
| 509 | Capacitor with a capacitor element | 71.77 |
|
| 510 | | 134nH | |
| 511 | Capacitor with a capacitor element | 453.4 |
|
| 512 | Capacitor with a capacitor element | 61.15 |
|
| 513 | Inductance | 158.3 |
|
| 514 | Capacitor with a capacitor element | 377.1 |
|
| 515 | Capacitor with a capacitor element | 95.54 |
|
| 516 | Inductance | 291.1 |
|
| 517 | Capacitor with a capacitor element | 173.1 |
|
| 518 | Capacitor with a capacitor element | 169.7 |
|
| 519 | Inductance | 458.7 |
|
| 520 | Capacitor with a capacitor element | 38.95 |
|
| 521 | Capacitor with a capacitor element | 90.91pF |
In a specific embodiment, as shown in fig. 6, the bandwidth of the ripple signal measured in this embodiment is designed to be 10Hz-20MHz, and in order to fully ensure the fidelity of the content of the restored signal, the signal at the highest frequency is required to be acquired within 10 points in one period, that is, the sampling rate fSAccording to the calculation result, an integrated high-speed high-precision pipelined analog-to-digital converter LTC2107 by ADI may be used, the precision of the analog-to-digital converter 607 is 16 bits, the sampling speed is the previous stage of the analog-to-digital converter 607, a high-precision single-ended differential-to-differential structure is required, the single-ended ground waveform output by the filtering and gain compensation circuit is converted into a differential input, the core structure is a fully differential operational amplifier 605, and according to the required signal bandwidth of 20MHz, the fully differential operational amplifier 605 selects ADA4945-1 by ADI, the-3 dB bandwidth of which is 60MHz is greater than the set signal frequency upper limit of 20MHz, and can be used normally.
The analog-to-digital conversion circuit described in this embodiment includes an impedance matching network 601, an impedance matching network 602, a fully differential operational amplifier 605, a feedback resistor 603, a feedback resistor 604, a filter network 606, a reference voltage source 608, and an analog-to-digital converter 607;
the positive input end of the fully differential operational amplifier 605 is connected with the output ends of the impedance matching network 601 and the passive low-pass filter circuit in sequence;
the negative input terminal of the fully differential operational amplifier 605 is grounded through the impedance matching network 602;
the negative output end and the positive output end of the fully differential operational amplifier 605 are connected with an analog-to-digital converter 607 through a filter network 606;
one end of the feedback resistor 603 is connected with the positive input end of the fully differential operational amplifier 605, and the other end of the feedback resistor 603 is connected with the negative output end of the fully differential operational amplifier 605;
one end of the feedback resistor 604 is connected with the negative input end of the fully differential operational amplifier 605, and the other end of the feedback resistor 604 is connected with the positive output end of the fully differential operational amplifier 605;
the reference voltage source 608 is input to the analog-to-digital converter 607.
The feedback resistor 603 and the feedback resistor 604 are used for matching the amplification factor of the differential transmission, and the amplification factor is 2 according to the input impedance matching. The filter network 606 is a low-pass filter composed of a resistor and a capacitor, and is used for limiting the bandwidth of the input signal, which is limited to 20 MHz. The reference voltage source 608, which is required to be a low temperature drift reference voltage source, may have a filter network before being input to the analog-to-digital converter in order to limit noise thereof, which is beneficial to further reduce noise of the reference voltage source.
In a specific embodiment, the digital signal processing circuit includes a main control chip, a storage unit; the main control chip is internally provided with a phase-locked amplification algorithm for analyzing the ripple frequency domain characteristics, so that the received data is processed; as shown in the circuit structure in fig. 7, the main control chip adopted by the digital signal processing circuit of this embodiment is a high-end FPGA chip, and the FPGA chip is very suitable for high-speed digital signal reading, writing and processing due to its rich interface and hardware resources and easy realization of parallel instructions. In the embodiment, a ZYNQ-7000 series FPGA chip is adopted, and a hardware processing structure matched with an FPGA and an ARM is contained in the ZYNQ-7000 series FPGA chip. According to the type selection of the preceding stage analog-to-digital converter, the analog-to-digital converter 607 and the sampling data of the main control chip are realized by 16-bit parallel differential LVDS, and the control word of the main control chip for reading and writing the analog-to-digital converter adopts an SPI interface protocol. And the storage unit is used for storing the data uploaded by the analog-to-digital converter and the data processed by the main control chip. After the data enters a storage unit in the FPGA chip, the data is stored in two 1GB, 1033MHz DDR3 internal memories 704. However, after the upper computer ripple analysis device communicates with the main control chip 702, the data stored in the DDR3 is sent to the upper computer ripple analysis device through the high-speed bus.
The power supply and the clock of the high-voltage power supply ripple analysis system described in this embodiment are provided by the special circuit 703, and the power supply is required to meet the current requirement of the chip under the highest computational power, and the power supply ripple of the power supply cannot influence the normal function of the digital circuit. For a clock circuit, parameters such as clock jitter, deflection and the like are required to be as small as possible, a temperature compensation crystal oscillator can be used as an external clock source, and frequency multiplication is carried out by an FPGA internal phase-locked loop and is distributed to a high-voltage power supply ripple analysis system.
In a specific embodiment, as shown in fig. 8, the digital algorithm of the present embodiment, which is most important for the ripple characteristic analysis, is the lock-in amplification algorithm, and the mathematical principle thereof is the product and difference formula of the trigonometric functions, that is:
the principle of the phase-locked amplification algorithm is that the digital signal of the high-voltage power supply signal to be detected is multiplied by the digital sine signal and the digital cosine signal of the set reference voltage source respectively, and the following signal components are assumed to exist in the signal to be detected at the reference frequency:
S(t)＝Aisin(ωt+φ)
where, ω is the signal component of the signal to be measured with the same frequency as the reference signal, φ is the phase difference between the signal and the reference signal, AiFor the amplitude of the signal with the same frequency as the reference signal in the signal to be measured, the digital sine signal and the reference cosine signal of the reference voltage source can be known as follows:
S_REF_0＝Arcos(ωt)
S_REF_1＝Arsin(ωt)
according to the above derived product and difference formula, when the signal to be measured is multiplied by the reference signal, the following formula can be obtained, and in fig. 8, 802 and 805 are digital multipliers, which can multiply the digital sinusoidal signal by the signal to be measured:
in the formula, the signal containing 2 ω t is a high frequency signal, which can be filtered OUT by using a digital low pass filter 803 and 806, and the filtered signal is assumed to be S _ OUT _0 and S _ OUT _1, which are respectively equal to:
the filtered signal only contains values related to amplitude and phase, and the amplitude and phase information of the signal to be measured can be known by using the calculation formulas of square summation and arctan:
in the measurement process, the amplitude of different frequency points in the ripple signal can be solved by adopting a method of sweeping frequency of the reference signalTherefore, accurate analysis of ripple signal frequency domain information is achieved, and meanwhile, measurement accuracy can be greatly improved by adopting the method, because the correlation between signals of other frequencies except common-frequency signals and reference signals is extremely weak, a concept R of a cross-correlation function needs to be introduced for the method12，R12Is defined as:
assuming that the reference signal and the sinusoidal signal to be measured are different in frequency, the reference signal and the sinusoidal signal to be measured are respectively:
Si(t)＝Aisin(ω1t+φ1)
Sr(t)＝Arsin(ω2t+φ2)
then combining the above two sets of equations can obtain:
from the above formula, when ω is1＝ω2In the case of this, the limit of the integral value of the above expression is not 0. The method is characterized in that the method is a low-pass filter, so when the reference signal and the sinusoidal signal to be measured have the same frequency, the correlation is highest, the correlation coefficient is not 0, the product of the signal to be measured and the reference signal is summed for a period of time, the information of other frequency bands can be filtered, and only the amplitude and phase information of the frequency point to be measured is reserved. The above is the core content of the phase-locked amplification algorithm.
After the digital signal processing circuit collects the digital signal output by the analog-to-digital conversion structure, the sampling signal needs to be transmitted to the upper computer ripple wave analysis device 705 in time according to the instruction of the upper computer ripple wave analysis device for further mathematical statistical processing, and meanwhile, because the transmission data volume in a short time is very large, the communication between the main control chip and the upper computer ripple wave analysis device needs to use high-speed communication protocols such as PCIe, Ethernet, USB and the like. The upper computer ripple analysis device of this embodiment needs to be able to carry out real-time show and statistics to the signal of transmission, and the statistics content includes ripple maximum and minimum value (peak-to-peak value), ripple effective value, ripple frequency isoparametric in a period of time. Meanwhile, the upper computer ripple wave analysis device can call a phase-locked amplification algorithm of a hardware circuit main control chip to calculate the frequency spectrum information of the ripple waves in real time, and can also display the waveform of the collected ripple wave signals.
According to the above high-voltage power supply ripple analysis system, the total amplification factor is 2000 times, if the amplitude of the input ripple signal is 1mV, the ripple signal finally entering the analog-to-digital converter is about 2V, and the SNR of the LTC2107 analog-to-digital converter is about 80dB, and its ENOB ═ 80-1.76)/6.02 ≈ 13bit, the AD resolution is 2.5V/2^13 ≈ 305uV, and equivalently, the true resolution for the ripple is 305uV/2000 ≈ 152.6 nV. The resolution can better present the waveform condition of 10uV-1mV ripple.
It should be understood that the above-described embodiments of the present invention are merely examples for clearly illustrating the present invention, and are not intended to limit the embodiments of the present invention. Any modification, equivalent replacement, and improvement made within the spirit and principle of the present invention should be included in the protection scope of the claims of the present invention.
Claims (11)
1. The utility model provides a high voltage power supply ripple measures analytic system based on lock-in amplification algorithm which characterized in that: the high-voltage power supply ripple analysis system comprises a high-voltage input circuit, a blocking amplification circuit, a filtering gain compensation circuit, an analog-to-digital conversion circuit and a digital signal processing circuit; wherein the content of the first and second substances,
the high-voltage input circuit is used for accessing a signal of a high-voltage power supply to be tested and providing different loads for the high-voltage power supply so as to realize ripple characteristic measurement under different loads;
the DC blocking amplifying circuit is used for isolating DC high voltage and amplifying AC ripples;
the filter gain compensation circuit is used for carrying out frequency band limitation on an analog ripple signal acquired by the amplified alternating current ripple;
the analog-to-digital conversion circuit is used for converting the analog ripple wave signal collected by the filter gain compensation circuit into a digital signal;
the digital signal processing circuit collects and processes the obtained digital signal by adopting a phase-locked amplification algorithm and further limits the frequency band of the collected digital signal.
2. The system for measuring and analyzing the ripple of the high-voltage power supply based on the phase-locked amplification algorithm according to claim 1, wherein: the high-voltage power supply ripple analysis system also comprises an upper computer ripple analysis device, and the upper computer ripple analysis device further analyzes the result processed by the digital signal processing circuit; and displaying the waveform of the collected ripple signal.
3. The system for measuring and analyzing the ripple of the high-voltage power supply based on the phase-locked amplification algorithm according to claim 2, wherein: the high-voltage input circuit comprises a high-voltage input joint with protection and an adjustable load circuit formed by connecting a multi-way switch and a power resistor in series;
after the high-voltage input joint with the protection is connected with a high-voltage power supply, the high-voltage input joint is input into the blocking amplification circuit through the adjustable load circuit, and the ripple characteristics under different loads are measured through gating the multi-way switch.
4. The system for measuring and analyzing the ripple of the high-voltage power supply based on the phase-locked amplification algorithm according to claim 3, wherein: the multi-way switch realizes multi-way selection by connecting a plurality of single-pole double-throw relays in series.
5. The system for measuring and analyzing the ripple of the high-voltage power supply based on the phase-locked amplification algorithm according to claim 4, wherein: the blocking amplification circuit comprises a second-order high-pass filter circuit for filtering high-voltage direct-current signals, an operational amplifier A1 for amplifying alternating-current ripples, a single-pole double-throw relay for preventing overshoot surge from damaging the operational amplifier, a ground resistor (305), a first proportional amplification resistor (306) and a second proportional amplification resistor (307);
the input end of the second-order high-pass filter circuit is connected to the output end of the high-voltage input circuit; the output end of the second-order high-pass filter circuit is connected with one gating end of the single-pole double-throw relay;
the gating end at the other end of the single-pole double-throw relay is grounded through a grounding resistor (305);
the central port of the single-pole double-throw relay is connected with the positive input end of an operational amplifier A1;
the first proportional amplifying resistor (306) and the second proportional amplifying resistor (307) are sequentially connected in series to the output end of the operational amplifier A1;
the negative input end of the operational amplifier A1 is connected between the first proportional amplifying resistor (306) and the second proportional amplifying resistor (307);
the output end of the operational amplifier A1 transmits the amplified AC ripple signal to the filter gain compensation circuit.
6. The system for measuring and analyzing the ripple of the high-voltage power supply based on the phase-locked amplification algorithm according to claim 5, wherein: the filter gain compensation circuit comprises an active high-pass filter circuit and a passive low-pass filter circuit which are sequentially connected in series; the output end of the operational amplifier A1 is connected with the input end of the active high-pass filter circuit; the output end of the passive low-pass filter circuit is connected with the input end of the analog-to-digital conversion circuit.
7. The system for measuring and analyzing the ripple of the high-voltage power supply based on the phase-locked amplification algorithm according to claim 6, wherein: the active high-pass filter circuit adopts a 10-order Butterworth filter, the 10-order Butterworth filter adopts a 5-level Sallen-Key circuit structure, each level of Sallen-Key circuit structure comprises an independent gain compensation circuit, and the amplitude ratio of an output analog signal to an input analog signal is guaranteed to be 10: 1.
8. The system for measuring and analyzing the ripple of the high-voltage power supply based on the phase-locked amplification algorithm according to claim 7, wherein: the Sallen-Key circuit structure comprises capacitors (401, 403), a positive feedback resistor (402), a grounding resistor (404), an amplifier (405) and resistors (406, 407);
one end of the capacitor (401) is connected with the output end of the operational amplifier A1; the other end of the capacitor (401) is sequentially connected with the positive input end of the capacitor (403) and the positive input end of the amplifier (405);
one end of the positive feedback resistor (402) is connected between the capacitor (401) and the capacitor (403); the other end of the positive feedback resistor (402) is connected with the output end of the amplifier (405);
one end of the grounding resistor (404) is connected between the capacitor (403) and the positive input end of the amplifier (405);
the output end of the amplifier (405) is connected with the output end of the Sallen-Key circuit structure of the next stage; meanwhile, the output end of the amplifier (405) is grounded through a resistor (406) and a resistor (407) in sequence;
the negative input end of the amplifier (405) is connected between the resistor (406) and the resistor (407).
9. The system for measuring and analyzing the ripple of the high-voltage power supply based on the phase-locked amplification algorithm according to claim 8, wherein: the passive low-pass filter circuit adopts a 14-order elliptic filter, and the characteristic impedance of the passive low-pass filter circuit is 50 omega.
10. The system for measuring and analyzing the ripple of the high-voltage power supply based on the phase-locked amplification algorithm according to claim 9, wherein: the analog-to-digital conversion circuit comprises impedance matching networks (601, 602), a fully differential operational amplifier (605), feedback resistors (603, 604), a filter network (606), a reference voltage source (608) and an analog-to-digital converter (607);
the positive input end of the fully differential operational amplifier (605) is connected with the output ends of the impedance matching network (601) and the passive low-pass filter circuit in sequence;
the negative input end of the fully differential operational amplifier (605) is grounded through an impedance matching network (602);
the negative output end and the positive output end of the fully differential operational amplifier (605) are connected with an analog-to-digital converter (607) through a filter network (606);
one end of the feedback resistor (603) is connected with the positive input end of the fully differential operational amplifier (605), and the other end of the feedback resistor (603) is connected with the negative output end of the fully differential operational amplifier (605);
one end of the feedback resistor (604) is connected with the negative input end of the fully differential operational amplifier (605), and the other end of the feedback resistor (604) is connected with the positive output end of the fully differential operational amplifier (605);
the reference voltage source (608) is input into the analog-to-digital converter (607).
11. The system for measuring and analyzing the ripple of the high-voltage power supply based on the phase-locked amplification algorithm according to claim 10, wherein: the digital signal processing circuit comprises a main control chip and a storage unit;
the reading of the sampling data of the analog-to-digital converter by the main control chip is realized by 16-bit parallel differential LVDS; the control word of the main control chip read-write analog-digital converter is transmitted by adopting an SPI (serial peripheral interface) protocol; the main control chip is internally provided with a phase-locked amplification algorithm for analyzing the ripple frequency domain characteristics, so that the received data is processed;
and the storage unit is used for storing the data uploaded by the analog-to-digital converter and the data processed by the main control chip.
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| CN116818795A (en) * | 2023-08-31 | 2023-09-29 | 中国地质大学（武汉） | Pipeline photoelectric nondestructive testing system |
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| CN116818795A (en) * | 2023-08-31 | 2023-09-29 | 中国地质大学（武汉） | Pipeline photoelectric nondestructive testing system |
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