CN112311398B - Method and system for doubling generation rate of DDS (direct digital synthesizer) digital signal - Google Patents
Method and system for doubling generation rate of DDS (direct digital synthesizer) digital signal Download PDFInfo
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/66—Digital/analogue converters
- H03M1/661—Improving the reconstruction of the analogue output signal beyond the resolution of the digital input signal, e.g. by interpolation, by curve-fitting, by smoothing
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks
Abstract
The invention discloses a method and a system for doubling the generation rate of DDS digital signals, wherein the system is used for matching a DAC based on four-switch structure double-edge conversion, and comprises the following steps: under the double-edge mode, outputting the digital signal generated by the digital signal generating unit to an interpolation filtering module, and realizing the speed doubling conversion of the digital signal through interpolation filtering processing to obtain a digital signal to be modulated; frequency modulation is carried out on the digital signal to be modulated by adopting a frequency modulation signal, so that a digital signal after frequency modulation is obtained and is output to the DAC module, and the double data conversion rate of the four-switch DAC module in the double-edge mode is realized; the DDS structure designed by the invention realizes the data output of the DA converter 12GSPS by utilizing a scheme of adding an interpolation filter and modulation, and has the advantages of being capable of matching a DAC double-working mode and saving hardware resources.
Description
Technical Field
The invention relates to a digital communication system, in particular to a method and a system for doubling the generation rate of DDS digital signals, wherein the system is used for matching a DAC (digital to analog converter) based on double-edge conversion of a four-switch structure.
Background
The current steering DAC converter is used for controlling current sources of corresponding weights to realize current addition to form analog output current after decoding the input digital codes, and converting the input digital code values into analog output quantities. According to the switch control mode and the different weights of the current sources, the three structures can be divided: binary decoding structure, thermometer decoding structure, and segment decoding structure.
With the iterative updating of digital communication systems today, there is a higher demand for communication rates, and in order to accommodate this demand, the DAC converters in the system need to achieve higher conversion rates. To achieve higher conversion rates, four-switch-structure DAC converters have been developed, the structure of which is shown in fig. 1: the control signals G1, G2, G3, G4 of the four switches are obtained by performing a logical and operation on the input complementary data D, DB and the differential clock signals CLK, CLKN, and respectively control on and off of the four switching tubes M1, M2, M3, M4. The switch outputs controlled by signals G1 and G4 are connected together and output to a differential current IOUTP, and when input data D is high, the current flows through the IOUTP terminal; the switch outputs controlled by signals G2, G3 are connected together to output a differential current IOUTN through which current flows when the input data D is low. The switch control signal has only one switch conducted every half clock period, and two switch control signals are switched every half clock period no matter whether data change or not. Whether the differential output current changes is determined by the input data, but by the toggling frequency clock signal of the switch control signal. The specific timing diagram is shown in fig. 2, and accordingly, two operation modes exist in the four-switch DAC structure, namely, a single-edge mode that is updated by using a rising edge or a falling edge of a clock, or a double-edge mode that is updated once by using a rising edge and a falling edge of a clock.
Because the four-switch clock has two working modes of single and double edges, under ideal conditions, the conversion rate of the DAC in the double-edge mode can be doubled by reasonably designing the DDS structure at the front end of the DAC so that the DDS structure can be matched with the corresponding double-edge working mode of the four-switch DAC structure. Therefore, how to design a DDS structure to match two operation modes of a four-switch DAC structure and to realize doubling of the data conversion rate of the four-switch DAC structure when the four-switch DAC structure is operated in the dual-edge mode is an urgent problem to be solved. Specifically, the design of the DDS structure involves not only hardware programming, but also specific hardware resource selection and consumption issues.
Disclosure of Invention
The invention aims to solve the problem that a DDS structure in the prior art is matched with two working modes of a four-switch DAC structure and double the data conversion rate of the four-switch DAC structure in a double-edge mode, and provides a method and a system for matching the double generation rate of a DDS digital signal based on the DAC of the four-switch structure, wherein the method realizes the double rate conversion of the digital signal by interpolation filtering processing on a group of digital signals generated by a digital signal generating unit, so as to obtain a digital signal to be modulated; and carrying out frequency modulation on the digital signal to be modulated by adopting a frequency modulation signal, and outputting the digital signal after frequency modulation to the DAC module so as to realize doubling of the data conversion rate of the four-switch DAC module in the double-edge mode.
In order to achieve the above object, the present invention provides the following technical solutions:
a method of doubling the generation rate of a DDS digital signal, comprising:
performing interpolation filtering processing on a group of digital signals generated by the digital signal generating unit to realize speed doubling conversion of the digital signals and obtain digital signals to be modulated;
and carrying out frequency modulation on the digital signal to be modulated by adopting a frequency modulation signal, and outputting the modulated digital signal to a DAC module so as to realize double data conversion rate of the DAC module in a double-edge mode, wherein the DAC module has a four-switch structure.
Preferably, the frequency modulation is modulated according to the following formula:
wherein ,for the digital signal to be modulated, < > for>Is a frequency modulated signal.
Preferably, the frequency modulation signal is a 3GHz modulation signal.
In a further embodiment of the present invention, a system for doubling the generation rate of a DDS digital signal by using the method for doubling the generation rate of a DDS digital signal is provided, where the system is connected to a DAC module with a four-switch structure, and includes: the device comprises a digital signal generation unit, an interpolation filter unit, a modulation signal generation unit and a signal synthesis unit;
the digital signal generation unit is used for generating a digital signal, and a first output end of the digital signal generation unit is connected with an input end of the interpolation filter unit so as to output the generated digital signal to the interpolation filter unit in a double-edge mode;
the interpolation filter unit can perform interpolation filtering processing on the received digital signal and realize the speed doubling conversion of the digital signal to obtain a digital signal to be modulated; the output end of the interpolation filter unit is connected with the first input end of the signal synthesis unit so as to output the digital signal to be modulated to the signal synthesis unit;
the output end of the modulation signal generation unit is connected with the second input end of the signal synthesis unit and is used for generating a frequency modulation signal and outputting the digital signal to be modulated to the signal synthesis unit;
the signal synthesis unit is used for receiving the digital signal to be modulated and the frequency modulation signal, carrying out frequency modulation on the digital signal to be modulated by utilizing the frequency modulation signal so as to expand the frequency domain of the signal to be modulated, and outputting the modulated digital signal to the four-switch structure DAC module;
the second output end of the digital signal generating unit is connected with the input end of the DAC module of the four-switch structure so as to output the generated digital signal to the DAC module in a single-edge mode.
Preferably, the digital signal generating unit adopts an eight-path parallel structure, wherein each path of data rate is 750M.
Preferably, the interpolation filter unit is an n-order half-band filter.
Preferably, the normalized passband cut-off frequency in the first nyquist bandwidth of the half-band filter is 0.3.
In a further embodiment of the invention, a chip is provided, which includes the above system for doubling the DAC data rate.
Compared with the prior art, the invention has the beneficial effects that:
1. the system (DDS structure) designed by the invention comprises a single-edge mode and a double-edge mode, when the system works in the single-edge mode, digital signals generated by the digital signal generating unit are directly output to the DAC module of the four-switch structure so as to meet the requirement of the DAC module of the four-switch structure on the single-edge mode; when the system works in the double-edge mode, interpolation filtering processing is carried out on the digital signals generated by the digital signal generating unit, so that the speed multiplying speed conversion of the digital signals is realized, and the digital signals to be modulated are obtained; frequency modulation is carried out on the digital signal to be modulated by adopting a frequency modulation signal, the frequency domain of the digital signal after frequency modulation is expanded, and finally the modulated signal is output to the DAC module, so that the double of the data conversion rate of the four-switch DAC module in the double-edge mode can be realized; the DDS structure designed by the invention realizes the data output of the DA converter 12GSPS by utilizing a scheme of adding an interpolation filter and modulation, and has the advantages of being capable of matching a DAC double-working mode and saving hardware resources.
2. According to the scheme, the digital signal generating unit adopts an 8-path parallel structure, each path of speed is 750M, and an interpolation filter is added to generate the 12GSPS digital signal, so that a large amount of hardware resources can be saved.
3. The 3GHz modulation scheme adopted by the invention is beneficial to data processing under a 12GHz sampling clock.
Description of the drawings:
fig. 1 is a four-switch structure DAC according to an exemplary embodiment of the invention.
Fig. 2 is a timing diagram of a four-switch structure DAC according to an exemplary embodiment of the invention.
Fig. 3 shows a schematic block diagram of a system for doubling the DDS digital signal generation rate for matching a four switch structure DAC according to an exemplary embodiment of the invention.
Fig. 4 shows a schematic diagram of a circuit structure in a system dual edge mode for doubling the DDS digital signal generation rate for matching a four switch structure DAC according to an exemplary embodiment of the invention.
Fig. 5 shows a frequency modulation signal generation diagram of a modulation signal generation unit (dual edge mode) in a system for doubling the DDS digital signal generation rate matching a four switch structure DAC according to an exemplary embodiment of the invention.
Fig. 6 shows a system dual edge mode spectral shift schematic for matching double the DDS digital signal generation rate of a four switch structure DAC according to an exemplary embodiment of the invention.
Detailed Description
The present invention will be described in further detail with reference to test examples and specific embodiments. It should not be construed that the scope of the above subject matter of the present invention is limited to the following embodiments, and all techniques realized based on the present invention are within the scope of the present invention.
Example 1
Fig. 3 shows a DDS digital signal generation rate doubling system according to an exemplary embodiment of the present invention, the system being configured to be connected to a four-switch structure DAC module, including: the device comprises a digital signal generation unit, an interpolation filter unit, a modulation signal generation unit and a signal synthesis unit. As shown in fig. 3, the digital signal generating unit, the interpolation filter unit, the modulation signal generating unit and the signal synthesizing unit are DDS structures designed by the invention and capable of matching with the single-double edge working mode of the DAC module.
Specifically, the digital signal generating unit is configured to generate a digital signal, and when the system operates in a dual-edge mode, the digital signal generating unit outputs the generated digital signal to the interpolation filter unit through a first output end thereof; the interpolation filter unit can perform interpolation filtering processing on the received digital signal and realize the speed doubling conversion of the digital signal to obtain a digital signal to be modulated; the output end of the interpolation filter unit is connected with the first input end of the signal synthesis unit so as to output the digital signal to be modulated to the signal synthesis unit; the output end of the modulation signal generation unit is connected with the second input end of the signal synthesis unit and is used for generating a frequency modulation signal and outputting the digital signal to be modulated to the signal synthesis unit; the signal synthesis unit receives the digital signal to be modulated and the frequency modulation signal, and frequency modulates the digital signal to be modulated by using the frequency modulation signal so as to expand the frequency domain of the signal to be modulated, and outputs the modulated digital signal to the four-switch structure DAC module; when the system works in the single-edge mode, the digital signal generating unit can directly output the generated digital signal to the input end of the DAC module of the four-switch structure through the second output end of the digital signal generating unit. The digital signal generating unit outputs the same signals in two modes, and the signals output the two or single-edge working modes selected according to the external control signals from the first output port or the second output port.
Taking the four-switch DAC6GHz clock requirement as an example, to cope with the DAC dual-edge mode 12GSPS, we do DDS structure under the 6G system clock to generate the 12GSPS data rate. Therefore, the digital signal generating unit in the DDS structure adopts an eight-path parallel structure (8-path parallel linear time-sharing interpolation structure), the data rate of each path is 750MSPS, and the method of interpolation filtering processing is added to the digital signal output by the first output end of the eight-path parallel structure of the digital signal generating unit, so that the rate speed doubling conversion from 6GSPS to 12GSPS is realized, and the digital signal generating unit can adapt to the digital signals with the output rates of 6GSPS in two working modes of the DAC. Thus, the digital signal generating unit in the DDS adopts an eight-way parallel structure, wherein each way of data rate is 750M. And the digital signal generating unit of the DDS structure has 2 working modes: mode 1 (single-edge mode) and mode 2 (double-edge mode) both work at 750MHz frequency, and the output frequency range is 0-2.4 GHz because only 8 paths of data with different phases are generated in mode 1; finally, the data rate capable of synthesizing 6GSPS is directly output to the DAC; the mode 2 is output to the interpolation filter, and 16 paths of data with different phases are generated through the interpolation filter, so that the data rate which can be synthesized finally can reach 12GSPS. Thus, the data rates of mode 1 and mode 2 can meet the design requirements of the single-double-edge mode.
In fact, in order to achieve the objective of 12GSPS, if the time-sharing interpolation structure in the digital signal generating unit is changed into an 8-way parallel structure, and each way has a data rate of 1.5GSPS, 12GSPS can be achieved, but timing sequence convergence of such large logic resources cannot be completed under the 65nm process, and if a 16-way parallel structure is adopted, each way of 750MSPS can achieve timing sequence convergence, the area is doubled, which is a great challenge for the area, more hardware resources are consumed, so that the scheme adopts a method of adding interpolation filtering processing to an eight-way parallel structure to achieve the conversion from 6GSPS to 12GSPS under the double-edge mode, and achieves the speed doubling conversion from 6GSPS to 12GSPS.
Further, the DDS structure of the invention is used for matching the modulation method of double data rate generation of the DAC double-edge mode of the four-switch structure, and the method comprises the following steps: performing interpolation filtering processing on a group of digital signals generated by the digital signal generating unit to realize speed doubling conversion of the digital signals and obtain digital signals to be modulated; and carrying out frequency modulation on the digital signal to be modulated by adopting a frequency modulation signal, and outputting the obtained modulated digital signal to the DAC module so as to realize doubling of the data conversion rate of the DAC module with the four-switch structure in the double-edge mode. As shown in fig. 4, the modulation circuit diagram is that first, a first group of digital signals output by a first output end of a digital signal generating unit is subjected to interpolation filtering processing by using a 2-times interpolation half-band filter (interpolation filtering unit), so as to generate 16 paths of data output by different phases, the interpolation filter can double the data quantity of the digital signals, but cannot increase the frequency range of the output digital signals, wherein the output frequency of the digital signals to be modulated output by the interpolation filter unit is determined by the cut-off frequency of the filter. In this embodiment, the normalized passband cutoff frequency in the first nyquist bandwidth of the n-order half-band filter (n=61) is 0.3, so that the output frequency of the baseband signal is 6×0.3=1.8 GHz, and therefore the frequency of the digital signal to be modulated output by the interpolation filtering unit is 6×0.3=1.8 GHz, but according to the nyquist sampling rate, a data rate of 12G can theoretically generate a signal of 0-6GHz, but in reality, the frequency range required by the DAC of the back-end four-switch structure is mainly 0-4.8GHz, and the signal precision in the range needs to be very high. Therefore, conversion from 1.8GHz to 0-4.8GHz is required, and in this embodiment, we use the modulation signal generating unit to generate the modulation signal of 3GHz for frequency modulation (frequency spectrum shifting) to realize the frequency signal output of 0-4.8 GHz.
Specifically, the signal output in the mode 2 (dual edge mode) is divided into three parts. The first part normally outputs signals of 0-1.8GHz, the second part outputs signals of 1.8-3GHz, and the third part outputs signals of 3-4.8 GHz. Schematic diagrams of spectrum shifting are shown in fig. 5 and 6. In fig. 5, 3 data forms are output through a 1-out-of-3 data selector. The formula for spectral shift is shown below:
when w is 2 When=0, mode 2 outputNamely, frequency signals in the range of 0-1.8GHz in a double-edge mode; when w is 2 When= -3GHz (formal representation), w 1 Only 1.2 GHz-0 Hz is needed to be generated, so that a frequency signal of 3 GHz-1.8 GHz can be generated; and when w is 2 When=3 GHz, this can generate a frequency signal of 3GHz to 4.8 GHz.
Under the condition of the equivalent clock frequency of 12GHz, the NCO (modulation signal generating unit) generates two paths of orthogonal time domain signals with the frequency of 3GHz, the points of sine and cosine functions in the sampling rate of 12G at the 3GHz are 1,0, -1,0 and 0,1,0, -1, and then complex multiplication in the formula can be changed into direct multiplication of 0, -1 and 1. The two paths of orthogonal waveform periods of the frequency modulation signal contain 4 sampling points, so that the values of the same-direction branches are sequentially 1,0, -1,0 cycle, and the values output by the orthogonal branches are sequentially 0,1,0, -1 cycle, thereby being beneficial to data processing. Therefore, the whole frequency shifting operation can be completed only by adding and subtracting operations. Thus, the data output of the DA converter 12GSPS can be realized by using a half-band filter plus modulation scheme, and the DDS structure has the advantages of matching the DAC dual-working mode and saving hardware resources.
Claims (7)
1. A system for doubling the generation rate of a DDS digital signal is characterized in that,
the system is used for being connected with a four-switch structure DAC module, and comprises: the device comprises a digital signal generation unit, an interpolation filter unit, a modulation signal generation unit and a signal synthesis unit;
the digital signal generation unit is used for generating a digital signal, and a first output end of the digital signal generation unit is connected with an input end of the interpolation filter unit so as to output the generated digital signal to the interpolation filter unit in a double-edge mode;
the interpolation filter unit can perform interpolation filtering processing on the received digital signal and realize the speed doubling conversion of the digital signal to obtain a digital signal to be modulated; the output end of the interpolation filter unit is connected with the first input end of the signal synthesis unit so as to output the digital signal to be modulated to the signal synthesis unit;
the output end of the modulation signal generation unit is connected with the second input end of the signal synthesis unit and is used for generating a frequency modulation signal and outputting the digital signal to be modulated to the signal synthesis unit;
the signal synthesis unit is used for receiving the digital signal to be modulated and the frequency modulation signal, carrying out frequency modulation on the digital signal to be modulated by utilizing the frequency modulation signal so as to expand the frequency domain of the signal to be modulated, and outputting the modulated digital signal to the four-switch structure DAC module;
the second output end of the digital signal generating unit is connected with the input end of the DAC module with the four-switch structure so as to output the generated digital signal to the DAC module in a single-edge mode;
the system adopts the following method to double the generation rate of the DDS digital signal, and comprises the following steps:
performing interpolation filtering processing on a group of digital signals generated by the digital signal generating unit to realize speed doubling conversion of the digital signals and obtain digital signals to be modulated;
and carrying out frequency modulation on the digital signal to be modulated by adopting a frequency modulation signal, and outputting the modulated digital signal to a DAC module so as to realize double data conversion rate of the DAC module in a double-edge mode, wherein the DAC module has a four-switch structure.
2. The system of claim 1, wherein the frequency modulation is modulated according to the following equation:
wherein ,for the digital signal to be modulated, < > for>Is a frequency modulated signal.
3. The system of claim 2, wherein the frequency modulated signal is a 3GHz modulated signal.
4. The system of claim 1, wherein the digital signal generation unit employs an eight-way parallel architecture, wherein each way has a data rate of 750M.
5. The system of claim 4, wherein the interpolation filter unit is an n-th order half-band filter.
6. The system of claim 5, wherein the normalized passband cutoff frequency within the first nyquist bandwidth of the half-band filter is 0.3.
7. A chip comprising a system for doubling the generation rate of a DDS digital signal as claimed in any one of claims 1 to 6.
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