CN111782429B - Watchdog timer, control method thereof and electronic equipment - Google Patents
Watchdog timer, control method thereof and electronic equipment Download PDFInfo
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- CN111782429B CN111782429B CN202010536590.5A CN202010536590A CN111782429B CN 111782429 B CN111782429 B CN 111782429B CN 202010536590 A CN202010536590 A CN 202010536590A CN 111782429 B CN111782429 B CN 111782429B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0751—Error or fault detection not based on redundancy
- G06F11/0754—Error or fault detection not based on redundancy by exceeding limits
- G06F11/0757—Error or fault detection not based on redundancy by exceeding limits by exceeding a time limit, i.e. time-out, e.g. watchdogs
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Abstract
The application discloses a control method of a watchdog timer, which comprises the steps of providing a plurality of power domains, wherein the power domains can be respectively opened or closed, and each power domain is provided with a plurality of clocks; opening a current power domain, wherein the clock of the watchdog timer is the clock of the current power domain; acquiring an initial count value switched to a target power domain, and writing the initial count value into a watchdog timer; opening a target power domain, and switching the clock of the watchdog timer to the clock of the opened power domain; the current power domain is turned off. The application also discloses a watchdog timer and electronic equipment.
Description
Technical Field
The application relates to the field of electricity, in particular to a watchdog timer, a control method thereof and electronic equipment.
Background
In recent years, a plurality of power domains are provided for a multifunctional communication chip including a bluetooth chip and a wireless lan chip to save power consumption. In different modes of operation, different parts and different functions of the chip are powered. Meanwhile, different clock domains of the chip often require the use of different clocks. However, existing watchdog timers can only work properly under the same clock or the same power domain. Therefore, it is necessary to provide a watchdog timer that can function properly in both different power domains and different clock domains.
Disclosure of Invention
In view of the above, the present application provides a watchdog timer, a control method thereof and an electronic device, which can overcome or improve the problems of the prior art, and the details thereof are as follows:
one aspect of the present application provides a control method of a watchdog timer, including:
providing a plurality of power domains, which can be respectively turned on or off, the plurality of power domains respectively having a plurality of clocks;
opening a current power domain, wherein the clock of the watchdog timer is the clock of the current power domain;
acquiring an initial count value switched to a target power domain, and writing the initial count value into a watchdog timer;
opening a target power domain, and switching the clock of the watchdog timer to the clock of the opened power domain;
the current power domain is turned off.
Optionally, the plurality of power domains includes a first power domain having a first clock and a second power domain having a second clock; the first power domain is a current power domain, and the second power domain is a target power domain:
opening the current power domain, wherein the clock of the watchdog timer is the clock of the current power domain, and the clock comprises: opening a first power domain, and controlling the clock of the watchdog timer to be switched into a first clock;
acquiring a start count value switched to a target power domain and writing the start count value into a watchdog timer includes: when the first power domain is opened, a first current count value of the watchdog timer is obtained, a second initial count value switched to a second power domain is calculated according to the first current count value, and the second initial count value is written into the watchdog timer;
switching on the target power domain and switching the clock of the watchdog timer to the clock of the power domain on includes: opening a second power domain, and controlling the clock of the watchdog timer to be switched into a second clock;
shutting down the current power domain includes: the first power domain is turned off.
Optionally, when the first power domain is the initial power domain, switching the clock of the watchdog timer to the first clock and switching the clock to the first clock further includes: the watchdog timer is turned on, and the count value of the watchdog timer is set to an initial count value.
Optionally, acquiring a reset count value of the current domain according to the initial count value:
reset count value of current domain= (initial count value/(initial domain clock) ×current domain clock;
the current domain may be any one of the power domains that is open.
Optionally, the first power domain is opened, the clock of the watchdog timer is controlled to be switched to the first clock, a first current count value of the watchdog timer is obtained, a second initial count value switched to the second power domain is calculated according to the first current count value, and the writing of the second initial count value into the space between the watchdog timers further comprises: the watchdog timer counts using a first clock; judging whether reset is needed or not; if yes, resetting the count value and counting by using a first clock; otherwise, judging whether the switching to the second power domain is needed, if so, acquiring a first current count value of the watchdog timer, calculating a second initial count value switched to the second power domain according to the first current count value, and writing the second initial count value into the watchdog timer; otherwise the watchdog timer counts using the first clock.
Optionally, the control method of the watchdog timer further includes:
when the second power domain is opened, a second current count value of the watchdog timer is obtained;
calculating a first starting count value switched to the first power domain according to the second current count value, and writing the first starting count value into a watchdog timer;
opening a first power domain, and controlling the clock of the watchdog timer to be switched into a first clock;
the second power domain is turned off.
Optionally, the plurality of power domains further includes a third power domain having a third clock that obtains a second current count value of the watchdog timer when the second power domain is turned on;
calculating a third initial count value switched to a third power domain according to the second current count value, and writing the third initial count value into a watchdog timer;
opening a third power domain, and controlling the clock of the watchdog timer to be switched into a third clock;
the second power domain is turned off.
One aspect of the present application provides a control method of a watchdog timer, including:
providing a plurality of power domains, wherein the power domains can be respectively turned on or turned off, the power domains respectively have a plurality of clocks, the power domains comprise an nth power domain and an mth power domain, the mth power domain has an mth clock, the nth power domain has an nth clock, m and n are positive integers, and m is not equal to n;
when the mth power domain is opened, acquiring an mth current count value of a watchdog timer;
according to the mth current count value, calculating an nth initial count value switched to an nth power domain, and writing the nth initial count value into a watchdog timer;
opening an nth power domain, and controlling the clock of the watchdog timer to be switched into an nth clock;
the mth power domain is turned off.
Optionally, the calculation formula of the nth start count value is:
Tn＝(Tm–em)/fc*fn–sn；
where Tn represents the nth start count value, tm represents the mth current count value, em represents additional operation time including time required to calculate the nth start count value, sn represents additional operation time after the nth power domain is turned on and before the watchdog timer starts counting.
Optionally, the plurality of power domains further includes an initial power domain, where the initial power domain is a power domain that is turned on when the watchdog timer is started, and after the watchdog timer is started, a count value of the watchdog timer is set to an initial count value.
Optionally, acquiring a reset count value of the current domain according to the initial count value:
reset count value of current domain= (initial count value/initial domain clock) ×current domain clock;
the current domain may be any power domain that is turned on in the power domain.
An aspect of the present application provides a watchdog timer using the control method of the watchdog timer described above.
An aspect of the present application provides an electronic device including a watchdog timer using the control method of the watchdog timer described above.
Compared with the prior art, the method and the device have the advantages that the initial count value of the target power domain is obtained through calculation, and the initial count value switched to the target power domain is written into the watchdog timer. When the target power domain is opened, the clock of the watchdog timer is correspondingly switched to the clock corresponding to the target power domain, and counting is carried out according to the clock from the initial count value, so that the watchdog timer can be suitable for different power domains and different clocks, and independent watchdog timers are not required to be configured for each power domain. Only one watchdog timer is needed to meet the requirements of switching between multiple power domains and multiple clocks, so that the stability of the watchdog timer is improved and the circuit design is simplified.
Drawings
FIG. 1 is a flow chart of one embodiment of a method of controlling a watchdog timer of the present application;
FIG. 2 is a flow chart of one embodiment of a method of controlling a watchdog timer of the present application;
FIG. 3 is a further schematic flow chart of the embodiment shown in FIG. 2;
fig. 4 is a flow chart of an embodiment of a control method of the watchdog timer of the present application.
Detailed Description
The present application will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present application more apparent. The various embodiments described below and their technical features can be combined with each other without conflict. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the application.
Referring to fig. 1, a flow chart of an embodiment of a control method of a watchdog timer according to the present application is shown. The control method of the watchdog timer comprises the following steps:
in step S101, a plurality of power domains are provided, which can be turned on or off respectively, and each of the plurality of power domains has a plurality of clocks.
The watchdog timer typically operates on a common power domain of the chip, which is maintained powered up as long as the chip has power. The common power domain may also be referred to as a perpetual power domain. In addition, the chip may have a plurality of power domains that may be turned off or on. These power domains, which may be turned off, may have different clocks. When different power domains are turned on, the clock of the watchdog timer needs to be correspondingly switched to the clock of the turned-on power domain.
Step S102, the current power domain is opened, and the clock of the watchdog timer is the clock of the current power domain.
The current power domain is the power domain which is currently timed to be opened by a watchdog timer.
Step S103, obtaining a starting count value switched to the target power domain, and writing the starting count value into a watchdog timer.
The target power domain is a power domain to be turned on. The clock of the watchdog timer needs to be switched to the corresponding clock of the target power domain after the target power domain is turned on. The start count value is a count value of starting to count after the clock of the watchdog timer is switched to the clock corresponding to the target power domain.
Step S104, the target power domain is opened, and the clock of the watchdog timer is switched to the clock of the opened power domain.
Step S105, the current power domain is turned off.
Compared with the prior art, the control method of the watchdog timer obtains the initial count value of the target power domain through calculation, and writes the initial count value switched to the target power domain into the watchdog timer. When the target power domain is opened, the clock of the watchdog timer is correspondingly switched to the clock corresponding to the target power domain, and counting is carried out according to the clock from the initial count value, so that the watchdog timer can be suitable for different power domains and different clocks, and independent watchdog timers are not required to be configured for each power domain. Only one watchdog timer is needed to meet the requirements of switching between multiple power domains and multiple clocks, so that the stability of the watchdog timer is improved and the circuit design is simplified.
Referring to fig. 2, a flowchart of a further embodiment of the control method of the watchdog timer shown in fig. 1 is shown. The control method of the watchdog timer comprises the following steps:
step S201, providing a plurality of power domains, where the plurality of power domains includes a first power domain and a second power domain, the first power domain has a first clock, and the second power domain has a second clock.
Step S202, the first power domain is opened, and the clock of the watchdog timer is controlled to be switched to the first clock.
Step S203, a first current count value of the watchdog timer is obtained, a second initial count value switched to the second power domain is calculated according to the first current count value, and the second initial count value is written into the watchdog timer.
In step S204, the second power domain is turned on, and the clock of the watchdog timer is controlled to be switched to the second clock. At this time, the watchdog timer counts using the second clock.
In step S205, the first power domain is turned off.
In the above steps S201 to S205, the first power domain is the current power domain, and the second power domain is the target power domain.
Optionally, in some embodiments, the first power domain is an initial power domain, and between turning on the first power domain and controlling the watchdog timer to switch to the first clock in step S202 further includes: the watchdog timer is turned on, and the count value of the watchdog timer is set to an initial count value. The initial count value may be a count value preset by the system.
It will be appreciated that if the watchdog timer is not started, the first power domain may be considered the initial power domain at this time if the first power domain is on and acts as the current power domain, and the watchdog timer is started and clocks the portion of the chip operating in the first power domain. That is, the initial power domain may be regarded as a power domain that is turned on when the watchdog timer is started, and when the first power domain is the initial power domain, the watchdog timer is started and counted according to the first clock.
Optionally, in some embodiments, the method for controlling a watchdog timer further includes:
in step S206, the plurality of power domains further includes a third power domain having a third clock, and when the second power domain is turned on, a second current count value of the watchdog timer is obtained.
Step S207, a third initial count value switched to a third power domain is calculated according to the second current count value, and the third initial count value is written into the watchdog timer.
In step S208, the third power domain is turned on, and the clock of the watchdog timer is controlled to be switched to the third clock.
In step S209, the second power domain is turned off.
In step S206 to step S209, the second power domain may be regarded as the current power domain, and the third power domain may be regarded as the target power domain. It will be appreciated by those skilled in the art that each of the plurality of power domains may be a current power domain or a target power domain. For example, but not limited to, the third power domain and the first power domain may be the same or different.
Referring to fig. 3, a flowchart of a further embodiment of the control method of the watchdog timer shown in fig. 2 is shown. As shown in fig. 3, between step S202 and step S203, it may further include:
in step S2001, the watchdog timer counts using the first clock.
Step S2002, it is determined whether reset is required. It is determined whether the watchdog timer needs to be reset. If yes, go to step S2003; otherwise, step S2004 is performed.
In step S2003, the count value is reset. After the count value is reset, the watchdog timer returns to step S2001 to count with the first clock.
Optionally, in some embodiments, the reset count value of the watchdog timer is defined as a reset count value, which is an initial count value that is initially set for the initial power domain. For other power domains, the reset count is: reset count value of current domain= (initial count value/initial domain clock) ×current domain clock; the current domain may be any power domain that is turned on in the power domain.
Step S2004, whether a switch to the second power domain is required. If yes, step S203 is performed, and if not, step S2001 is returned, and the watchdog timer counts using the first clock.
It should be noted that, although steps 2001 to 2004 are described by taking the first power domain and the second power domain as examples, it will be understood by those skilled in the art that any suitable current power domain and target power domain may be applied, and only the first power domain needs to be regarded as the current power domain and the second power domain needs to be regarded as the target power domain. The first, second, third, etc. in the present description do not represent sequences or specific references, but are for convenience of description, and should not be construed as limiting the scope of the present application. Those skilled in the art will appreciate that when the watchdog countdown timer expires, the chip needs to be powered up again by other digital logic circuits within the permanent power domain or by pins informing the chip external circuitry. The present application will not be described in detail.
Compared with the prior art, the control method of the watchdog timer obtains the initial count value of the second power domain through calculation and writes the second initial count value. When the second power domain is opened, the clock of the watchdog timer is correspondingly switched to a second clock, and counting is carried out according to the second clock from a second initial count value. Likewise, upon switching from the second power domain to the third power domain, the watchdog timer may write a third starting count value and switch to have a clock corresponding to the third power domain. Thus, the watchdog timer can be adapted to different power domains and different clocks, without requiring an independent watchdog timer to be configured for each power domain. Only one watchdog timer is needed to meet the requirements of switching between multiple power domains and multiple clocks, so that the stability of the watchdog timer is improved and the circuit design is simplified.
Referring to fig. 4, a flow chart of an embodiment of a control method of the watchdog timer according to the present application is shown. The control method of the watchdog timer comprises the following steps:
step S301, providing a plurality of power domains, where the power domains can be turned on or turned off respectively, the power domains have a plurality of clocks respectively, the power domains include an nth power domain and an mth power domain, the mth power domain has an mth clock, and the nth power domain has an nth clock. Wherein, m and n are positive integers, and m is not equal to n.
Step S302, when the mth power domain is opened, the mth current count value of the watchdog timer is acquired.
Step S303, an nth starting count value switched to an nth power domain is calculated according to the mth current count value, and the nth starting count value is written into a watchdog timer.
Step S304, the nth power domain is opened, and the clock of the watchdog timer is controlled to be switched to the nth clock.
In step S305, the mth power domain is turned off.
Optionally, in some embodiments, the n-th start count value is calculated as:
Tn＝(Tm–em)/fc*fn–sn；
where Tn represents the nth start count value, tm represents the mth current count value, em represents additional operation time including time required to calculate the nth start count value, sn represents additional operation time after the nth power domain is turned on and before the watchdog timer starts counting.
Optionally, in some embodiments, the plurality of power domains further includes an initial power domain, where the initial power domain is a power domain that is turned on when a watchdog timer is started, and after the watchdog timer is started, a count value of the watchdog timer is set to an initial count value.
Optionally, in some embodiments, the method for controlling a watchdog timer further includes: and acquiring a reset count value of the current domain according to the initial count value. The reset count is used when the count of the watchdog timer needs to be reset. For the initial power domain, the reset count value is an initial count value that is initially set. For other power domains, the reset count is: reset count value of current domain= (initial count value/initial domain clock) ×current domain clock; the current domain may be any power domain that is turned on in the power domain.
Compared with the prior art, the control method of the watchdog timer obtains the starting count value of the nth power domain through calculation, and writes the nth starting count value of the nth power domain. When the nth power domain is opened, the clock of the watchdog timer is correspondingly switched to the nth clock, and the nth clock is counted from the nth initial count value, so that the watchdog timer can be suitable for different power domains and different clocks, and independent watchdog timers are not required to be configured for each power domain. Only one watchdog timer is needed to meet the requirements of switching between multiple power domains and multiple clocks, so that the stability of the watchdog timer is improved and the circuit design is simplified.
The present application also provides a watchdog timer, which can use the control method of the watchdog timer of the above embodiment or the modified embodiment. The application also provides electronic equipment, which comprises a watchdog timer, wherein the watchdog timer uses the control method of the watchdog timer in the embodiment or the modified embodiment.
Although the application has been shown and described with respect to one or more implementations, equivalent alterations and modifications will occur to others skilled in the art based upon a reading and understanding of this specification and the annexed drawings. The present application includes all such modifications and alterations and is limited only by the scope of the following claims. In particular regard to the various functions performed by the above described components, the terms used to describe such components are intended to correspond, unless otherwise indicated, to any component which performs the specified function of the described component (e.g., that is functionally equivalent), even though not structurally equivalent to the disclosed structure which performs the function in the herein illustrated exemplary implementations of the specification. Furthermore, while a particular feature of the subject specification may have been disclosed with respect to only one of several implementations, such feature may be combined with one or more other features of the other implementations as may be desired and advantageous for a given or particular application. Moreover, to the extent that the terms "includes," has, "" contains, "or variants thereof are used in either the detailed description or the claims, such terms are intended to be inclusive in a manner similar to the term" comprising. Further, it should be understood that references herein to "a plurality" are to two or more. For the steps mentioned herein, the numerical suffix is merely for clarity of description of the embodiments, for ease of understanding, and does not fully represent the order in which the steps are performed, and should be set into mind in logical relationship
The foregoing embodiments of the present application are not limited to the above embodiments, but are intended to be included within the scope of the present application as defined by the appended claims and their equivalents.
Claims (13)
1. A method of controlling a watchdog timer, comprising:
providing a plurality of power domains, wherein the power domains can be respectively opened or closed, and each power domain corresponds to a clock;
opening a current power domain, wherein the clock of the watchdog timer is the clock of the current power domain;
acquiring an initial count value switched to a target power domain, and writing the initial count value into a watchdog timer;
opening a target power domain, and switching the clock of the watchdog timer to the clock of the opened power domain;
the current power domain is turned off.
2. The method of claim 1, wherein the plurality of power domains includes a first power domain and a second power domain, the first power domain having a first clock and the second power domain having a second clock;
the first power domain is a current power domain, and the second power domain is a target power domain:
opening the current power domain, wherein the clock of the watchdog timer is the clock of the current power domain, and the clock comprises: opening a first power domain, and controlling the clock of the watchdog timer to be switched into a first clock;
acquiring a start count value switched to a target power domain and writing the start count value into a watchdog timer includes: acquiring a first current count value of a watchdog timer, calculating a second initial count value switched to a second power domain according to the first current count value, and writing the second initial count value into the watchdog timer;
switching on the target power domain and switching the clock of the watchdog timer to the clock of the power domain on includes: opening a second power domain, and controlling the clock of the watchdog timer to be switched into a second clock;
shutting down the current power domain includes: the first power domain is turned off.
3. The method for controlling a watchdog timer according to claim 2, wherein when the first power domain is an initial power domain, switching the clock of the watchdog timer to the first clock and switching the clock to the first clock further comprises: the watchdog timer is turned on, and the count value of the watchdog timer is set to an initial count value.
4. A control method of a watchdog timer according to claim 3, wherein the reset count value of the current domain is obtained from the initial count value:
reset count value of current domain= (initial count value/initial domain clock) ×current domain clock;
the current domain may be any one of the power domains that is open.
5. The method for controlling a watchdog timer according to claim 2, wherein,
opening the first power domain, controlling the clock of the watchdog timer to be switched into the first clock, acquiring a first current count value of the watchdog timer, calculating a second initial count value switched into the second power domain according to the first current count value, and writing the second initial count value into the space between the watchdog timers, wherein the method further comprises the following steps:
the watchdog timer counts using a first clock;
judging whether reset is needed or not;
if yes, resetting the count value and counting by using a first clock; otherwise
Judging whether the switching to the second power domain is needed, if yes, acquiring a first current count value of the watchdog timer, calculating a second initial count value switched to the second power domain according to the first current count value, and writing the second initial count value into the watchdog timer; otherwise the watchdog timer counts using the first clock.
6. The control method of a watchdog timer according to claim 2, characterized in that the control method of a watchdog timer further comprises:
when the second power domain is opened, a second current count value of the watchdog timer is obtained;
calculating a first starting count value switched to the first power domain according to the second current count value, and writing the first starting count value into a watchdog timer;
opening a first power domain, and controlling the clock of the watchdog timer to be switched into a first clock;
the second power domain is turned off.
7. The method for controlling a watchdog timer according to claim 2, wherein,
the plurality of power domains further comprises a third power domain having a third clock, when the second power domain is turned on, obtaining a second current count value of the watchdog timer;
calculating a third initial count value switched to a third power domain according to the second current count value, and writing the third initial count value into a watchdog timer;
opening a third power domain, and controlling the clock of the watchdog timer to be switched into a third clock;
the second power domain is turned off.
8. A method of controlling a watchdog timer, comprising:
providing a plurality of power domains, wherein the power domains can be respectively turned on or turned off, each power domain corresponds to one clock, the power domains comprise an nth power domain and an mth power domain, the mth power domain is provided with an mth clock, the nth power domain is provided with an nth clock, m and n are positive integers, and m is not equal to n;
when the mth power domain is opened, acquiring an mth current count value of a watchdog timer;
according to the mth current count value, calculating an nth initial count value switched to an nth power domain, and writing the nth initial count value into a watchdog timer;
opening an nth power domain, and controlling the clock of the watchdog timer to be switched into an nth clock;
the mth power domain is turned off.
9. The control method of a watchdog timer according to claim 8, wherein the n-th start count value is calculated as:
Tn＝(Tm–em)/fc*fn–sn；
where Tn represents the nth start count value, tm represents the mth current count value, em represents additional operation time including time required to calculate the nth start count value, sn represents additional operation time after the nth power domain is turned on and before the watchdog timer starts counting.
10. The method according to claim 8, wherein the plurality of power domains further includes an initial power domain, the initial power domain being a power domain that is turned on when the watchdog timer is started, and the count value of the watchdog timer is set to an initial count value after the watchdog timer is started.
11. The control method of a watchdog timer according to claim 10, wherein the reset count value of the current domain is obtained from the initial count value:
reset count value of current domain= (initial count value/initial domain clock) ×current domain clock;
the current domain may be any power domain that is turned on in the power domain.
12. A watchdog timer, characterized in that the control method of the watchdog timer according to any one of claims 1 to 11 is used.
13. An electronic device comprising a watchdog timer using the control method of the watchdog timer according to any one of claims 1 to 11.
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