CN111400074A - Watchdog simulating device and control method thereof - Google Patents
Watchdog simulating device and control method thereof Download PDFInfo
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- CN111400074A CN111400074A CN201910002605.7A CN201910002605A CN111400074A CN 111400074 A CN111400074 A CN 111400074A CN 201910002605 A CN201910002605 A CN 201910002605A CN 111400074 A CN111400074 A CN 111400074A
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- G06F11/0754—Error or fault detection not based on redundancy by exceeding limits
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Abstract
The invention discloses a device for simulating a watchdog and a control method thereof, wherein the device comprises: the control logic module is used for sending an input signal to the DAC module according to a set trigger signal; the DAC module is used for carrying out digital-to-analog conversion processing according to the input signal and the set reference signal to obtain an interval threshold voltage and outputting the interval threshold voltage to the AC module; and the AC module is used for comparing the external input analog voltage with the interval threshold voltage to obtain a comparison result. The scheme of the invention can solve the problem that the simulation watchdog occupies more resources based on the two ACMP window modes, thereby achieving the effect of reducing the occupied resources.
Description
Technical Field
The invention belongs to the technical field of electronic circuits, particularly relates to an analog watchdog device and a control method thereof, and particularly relates to a device for realizing a low-power consumption analog watchdog scheme and a control method thereof.
Background
The analog watchdog (Anglog watchdog) is widely applied to MCU application, wherein the mechanism is to implement interval detection of voltage, and the specific wake-up condition varies with different applications. For example: for an exception handling mechanism, a system constantly detects whether the input voltage is in a reasonable interval, and if the input voltage exceeds the upper limit of the interval or is lower than the lower limit of the interval, the system triggers a corresponding protective measure; for low power consumption application, the system constantly detects whether the input voltage is in an interval exceeding the set interval, if the input voltage is in the interval, the system enters a corresponding sleep mode, and otherwise, the system is awakened.
A common analog watchdog is implemented based on a window pattern of two fast comparators (ACMPs), and then is not as flexible as setting the interval, which is usually 1/n of the internal reference voltage, where n is 1-4. However, in practical applications, the requirement of flexibly setting the threshold of the interval cannot be fully satisfied.
Disclosure of Invention
The present invention aims to solve the above-mentioned drawbacks, and provide an analog watchdog device and a control method thereof, so as to solve the problems that the analog watchdog is implemented based on two ACMP window modes, and then the setting of the interval is not so flexible, and the occupied resources are large, so as to achieve the effect of reducing the occupied resources.
The invention provides a device for simulating a watchdog, which comprises: the device comprises a DAC module, an AC module and a control logic module; the control logic module is used for sending an input signal to the DAC module according to a set trigger signal; the DAC module is used for performing digital-to-analog conversion processing according to the input signal and a set reference signal to obtain a required interval threshold voltage and outputting the required interval threshold voltage to the AC module; the AC module is used for comparing an external input analog voltage with the interval threshold voltage to obtain a comparison result; and outputting a result signal according to the comparison result.
Optionally, wherein outputting a result signal according to the comparison result includes: and outputting an abnormal signal if the external input analog voltage is greater than the upper limit of the interval threshold voltage or less than the lower limit of the interval threshold voltage, and outputting a normal signal if the external input analog voltage is less than or equal to the upper limit of the interval threshold voltage and greater than or equal to the lower limit of the interval threshold voltage.
Optionally, the method further comprises: a recording and post-processing module; the control logic module is also used for generating a sampling enabling signal and outputting the sampling enabling signal to the recording and post-processing module; and the recording and post-processing module is used for recording the output result of the AC module according to the sampling enabling signal and performing post-processing on the recorded output result.
Optionally, the post-processing comprises: at least one of a noise removal process and a voltage value variation warning process.
Optionally, the method further comprises: a CPU; and the CPU is used for receiving the voltage value change warning processing and awakening the voltage value change warning processing when the post-processing of the recording and post-processing module comprises the voltage value change warning processing, and executing the set operation.
Optionally, the method further comprises: a timing module;
the timing module is used for generating a trigger signal to the control logic module according to the set timing time.
In another aspect, the present invention provides a method for controlling an analog watchdog device, including: sending an input signal to the DAC module through a control logic module according to a set trigger signal; performing digital-to-analog conversion processing according to the input signal and a set reference signal through a DAC module to obtain a required interval threshold voltage; comparing the external input analog voltage with the interval threshold voltage through an AC module to obtain a comparison result; and outputting a result signal according to the comparison result.
Optionally, wherein outputting a result signal according to the comparison result includes: and outputting an abnormal signal if the external input analog voltage is greater than the upper limit of the interval threshold voltage or less than the lower limit of the interval threshold voltage, and outputting a normal signal if the external input analog voltage is less than or equal to the upper limit of the interval threshold voltage and greater than or equal to the lower limit of the interval threshold voltage.
Optionally, the method further comprises: through the control logic module, a sampling enable signal is also generated; and recording the output result according to the sampling enabling signal through a recording and post-processing module, and performing post-processing on the recorded output result.
Optionally, the post-processing comprises: at least one of a noise removal process and a voltage value variation warning process.
Optionally, the method further comprises: and executing, by the CPU, a set operation after receiving the voltage value change warning processing and being awakened when the post-processing includes the voltage value change warning processing.
Optionally, the method further comprises: and generating a trigger signal according to the set timing time through a timing module.
According to the scheme, the analog watchdog scheme is realized in the low-power-consumption SOC scheme through on-chip resource integration, the extra circuit area requirement is reduced, and resources are saved.
Furthermore, in the scheme of the invention, the on-chip resources are fully utilized in the design of the main control chip, the existing functions are multiplexed, more flexible functions are realized, the consumption of additional circuits can be effectively avoided, and the cost is saved.
Therefore, according to the scheme provided by the invention, by integrating the universal DAC module and the AC module in the MCU and SOC implementation scheme, on-chip resources are fully utilized, the existing functions are multiplexed, more flexible functions are realized, the problem that the setting of the interval is not flexible and the occupied resources are more in the prior art due to the fact that the window mode of the analog watchdog based on two ACMP is realized is solved, and the defects of more occupied resources, high power consumption and low reliability in the prior art are overcome, and the beneficial effects of less occupied resources, low power consumption and high reliability are realized.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention.
The technical solution of the present invention is further described in detail by the accompanying drawings and embodiments.
Drawings
Fig. 1 is a schematic structural diagram, specifically a logic circuit diagram, of an embodiment of an analog watchdog device according to the present invention;
FIG. 2 is a schematic flowchart illustrating a control method of an analog watchdog apparatus according to an embodiment of the present invention;
FIG. 3 is a schematic flow chart illustrating an embodiment of post-processing the output result of the AC module in the method of the present invention;
fig. 4 is a flowchart of a control method according to an embodiment of the present invention, specifically a flowchart of a whole analog dongle.
The reference numbers in the embodiments of the present invention are as follows, in combination with the accompanying drawings:
10-DAC module; a 20-AC module; 30-recording and post-processing module; 40-CPU; 50-a control logic module; 60-timing module (e.g., low power Timer).
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the technical solutions of the present invention will be clearly and completely described below with reference to the specific embodiments of the present invention and the accompanying drawings. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
According to an embodiment of the present invention, an analog watchdog device is provided, which can be applied to the implementation of an analog watchdog in any IC design. Referring to fig. 1, a schematic diagram of an embodiment of the apparatus of the present invention is shown. The analog watchdog device may include: a DAC module 10, an AC module 20, and a control logic module 50.
Specifically, the control logic module 50 may be configured to send an input signal (DAC _ VA L) to the DAC module 10 according to a set trigger signal to control the DAC module 10 and the AC module 20 to be turned on or off, for example, the control logic module has the capability of turning on or off the DAC module and the AC module in response to the trigger signal, updating the digital value DAC _ VA L of the DAC module, and generating an output signal of the AC module that enables sampling, wherein DAC _ VA L is a parameter value preset according to a threshold value of a voltage interval to be measured, so as to affect a k value in the DAC module, and a specific operational relationship is detailed in an operation principle.
Specifically, the DAC module 10 may be configured to perform digital-to-analog conversion processing according to the input signal and a set reference signal (for example, a reference voltage is Vref), so as to obtain a required voltageE.g., DAC module (DAC), is a conventional low power digital converter having a Vref reference voltage, and implements a threshold voltage output of Vref value according to DAC _ VA L input*k (k — DAC _ VA L/64, 64 is resolution) the upper and lower thresholds for the interval values that need to be set in the watchdog can be implemented by setting DAC _ VA L.
Specifically, the AC module 20 may be configured to compare an external input analog voltage with the interval threshold voltage to obtain a comparison result; and outputting a result signal according to the comparison result.
Therefore, under the control of the input signal sent by the control logic module based on the trigger signal, the DAC module outputs the interval threshold voltage according to the input signal and the reference signal, and the AC module compares the interval threshold voltage with the external input analog voltage to obtain an output result, so that the flexible configuration of the interval threshold voltage is realized, and the occupied resources are reduced.
Wherein outputting a result signal according to the comparison result may include: and outputting an abnormal signal if the external input analog voltage is greater than the upper limit of the interval threshold voltage or less than the lower limit of the interval threshold voltage, and outputting a normal signal if the external input analog voltage is less than or equal to the upper limit of the interval threshold voltage and greater than or equal to the lower limit of the interval threshold voltage.
For example: AC module (analog comparator): is a common low-power consumption analog comparator. One input end is DAC output, the other input end is external input analog voltage, and the output result is Vref*Comparison of k with VIN, as shown in FIG. 1, if Vref*And k is larger than VIN, 1 is output, otherwise 0 is output.
For example: in an optional implementation manner, for implementation of an analog watchdog scheme in a low power consumption SOC scheme, on-chip resource integration is implemented, and additional circuit area requirements are reduced. According to the scheme, in the design of the main control chip, on-chip resources are fully utilized, the existing functions are multiplexed, more flexible functions are realized, and extra circuit consumption can be effectively avoided. Therefore, the scheme of the invention has simple logic structure and occupies less resources; the reliability of the circuit is very high; the application range is wide.
For example: the general DAC module and the AC module in the MCU (Chip-level Chip) and SOC (System on Chip) implementation scheme are integrated, the circuit area overhead is effectively reduced, the watchdog simulation function is realized in a low-power-consumption mode, the interval detection of input voltage can be realized, the interval threshold value can be flexibly configured, and the standby power consumption of the whole machine is reduced. As shown in fig. 1, the existing DAC module (digital-to-analog converter) is used to realize the free setting of the reference voltage, and an AC module (analog comparator) is saved, thereby effectively improving the flexibility of the analog dog and saving the circuit resources.
Therefore, the corresponding result signals are output according to different comparison results, different comparison results can be processed, and the method is good in flexibility and high in reliability.
In an alternative embodiment, the method may further include: and a recording and post-processing module 30 for performing a post-processing process on the output result of the AC module 20.
Specifically, the control logic module 50 may be further configured to generate a sampling enable signal and output the sampling enable signal to the recording and post-processing module 30.
Specifically, the recording and post-processing module 30 may be configured to record an output result of the AC module according to the sampling enable signal, and perform post-processing on the recorded output result. For example: a recording and post-processing module: recording the output result of the AC module according to the sampling enabling signal generated by the control logic module; and post-processing the recorded results.
Therefore, the output result of the AC module is recorded and post-processed based on the sampling enabling signal, the execution control of the set operation can be realized, and the method is high in reliability and good in safety.
Optionally, the post-processing may include: at least one of a noise removal process and a voltage value variation warning process.
For example: and post-processing the recorded result, specifically comprising voltage value denoising processing and voltage value change warning.
Therefore, through the post-processing in various forms, the flexibility and convenience of the post-processing are favorably improved.
In an alternative embodiment, the method may further include: a CPU 40.
Specifically, the CPU 40 may be configured to perform a setting operation after receiving the voltage value change warning processing and waking up when the post-processing of the recording and post-processing module 30 may include the voltage value change warning processing. For example: a CPU: and the central processing module receives the change warning signal and is awakened to carry out the next operation.
Therefore, the timeliness and the reliability of the warning processing are improved by waking up the CPU to execute the set operation when the post-processing comprises the voltage value change warning processing.
In an alternative embodiment, the method may further include: a timing module 60.
Specifically, the timing module 60 may be configured to generate a trigger signal to the control logic module 50 according to a set timing time, so as to wake up the DAC module 10 and the AC module 20 to output a required interval threshold voltage when the timing time is reached. For example: low-power Timer: and the low-power-consumption timer is used for generating a trigger signal to the control logic module at regular time and waking up the DAC module and the AC module to perform interval detection of output voltage in time.
Therefore, the trigger signal is generated by timing through the timer, so that automatic control is realized, and the method is safe and reliable.
In an alternative embodiment, the working principle of the invention may be as follows:
assuming that the internal reference voltage of the chip is 5V, the precision of the DAC module is 64, the effective value of the input voltage VIN is 0-5V, and the analog watchdog is intended to realize the interval monitoring of VIN 2V-4V, if VIN is greater than or equal to 2V and less than or equal to 4V, the watchdog considers that VIN input is normal, and if VIN is greater than 4V or VIN is less than or equal to 2V, the watchdog is that VIN input voltage is abnormal, and the specific relation is shown in table 1:
TABLE 1
| VIN(V) | Status of state |
| >4 | VIN alarm |
| 2～4 | VIN Normal |
| <2 | VIN alarm |
According to table 1, the relationship between the voltage values (2V, 4V) of the two key nodes and VIN needs to be clear, and the specific implementation is as follows
(1) Operating mode one (2V determination) the control logic sets DAC _ VA L to (2)*64) Vref, wait for the AC output to stabilize, VIN if the AC output is 1>2V. else, VCC<Or ═ 2V.
(2) Operating mode two (4V decision) the control logic sets DAC _ VA L to (4)*64) Vref, wait for the AC output to stabilize, VIN if the AC output is 1>4V; otherwise, VCC<Or ═ 4V.
The detection module will sequentially determine the magnitude relationship between VIN and 2V, 4V values, so as to determine the specific time interval in which VIN falls as shown in table 2:
TABLE 2
| VIN(V) | Results of operation 1 | Results of operation 2 | AC output summarization |
| >4 | 1 | 1 | 2’b11 |
| 2～4 | 1 | 0 | 2’b10 |
| <2 | 0 | 0 | 2’b00 |
The whole working flow of the analog dongle is shown in fig. 4, which may specifically include:
step 1, in the low power consumption mode, a CPU is in the low power consumption mode such as sleep, a DAC module and an AC module are closed, a low power consumption timer is started, and other irrelevant modules are in the sleep or other low power consumption modes.
And 2, the digital logic part of the automatic detection module waits for detecting the trigger signal, and once the trigger signal is effective, the automatic detection module digitally starts battery electric quantity detection.
1) The DAC module and the AC module are turned on.
2) Operation mode one is performed by setting DAC _ VA L to (2)*64) and/Vref, wait for the AC output to stabilize and record the result.
3) The operation mode is performed to set DAC _ VA L to (4)*64) and/Vref, wait for the AC output to stabilize and record the result.
4) And summarizing the output results of the AC in the first operation mode and the second operation mode.
5) The DAC module and the AC module are turned off.
And 3, carrying out post-processing by the post-processing module according to the summarized AC result.
1) Denoising and filtering to ensure the detection result to be stable and reject abnormal results
2) And judging whether the output result summary is 2' b10, and if not, generating an interrupt to wake up the CPU.
And 4, after the CPU is awakened, the automatic detection module acquires the latest voltage value and performs the next abnormal processing.
The exception handling is related to a specific application scheme, and may be to turn off the related voltage module to protect the chip from normal operation, however, in the scheme of the present invention, it is only necessary to definitely detect the voltage exception.
In an alternative embodiment, the extended analysis of the simulated watchdog design in the solution of the present invention may include:
(1) the DAC precision is not limited to 64 and may be other configurations.
(2) The sequence of operations for the critical node voltage is not limited to low to high in the example, but may be high to low.
(3) The process of summarizing the AC output results is not limited to the logic implementation in the example, as long as the relationship between VIN and the preset interval can be determined.
(4) In the example, the VIN is detected to be an alarm exceeding a preset interval, but the VIN may be detected to be an alarm falling within the preset interval.
Through a large number of tests, the technical scheme of the invention is adopted, and the analog watchdog scheme is realized in the low-power-consumption SOC scheme through on-chip resource integration, so that the extra circuit area requirement is reduced, and the resources are saved.
According to the embodiment of the invention, the control method of the analog watchdog device corresponding to the analog watchdog device is also provided, and the method can be applied to the realization of the analog watchdog in any IC design. FIG. 2 is a flow chart of an embodiment of the method of the present invention. The control method of the simulated watchdog device can comprise the following steps: step S110 to step S130.
At step S110, an input signal (DAC _ VA L) is sent to the DAC module 10 by the control logic module 50 according to the set trigger signal to control the DAC module 10 and the AC module 20 to be turned on or off, for example, the control logic module has the capability of turning on or off the DAC module and the AC module in response to the trigger signal, updating the digital value DAC _ VA L of the DAC module, and generating an output signal of the AC module to enable sampling, wherein DAC _ VA L is a parameter value preset according to the threshold value of the voltage interval to be measured, so as to influence the k value in the DAC module, and the specific operational relationship is detailed in the operation principle.
At step S120, the DAC module 10 performs digital-to-analog conversion to obtain the required threshold voltage according to the input signal and the set reference signal (e.g. Vref), for example, the DAC module (D/A converter) is a common low power digital converter with Vref as the reference voltage, and outputs the threshold voltage with Vref according to DAC _ VA L as the input*k (k — DAC _ VA L/64, 64 is resolution) the upper and lower thresholds for the interval values that need to be set in the watchdog can be implemented by setting DAC _ VA L.
At step S130, comparing the external input analog voltage with the interval threshold voltage by the AC module 20 to obtain a comparison result; and outputting a result signal according to the comparison result. For example: and judging the externally input analog voltage by taking the interval threshold voltage as a reference.
Therefore, under the control of the input signal sent by the control logic module based on the trigger signal, the DAC module outputs the interval threshold voltage according to the input signal and the reference signal, and the AC module compares the interval threshold voltage with the external input analog voltage to obtain an output result, so that the flexible configuration of the interval threshold voltage is realized, and the occupied resources are reduced.
Wherein outputting a result signal according to the comparison result may include: if the external input analog voltageAnd outputting an abnormal signal if the external input analog voltage is greater than the upper limit of the interval threshold voltage or less than the lower limit of the interval threshold voltage, and outputting a normal signal if the external input analog voltage is less than or equal to the upper limit of the interval threshold voltage and greater than or equal to the lower limit of the interval threshold voltage. For example: AC module (analog comparator): is a common low-power consumption analog comparator. One input end is DAC output, the other input end is external input analog voltage, and the output result is Vref*Comparison of k with VIN, as shown in FIG. 1, if Vref*And k is larger than VIN, 1 is output, otherwise 0 is output.
For example: in an optional implementation manner, for implementation of an analog watchdog scheme in a low power consumption SOC scheme, on-chip resource integration is implemented, and additional circuit area requirements are reduced. According to the scheme, in the design of the main control chip, on-chip resources are fully utilized, the existing functions are multiplexed, more flexible functions are realized, and extra circuit consumption can be effectively avoided. Therefore, the scheme of the invention has simple logic structure and occupies less resources; the reliability of the circuit is very high; the application range is wide.
For example: the general DAC module and the AC module in the MCU (Chip-level Chip) and SOC (System on Chip) implementation scheme are integrated, the circuit area overhead is effectively reduced, the watchdog simulation function is realized in a low-power-consumption mode, the interval detection of input voltage can be realized, the interval threshold value can be flexibly configured, and the standby power consumption of the whole machine is reduced. As shown in fig. 1, the existing DAC module (digital-to-analog converter) is used to realize the free setting of the reference voltage, and an AC module (analog comparator) is saved, thereby effectively improving the flexibility of the analog dog and saving the circuit resources.
Therefore, the corresponding result signals are output according to different comparison results, different comparison results can be processed, and the method is good in flexibility and high in reliability.
In an alternative embodiment, the method may further include: a process of post-processing the output result of the AC module 20.
The following further describes a specific process of performing post-processing on the output result of the AC module 20 with reference to a flowchart of an embodiment of performing post-processing on the output result of the AC module 20 in the method of the present invention shown in fig. 3, which may include: step S210 and step S220.
Step S210, by controlling the logic module 50, also generates a sampling enable signal.
Step S220, the recording and post-processing module 30 records the output result according to the sampling enable signal, and performs post-processing on the recorded output result. For example: a recording and post-processing module: recording the output result of the AC module according to the sampling enabling signal generated by the control logic module; and post-processing the recorded results.
Therefore, the output result of the AC module is recorded and post-processed based on the sampling enabling signal, the execution control of the set operation can be realized, and the method is high in reliability and good in safety.
Optionally, the post-processing may include: at least one of a noise removal process and a voltage value variation warning process. For example: and post-processing the recorded result, specifically comprising voltage value denoising processing and voltage value change warning.
Therefore, through the post-processing in various forms, the flexibility and convenience of the post-processing are favorably improved.
In an alternative embodiment, the method may further include: when the post-processing may include the voltage value change warning processing, the CPU 40 receives the voltage value change warning processing and wakes up, and then executes the set operation. For example: a CPU: and the central processing module receives the change warning signal and is awakened to carry out the next operation.
Therefore, the timeliness and the reliability of the warning processing are improved by waking up the CPU to execute the set operation when the post-processing comprises the voltage value change warning processing.
In an alternative embodiment, the method may further include: through the timing module 60, a trigger signal is generated according to a set timing time, so as to wake up the DAC module 10 and the AC module 20 to output a required interval threshold voltage when the timing time is reached. For example: low-power Timer: and the low-power-consumption timer is used for generating a trigger signal to the control logic module at regular time and waking up the DAC module and the AC module to perform interval detection of output voltage in time.
Therefore, the trigger signal is generated by timing through the timer, so that automatic control is realized, and the method is safe and reliable.
In an alternative embodiment, the working principle of the invention may be as follows:
assuming that the internal reference voltage of the chip is 5V, the precision of the DAC module is 64, the effective value of the input voltage VIN is 0-5V, and the analog watchdog is intended to realize the interval monitoring of VIN 2V-4V, if VIN is greater than or equal to 2V and less than or equal to 4V, the watchdog considers that VIN input is normal, and if VIN is greater than 4V or VIN is less than or equal to 2V, the watchdog is that VIN input voltage is abnormal, and the specific relation is shown in table 1:
TABLE 1
| VIN(V) | Status of state |
| >4 | VIN alarm |
| 2～4 | VIN Normal |
| <2 | VIN alarm |
According to table 1, the relationship between the voltage values (2V, 4V) of the two key nodes and VIN needs to be clear, and the specific implementation is as follows
(1) Operating mode one (2V determination) the control logic sets DAC _ VA L to (2)*64) Vref, wait for the AC output to stabilize if the AC output isIs 1, then VIN>2V. else, VCC<Or ═ 2V.
(2) Operating mode two (4V decision) the control logic sets DAC _ VA L to (4)*64) Vref, wait for the AC output to stabilize, VIN if the AC output is 1>4V; otherwise, VCC<Or ═ 4V.
The detection module will sequentially determine the magnitude relationship between VIN and 2V, 4V values, so as to determine the specific time interval in which VIN falls as shown in table 2:
TABLE 2
| VIN(V) | Results of operation 1 | Results of operation 2 | AC output summarization |
| >4 | 1 | 1 | 2’b11 |
| 2～4 | 1 | 0 | 2’b10 |
| <2 | 0 | 0 | 2’b00 |
The whole working flow of the analog dongle is shown in fig. 4, which may specifically include:
step 1, in the low power consumption mode, a CPU is in the low power consumption mode such as sleep, a DAC module and an AC module are closed, a low power consumption timer is started, and other irrelevant modules are in the sleep or other low power consumption modes.
And 2, the digital logic part of the automatic detection module waits for detecting the trigger signal, and once the trigger signal is effective, the automatic detection module digitally starts battery electric quantity detection.
1) The DAC module and the AC module are turned on.
2) Operation mode one is performed by setting DAC _ VA L to (2)*64) and/Vref, wait for the AC output to stabilize and record the result.
3) The operation mode is performed to set DAC _ VA L to (4)*64) and/Vref, wait for the AC output to stabilize and record the result.
4) And summarizing the output results of the AC in the first operation mode and the second operation mode.
5) The DAC module and the AC module are turned off.
And 3, carrying out post-processing by the post-processing module according to the summarized AC result.
1) Denoising and filtering to ensure the detection result to be stable and reject abnormal results
2) And judging whether the output result summary is 2' b10, and if not, generating an interrupt to wake up the CPU.
And 4, after the CPU is awakened, the automatic detection module acquires the latest voltage value and performs the next abnormal processing.
In an alternative embodiment, the extended analysis of the simulated watchdog design in the solution of the present invention may include:
(1) the DAC precision is not limited to 64 and may be other configurations.
(2) The sequence of operations for the critical node voltage is not limited to low to high in the example, but may be high to low.
(3) The process of summarizing the AC output results is not limited to the logic implementation in the example, as long as the relationship between VIN and the preset interval can be determined.
(4) In the example, the VIN is detected to be an alarm exceeding a preset interval, but the VIN may be detected to be an alarm falling within the preset interval.
Since the processing and functions implemented by the method of this embodiment substantially correspond to the embodiment, principle and example of the analog watchdog device shown in fig. 1, no details are given in the description of this embodiment, and reference may be made to the related description in the foregoing embodiment, which is not repeated herein.
Through a large number of tests, the technical scheme of the embodiment is adopted, and the on-chip resources are fully utilized and the existing functions are multiplexed in the design of the main control chip, so that more flexible functions are realized, the consumption of additional circuits can be effectively avoided, and the cost is saved.
In summary, it is readily understood by those skilled in the art that the advantageous modes described above can be freely combined and superimposed without conflict.
The above description is only an example of the present invention, and is not intended to limit the present invention, and it is obvious to those skilled in the art that various modifications and variations can be made in the present invention. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the scope of the claims of the present invention.
Claims (12)
1. An analog watchdog device, comprising: a DAC module (10), an AC module (20) and a control logic module (50); wherein the content of the first and second substances,
the control logic module (50) is used for sending an input signal to the DAC module (10) according to a set trigger signal;
the DAC module (10) is used for performing digital-to-analog conversion processing according to the input signal and a set reference signal to obtain a required interval threshold voltage and outputting the required interval threshold voltage to the AC module (20);
the AC module (20) is used for comparing an external input analog voltage with the interval threshold voltage to obtain a comparison result; and outputting a result signal according to the comparison result.
2. The apparatus of claim 1, wherein outputting a result signal according to the comparison result comprises:
and outputting an abnormal signal if the external input analog voltage is greater than the upper limit of the interval threshold voltage or less than the lower limit of the interval threshold voltage, and outputting a normal signal if the external input analog voltage is less than or equal to the upper limit of the interval threshold voltage and greater than or equal to the lower limit of the interval threshold voltage.
3. The apparatus of claim 1 or 2, further comprising: a recording and post-processing module (30);
the control logic module (50) is further used for generating a sampling enabling signal and outputting the sampling enabling signal to the recording and post-processing module (30);
and the recording and post-processing module (30) is used for recording the output result of the AC module according to the sampling enabling signal and performing post-processing on the recorded output result.
4. The apparatus of claim 3, wherein the post-processing comprises: at least one of a noise removal process and a voltage value variation warning process.
5. The apparatus of claim 3 or 4, further comprising: a CPU (40);
and the CPU (40) is used for receiving the voltage value change warning processing and awakening the voltage value change warning processing when the post-processing of the recording and post-processing module (30) comprises the voltage value change warning processing, and then executing the set operation.
6. The apparatus of any of claims 1-5, further comprising: a timing module (60);
the timing module (60) is used for generating a trigger signal to the control logic module (50) according to the set timing time.
7. A control method of an analog watchdog device is characterized by comprising the following steps:
sending an input signal to the DAC module (10) according to a set trigger signal through a control logic module (50);
performing digital-to-analog conversion processing according to the input signal and a set reference signal through a DAC module (10) to obtain a required interval threshold voltage;
comparing the external input analog voltage with the interval threshold voltage through an AC module (20) to obtain a comparison result; and outputting a result signal according to the comparison result.
8. The method of claim 7, wherein outputting a result signal based on the comparison comprises:
and outputting an abnormal signal if the external input analog voltage is greater than the upper limit of the interval threshold voltage or less than the lower limit of the interval threshold voltage, and outputting a normal signal if the external input analog voltage is less than or equal to the upper limit of the interval threshold voltage and greater than or equal to the lower limit of the interval threshold voltage.
9. The method of claim 7 or 8, further comprising:
-also generating, by the control logic module (50), a sampling enable signal;
and recording the output result according to the sampling enabling signal through a recording and post-processing module (30), and performing post-processing on the recorded output result.
10. The method of claim 9, wherein the post-processing comprises: at least one of a noise removal process and a voltage value variation warning process.
11. The method of claim 9 or 10, further comprising:
when the post-processing includes a voltage value change warning processing, the CPU (40) receives the voltage value change warning processing and wakes up, and then executes the set operation.
12. The method according to one of claims 7 to 11, further comprising:
a trigger signal is generated by a timing module (60) according to the set timing time.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910002605.7A CN111400074A (en) | 2019-01-02 | 2019-01-02 | Watchdog simulating device and control method thereof |
| PCT/CN2019/108713 WO2020140500A1 (en) | 2019-01-02 | 2019-09-27 | Analogue watchdog apparatus and control method therefor |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201910002605.7A CN111400074A (en) | 2019-01-02 | 2019-01-02 | Watchdog simulating device and control method thereof |
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| CN111400074A true CN111400074A (en) | 2020-07-10 |
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Cited By (1)
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| CN112564705A (en) * | 2020-12-02 | 2021-03-26 | 湖北方圆环保科技有限公司 | Multi-channel data acquisition method for radon measuring instrument |
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