CN110729887B - Power management architecture and boost converter applied to same - Google Patents

Power management architecture and boost converter applied to same Download PDF

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CN110729887B
CN110729887B CN201910919377.XA CN201910919377A CN110729887B CN 110729887 B CN110729887 B CN 110729887B CN 201910919377 A CN201910919377 A CN 201910919377A CN 110729887 B CN110729887 B CN 110729887B
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switch
power management
boost converter
management architecture
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CN110729887A (en
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耿莉
郭卓奇
薛仲明
董力
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Xian Jiaotong University
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/06—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider
    • H02M3/07—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps
    • H02M3/073—Charge pumps of the Schenkel-type
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/14—Arrangements for reducing ripples from dc input or output
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0003—Details of control, feedback or regulation circuits
    • H02M1/0012—Control circuits using digital or numerical techniques

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Abstract

The invention discloses a power management architecture and a boost converter applied to the power management architecture, which comprises the boost converterThe input ends of the two pins are respectively connected with a pin V for providing a low-voltage power supply for the digital circuitINAnd digital circuit connections in the SoC system-on-chip; the output end of the boost converter is connected with the power supply of the low dropout regulator LDO, and the output of the low dropout regulator LDO provides high-voltage power supply for the analog and radio frequency circuit. The boost converter has high efficiency, low ripple and wide input and output range, and the power management architecture improves the overall power supply efficiency and is suitable for the SoC power supply solution under the advanced process.

Description

Power management architecture and boost converter applied to same
Technical Field
The invention belongs to the technical field of semiconductor integrated circuits and power electronic system design, and particularly relates to a power management architecture and a boost converter applied to the power management architecture.
Background
The power management module is widely applied to electronic equipment to modulate a power supply so as to meet the requirement of a load on the power supply. For a System on Chip (SoC), the power management module converts an off-Chip voltage into a lower voltage through a buck converter for use by digital, analog, and radio frequency circuits in the SoC. The ratio of current consumed by the digital circuits and analog circuits integrated in the SoC can reach 10:1 or even higher. Meanwhile, since the digital circuit can be well matched with the scaling down process, more and more analog and radio frequency modules are realized by the digital circuit in the SoC, and thus, the power management generally needs to provide more load current for the digital circuit. According to the traditional power management, a step-down DC-DC converter is adopted to step down input voltage and then supply power to a digital circuit through an LDO (low dropout regulator), along with the increase of the scale of the digital circuit in an SoC (system on a chip), more and more energy is consumed in the link of supplying power to the digital circuit through the LDO, and the power supply efficiency of the whole power management module is reduced. With the continuous reduction of the working voltage and the continuous increase of the current of the digital circuit, the overall efficiency of the traditional scheme is further deteriorated.
The power management module in the SoC has the problems that the power supply efficiency of a voltage reduction link is low due to the power supply requirement of a digital circuit, and the efficiency is continuously deteriorated due to the further increase of the proportion of the digital circuit in the SoC in the future. The conventional Boost structure has a right half-plane zero point, so that complex loop compensation needs to be performed on the conventional Boost structure in the design, and meanwhile, due to large output ripples, designers are generally reluctant to select the Boost structure to avoid performance degradation of a noise sensitive circuit in the SoC. The switched capacitor can only generate fixed output voltage due to the structure of the switched capacitor, and cannot meet SoC application.
Disclosure of Invention
The present invention provides a power management architecture and a boost converter applied to the power management architecture, in order to solve the above-mentioned technical problems, and the boost converter is used in the power management architecture, so as to improve the efficiency of the whole power management module. Meanwhile, the boost converter for the power management architecture has a wide input and output range, low ripple and high conversion efficiency, and the efficiency of the whole power management module is further improved.
The invention adopts the following technical scheme:
a power management architecture comprises a boost converter, wherein the input end of the boost converter is respectively connected with a pin V for providing low-voltage power supply for a digital circuitINAnd digital circuit connections in the SoC system-on-chip; the output end of the boost converter is connected with the power supply of the low dropout regulator LDO, and the output of the low dropout regulator LDO provides high-voltage power supply for the analog and radio frequency circuit.
Specifically, the power management architecture is a power management chip and is disposed outside the SoC system-on-chip.
Specifically, the power management architecture is a power management module, and is disposed inside the SoC system-on-chip.
Specifically, the Boost converter includes a Boost converter, a switched capacitor converter, and an SCB Boost converter.
Specifically, the low dropout regulator LDO includes a digital low dropout regulator, an analog low dropout regulator, and a digital-analog hybrid low dropout regulator.
Specifically, the number of the boost converter and the low dropout regulator LDO in the power management architecture is at least one.
Furthermore, the output end of each boost converter is connected with at least one power supply of the low dropout regulator LDO.
According to another technical scheme, the boost converter applying the power management architecture introduces k capacitors into the converter to boost the input voltage by 1+ k times to realize boost conversion, namely VOUT = (1 + kD)•VINAnd D is the duty cycle.
Specifically, the topology circuit of the boost converter is as follows:
switch S0.1The common end of the switch is grounded, the normally open end is divided into k +1 paths, and the first path passes through the switch S0.2Rear is respectively connected with VINAnd switch S0.3Is connected to the common terminal of the switch S0.3Is connected with V after passing through an inductor LOUTThe inductor L is also connected to the capacitor CLAnd a resistance RLGrounding; switch S0.1The second path of the normally open end passes through the capacitor C1And switch S1.1And switch S0.3The normally open end of (a) is connected; switch S0.1In the third path to the (k-1) th path of the normally open end, each path is respectively connected with a corresponding switch S2.3，S3.3……Sk-1.3Of the common terminal, switch S2.3，S3.3……Sk-1.3Are respectively connected with corresponding capacitors C2，……Ck-1Rear connection corresponding switch S2.1，……Sk-1.1Of the common terminal, switch S2.1，……Sk-1.1Respectively with a switch S0.3The normally open end of (a) is connected; switch S0.1Normally open terminal kth path and switch Sk.3Is connected to the common terminal of the switch Sk.3Is connected to the normally open end of the capacitor CKAnd switch S0.3The normally open end of (a) is connected; switch S1.1，S2.1……Sk-1.1Respectively via a switch S2.2，S3.2……Sk.2And switch S2.3，S3.3……Sk.3Are connected.
Further, during the charging cycle, switch S0.1，S0.3；S1.1，S2.1……Sk-1.1；S2.3，S3.3……Sk.3When the switch is closed, other switches are opened, and the voltage across the capacitor is charged to VIN(ii) a In the discharge cycle, switch S0.2；S2.2，S3.2……Sk.2When the switch is closed, other switches are opened, and the voltage on the left side of the inductor L becomes (1+ k). VIN。
Compared with the prior art, the invention has at least the following beneficial effects:
the invention relates to a power management architecture.A boost converter is adopted by an internal power management module to convert low voltage into high voltage to supply power for a needed analog and radio frequency circuit, so that the power supply efficiency of an SoC power management module is improved. The efficiency reduction caused by the cascade connection of a large current LDO behind the buck converter in the traditional architecture is avoided.
Furthermore, the power management architecture is arranged outside the SoC, so that the performance of the power management system can be improved, and the design cost can be reduced.
Furthermore, the power management framework is arranged inside the SoC, so that the integration level of the SoC system can be improved, and the cost of the whole machine is reduced.
Furthermore, the number of the boost converters and the low dropout regulators (LDOs) in the power management architecture is at least one, and the output end of each boost converter is at least connected with the power supply of one LDO, so that the power management architecture can generate different high-voltage power supplies to supply power for different analog and radio-frequency circuits.
A boost converter, SCB boost converter, can realize wide input/output range, low ripple, high efficiency. The loop control design is simple, and the output voltage can be improved by increasing the number of capacitors.
Further, the topology uses fewer switches to achieve the desired boost multiple. When the CMOS process is adopted for implementation, the switch control time sequence is simple, an additional substrate selection circuit is not needed, and a thin gate oxide device can be selected to reduce the area of a chip.
In conclusion, the boost converter has high efficiency, low ripple and wide input and output range, the overall power supply efficiency is improved by the power management architecture, and the boost converter is suitable for the SoC power supply solution under the advanced process.
The technical solution of the present invention is further described in detail by the accompanying drawings and embodiments.
Drawings
FIG. 1 is a power management architecture according to the present invention;
fig. 2 is a power stage topology of a Switch Capacitor-Buck boost converter structure according to the present invention, in which (a) is a charging period and (b) is a discharging period;
fig. 3 is an SCB converter prototype corresponding to k = 2;
FIG. 4 is a start-up procedure for the SCB converter;
FIG. 5 is an output voltage of a two duty cycle down converter;
FIG. 6 is a graph of boost converter efficiency according to the present invention;
FIG. 7 is a graph comparing the efficiency of the power management architecture of the present invention and the conventional architecture.
Detailed Description
The invention provides a power management architecture.A low voltage for supplying power to a digital circuit is directly provided by an external power supply of an SoC (system on chip), and an internal power management module supplies power to a required analog and radio frequency circuit by converting the low voltage into a high voltage by adopting a boost converter, so that the power supply efficiency of the SoC power management module is improved.
Referring to fig. 1, a power management architecture according to the present invention may form a power management module inside an SoC, or may be present in the form of a power management chip outside the SoC. Pin V for providing low-voltage power supply for digital circuitINThe output end of the boost converter is connected with the power supply of the low dropout regulator LDO, and the output of the low dropout regulator LDO provides high-voltage power supply for the analog and radio frequency circuit.
The Boost converter may be of various types including, but not limited to, Boost converters, switched capacitor converters, and the SCB Boost converter referred to herein.
The low dropout regulator LDO can be a digital LDO, an analog LDO, and a digital-analog hybrid LDO.
The number of the boost converter and the low dropout regulator (LDO) in the power management architecture can be one or more. The output of one boost converter can be connected with the power supply of one or more LDOs.
The invention provides a Switch Capacitor-Buck (SCB) boost converter, which realizes high conversion efficiency, low ripple and wide input and output range, and improves the overall efficiency of a power management module by combining with a power management architecture in the invention.
Referring to fig. 2, the boost converter of the present invention realizes boost conversion, i.e. V, by introducing k capacitors to boost the input voltage by (1+ k) times to the maximum on the basis of the conventional Buck converterOUT = (1 + kD)•VINAnd D is the duty cycle. The method specifically comprises the following steps:
switch S0.1The common end of the switch is grounded, the normally open end is divided into k +1 paths, and the first path passes through the switch S0.2Rear is respectively connected with VINAnd switch S0.3Is connected to the common terminal of the switch S0.3Is connected with V after passing through an inductor LOUTThe inductor L is also connected to the capacitor CLAnd a resistance RLGrounding; switch S0.1The second path of the normally open end passes through the capacitor C1And switch S1.1And switch S0.3The normally open end of (a) is connected; switch S0.1In the third path to the (k-1) th path of the normally open end, each path is respectively connected with a corresponding switch S2.3，S3.3……Sk-1.3Of the common terminal, switch S2.3，S3.3……Sk-1.3Are respectively connected with corresponding capacitors C2，……Ck-1Rear connection corresponding switch S2.1，……Sk-1.1Of the common terminal, switch S2.1，……Sk-1.1Respectively with a switch S0.3The normally open end of (a) is connected; switch S0.1Normally open terminal kth path and switch Sk.3Is connected to the common terminal of the switch Sk.3Is connected to the normally open end of the capacitor CKAnd switch S0.3The normally open end of (a) is connected; switch S1.1，S2.1……Sk-1.1Respectively via a switch S2.2，S3.2……Sk.2And switchS2.3，S3.3……Sk.3Are connected.
During the charging cycle, switch S0.1，S0.3；S1.1，S2.1……Sk-1.1；S2.3，S3.3……Sk.3When the switch is closed, other switches are opened, and the voltage across the capacitor is charged to VIN。
In the discharge cycle, switch S0.2；S2.2，S3.2……Sk.2When the switch is closed, other switches are opened, and the voltage on the left side of the inductor L becomes (1+ k). VIN。
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. The components of the embodiments of the present invention generally described and illustrated in the figures herein may be arranged and designed in a wide variety of different configurations. Thus, the following detailed description of the embodiments of the present invention, presented in the figures, is not intended to limit the scope of the invention, as claimed, but is merely representative of selected embodiments of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 3, for the SCB converter prototype corresponding to k =2, S1 to S6 represent the switch tubes and the control signals corresponding to the switch tubes. For dead time control, the switch tube S2 turns off early and turns on late to ensure that S1, S2 do not form a low resistance path. The switch tube S5 also needs the same switching timing as S2 to ensure that S1, S3, S4, S5, S6 do not form a low resistance path. The switching tubes S1, S2 and S4 adopt low-voltage control logic, and the switching tubes S3, S5 and S6 adopt high-voltage control logic.
All switch tubes adopt thin gate oxide MOSFETs to reduce the chip area. The high-voltage signal is generated by a level shifter, and the power supply of the level shifter module is VYThe node is provided, and the switching tube S5 is realized in the cycleA complete turn-off characteristic during switching. Meanwhile, the level converter works in a full low-voltage mode in a charging period, so that static power consumption is reduced, and the efficiency of the converter is improved. For substrate selection and design, all NMOS substrates are connected to GND and PMOS substrates are connected as shown in fig. 3, without additional substrate control circuitry.
The clock and control module includes dead time control, switch tube logic control, and drive buffers for the switch tubes S1, S2, S4. Similar to the level shifter, the buffers driving the gate terminals of S3, S5 and S6 are also set to VYThe node supplies power and works in a low-voltage domain in a charging period, and the efficiency of the converter is further improved. The start-up procedure of the converter is shown in fig. 4. The duty cycle is limited to a maximum value D during the start-up phaseMAXThe output voltage gradually rises, the duty ratio drops after exceeding the set value, the output voltage is adjusted to the set value after a short overshoot, and the duty ratio becomes a stable value corresponding to the output.
Referring to fig. 5, the output voltage of two duty cycle down converters is shown. The input voltage is 1.3V, the switching frequency is 500kHz, and output voltages of 2.5V and 3.4V are achieved at duty cycles of 0.46 and 0.81, respectively.
Referring to FIGS. 6 and 7, FIG. 6 shows an SCB converter of the present invention at VINThe efficiency is corresponding to three different output voltages and different load currents under the switching frequency of 1.3V and 500 kHz. When the output voltages were 1.8V, 2.5V and 3.4V, respectively, and the output currents were 70mA, 80mA and 30mA, the efficiencies were 94.5%, 93.0% and 92.8%, respectively.
FIG. 7 is a comparison of the efficiency of a conventional power management module and a power management module of the present invention for different current ratios of digital to analog circuits.
For the architecture of fig. 1 and the conventional power management architecture, the change in system efficiency when the current ratio of the digital to analog circuit is from 10:1 to 50:1 is shown in fig. 7 under the condition that the total power consumption of the SoC analog and digital circuits is 1W.
The power management architecture of the present invention achieves higher system efficiency when the current ratio is increased, while the conventional architecture efficiency is almost unchanged. More importantly, as the voltage of the digital circuit is continuously reduced, the efficiency of the traditional scheme is reduced, the influence on the efficiency of the digital circuit is small, and when the proportion of the digital current is increased, the influence is further reduced, and the high efficiency is always kept. The power management architecture of the present invention improves efficiency by at least 12.2% over conventional architectures. Therefore, the power management architecture of the invention is suitable for the design of the current SoC and is more suitable for the application of lower voltage and larger current of a future digital circuit.
The SCB converter in the invention can set the boost ratio according to the input and output voltages to realize better efficiency. And a thick gate oxide device is not required to be used as a power tube, so that the area of a chip is saved, and higher power density is realized. A special circuit is not required to be designed for substrate control, and the level conversion and driving Buffer adopts an internal node to supply power so as to further improve the efficiency. Compared with a Buck-based power management system, the electric management architecture can greatly improve the energy efficiency. Compared with a power management system mainly based on Boost, the output ripple and the compensation method of the power management system are close to Buck, and the inherent defects of complex design, large output ripple and the like of a Boost circuit are overcome.
The above-mentioned contents are only for illustrating the technical idea of the present invention, and the protection scope of the present invention is not limited thereby, and any modification made on the basis of the technical idea of the present invention falls within the protection scope of the claims of the present invention.

Claims (1)

1. A Boost converter for a power management architecture is characterized in that the power management architecture comprises a Boost converter, the Boost converter comprises a Boost converter, a switched capacitor converter and an SCB Boost converter, and the input end of the Boost converter is respectively connected with a pin V for providing low-voltage power supply for a digital circuitINAnd digital circuit connections in the SoC system-on-chip; the output end of the boost converter is connected with the power supply of the low dropout linear regulator (LDO), the output of the LDO provides high-voltage power supply for the analog and radio frequency circuits, the LDO comprises a digital LDO, an analog LDO and a digital-analog mixed LDO, and the boost converterThe number of the converter and the low dropout regulator LDO in the power management architecture is at least one; when the power management architecture is a power management chip, the power management architecture is arranged outside the SoC system-on-chip; when the power management architecture is a power management module, the power management architecture is arranged in an SoC system-on-chip, and the output end of each boost converter is at least connected with a power supply of a low dropout regulator (LDO);
k capacitors are introduced into the converter to boost the input voltage by 1+ k times to realize boost conversion, namely VOUT = (1 + kD)•VINAnd D is the duty cycle;
the topological circuit of the boost converter is as follows:
switch S0.1The common end of the switch is grounded, the normally open end is divided into k +1 paths, and the first path passes through the switch S0.2Rear is respectively connected with VINAnd switch S0.3Is connected to the common terminal of the switch S0.3Is connected with V after passing through an inductor LOUTThe inductor L is also connected to the capacitor CLAnd a resistance RLGrounding; switch S0.1The second path of the normally open end passes through the capacitor C1And switch S1.1And switch S0.3The normally open end of (a) is connected; switch S0.1In the third path to the (k-1) th path of the normally open end, each path is respectively connected with a corresponding switch S2.3，S3.3……Sk-1.3Of the common terminal, switch S2.3，S3.3……Sk-1.3Are respectively connected with corresponding capacitors C2，……Ck-1Rear connection corresponding switch S2.1，……Sk-1.1Of the common terminal, switch S2.1，……Sk-1.1Respectively with a switch S0.3The normally open end of (a) is connected; switch S0.1Normally open terminal kth path and switch Sk.3Is connected to the common terminal of the switch Sk.3Is connected to the normally open end of the capacitor CKAnd switch S0.3The normally open end of (a) is connected; switch S1.1，S2.1……Sk-1.1Respectively via a switch S2.2，S3.2……Sk.2And switch S2.3，S3.3……Sk.3Is connected at the normally open end, during the charging period, the switch S0.1，S0.3；S1.1，S2.1……Sk-1.1；S2.3，S3.3……Sk.3When the switch is closed, other switches are opened, and the voltage across the capacitor is charged to VIN(ii) a In the discharge cycle, switch S0.2；S2.2，S3.2……Sk.2When the switch is closed, other switches are opened, and the voltage on the left side of the inductor L becomes (1+ k). VIN；
Duty cycle of start-up phase of SCB converter is limited to maximum value DMAXWhen the output voltage exceeds the set value, the duty ratio is decreased, the output voltage is adjusted to the set value after overshoot, and the duty ratio becomes a stable value corresponding to the output.
CN201910919377.XA 2019-09-26 2019-09-26 Power management architecture and boost converter applied to same Active CN110729887B (en)

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