CN110190765B - Novel three-phase voltage type PWM converter disturbance-rejection method based on dead-beat control - Google Patents

Novel three-phase voltage type PWM converter disturbance-rejection method based on dead-beat control Download PDF

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CN110190765B
CN110190765B CN201910473877.5A CN201910473877A CN110190765B CN 110190765 B CN110190765 B CN 110190765B CN 201910473877 A CN201910473877 A CN 201910473877A CN 110190765 B CN110190765 B CN 110190765B
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施艳艳
杨岚
张毅
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Henan Normal University
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/02Conversion of ac power input into dc power output without possibility of reversal
    • H02M7/04Conversion of ac power input into dc power output without possibility of reversal by static converters
    • H02M7/12Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/21Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/217Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M7/219Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only in a bridge configuration

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Abstract

The invention discloses a novel three-phase voltage type PWM converter disturbance resisting method based on dead-beat control, which is characterized in that a current formula under a dq coordinate system is dispersed to obtain a dq axis current prediction model, and in order to enable the dq axis current to follow a given value and realize dead-beat control, the actual value of the dq axis current at the next moment is required to be equal to the given value at the same moment. And adding the predicted d-axis voltage and the compensation voltage obtained by the disturbance compensator to obtain a result and the predicted q-axis voltage, and obtaining a switching signal for controlling the power device through the action of SVPWM. When the three-phase voltage type PWM converter is interfered, the method provided by the invention is applied to achieve the purpose of stable operation of the system.

Description

Novel three-phase voltage type PWM converter disturbance-rejection method based on dead-beat control
Technical Field
The invention belongs to the technical field of power electronic power conversion device control, and particularly relates to a novel three-phase voltage type PWM converter disturbance-resistant method based on dead-beat control.
Background
With the development of power electronics technology, various power converters using Pulse Width Modulation (PWM) technology are commonly used in industry and in daily life. The three-phase voltage type PWM converter is generally applied by the advantages of unit power factor operation, network side current sine, adjustable direct current bus voltage and the like.
In the application of the three-phase voltage type PWM converter, the advantage and disadvantage of the current loop control performance are one of the main factors influencing the quality of electric energy. The traditional double closed-loop control method designs a current loop as a PI regulator, and although PI control optimizes the frequency spectrum distribution and harmonic component of the output voltage of a PWM converter and realizes the non-static tracking of a direct current component, the capacity of the PI regulator in the aspects of restraining power grid background harmonic waves and external disturbance is not ideal. Therefore, a control method for solving the above problems, i.e. a new disturbance rejection method for a three-phase voltage type PWM converter based on dead-beat control, is urgently needed. The method not only can enable the three-phase voltage type PWM converter system to stably operate under external disturbance, but also has the advantage of high dynamic response speed.
Disclosure of Invention
The invention provides a novel three-phase voltage type PWM converter disturbance rejection method based on dead-beat control. The method mainly solves the problem that the stability is poor when the system is interfered. When interference exists, dispersing a dq-axis current formula under a two-phase synchronous rotating coordinate system to obtain a dq-axis current prediction model, in order to enable the dq-axis current to follow a given value in the model and realize dead-beat control, needing the actual value of the dq-axis current at the next moment to be equal to the given value at the same moment, and achieving the purpose of stable operation of a system after a disturbance compensator compensates the system.
The invention adopts the following technical scheme for solving the technical problems: a novel three-phase voltage type PWM converter disturbance rejection method based on dead-beat control is characterized by comprising the following specific steps: (1) detecting three-phase power grid voltage, three-phase input current and direct current bus voltage of a three-phase voltage type PWM converter system, and obtaining a power grid voltage position angle by a three-phase power grid voltage signal through a software phase-locked loop; (2) the detected three-phase power grid voltage and three-phase input current are processed by an 3/2 conversion module to obtain power grid voltage and input current under a two-phase static coordinate system; (3) subjecting the input current under the two-phase static coordinate system obtained in the step (2) to park transformation to obtain d-axis current and q-axis current under a synchronous rotating coordinate system; (4) and the voltages of the dq axes of the alternating current sides of the three-phase voltage type PWM converter under the two-phase rotating coordinate system are respectively ud=Rid+ed+Ldid/dt-ωLiq,uq=Riq+eq+Ldiq/dt+ωLidWherein R and L are respectively equivalent resistance and equivalent inductance of the three-phase AC reactor, idAnd iqD-axis current and q-axis current in a two-phase rotating coordinate system, edAnd eqIs the dq axis component of the grid electromotive force; (5) assuming a sampling period of TsDispersing the dq axis voltage of the three-phase voltage type PWM converter under a two-phase rotating coordinate system to obtain id(k+1)-id(k)=Ts[ωiq+(ud-ed-Rid)/L],iq(k+1)-iq(k)=Ts[-ωid+(uq-eq-Riq)/L]The purpose of the deadbeat control is to bring the dq-axis current to a given value at time k +1, i.e. id(k+1)、iq(k +1) are set values of dq axis current at the moment of k +1 respectively
Figure BDA0002081587410000021
(6) And (5) transforming the dq axis voltage discrete formula of the three-phase voltage type PWM converter in the two-phase rotating coordinate system to obtain the voltage discrete formula
Figure BDA0002081587410000022
Figure BDA0002081587410000023
Deriving u from the formulad(k)、uq(k);(7)、id(k) And ud(k) Obtaining a compensation voltage after the action of the disturbance compensator
Figure BDA0002081587410000024
(8) Obtaining the compensation voltage in the step (7)
Figure BDA0002081587410000025
And u obtained in step (6)d(k) Adding to obtain u'd(k) (ii) a (9) And (3) the u obtained in the step (6)q(k) And u 'obtained in step (8)'d(k) And obtaining a switching signal for controlling the power device through space vector pulse width modulation.
Preferably, the design process of the disturbance compensator in step (7) specifically includes: the equation of the first order linear system when there is no interference and when there is interference is calculated respectively is
Figure BDA0002081587410000026
Wherein u isqFor actual input, u is equivalent input, y is output, d is applied interference, a1、b1Is a nominal parameter, a2、b2Is a real parameter, and a1>0,a2>0,b1>0,b2The disturbance compensator aims to make the final output of the disturbed system after the action of the disturbance compensator consistent with the output result of the system without disturbance, namely-a2y+b2(u-d)=-a1y+b1uiWill be
Figure BDA0002081587410000027
Can be obtained by substituting the above formula
Figure BDA0002081587410000028
Figure BDA0002081587410000029
To compensate for the term, the disturbed first order linear system equation is parameterized as a nominal parameter, in this case
Figure BDA00020815874100000210
In the formula deFor lumped disturbance, let
Figure BDA00020815874100000211
Where k is a variable and k tends to be infinitesimally small, will
Figure BDA00020815874100000212
Four-type simultaneous obtaining
Figure BDA00020815874100000213
The disturbance compensator is designed as
Figure BDA00020815874100000214
l is the disturbance compensator gain.
Preferably, the designed parameter tuning process of the disturbance compensator specifically includes: will be provided with
Figure BDA00020815874100000215
Figure BDA00020815874100000216
Can be obtained simultaneously
Figure BDA00020815874100000217
Order to
Figure BDA00020815874100000218
Then there are
Figure BDA00020815874100000219
Given a disturbance compensator of
Figure BDA00020815874100000220
In the formula k1、k2、k3For the disturbance compensator parameters, the current inner loop open loop transfer function of the system is expressed as
Figure BDA0002081587410000031
Because k isii=kipi、τiSubstituting L/R into the above formula
Figure BDA0002081587410000032
To further simplify and form negative feedback in the latter half, let k1=-k2R、k2=l、k3=-k2L, then has
Figure BDA0002081587410000033
The voltage compensation provided by the disturbance compensator is
Figure BDA0002081587410000034
Where τ is the integral variable.
According to the technical scheme, the invention has the beneficial effects that: the method comprises the steps of selecting a three-phase voltage type PWM converter as a research object, considering uncertainty of external interference, realizing dead-beat control by applying a dq-axis current prediction model, estimating the external interference and compensating the system by designing a disturbance compensator after the disturbance compensator compensates the system, and finally verifying effectiveness of the disturbance compensator through an operation result.
Drawings
FIG. 1 is a diagram of the main circuit topology of the three-phase voltage type PWM converter of the present invention;
FIG. 2 is a first order linear system in an ideal case;
FIG. 3 is a first order linear system with compensation applied when there is interference;
FIG. 4 is a flow chart for implementing a novel disturbance rejection method for a three-phase voltage type PWM converter based on dead-beat control;
FIG. 5 is a waveform diagram of DC bus voltage, three phase current, and d-axis current using a conventional method system under sinusoidal disturbance;
FIG. 6 is a waveform diagram of DC bus voltage, three-phase current and d-axis current of a system using the method of the present invention under sinusoidal interference.
Detailed description of the invention
The details of the present invention are described in detail with reference to the accompanying drawings. The main circuit topological structure of the three-phase voltage type PWM converter is shown in figure 1, and the technical scheme adopted by the invention is as follows: the novel three-phase voltage type PWM converter disturbance-resistant method based on dead-beat control comprises the following specific steps:
(1) establishing a mathematical model of the three-phase voltage type PWM converter
In a synchronous rotation dq coordinate system, establishing a mathematical model of a three-phase voltage type PWM converter:
Figure BDA0002081587410000035
in the formula of UdcAnd C is a direct current side bus voltage and a direct current filter capacitor respectively.
Discretizing the formula (1) to obtain
Figure BDA0002081587410000041
In the formula, TsIs the sampling period.
The purpose of the deadbeat control is to bring the dq-axis current to a given value at time k +1, i.e. id(k+1)、iq(k +1) are set values of dq axis current at the moment of k +1 respectively
Figure BDA0002081587410000042
Thus, the formula (2) can be changed to
Figure BDA0002081587410000043
(2) Design of disturbance compensator
The systems shown in FIGS. 2 and 3 are respectively shown as
Figure BDA0002081587410000044
Figure BDA0002081587410000045
In the formula uiFor actual input, u is equivalent input, y is output, d is applied interference, a1、b1Is a nominal parameter, a2、b2Is a real parameter, and a1>0,a2>0,b1>0,b2>0。
The parameter in equation (5) is changed to a nominal parameter, in this case
Figure BDA0002081587410000046
Lumped disturbance d of the system when disturbedeCan be expressed as
Figure BDA0002081587410000047
Is easily obtained from figure 3
Figure BDA0002081587410000048
In the formula (I), the compound is shown in the specification,
Figure BDA0002081587410000049
is a compensation term.
The purpose of the disturbance compensator is to make the final output of the disturbed system after the disturbance compensator is acted consistent with the output result of the system without disturbance, i.e. let the formula (5) and the formula (4) be equivalent, in this case
-a2y+b2(u-d)=-a1y+b1ui (9)
Substituting (8) into (9) with
Figure BDA00020815874100000410
Order to
Figure BDA0002081587410000051
In the formula, k is a variable, and k tends to be infinitesimal.
The combination of (5), (8) and (11) can be obtained
Figure BDA0002081587410000052
The (6) and (12) are combined to obtain
Figure BDA0002081587410000053
Therefore, in order to suppress the disturbance, the disturbance compensator is designed to
Figure BDA0002081587410000054
In the formula, l is the gain of the disturbance compensator, and when l is large enough, the final output result of the system after the disturbed system passes through the action of the disturbance compensator is consistent with the output result of the system without disturbance.
The above procedure shows that in the presence of disturbances, by using the disturbance compensator described above, the system has ideal (disturbance-free) performance.
(3) Setting disturbance compensator parameters and compensating the system
Formula (14) can be changed into
Figure BDA0002081587410000055
For further simplification, let
Figure BDA0002081587410000056
Then there are
Figure BDA0002081587410000057
From (16) and (17), the parameters of the disturbance compensator are given
Figure BDA0002081587410000058
In the formula, k1、k2、k3Is the disturbance compensator parameter.
The current inner loop open loop transfer function of the system can be expressed as
Figure BDA0002081587410000061
Because k isii=kipi、τiL/R, the current inner loop open loop transfer function can be scaled as
Figure BDA0002081587410000062
For further simplification, and making the latter half form negative feedback, let
Figure BDA0002081587410000063
At this time, the disturbance compensator parameters are changed into
Figure BDA0002081587410000064
The compensation term provided by the disturbance compensator in the system can now be expressed as
Figure BDA0002081587410000065
Fig. 4 is a flow chart of the new disturbance rejection method for the two-phase voltage-type PWM converter under deadbeat control according to the present invention. The control method specifically comprises the following steps:
(1) three-phase power grid voltage E of three-phase voltage type PWM converter systemg,a、Eg,b、Eg,cThree-phase input current ia、ib、icAnd DC bus voltage UdeObtaining a power grid voltage position angle theta (k) by a three-phase power grid voltage signal through a software phase-locked loop (PLL);
(2) three-phase network voltage E to be detectedg,a、Eg,b、Eg,cAnd the three-phase input current is converted into the power grid voltage u under the two-phase static coordinate system through the 3/2 conversion moduleg,α、ug,βAnd an input current ig,α、ig,β
(3) Inputting the input current i under the two-phase static coordinate system obtained in the step (2)g,α、ig,βD-axis current i under a synchronous rotating coordinate system is obtained through park transformationdAnd q-axis current iq
(4) And the voltages of the alternating current side d and the q axis of the three-phase voltage type PWM converter under the two-phase rotating coordinate system are respectively ud=Rid+ed+Ldid/dt-ωLiq,uq=Riq+eq+Ldiq/dt+ωLidWherein R and L are respectively equivalent resistance and equivalent inductance of the three-phase AC reactor, idAnd iqD-axis current and q-axis current in a two-phase rotating coordinate system, edAnd eqIs the dq axis component of the grid electromotive force;
(5) assuming a sampling period of TsDispersing the dq axis voltage of the three-phase voltage type PWM converter under a two-phase rotating coordinate system to obtain id(k+1)-id(k)=Ts[ωiq+(ud-ed-Rid)/L],iq(k+1)-iq(k)=Ts[-ωid+(uq-eq-Riq)/L]The purpose of the deadbeat control is to bring the dq-axis current to a given value at time k +1, i.e. id(k+1)、iq(k +1) are set values of dq axis current at the moment of k +1 respectively
Figure BDA00020815874100000714
(6) And (5) transforming the dq axis voltage discrete formula of the three-phase voltage type PWM converter in the two-phase rotating coordinate system to obtain the voltage discrete formula
Figure BDA0002081587410000071
Figure BDA0002081587410000072
Deriving u from the formulad(k)、uq(k);
(7)、id(k) And ud(k) Obtaining a compensation voltage after the action of the disturbance compensator
Figure BDA0002081587410000073
(8) Obtaining the compensation voltage in the step (7)
Figure BDA0002081587410000074
And u obtained in step (6)d(k) Adding to obtain u'd(k);
(9) And (3) the u obtained in the step (6)q(k) And u 'obtained in step (8)'d(k) And obtaining a switching signal for controlling the power device through space vector pulse width modulation.
As a further embodiment, the design process of the disturbance compensator in step 7 specifically includes: the equation of the first order linear system when there is no interference and when there is interference is calculated respectively is
Figure BDA0002081587410000075
Wherein u isiFor actual input, u is equivalent input, y is output, d is applied interference, a1、b1Is a nominal parameter, a2、b2Is a real parameter, and a1>0,a2>0,b1>0,b2Is greater than 0. The purpose of the disturbance compensator is to make the final output of the disturbed system after the disturbance compensator act consistent with the output of the system without disturbance, i.e. -a2y+b2(u-d)=-a1y+b1ui. Will be provided with
Figure BDA0002081587410000076
Can be obtained by substituting the above formula
Figure BDA0002081587410000077
Figure BDA0002081587410000078
Is a compensation term. Parameterizing the disturbed first-order linear system equation to nominal parameters, in this case
Figure BDA0002081587410000079
In the formula deIs a lumped perturbation. Order to
Figure BDA00020815874100000710
Where k is a variable and k tends to be infinitesimal. Will be provided with
Figure BDA00020815874100000711
Four-type simultaneous obtaining
Figure BDA00020815874100000712
Therefore, the disturbance compensator is designed to
Figure BDA00020815874100000713
l is the disturbance compensator gain.
The parameter setting process of the disturbance compensator specifically comprises the following steps: will be provided with
Figure BDA0002081587410000081
Can be obtained simultaneously
Figure BDA0002081587410000082
Order to
Figure BDA0002081587410000083
Then there are
Figure BDA0002081587410000084
Given a disturbance compensator of
Figure BDA0002081587410000085
In the formula k1、k2、k3Is the disturbance compensator parameter. The current inner loop open loop transfer function of the system can be expressed as
Figure BDA0002081587410000086
Because k isii=kipi、τiSubstituting L/R into the above formula
Figure BDA0002081587410000087
For further simplification, and making the latter half form negative feedback, let k1=-k2R、k2=l、k3=-k2L, then has
Figure BDA0002081587410000088
Figure BDA0002081587410000089
The voltage compensation provided by the disturbance compensator is
Figure BDA00020815874100000810
Where τ is the integral variable.
In order to be able to clearly understand the advantages of the method, a comparative study was carried out on the disturbance rejection capabilities of the general method and the proposed method.
FIG. 5 is a waveform diagram of DC bus voltage, three-phase current, and d-axis current of a system using a conventional method under sinusoidal disturbance.
FIG. 6 is a waveform diagram of DC bus voltage, three-phase current and d-axis current of a system applying the method of the present invention under sinusoidal disturbance.
As can be seen from the comparison between fig. 5 and fig. 6, under the condition of sinusoidal disturbance, compared with the conventional method, the method of the present invention has better stability for the dc bus voltage waveform, the three-phase current waveform, and the d-axis current waveform of the three-phase voltage type PWM converter.
While the foregoing examples illustrate the principles, principal features and advantages of the invention, it will be understood by those skilled in the art that the invention is not limited thereto, and that the foregoing examples and descriptions are provided only for the purpose of illustrating the principles of the invention, and that various changes and modifications may be made therein without departing from the scope of the invention.

Claims (3)

1. A novel three-phase voltage type PWM converter disturbance rejection method based on dead-beat control is characterized by comprising the following specific steps: (1) detecting three-phase power grid voltage, three-phase input current and direct current bus voltage of a three-phase voltage type PWM converter system, and obtaining a power grid voltage position angle by a three-phase power grid voltage signal through a software phase-locked loop; (2) the detected three-phase power grid voltage and three-phase input current are processed by an 3/2 conversion module to obtain power grid voltage and input current under a two-phase static coordinate system; (3) subjecting the input current under the two-phase static coordinate system obtained in the step (2) to park transformation to obtain d-axis current and q-axis current under a synchronous rotating coordinate system; (4) and the voltages of the dq axes of the alternating current sides of the three-phase voltage type PWM converter under the two-phase rotating coordinate system are respectively ud=Rid+ed+Ldid/dt-ωLiq,uq=Riq+eq+Ldiq/dt+ωLidWherein R and L are respectively equivalent resistance and equivalent inductance of the three-phase AC reactor, idAnd iqD-axis current and q-axis current in a two-phase rotating coordinate system, edAnd eqThe dq component of the electromotive force of the power grid is shown, and omega is the synchronous rotation angular velocity of a dq coordinate system; (5) suppose thatSampling period of TsDispersing the dq axis voltage of the three-phase voltage type PWM converter under a two-phase rotating coordinate system to obtain id(k+1)-id(k)=Ts[ωiq+(ud-ed-Rid)/L],iq(k+1)-iq(k)=Ts[-ωid+(uq-eq-Riq)/L]The purpose of the deadbeat control is to bring the dq-axis current to a given value at time k +1, i.e. id(k+1)、iq(k +1) are set values of dq axis current at the moment of k +1 respectively
Figure FDA0002936471930000015
id(k)、iq(k) D-axis current value and q-axis current value at the moment k respectively; (6) and (5) transforming the dq axis voltage discrete formula of the three-phase voltage type PWM converter in the two-phase rotating coordinate system to obtain the voltage discrete formula
Figure FDA0002936471930000011
Deriving u from the formulad(k)、uq(k) In the formula ed(k)、eq(k) D-axis component and q-axis component of the grid electromotive force at the moment k respectively; (7) i, id(k) And ud(k) Obtaining a compensation voltage after the action of the disturbance compensator
Figure FDA0002936471930000012
(8) Obtaining the compensation voltage in the step (7)
Figure FDA0002936471930000013
And u obtained in step (6)d(k) Adding to obtain u'd(k) (ii) a (9) And (3) the u obtained in the step (6)q(k) And u 'obtained in step (8)'d(k) And obtaining a switching signal for controlling the power device through space vector pulse width modulation.
2. The novel disturbance rejection method for the three-phase voltage type PWM converter based on the dead-beat control as claimed in claim 1, wherein: of the disturbance compensator in step (7)The design process specifically comprises: the equation of the first order linear system when there is no interference and when there is interference is calculated respectively is
Figure FDA0002936471930000014
Wherein u isiIs the actual input quantity of the first order linear system, u is the equivalent input quantity of the first order linear system, y is the output quantity of the first order linear system, d is the applied disturbance, a1、b1Is a nominal parameter, a2、b2Is a real parameter, and a1>0,a2>0,b1>0,b2>The purpose of the disturbance compensator is to make the final output of the disturbed system after the disturbance compensator is applied consistent with the output of the system without disturbance, i.e. -a2y+b2(u-d)=-a1y+b1uiWill be
Figure FDA0002936471930000021
Can be obtained by substituting the above formula
Figure FDA0002936471930000022
Figure FDA0002936471930000023
The voltage compensation provided for the disturbance compensator parameterizes the disturbed first order linear system equation as a nominal parameter, in this case
Figure FDA0002936471930000024
In the formula deFor lumped disturbance, let
Figure FDA0002936471930000025
Where k is a variable and k tends to be infinitesimally small, will
Figure FDA0002936471930000026
Four-type simultaneous obtaining
Figure FDA0002936471930000027
The disturbance compensator is designed as
Figure FDA0002936471930000028
l is the disturbance compensator gain.
3. The novel deadbeat control-based disturbance rejection method for the three-phase voltage type PWM converter according to claim 2, wherein the parameter setting process of the designed disturbance compensator specifically comprises: will be provided with
Figure FDA0002936471930000029
Figure FDA00029364719300000210
Can be obtained simultaneously
Figure FDA00029364719300000211
Order to
Figure FDA00029364719300000212
Eta is an intermediate variable of the compensator design, thus
Figure FDA00029364719300000213
Given a disturbance compensator of
Figure FDA00029364719300000214
In the formula k1、k2、k3For disturbance compensator parameters, udThe output voltage of the PI controller in the d-axis of the current inner loop is represented as the open-loop transfer function of the current inner loop of the system
Figure FDA00029364719300000215
Because k isii=kipi、τiSubstituting L/R into the above formula
Figure FDA00029364719300000216
In the formula, kipAnd kiiProportional coefficient and integral coefficient respectively, and making k form negative feedback in the latter half for further simplification1=-k2R、k2=l、k3=-k2L, then has
Figure FDA00029364719300000217
The voltage compensation provided by the disturbance compensator is
Figure FDA00029364719300000218
Where τ is the integral variable.
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CN107645245A (en) * 2016-07-22 2018-01-30 刘铮 A kind of Novel electric die mould PWM rectifier control method
CN109687801B (en) * 2019-02-21 2020-11-13 南京工程学院 Dead-beat current control method for permanent magnet synchronous linear motor

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