CN108964458B - High-efficiency switch circuit - Google Patents

High-efficiency switch circuit Download PDF

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CN108964458B
CN108964458B CN201810491782.1A CN201810491782A CN108964458B CN 108964458 B CN108964458 B CN 108964458B CN 201810491782 A CN201810491782 A CN 201810491782A CN 108964458 B CN108964458 B CN 108964458B
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branch
transistors
leg
diode
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CN108964458A (en
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丹尼尔·兹穆德
察希·格罗文斯基
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SolarEdge Technologies Ltd
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
    • H02M3/1584—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load with a plurality of power processing stages connected in parallel
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/06—Modifications for ensuring a fully conducting state
    • H03K17/063—Modifications for ensuring a fully conducting state in field-effect transistor switches
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H02M1/088—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/10—Modifications for increasing the maximum permissible switched voltage
    • H03K17/102—Modifications for increasing the maximum permissible switched voltage in field-effect transistor switches
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/16—Modifications for eliminating interference voltages or currents
    • H03K17/161—Modifications for eliminating interference voltages or currents in field-effect transistor switches
    • H03K17/162—Modifications for eliminating interference voltages or currents in field-effect transistor switches without feedback from the output circuit to the control circuit
    • H03K17/163—Soft switching
    • H03K17/164—Soft switching using parallel switching arrangements
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/567—Circuits characterised by the use of more than one type of semiconductor device, e.g. BIMOS, composite devices such as IGBT
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/12—Modifications for increasing the maximum permissible switched current
    • H03K17/122—Modifications for increasing the maximum permissible switched current in field-effect transistor switches
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
    • H03K17/6871—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors the output circuit comprising more than one controlled field-effect transistor
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K2217/00—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
    • H03K2217/0036—Means reducing energy consumption
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K2217/00—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
    • H03K2217/0054—Gating switches, e.g. pass gates

Abstract

A switching device includes a first branch having a plurality of transistors connected in series. The switching device further includes a second branch having a transistor connected in parallel with the first branch. The switching device further includes a controller that controls the plurality of transistors and the transistor. The controller is configured to: the switching device is transitioned from the first state to the second state by first transitioning the transistor from the first state to the second state and then transitioning the plurality of transistors from the first state to the second state.

Description

High-efficiency switch circuit
RELATED APPLICATIONS
This application claims priority from U.S. provisional application serial No.62/510,838, entitled "Efficient Switching Circuit," filed 5.25.2017, the entire contents of which are incorporated herein by reference.
Background
In certain circuits, it is sometimes desirable to connect multiple transistors in series to form an equivalent switch with increased effective voltage blocking capability. Series connection of Insulated Gate Bipolar Transistors (IGBTs) with other high voltage switches has been used in series connection for medium voltage applications and high voltage applications, which often necessitates the use of some means of static and dynamic balancing of the voltage across the device to ensure reliable operation, which may actually increase losses in the system, and is therefore commonly used for low frequency switching applications. There is a need and it would be advantageous to have a low voltage switching (e.g., low voltage MOSFET) device and method of operation of the low voltage switching to enable cost effective and efficient switching at high frequencies.
Disclosure of Invention
The following summary may be a brief summary of some of the inventive concepts for illustrative purposes only and may not be intended to limit or restrict the invention or the examples in the detailed description. Other novel combinations and features will be apparent to those skilled in the art from the detailed description.
Embodiments disclosed herein may include low voltage switching devices and methods for their operation. The illustrative embodiments include: stacked (i.e., series connected) Low Voltage (LV) Metal Oxide Semiconductor Field Effect Transistors (MOSFETs) are employed to form equivalent switches with increased voltage blocking capability. In some embodiments, the Low Voltage MOSFET (LVM) is oriented to block voltage in one direction, while in some embodiments, the LVM is oriented to block voltage in two directions.
In some embodiments, the stacked LVM may form a first switching leg, wherein a second switching leg is connected in parallel with the first switching leg. The second switching leg may include one or more switches (e.g., high Voltage MOSFETs (HVMs) and/or IGBTs). Proper switching timing of the first and second legs may reduce switching and conduction losses associated with the switches and may reduce the risk of switch breakdown during switching (e.g., due to large reverse voltages).
In some embodiments, a third switching leg may be connected in parallel with the first leg and the second leg. The third leg may feature one or more transistors and/or diodes selected to provide efficient reverse recovery during switching of the first leg and/or the second leg.
In some embodiments, a switching circuit having one or more legs may be assembled with discrete components available for separate purchase. In some embodiments, a switching circuit having one or more legs may be assembled and packaged as a single Printed Circuit Board (PCB) or module, with control and power terminals available on the outside of the assembly. In some embodiments, a switching circuit having one or more branches may be fabricated (e.g., integrated in silicon) at the fabrication level.
Drawings
These and other features, aspects, and advantages of the present disclosure will become better understood with regard to the following description, claims, and accompanying drawings. The present disclosure is illustrated by way of example and is not limited by the accompanying figures.
FIG. 1 is a partial schematic component block diagram in accordance with one or more illustrative embodiments.
FIG. 2 is a partial schematic component block diagram in accordance with one or more illustrative embodiments.
FIG. 3 is a timing diagram in accordance with one or more illustrative embodiments.
FIG. 4 is a partial schematic component block diagram in accordance with one or more illustrative embodiments.
FIG. 5 is a partial schematic component block diagram in accordance with one or more illustrative embodiments.
FIG. 6 is a block diagram in accordance with one or more illustrative embodiments.
Detailed Description
In the following description of the various illustrative embodiments, reference is made to the accompanying drawings, which form a part hereof, and in which is shown by way of illustration various embodiments in which aspects of the disclosure may be practiced. It is to be understood that other embodiments may be utilized and structural and functional modifications may be made without departing from the scope of the present disclosure.
Referring now to fig. 1, fig. 1 shows a switching circuit in accordance with an illustrative embodiment. The switching circuit 100 may be characterized by a first branch 102 having switches Q1, Q2, and Q3 connected in series between terminals X and Y. The switches Q1-Q3 may be Low Voltage MOSFETs (LVMs), such as MOSFETs rated to block drain-to-source voltages of about 100V (e.g., 50V, 80V, 100V, 120V, 150V, 200V, etc.). Switches Q1-Q3 may be stacked (i.e., connected in series) in a source-to-drain configuration such that the body diodes of switches Q1-Q3 are oriented in the same direction (i.e., the anode of the parasitic diode of switch Q1 is connected to the cathode of the parasitic diode of switch Q2 and the anode of the parasitic diode of switch Q2 is connected to the cathode of the parasitic diode of switch Q3) to increase the voltage blocking capability of first leg 102. For example, if each of the switches Q1-Q3 is an 80V switch (i.e., rated to withstand a voltage of 80V), the first leg 102 may have an equivalent rating of 80×3=240V.
Stacking low voltage switches to achieve a higher rated voltage may provide particular advantages as compared to using a single high voltage switch. For example, three serially connected 100 VMOSFETs may have a total on-resistance (R ds，on ). For example, a single 100VMOSFET may have R ds，on =2mΩ, whereas a single 250V MOSFET may have R ds，on =50mΩ. Due to conduction loss by
Figure BDA0001666877350000031
Given, thus the stringThe conduction loss caused by the connected LVM may be significantly lower than the conduction loss caused by the HVM.
Connecting LVMs in series can present certain challenges when switching LVMs between states. For example, switches Q1-Q3 are connected in series between terminals X and Y and in an OFF position, and it may be challenging to switch the switches to an ON state, timing the switching to be simultaneous (e.g., these switches Q1-Q3 may require three different gate-to-source voltages for driving the three switches to the ON state due to manufacturing variations between the switches Q1-Q3). Further, the controller may be configured to: three simultaneous control signals are output and timing variations may reduce the effectiveness of the control signals. Additionally, timing variations between control signals may cause damage to one or more of the switches. For example, if switches O1 and Q2 are switched to an ON state before switch Q3, the drain-to-source voltage across switch Q3 may be large (e.g., 200V, greater than the rated voltage of switch Q3) and damage to switch Q3 may occur. Similarly, timing and/or manufacturing variations may cause damage to one or more of the switches Q1-Q3 (e.g., due to avalanche breakdown) when switching the switches Q1-Q3 from an ON state to an OFF state.
The second branch 103 may be connected in parallel to the first branch 102. The second leg 103 may include one or more high voltage switches (e.g., high Voltage MOSFETs (HVMs)), or a plurality of HVMs connected in parallel, which may increase the peak current rating of the second leg Q4 rated to withstand the full voltage between nodes X and Y. For example, the second leg 103 may be rated to withstand 600V. By switching the state of switch Q4 in cascade with switches Q1-Q3, the operational challenges of operating switches Q1-Q3 may be partially or fully alleviated. For example, when the state of the switching circuit 100 is switched from the OFF state to the ON state, the switch Q4 may be switched to the ON state before the switches Q1 to Q3. By switching the state of switch Q4 prior to switches Q1-Q3, the voltage stress across switches Q1-Q3 may be significantly reduced (e.g., the voltage stress may be near 0V), thereby reducing the risk of timing variations that may damage one of switches Q1-Q3. Furthermore, the switching of the switches Q1-Q3 may be due to a low voltage drop across the switches Q1-Q3 during switchingResulting in low switching losses (i.e., near zero voltage switching). After switches Q4 and switches Q1-Q3 are turned on, switch Q4 may be turned off (providing a current path with switches Q1-Q3), or switch Q4 may remain turned on to provide an additional current path (but due to the low R of switches Q1-Q3) ds，on Parameters, switches Q1-Q3 may provide the main current path).
In some embodiments, switch Q4 may be implemented with a wide bandgap transistor, such as a silicon carbide (SiC) or gallium nitride (GaN) transistor. The use of wide bandgap transistors may provide enhanced reverse recovery compared to HVMOSFETs.
The switches Q1-Q4 may be controlled by the controller 101. The controller 101 may be or include an analog controller, a microprocessor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), and/or a Field Programmable Gate Array (FPGA). The controller 101 may time the switching of the switches Q1-Q4 to reduce switching losses and conduction losses during operation of the switching circuit 100.
Referring now to fig. 2, fig. 2 shows a switching circuit in accordance with an illustrative embodiment. The switching circuit 200 may be characterized by a first branch 102, the first branch 102 having switches Q1, Q2, and Q3 connected in series between terminals X and Y. The first leg 102 may be identical to the first leg 102 of fig. 1. The second branch 203 may include a switch Q4, which switch Q4 may be the same as the switch Q4 of fig. 1, and may further include a diode D2 connected in series to the switch Q4. Diode D2 may be oriented to prevent current from flowing through the body diode of switch Q4 (which may be desirable if the body diode is of low quality (i.e., lossy). The third leg 204 may include a diode D1 disposed such that: the cathode of diode D1 is connected (e.g., coupled) to node Y, and the anode of diode D1 is connected (e.g., coupled) to node X. Diode D1 may be, for example, a silicon carbide diode. Diode D1 may have a relatively low turn-ON voltage to provide an efficient (e.g., low loss) current path between nodes X and Y and reduce reverse recovery energy loss of switching circuit 200 (when switching from ON to OFF).
Referring now to fig. 3, fig. 3 shows a timing diagram for operating a switching circuit, such as switching circuit 100 (fig. 1) or 200 (fig. 2), such as via controller 101 of fig. 1. Timing diagram 300 illustrates a gate voltage signal that may be applied to switches Q1-Q4 of fig. 1 or 2. Timing diagram 300 shows HV switch gate signal 301 and LV switch gate signal 302. The HV switch and the LV switch may operate as follows:
a. when switching from OFF to ON, the HV switch (e.g., Q4) may turn ON, thereby conducting current and reducing the voltage across the LV switch.
b. After a suitably short delay, the LV switch may turn on and short the HV switch, providing a significantly lower conduction path for the main current. If the LV switch has a substantially larger switching delay than the HV switch, the controller operating the LV switch and the HV switch may not insert any delay.
c. After the desired ON time, the LV switch may be turned off and the current may be commutated back to the HV switch.
d. Again, after a suitably short delay, the HV switch may be turned off and its drain-source voltage may rise.
Referring now to fig. 4, fig. 4 shows a switching circuit 400 in accordance with an illustrative embodiment. The switching circuit 400 may include a first leg 402, a second leg 403, and a third leg 404. The first leg 402 may include a set of LV switches Q1-Q3 connected in series. Switches Q1 and Q2 may be oriented in a first direction and switch Q3 may be oriented in a second direction (e.g., the anodes of switches Q2 and Q3 may be connected to a common node). Switch Q3 may be a LV switch (e.g., having a rated voltage of 80V-120V) or a super LV switch (e.g., may have a rated voltage of about 30V) and may be operable to improve commutation of switching circuit 400 by "forcing" current out of the body diodes of switches Q1 and Q2 and into switch Q4 before turning off switches Q4 and Q5 when switches Q1 and Q2 are operating in a rectifying mode.
In some embodiments, a diode (e.g., a Schottky diode) connected back-to-back with switch Q1 or with switch Q2 may replace switch Q3, and the diode may similarly serve as a body diode that prevents current from flowing through switches Q1 and Q2.
The second leg 403 may be connected in parallel with the first leg 402 and may be characterized by HV switches Q4 and Q5 that are back-to-back (e.g., with anodes connected). Switch Q5 may serve as a body diode (similar to diode D2 of fig. 2) that prevents current from flowing through switch Q4. Third leg 404 may be similar or identical to third leg 204 of fig. 2 and may include a diode D1.
The first leg 402, the second leg 403, and the third leg 404 may be controlled by the same or similar controller 101 as the controller 101 of fig. 1.
In certain embodiments, the third leg 404 may not be characterized. For example, in the case where the second leg 403 is characterized as a switch with reasonably high quality body diodes (e.g., HV gallium nitride (GaN) switches) and/or good reverse recovery characteristics (e.g., low reverse recovery losses).
Referring now to fig. 5, fig. 5 shows a switching circuit 500 in accordance with an illustrative embodiment. The switching circuit 500 may be a bi-directional switching circuit designed and operated to allow control current to flow from node X to node Y and/or from node Y to node X. The first branch 502 may include a first series connected set of LV switches Q1-Q3 oriented in a first direction (e.g., with body diodes oriented to block current flow from node Y to node X) and a second series connected set of LV switches Q6-Q8 oriented in a second direction (e.g., with body diodes oriented to block current flow from node X to node Y). By using two series-connected sets of LV switches back-to-back, the first leg 502 may provide a high bidirectional voltage blocking capability between nodes X and Y and between nodes Y and X.
The second leg 503 may be connected in parallel with the first leg 502 and may be characterized by HV switches Q4 and Q5 that are back-to-back (e.g., with anodes connected). The HV switches are connected back-to-back to provide high bi-directional voltage blocking capability between nodes X and Y and between nodes Y and X.
Referring now to fig. 6, fig. 6 shows an integrated switching circuit in accordance with an illustrative embodiment. The switching circuit 600 may be an integrated assembly (e.g., a PCB or module) of the switches Q1-Q4 of fig. 1. Nodes X and Y may be externally available via external terminals, the gate terminals of switches Q1-Q3 may be available via the LeglON terminal, and the gate terminal of switch Q4 may be available via the Leg2ON terminal. Terminals Leg1ON and Leg2ON may be coupled to a suitable controller (e.g., a controller similar to or the same as controller 101 of fig. 1). In some embodiments, the controller may be further integrated in the switching circuit 600, wherein the auxiliary power is provided to the controller via the auxiliary terminal Aux. The switches Q1-Q4 of fig. 1 (along with other circuitry (e.g., gate driver circuitry)) may be integrated using a single module package, or may be integrated (e.g., at the wafer level) as a manufacturing structure. Integrated components (e.g., switches) may provide lower cost, improved efficiency, and increased ease of use. In some embodiments, the integrated controller may provide simpler control presented to the user. For example, the two terminals Leg1ON and Leg2ON may be unified into a single terminal for receiving a simple logic ON/OFF command signal, and the internal controller may process the timing configuration of fig. 3.
In embodiments involving additional switches (e.g., switch Q5 of fig. 4) or devices requiring control signals, the switching circuit 600 may include additional terminals operable to receive control signals.
The embodiments disclosed herein employ a switching leg having, for example, two or three MOSFETs connected in series. It should be appreciated that other switches may be used instead of or in addition to MOSFETs, and that any number of switches may be used. For example, eight 100V LVMs may be stacked to form an equivalent 800V switching leg connected in parallel with a leg having a 1200 VIGBT. As another example, three 1200 VIGBT's can be stacked to form an equivalent 3600V switching leg connected in parallel with a leg with a 3.3kV SiCFET.
MOSFETs are used as examples of switches that occur in low voltage variations and high voltage variations, and may be used to implement switches used to form the switching circuits disclosed herein. Other types of switches may be used, such as Bipolar Junction Transformers (BJTs), insulated Gate Bipolar Transistors (IGBTs), gallium nitride switches (GaN), silicon carbide Switches (SiC), and more.
For example, a power BJT or LV BJT may be used as LV switches Q1-Q3 of FIG. 1. The switch Q4 may be a superjunction MOSFET, siC switch, or GaN switch. Diode D1 of fig. 2 may be a Schottky diode (e.g., for use in low voltage applications), a silicon diode, a SiC diode, or a GaN Schottky diode.
As another example, switches Q1-Q3 of fig. 1 may be thyristors and switch Q4 may be an IGBT. In some embodiments, switches Q1-Q3 of fig. 1 may be IGBTs and switch Q4 may be SiC switches.
Note that various connections are set forth herein between the various elements. These connections are generally described and may be direct or indirect unless specified otherwise; the present description is not intended to be limited in this regard. Furthermore, elements of one embodiment may be combined with elements from other embodiments in appropriate combinations or supercombinations. For example, the switch Q5 of fig. 4 may replace the diode D2 of fig. 2.
According to a first illustrative embodiment, a switching device is provided. The switching device includes a first branch including a plurality of transistors connected in series. The switching device further comprises a second branch connected in parallel with the first branch, which comprises a transistor. The switching device further includes: a controller that controls the plurality of transistors of the first branch and the transistors of the second branch. The controller is configured to: the switching device is transitioned from the first state to the second state by first transitioning the transistors of the second leg from the first state to the second state and then transitioning the plurality of transistors of the first leg from the first state to the second state.
For the switching device according to the first illustrative embodiment, the plurality of transistors of the first branch includes at least two low voltage MOSFETs.
For the switching device according to the first illustrative embodiment, the transistor of the second branch comprises a high voltage MOSFET.
For the switching device according to the first illustrative embodiment, the at least two low voltage MOSFETs have a rated maximum voltage of not more than 120V.
For the switching device according to the first illustrative embodiment, the first state is an ON state and the second state is an OFF state.
For the switching device according to the first illustrative embodiment, the first state is an OFF state and the second state is an ON state.
For the switching device according to the first illustrative embodiment, the switching device further comprises a diode connected in series with the transistor to form a second branch.
For the switching device according to the first illustrative embodiment, the switching device further comprises a third branch coupled in parallel with the first branch and the second branch, the third branch comprising a diode.
For the switching device according to the first illustrative embodiment, the switching device further comprises a second transistor connected in series with said transistor of said second branch.
For the switching device according to the first illustrative embodiment, the switching device further comprises a third branch coupled in parallel with the first branch and the second branch, the third branch comprising a diode.
According to a second illustrative embodiment, a method of forming a switching device is provided. The method comprises the following steps: a plurality of transistors are connected in series to form a first branch. The method further comprises the steps of: a second branch comprising a transistor is connected in series to the first branch. The method further comprises the steps of: controlling the plurality of transistors of the first branch and the transistors of the second branch by transitioning the switching device from the first state to the second state by: the transistors of the second branch are first transitioned from the first state to the second state, and then the plurality of transistors of the first branch are transitioned from the first state to the second state.
For the method according to the second illustrative embodiment, the plurality of transistors of the first branch comprises at least two low voltage MOSFETs.
For the method according to the second illustrative embodiment, the transistor of the second branch comprises a high voltage MOSFET.
For the method according to the second illustrative embodiment, the at least two low voltage MOSFETs have a rated maximum voltage of no more than 120V.
For the method according to the second illustrative embodiment, the first state is an ON state and the second state is an OFF state.
For the method according to the second illustrative embodiment, the first state is an OFF state and the second state is an ON state.
For the method according to the second illustrative embodiment, the method further comprises: a diode connected in series with the transistor in the second branch is connected.
For the method according to the second illustrative embodiment, the method further comprises: a second transistor connected in series with the transistor in the second branch is connected.
According to a third illustrative embodiment, a switching device is provided. The switching device includes a first branch including a first plurality of transistors connected in series. The switching device further includes a second branch including a second plurality of transistors connected in series, the second branch being connected in parallel with the first branch. The switching device further includes a controller that controls the first plurality of transistors of the first branch and the second plurality of transistors of the second branch. The controller is configured to: the switching device is transitioned from the first state to the second state by first transitioning the second plurality of transistors of the second leg from the first state to the second state and then transitioning the first plurality of transistors of the first leg from the first state to the second state.
With the switching device according to the third illustrative embodiment, the first state is an OFF state and the second state is an ON state, or the first state is an ON state and the second state is an OFF state.
Various features of the various embodiments of the invention are highlighted below in a set of numbered claims. These features are not to be construed as limited to the invention or inventive concepts but are merely provided as emphasis on some of the features of the invention described in this specification without implying a particular order of importance or relevance of such features.
Item 1: a switching device, comprising:
a first branch comprising a plurality of transistors connected in series,
a second branch connected in parallel with the first branch, comprising a transistor,
a controller controlling the plurality of transistors of the first branch and the transistors of the second branch,
wherein the controller is configured to: the switching device is transitioned from the first state to the second state by first transitioning the transistors of the second leg from the first state to the second state and then transitioning the plurality of transistors of the first leg from the first state to the second state.
Item 2: the switching device of clause 1, wherein the plurality of transistors of the first branch comprises at least two low voltage MOSFETs.
Item 3: the switching device of clause 2, wherein the transistor of the second branch comprises a high voltage MOSFET.
Item 4: the switching device of clause 3, wherein the at least two low voltage MOSFETs have a rated maximum voltage of no more than 120V.
Item 5: the switching device of item 1, wherein the first state is an ON state and the second state is an OFF state.
Item 6: the switching device of item 1, wherein the first state is an OFF state and the second state is an ON state.
Item 7: the switching device of item 3, further comprising a diode connected in series with the transistor to form a second branch.
Item 8: the switching device of clause 1, further comprising a third leg coupled in parallel with the first leg and the second leg, the third leg including a diode.
Item 9: the switching device of item 1, wherein the second leg further comprises a second transistor connected in series with the transistor of the second leg.
Item 10: the switching device of clause 9, further comprising a third leg coupled in parallel with the first leg and the second leg, the third leg including a diode.
Item 11: a method of forming a switching device, comprising:
a plurality of transistors are connected in series to form a first branch,
a second branch comprising a transistor is connected in series to the first branch,
the plurality of transistors of the first branch and the transistors of the second branch are controlled by:
the switching device is transitioned from the first state to the second state by: the transistors of the second branch are first transitioned from the first state to the second state, and then the plurality of transistors of the first branch are transitioned from the first state to the second state.
Item 12: the method of clause 11, wherein the plurality of transistors of the first branch comprises at least two low voltage MOSFETs.
Item 13: the method of clause 12, wherein the transistor of the second branch comprises a high voltage MOSFET.
Item 14: the method of clause 13, wherein the at least two low voltage MOSFETs have a rated maximum voltage of no more than 120V.
Item 15: the method of item 11, wherein the first state is an ON state and the second state is an OFF state.
Item 16: the method of item 11, wherein the first state is an OFF state and the second state is an ON state.
Item 17: the method of item 13, further comprising:
a diode is connected in series with the transistor in the second branch.
Item 18: the method of item 11, further comprising:
a second transistor is connected in series with the transistor in the second branch.
Item 19: a switching device, comprising:
a first branch comprising a first plurality of transistors connected in series,
a second branch including a second plurality of transistors connected in series, the second branch being connected in parallel with the first branch,
a controller controlling the first plurality of transistors of a first branch and the second plurality of transistors of a second branch,
wherein the controller is configured to: the switching device is transitioned from the first state to the second state by: the second plurality of transistors of the second leg is first transitioned from a first state to a second state, and then the first plurality of transistors of the first leg is transitioned from the first state to the second state.
Item 20: the method of item 19, wherein the first state is an OFF state and the second state is an ON state, or the first state is an ON state and the second state is an OFF state.

Claims (18)

1. A switching device, comprising:
a first branch comprising a plurality of transistors connected in series,
a second leg comprising a transistor connected in series with a first diode, the second leg connected in parallel with the first leg, wherein the transistor of the second leg comprises a body diode, a source terminal, and a drain terminal, wherein an anode of the body diode is connected to the source terminal, wherein a cathode of the body diode is connected to the drain terminal, and wherein the first diode is oriented to prevent current flow through the body diode; and
a controller that controls the plurality of transistors of the first branch and the transistors of the second branch,
wherein the controller is configured to: transferring the switching device from a non-conducting period to a conducting period by first transitioning the transistors of the second branch from an off state to an on state and then transitioning the plurality of transistors of the first branch from the off state to the on state, and
wherein the controller is further configured to: the switching device is transferred from a conducting period to a non-conducting period by first transitioning the plurality of transistors of the first leg from an on state to an off state and then transitioning the transistors of the second leg from the on state to the off state.
2. The switching device of claim 1, wherein the plurality of transistors of the first branch comprises at least two low voltage MOSFETs.
3. The switching device of claim 1, wherein the transistor of the second branch comprises a high voltage MOSFET.
4. The switching device of claim 2, wherein the at least two low voltage MOSFETs each have a rated maximum voltage of no more than 200V.
5. The switching device of claim 1, further comprising a third leg coupled in parallel with the first leg and the second leg, the third leg including a second diode.
6. The switching device of claim 5, wherein the second diode is a schottky diode.
7. The switching device of claim 5 wherein the second diode is a silicon carbide diode.
8. The switching device of claim 1, wherein the second branch further comprises a second transistor connected in series with the transistor of the second branch.
9. The switching device of claim 5, wherein the second diode is oriented in the same direction as the body diode and has a lower turn-on voltage than the body diode.
10. A method of forming a switching device, comprising:
a plurality of transistors are connected in series to form a first branch,
connecting a second leg in parallel with the first leg, the second leg comprising a transistor and a first diode connected in series, wherein the transistor of the second leg comprises a body diode, a source terminal, and a drain terminal, wherein an anode of the body diode is connected to the source terminal, wherein a cathode of the body diode is connected to the drain terminal, and wherein the first diode is oriented to prevent current flow through the body diode; and
controlling the plurality of transistors of the first branch and the transistors of the second branch by:
transferring the switching device from a non-conducting period to a conducting period by first transitioning the transistors of the second branch from an off state to an on state and then transitioning the plurality of transistors of the first branch from the off state to the on state, and
the switching device is transferred from a conducting period to a non-conducting period by first transitioning the plurality of transistors of the first leg from an on state to an off state and then transitioning the transistors of the second leg from an on state to an off state.
11. The method of claim 10, wherein the plurality of transistors of the first branch comprises at least two low voltage MOSFETs.
12. The method of claim 10, wherein the transistor of the second leg comprises a high voltage MOSFET.
13. The method of claim 11, wherein the at least two low voltage MOSFETs have a rated maximum voltage of no more than 200V.
14. The method of claim 10, further comprising:
a second transistor connected in series with the transistor in the second branch is connected.
15. The method of claim 10, further comprising:
a third branch is connected in parallel with the first branch and the second branch, the third branch comprising a second diode oriented in the same direction as the body diode and having a lower turn-on voltage than the body diode.
16. The method of claim 15, wherein the second diode is a schottky diode.
17. The method of claim 15, wherein the second diode is a silicon carbide diode.
18. A switching device, comprising:
a first branch including a first plurality of transistors connected in series;
a second branch comprising a second plurality of transistors connected in series, the second branch connected in parallel with the first branch, wherein the second plurality of transistors comprises a first transistor connected in series with a first diode, wherein the first transistor comprises a body diode having an anode connected to a source terminal of the first transistor and having a cathode connected to a drain terminal of the first transistor, and wherein the first diode is oriented to prevent current flow through the body diode; and
a controller controlling the first plurality of transistors of the first branch and the second plurality of transistors of the second branch,
wherein the controller is configured to: transferring the switching device from a non-conducting period to a conducting period by first transitioning the second plurality of transistors of the second leg from an off state to an on state and then transitioning the first plurality of transistors of the first leg from the off state to the on state, and
wherein the controller is further configured to: the switching device is transferred from a conducting period to a non-conducting period by first transitioning the first plurality of transistors of the first leg from an on state to an off state and then transitioning the second plurality of transistors of the second leg from the on state to the off state.
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