CN108011583B - Device for inhibiting PID effect - Google Patents
Device for inhibiting PID effect Download PDFInfo
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- CN108011583B CN108011583B CN201711444650.5A CN201711444650A CN108011583B CN 108011583 B CN108011583 B CN 108011583B CN 201711444650 A CN201711444650 A CN 201711444650A CN 108011583 B CN108011583 B CN 108011583B
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- 230000000694 effects Effects 0.000 title claims abstract description 33
- 230000002401 inhibitory effect Effects 0.000 title abstract description 11
- 238000010248 power generation Methods 0.000 claims abstract description 15
- 230000033228 biological regulation Effects 0.000 claims abstract description 4
- 230000000670 limiting effect Effects 0.000 claims description 23
- 239000003990 capacitor Substances 0.000 claims description 8
- 238000004891 communication Methods 0.000 claims description 4
- 230000002265 prevention Effects 0.000 abstract description 13
- 230000001105 regulatory effect Effects 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 9
- 238000000034 method Methods 0.000 description 6
- 230000004048 modification Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 230000001276 controlling effect Effects 0.000 description 2
- 230000002441 reversible effect Effects 0.000 description 2
- 230000002238 attenuated effect Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000006731 degradation reaction Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000006698 induction Effects 0.000 description 1
- 230000007935 neutral effect Effects 0.000 description 1
- 230000000750 progressive effect Effects 0.000 description 1
- 230000002829 reductive effect Effects 0.000 description 1
- 230000001629 suppression Effects 0.000 description 1
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02S—GENERATION OF ELECTRIC POWER BY CONVERSION OF INFRARED RADIATION, VISIBLE LIGHT OR ULTRAVIOLET LIGHT, e.g. USING PHOTOVOLTAIC [PV] MODULES
- H02S50/00—Monitoring or testing of PV systems, e.g. load balancing or fault identification
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02S—GENERATION OF ELECTRIC POWER BY CONVERSION OF INFRARED RADIATION, VISIBLE LIGHT OR ULTRAVIOLET LIGHT, e.g. USING PHOTOVOLTAIC [PV] MODULES
- H02S40/00—Components or accessories in combination with PV modules, not provided for in groups H02S10/00 - H02S30/00
- H02S40/30—Electrical components
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02S—GENERATION OF ELECTRIC POWER BY CONVERSION OF INFRARED RADIATION, VISIBLE LIGHT OR ULTRAVIOLET LIGHT, e.g. USING PHOTOVOLTAIC [PV] MODULES
- H02S50/00—Monitoring or testing of PV systems, e.g. load balancing or fault identification
- H02S50/10—Testing of PV devices, e.g. of PV modules or single PV cells
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
Abstract
The invention provides a device for inhibiting PID effect, wherein a control unit obtains an acquisition value of the voltage to earth of a negative electrode of a photovoltaic array in a photovoltaic power generation system, and the output voltage of a switching power supply is regulated and controlled through closed-loop regulation so as to regulate the voltage to earth of the negative electrode of the photovoltaic array to a preset value, thereby compensating the voltage to earth of the photovoltaic array; according to the difference of preset values, two functions of PID prevention and repair of the photovoltaic cell panel can be achieved respectively.
Description
Technical Field
The invention relates to the technical field of power electronics, in particular to a device for inhibiting PID effect.
Background
The pid (potential Induced degradation) effect is also called potential Induced attenuation, and is a phenomenon that the output characteristics of certain types of photovoltaic panels are attenuated due to potential induction, so that the output power of a photovoltaic system is reduced; thus, it needs to be PID-prevented or repaired by the inverse PID technique.
In the prior art, a scheme for realizing PID prevention is mainly used for indirectly lifting the earth potential of the negative electrode of a battery panel to the positive electrode by lifting the earth potential of a neutral point on an alternating current side when an inverter works. The scheme for realizing PID repair usually adopts an off-line inverse PID technology, and a PID repair device of the PID repair device is generally installed at the positive pole (or the negative pole) of the photovoltaic cell panel, and the potential of the photovoltaic cell panel to the ground is raised to be positive (or negative) by using a positive bias power supply (or a negative bias power supply) at night.
Therefore, related devices in the prior art are single in function, can only realize one function of PID prevention in the daytime and PID repair at night, and cannot have the two functions of PID prevention and repair of the photovoltaic cell panel.
Disclosure of Invention
The invention provides a device for inhibiting PID effect, which has two functions of PID prevention and repair of a photovoltaic cell panel.
In order to achieve the purpose, the technical scheme provided by the application is as follows:
the device for inhibiting the PID effect is applied to a photovoltaic power generation system and comprises the following components: the power supply comprises a control unit, a switching power supply, a current limiting unit and a power supply clamping unit; wherein:
the input end of the control unit is connected with the communication end of the inverter in the photovoltaic power generation system;
the output end of the control unit is connected with the control end of the switching power supply;
the positive electrode of the output end of the switching power supply is connected with the input end of the power supply clamping unit through the current limiting unit; the negative electrode of the output end of the switching power supply is connected with the ground;
the output end of the power supply clamping unit is connected with the direct current side of the inverter;
the control unit is used for collecting the voltage of the negative electrode of the photovoltaic array in the photovoltaic power generation system to the earth and controlling the output voltage of the switching power supply through closed-loop regulation so as to regulate the voltage of the negative electrode of the photovoltaic array to the earth to a preset value;
the power supply clamping unit is used for controlling a capacitor in the inverter to bear positive voltage when the inverter is in a shutdown state.
Preferably, the high potential output end of the power supply clamping unit is connected with the positive electrode of the photovoltaic array;
and the low potential output end of the power supply clamping unit is connected with the negative electrode or the midpoint of the photovoltaic array.
Preferably, when the photovoltaic power generation system comprises a DC/DC converter arranged between a photovoltaic array and the inverter, the high potential output end of the power supply clamping unit is connected with the high potential output end of the DC/DC converter; and the low potential output end of the power supply clamping unit is connected with the low potential output end of the DC/DC converter.
Preferably, the power supply clamping unit includes: a first series branch and a second series branch; wherein:
the first series branch comprises M diodes which are connected in series, and the cathode of the first series branch is a high-potential output end of the power supply clamping unit;
the second series branch comprises N diodes which are connected in series, and the cathode of the second series branch is a low potential output end of the power supply clamping unit;
the anode of the first series branch is connected with the anode of the second series branch, and the connection point is the input end of the power supply clamping unit;
m and N are positive integers, and M is less than N.
Preferably, the current limiting unit includes: a current limiting resistor and a fuse connected in series.
Preferably, the power supply clamping unit includes: an auxiliary DC power supply and a first switch connected in series;
the positive electrode of the auxiliary direct-current power supply is connected with the positive electrode of the direct-current side of the inverter, and the negative electrode of the auxiliary direct-current power supply is connected with the negative electrode of the direct-current side of the inverter through the first switch; or the positive electrode of the auxiliary direct-current power supply is connected with the direct-current side positive electrode of the inverter through the first switch, and the negative electrode of the auxiliary direct-current power supply is connected with the direct-current side negative electrode of the inverter;
and the control end of the first switch is connected with the output end of the control unit.
Preferably, the current limiting unit includes: the switch power supply comprises a diode, a current limiting resistor and a fuse which are connected in series, wherein the direction of the diode is the same as the direction of the output current of the switch power supply.
Preferably, the method further comprises the following steps: a second switch; the second switch is connected between the positive electrode of the output end of the switching power supply and the input end of the current limiting unit in series, and the control end of the second switch is connected with the output end of the control unit.
Preferably, the switching power supply is: any one of BUCK, BOOST, BUCK-BOOST, CUK, forward, flyback, half-bridge, full-bridge and push-pull topologies.
According to the device for inhibiting the PID effect, the control unit obtains the acquisition value of the voltage to earth of the negative electrode of the photovoltaic array in the photovoltaic power generation system, and the output voltage of the switching power supply is regulated and controlled through closed-loop regulation so as to regulate the voltage to earth of the negative electrode of the photovoltaic array to a preset value, and further the voltage to earth of the photovoltaic array is compensated; according to the difference of preset values, two functions of PID prevention and repair of the photovoltaic cell panel can be achieved respectively.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a schematic structural diagram of an apparatus for suppressing PID effects according to an embodiment of the present invention;
FIG. 2 is a schematic circuit diagram of an apparatus for suppressing the PID effect according to another embodiment of the invention;
FIG. 3 is a schematic circuit diagram of an apparatus for suppressing the PID effect according to another embodiment of the invention;
FIG. 4 is a schematic circuit diagram of an apparatus for suppressing the PID effect according to another embodiment of the invention;
FIG. 5 is a schematic circuit diagram of an apparatus for suppressing the PID effect according to another embodiment of the invention;
FIG. 6 is an equivalent schematic diagram of the PID suppression device shown in FIG. 2 according to another embodiment of the invention;
FIG. 7 is another equivalent diagram of the apparatus for suppressing PID effects shown in FIG. 2 according to another embodiment of the invention.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
The invention provides a device for inhibiting PID effect, which has two functions of PID prevention and repair of a photovoltaic cell panel.
The device for inhibiting the PID effect is applied to a photovoltaic power generation system, and specifically, as shown in fig. 1, the device for inhibiting the PID effect comprises: a control unit 101, a switching power supply 102, a current limiting unit 103 and a power supply clamping unit 104; wherein:
the input end of the control unit 101 is connected with the communication end of an inverter in the photovoltaic power generation system so as to obtain the voltage of the negative electrode of a photovoltaic array in the photovoltaic power generation system to the earth through communication;
the output end of the control unit 101 is connected with the control end of the switching power supply 102;
the positive electrode of the output end of the switching power supply 102 is connected with the input end of the power supply clamping unit 104 through the current limiting unit 103; the negative electrode of the output end of the switching power supply 102 is connected with the ground;
the output end of the power supply clamping unit 104 is connected with the direct current side of the inverter;
the switching power supply 102 is an adjustable dc output power supply controlled by the control unit 101, and may specifically be an isolated or non-isolated topology such as BUCK, BOOST, BUCK-BOOST, CUK, forward, flyback, half bridge, full bridge, push-pull, and the like. Without limitation, and depending on the specific application, are within the scope of the present application.
Preferably, as shown in fig. 1, the device for suppressing PID effect further comprises: a second switch K;
the second switch K is connected in series between the positive electrode of the output end of the switching power supply 102 and the input end of the current limiting unit 103, and the control end of the second switch K is connected with the output end of the control unit 101, so as to realize the switching of the function of inhibiting the PID effect according to the control of the control unit 101.
The second switch K may be a relay, a contactor, a MOS transistor, or other switching devices, which are not specifically limited herein and are within the scope of the present application depending on the specific application environment.
The specific working principle is as follows:
the control unit 101 obtains a collection value of the voltage to the earth of the negative electrode of the photovoltaic array in the photovoltaic power generation system, and adjusts and controls the output voltage of the switching power supply 102 through closed-loop adjustment so as to adjust the voltage to the earth of the negative electrode of the photovoltaic array to a preset value; according to the difference of preset values, two functions of PID prevention and repair of the photovoltaic cell panel can be achieved respectively.
It is worth to be noted that some devices exist in the prior art, and can realize two functions of PID prevention and repair of the photovoltaic cell panel; however, it is generally necessary to switch between the daytime anti-PID circuit and the nighttime anti-PID circuit, which results in high cost.
The device for suppressing the PID effect provided by this embodiment can share one circuit for implementing two functions without switching, and only needs to adjust the output voltage of the switching power supply 102 in a closed loop to obtain the voltages required by the PID prevention and the reverse PID respectively; the PID prevention function and the anti-PID function can be realized by the same circuit, and the circuit is simple and low in cost.
In addition, if a positive voltage is placed between the negative electrode of the photovoltaic array and the ground at night, due to the influence of an inverter diode, a switching tube and the like, when the voltage to the ground of the positive electrode of the photovoltaic array is smaller than the voltage to the ground of the negative electrode of the photovoltaic array, the capacitor in the inverter is subjected to back pressure, and the service life of the capacitor is influenced. In the present embodiment, the power supply clamping unit 104 is provided to control the capacitor in the inverter to bear positive voltage when the inverter is in the shutdown state.
In another embodiment of the present invention, based on the above embodiments, several specific implementations of the power clamp unit 104 are given:
referring to fig. 2, the high potential output end of the power supply clamping unit 104 is connected to the positive electrode of the photovoltaic array; the low potential output terminal of the power clamp unit 104 is connected to the negative electrode of the photovoltaic array.
Alternatively, referring to fig. 3, the high potential output terminal of the power supply clamping unit 104 is connected to the positive electrode of the photovoltaic array; the low potential output terminal of the power clamp unit 104 is connected to the photovoltaic array midpoint a.
Alternatively, referring to fig. 4, when a DC/DC converter (such as boost in fig. 4) disposed between the photovoltaic array and the inverter is included in the photovoltaic power generation system, the high potential output terminal of the power clamp unit 104 is connected to the high potential output terminal of the DC/DC converter; the low potential output terminal of the power supply clamp unit 104 is connected to the low potential output terminal of the DC/DC converter.
Specifically, the power supply clamp unit 104 includes: a first series branch and a second series branch; wherein:
the first series branch includes M series diodes (e.g., D1 and D2 in fig. 2 to 4), and the cathode of the first series branch is the high-potential output terminal of the power clamp unit 104;
the second series branch includes N diodes (e.g., D3, D4, D5, and D6 in fig. 2 to 4) connected in series, and a cathode of the second series branch is a low potential output terminal of the power clamping unit 104;
the anode of the first series branch is connected with the anode of the second series branch, and the connection point is the input end of the power supply clamping unit 104;
m and N are positive integers, and M is less than N.
In fig. 2 to 4, M is 2 and N is 4, but it is needless to say that other values may be adopted, and the values are not limited specifically here as long as M is smaller than N to keep the positive electrode PV + voltage to earth greater than the negative electrode PV-voltage to earth while preventing backflow, and to ensure that the capacitor in the inverter is controlled to bear a positive voltage when the inverter is in the shutdown state, and all of them are within the protection scope of the present application.
In correspondence with the specific form of the power supply clamp unit 104 described above, the current limiting unit 103 includes: a current limiting resistor R1 and a fuse F1 connected in series.
Rpv + and Rpv-in FIGS. 2-5 are the equivalent impedances to ground for the positive PV + and negative PV-, respectively, of the photovoltaic array. Taking fig. 2 as an example, the operation principle of the device for suppressing the PID effect is described, and the operation modes thereof are divided into an anti-PID operation mode at night and a PID prevention operation mode at day.
At night, the output voltage Vdc of the switching power supply 102 is connected to the negative electrode PV-of the photovoltaic array through the current limiting resistor R1, because the voltage between the positive electrode and the negative electrode of the photovoltaic array is approximately zero at night, when the voltage of the negative electrode PV-to-earth of the photovoltaic array is raised to a required potential, the voltage of the positive electrode PV + to earth of the photovoltaic array is also raised to a required potential, and therefore the function of the anti-PID effect at night is achieved.
The output current of the switching power supply 102 flows from the point B, flows back to the ground through D2, D1 and Rpv +, and flows back to the ground through D3, D4, D5, D6 and Rpv-. The pressure drop V across the first series branch (D1-D2)D1-2And a pressure drop V across the second series branch (D3-D6)D3-6The calculation formulas of (A) and (B) are respectively as follows:
VD1-2＝-VPV++VB＝2VD(1)
VD3-6＝-VPV-+VB＝4VD(2)
wherein, VBIs the potential at point B in FIGS. 2 to 4, VDIs the voltage drop of the diode.
The formulae (2) to (1) can be obtained:
VPV＝VPV+-VPV-＝2VD(3)
that is, the voltage Vpv between the positive and negative poles of the pv array is clamped to 2 diode drops, and each diode drop is small, so Vpv can be approximately equal to zero, i.e., Vpv ≈ Vpv +, at which time the equivalent diagram of fig. 2 is shown in fig. 6, and solving for Vpv and Vpv + can result in:
wherein:
as can be seen from equation (4), the target voltage of the inverse PID operation mode can be obtained by adjusting the output voltage Vdc of the switching power supply 102.
In daytime, the output voltage Vdc of the switching power supply 102 passes through the current-limiting resistor R1, the fuse F1 and the diodes D3-D6 and is connected to the negative PV-of the photovoltaic array, the negative PV-of the photovoltaic array can be enabled to be larger than 0V to the ground voltage by adjusting the output voltage Vdc of the switching power supply 102, and the PID effect is prevented by the PID prevention working mode.
Unlike the night, the photovoltaic array is electrified in the daytime, assuming that the voltage between the positive pole and the negative pole of the photovoltaic array is Vpv, at this time, D1 and D2 are turned off in the reverse direction, D3-D6 are turned on in the forward direction, and the voltage drop of the turn-on voltage is negligible, and an equivalent circuit diagram thereof is shown in fig. 7.
The negative PV-pair ground voltage of the photovoltaic array needs to be raised to 0V, so that the voltage across the Rpv-pair ground is 0V, and the change of the impedance value does not have any influence on the circuit. The voltage across Rpv + is Vpv, and the change of the impedance value affects the circuit, which affects the boosting effect and the output current of the switching power supply 102.
As can be seen from fig. 7, the negative electrode PV-equivalent resistance to ground Rpv-of the photovoltaic array is negligible, and the positive electrode PV + equivalent resistance to ground Rpv +, the current limiting resistance R1, the switching power supply 102 and the voltage Vpv between the positive electrode and the negative electrode of the photovoltaic array are connected in series, so as to obtain:
equation (6) shows that a decrease in Rpv + and an increase in Vpv and R1 both increase the output voltage Vdc of the switching power supply 102, so that the voltage across the pv array to ground is greater than 0V.
In addition to the implementation forms shown in fig. 2 to 4, regarding the power supply clamping unit 104, as shown in fig. 5, the implementation forms may specifically include: an auxiliary direct current power supply Vaux and a first switch Kaux connected in series;
the positive pole of the auxiliary direct current power supply Vaux is connected with the positive pole of the direct current side of the inverter, and the negative pole of the auxiliary direct current power supply Vaux is connected with the negative pole of the direct current side of the inverter through a first switch Kaux (see fig. 5); alternatively, the positive electrode of the auxiliary dc power supply Vaux is connected to the dc-side positive electrode of the inverter via the first switch Kaux, and the negative electrode of the auxiliary dc power supply Vaux is connected to the dc-side negative electrode of the inverter (not shown);
the control terminal of the first switch Kaux is connected to the output terminal of the control unit 101.
The first switch Kaux may be a switching device such as a relay, a contactor, and a MOS transistor, and is not specifically limited herein, and is within the protection scope of the present application depending on the specific application environment.
In this case, the current limiting unit 103 includes: a diode D7, a current limiting resistor R1 and a fuse F1 connected in series, the direction of the diode D7 being the same as the direction of the output current of the switching power supply 102.
At night, the inverter stops working, the first switch Kaux is closed, and the auxiliary direct-current power supply Vaux is connected between the positive electrode PV + and the negative electrode PV-of the photovoltaic array, so that the voltage between the positive electrode and the negative electrode of the photovoltaic array is clamped to the positive voltage Vaux, and the capacitor in the inverter cannot bear back voltage. In the daytime, the voltage between the positive pole and the negative pole of the photovoltaic array has a positive voltage, so the control unit 101 is required to turn off the first switch Kaux to disconnect the auxiliary dc power supply Vaux from the main circuit.
Fig. 2 to fig. 5 show several specific implementation forms of the device for suppressing the PID effect, but the invention is not limited thereto, as long as the same circuit can simultaneously have the anti-PID and anti-PID functions by the above principle, and a scheme capable of ensuring that the capacitor in the inverter bears the positive voltage when the inverter is in the shutdown state is within the protection scope of the present application.
The rest of the working principle is the same as the above embodiment, and is not described in detail here.
The embodiments of the invention are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments can be referred to each other. The device disclosed by the embodiment corresponds to the method disclosed by the embodiment, so that the description is simple, and the relevant points can be referred to the method part for description.
The foregoing is merely a preferred embodiment of the invention and is not intended to limit the invention in any manner. Although the present invention has been described with reference to the preferred embodiments, it is not intended to be limited thereto. Those skilled in the art can make numerous possible variations and modifications to the present teachings, or modify equivalent embodiments to equivalent variations, without departing from the scope of the present teachings, using the methods and techniques disclosed above. Therefore, any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present invention are still within the scope of the protection of the technical solution of the present invention, unless the contents of the technical solution of the present invention are departed.
Claims (7)
1. An apparatus for suppressing PID effect, which is applied to a photovoltaic power generation system, the apparatus for suppressing PID effect comprises: the power supply comprises a control unit, a switching power supply, a current limiting unit and a power supply clamping unit; wherein:
the input end of the control unit is connected with the communication end of the inverter in the photovoltaic power generation system;
the output end of the control unit is connected with the control end of the switching power supply;
the positive electrode of the output end of the switching power supply is connected with the input end of the power supply clamping unit through the current limiting unit; the negative electrode of the output end of the switching power supply is connected with the ground;
the output end of the power supply clamping unit is connected with the direct current side of the inverter;
the control unit is used for collecting the voltage of the negative electrode of the photovoltaic array in the photovoltaic power generation system to the earth and controlling the output voltage of the switching power supply through closed-loop regulation so as to regulate the voltage of the negative electrode of the photovoltaic array to the earth to a preset value;
the power supply clamping unit is used for controlling a capacitor in the inverter to bear positive voltage when the inverter is in a shutdown state;
the high potential output end of the power supply clamping unit is connected with the positive electrode of the photovoltaic array, and the low potential output end of the power supply clamping unit is connected with the negative electrode or the midpoint of the photovoltaic array; or the photovoltaic power generation system comprises a DC/DC converter arranged between the photovoltaic array and the inverter, and a high potential output end of the power supply clamping unit is connected with a high potential output end of the DC/DC converter; and the low potential output end of the power supply clamping unit is connected with the low potential output end of the DC/DC converter.
2. The apparatus for suppressing PID effects of claim 1, wherein the power clamp unit comprises: a first series branch and a second series branch; wherein:
the first series branch comprises M diodes which are connected in series, and the cathode of the first series branch is a high-potential output end of the power supply clamping unit;
the second series branch comprises N diodes which are connected in series, and the cathode of the second series branch is a low potential output end of the power supply clamping unit;
the anode of the first series branch is connected with the anode of the second series branch, and the connection point is the input end of the power supply clamping unit;
m and N are positive integers, and M is less than N.
3. The apparatus for suppressing PID effects according to claim 2, wherein the current limiting unit comprises: a current limiting resistor and a fuse connected in series.
4. The apparatus for suppressing PID effects of claim 1, wherein the power clamp unit comprises: an auxiliary DC power supply and a first switch connected in series;
the positive electrode of the auxiliary direct-current power supply is connected with the positive electrode of the direct-current side of the inverter, and the negative electrode of the auxiliary direct-current power supply is connected with the negative electrode of the direct-current side of the inverter through the first switch; or the positive electrode of the auxiliary direct-current power supply is connected with the direct-current side positive electrode of the inverter through the first switch, and the negative electrode of the auxiliary direct-current power supply is connected with the direct-current side negative electrode of the inverter;
and the control end of the first switch is connected with the output end of the control unit.
5. The apparatus for suppressing PID effect according to claim 4, wherein the current limiting unit comprises: the switch power supply comprises a diode, a current limiting resistor and a fuse which are connected in series, wherein the direction of the diode is the same as the direction of the output current of the switch power supply.
6. The apparatus for suppressing PID effects according to claim 1, further comprising: a second switch; the second switch is connected between the positive electrode of the output end of the switching power supply and the input end of the current limiting unit in series, and the control end of the second switch is connected with the output end of the control unit.
7. The apparatus for suppressing PID effects according to claim 1, wherein the switching power supply is: any one of BUCK, BOOST, BUCK-BOOST, CUK, forward, flyback, half-bridge, full-bridge and push-pull topologies.
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| US11258261B2 (en) | 2018-05-10 | 2022-02-22 | Solaredge Technologies Ltd. | Systems and methods to increase the reliability and the service life time of photovoltaic (PV) modules |
| EP3567692B1 (en) | 2018-05-10 | 2021-09-29 | Solaredge Technologies Ltd. | Apparatus to increase the reliability and the service life time of photovoltaic (pv) modules |
| CN109638808A (en) * | 2018-12-21 | 2019-04-16 | 华为数字技术（苏州）有限公司 | Compensation circuit, method, power module and the photovoltaic system of potential induction attenuation |
| CN112583041B (en) * | 2019-09-27 | 2023-06-30 | 阳光电源股份有限公司 | Inverter, inverter system and control method |
| CN111478662B (en) * | 2020-04-29 | 2022-04-15 | 上海质卫环保科技有限公司 | Discharging method of solar power station pressurizing device |
| CN112152260A (en) * | 2020-09-17 | 2020-12-29 | 科华恒盛股份有限公司 | Photovoltaic power generation system PID effect repairing and inhibiting device |
| CN113271009A (en) * | 2021-06-28 | 2021-08-17 | 阳光电源股份有限公司 | DC/DC conversion unit and energy conversion system |
| CN116722590B (en) * | 2023-08-08 | 2023-12-05 | 锦浪科技股份有限公司 | PID effect inhibition method and system and photovoltaic system |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN203166494U (en) * | 2013-03-26 | 2013-08-28 | 阳光电源（上海）有限公司 | Device for solving potential induced degradation |
| JP2014099438A (en) * | 2012-11-13 | 2014-05-29 | Nisshinbo Mechatronics Inc | Output drop prevention and recovery device and output drop prevention and recovery method of solar cell module |
| CN104467018A (en) * | 2014-12-24 | 2015-03-25 | 北京格林科电技术有限公司 | Method and device for protecting photovoltaic module and restraining and removing PID phenomena |
| CN104506130A (en) * | 2014-11-20 | 2015-04-08 | 晶澳(扬州)太阳能光伏工程有限公司 | PID resistant device for solar photovoltaic component using non-isolated inverter |
| CN106160651A (en) * | 2016-08-18 | 2016-11-23 | 特变电工西安电气科技有限公司 | A kind of system suppressing photovoltaic battery panel PID effect |
| CN106899036A (en) * | 2017-03-16 | 2017-06-27 | 特变电工西安电气科技有限公司 | A kind of photovoltaic generating system of anti-potential induction attenuation |
| CN107492907A (en) * | 2017-08-29 | 2017-12-19 | 武汉协鑫新能源电力设计有限公司 | A kind of control device and its control method with PID suppression and repair function |
-
2017
- 2017-12-27 CN CN201711444650.5A patent/CN108011583B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2014099438A (en) * | 2012-11-13 | 2014-05-29 | Nisshinbo Mechatronics Inc | Output drop prevention and recovery device and output drop prevention and recovery method of solar cell module |
| CN203166494U (en) * | 2013-03-26 | 2013-08-28 | 阳光电源（上海）有限公司 | Device for solving potential induced degradation |
| CN104506130A (en) * | 2014-11-20 | 2015-04-08 | 晶澳(扬州)太阳能光伏工程有限公司 | PID resistant device for solar photovoltaic component using non-isolated inverter |
| CN104467018A (en) * | 2014-12-24 | 2015-03-25 | 北京格林科电技术有限公司 | Method and device for protecting photovoltaic module and restraining and removing PID phenomena |
| CN106160651A (en) * | 2016-08-18 | 2016-11-23 | 特变电工西安电气科技有限公司 | A kind of system suppressing photovoltaic battery panel PID effect |
| CN106899036A (en) * | 2017-03-16 | 2017-06-27 | 特变电工西安电气科技有限公司 | A kind of photovoltaic generating system of anti-potential induction attenuation |
| CN107492907A (en) * | 2017-08-29 | 2017-12-19 | 武汉协鑫新能源电力设计有限公司 | A kind of control device and its control method with PID suppression and repair function |
Non-Patent Citations (1)
| Title |
|---|
| "解决光伏电站组件的抗潜在电势诱导衰减效应的方法";龚铁裕 等;《电力与能源》;20140831;第35卷(第4期);论文第526页左栏倒数第1段至右栏、图2、图3 * |
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