CN107943185B - Average current constant current control circuit - Google Patents

Average current constant current control circuit Download PDF

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Publication number
CN107943185B
CN107943185B CN201711452376.6A CN201711452376A CN107943185B CN 107943185 B CN107943185 B CN 107943185B CN 201711452376 A CN201711452376 A CN 201711452376A CN 107943185 B CN107943185 B CN 107943185B
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circuit
conversion circuit
input end
current
output end
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CN107943185A (en
Inventor
陶冬毅
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Suzhou Feidaxu Micro Electronics Co ltd
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Suzhou Feidaxu Micro Electronics Co ltd
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    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10Regulating voltage or current
    • G05F1/46Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
    • G05F1/561Voltage to current converters

Abstract

The invention discloses an average current constant current control circuit, which comprises: the circuit comprises a voltage source, a load circuit, a first VI conversion circuit, an IV conversion circuit, a second VI conversion circuit, an integration circuit and a reference generation circuit. The voltage source is used for providing input voltage; the first VI conversion circuit is used for converting the control voltage output by the integration circuit into load current; the IV conversion circuit is used for converting load current into sampling voltage; the second VI conversion circuit is used for converting the sampling voltage into feedback current; the integrating circuit is used for generating a control voltage from the feedback current and the reference current generated by the reference generating circuit; the reference generating circuit is used for generating a reference current. The average current constant-current control circuit is a closed-loop control circuit, and has the advantages of simple structure, low cost, high constant-current precision, small current ripple and excellent noise resistance.

Description

Average current constant current control circuit
Technical Field
The invention belongs to the technical field of constant current control, and particularly relates to an average current constant current control circuit.
Background
The average current control circuit is a common control scheme of a constant current power supply, and has important application in the fields of energy-saving lighting circuits, screen backlights, high-power lighting and the like. Compared with a peak current control circuit and a hysteresis current control circuit, the circuit in the average current control mode has the advantages of high control precision, small current ripple, excellent noise resistance and the like. However, the limitation of the control principle often results in complex circuit structure, high design difficulty and slower response speed.
Disclosure of Invention
In order to solve the technical problems, the invention provides the average current constant-current control circuit with simple structure, low cost, high constant-current precision, small current ripple and excellent noise resistance.
In order to achieve the above purpose, the technical scheme of the invention is as follows:
an average current constant current control circuit comprising:
a voltage source for providing an input voltage;
the load circuit is connected with the voltage source;
further comprises:
the first VI conversion circuit is provided with a first input end, a second input end and an output end, the first input end of the first VI conversion circuit is connected with the load circuit, the second input end of the first VI conversion circuit is connected with the output end of the integration circuit, the output end of the first VI conversion circuit is connected with the input end of the IV conversion circuit, and the first VI conversion circuit is used for converting the control voltage V_ct1 output by the integration circuit into load current I_load;
the input end of the IV conversion circuit is connected with the output end of the first VI conversion circuit, the output end of the IV conversion circuit is connected with the input end of the second VI conversion circuit, and the IV conversion circuit is used for converting the load current I_load into the sampling voltage V_s;
the input end of the second VI conversion circuit is connected with the output end of the IV conversion circuit, the output end of the second VI conversion circuit is connected with the second input end of the integration circuit, and the second VI conversion circuit is used for converting the sampling voltage V_s into feedback current I_fb;
the integrating circuit is provided with a first input end, a second input end and an output end, the first input end of the integrating circuit is connected with the reference generating circuit, the second input end of the integrating circuit is connected with the output end of the second VI converting circuit, the output end of the integrating circuit is connected with the second input end of the first VI converting circuit, and the integrating circuit is used for generating a control voltage V_ct1 by the feedback current I_fb and the reference current I_ref generated by the reference generating circuit;
and a reference generating circuit for generating a reference current I_ref.
The average current constant-current control circuit is a closed-loop control circuit, and has the advantages of simple structure, low cost, high constant-current precision, small current ripple and excellent noise resistance.
On the basis of the technical scheme, the following improvement can be made:
preferably, the first VI conversion circuit includes: and the drain electrode of the NMOS tube is connected with the load circuit, the grid electrode of the NMOS tube is connected with the output end of the integrating circuit, and the source electrode of the NMOS tube is connected with the IV conversion circuit.
By adopting the preferable scheme, simple components are adopted, the cost is low, and the overhaul and maintenance are easier.
Preferably, the first VI conversion circuit includes: and the collector of the NPN tube is connected with the load circuit, the base of the NPN tube is connected with the output end of the integrating circuit, and the emitter of the NPN tube is connected with the IV conversion circuit.
By adopting the preferable scheme, simple components are adopted, the cost is low, and the overhaul and maintenance are easier.
As a preferred embodiment, the IV conversion circuit includes: one end of the resistor R_sense is respectively connected with the output end of the first VI conversion circuit and the input end of the second VI conversion circuit, and the other end of the resistor R_sense is grounded;
the input end and the output end of the IV conversion circuit are the same.
By adopting the preferable scheme, simple components are adopted, the cost is low, and the overhaul and maintenance are easier.
Preferably, the second VI conversion circuit is a GM conversion circuit.
By adopting the preferable scheme, simple components are adopted, the cost is low, and the overhaul and maintenance are easier.
As a preferred embodiment, the GM conversion circuit includes: an amplifier, an NMOS transistor MN101, and a resistor R1; the positive input end of the amplifier is connected with the sampling voltage V_s, the negative input end of the amplifier is connected with the resistor R1, and the output end of the amplifier is connected with the grid electrode of the MN 101; the source of MN101 is connected to resistor R1 and the inverting input of the amplifier, respectively, its gate is connected to the output of the amplifier, and its drain is connected to the control voltage v_ct1.
By adopting the preferable scheme, the structure is simple.
Preferably, the integrating circuit includes: one end of the capacitor C_int is respectively connected with the output end of the reference generating circuit, the output end of the second VI conversion circuit and the second input end of the first VI conversion circuit, and the other end of the capacitor C_int is grounded;
the first input end, the second input end and the output end of the integrating circuit are the same end.
By adopting the preferable scheme, simple components are adopted, the cost is low, and the overhaul and maintenance are easier.
Preferably, the reference generating circuit is a current generator, and the current generator directly supplies the reference current i_ref.
By adopting the preferable scheme, the structure is simple, and the installation is convenient.
Preferably, the reference generating circuit is a GM conversion circuit, an input terminal of the GM conversion circuit is connected to the reference voltage v_ref, and an output terminal of the GM conversion circuit is connected to the first input terminal of the integrating circuit.
By adopting the preferable scheme, the cost is low.
As a preferred embodiment, the GM conversion circuit includes: an amplifier, an NMOS transistor MN201, a PMOS transistor MP202, and a resistor R2;
MP201 and MP202 are connected in a mirror image mode to form a mirror image unit;
the positive input end of the amplifier is connected with the reference voltage V_ref, the negative input end of the amplifier is connected with the resistor R2, and the output end of the amplifier is connected with the grid electrode of the MN 201;
the source of MN201 is connected to resistor R2 and the inverting input of the amplifier, respectively, its gate is connected to the output of the amplifier, and its drain is connected to the control voltage v_ct1 through the mirror unit.
By adopting the preferable scheme, the structure is simple.
Drawings
Fig. 1 is a schematic diagram of a frame structure of an average current constant current control circuit according to an embodiment of the present invention.
Fig. 2 is a circuit diagram of an average current constant current control circuit according to an embodiment of the present invention.
Fig. 3 is a circuit diagram of a GM conversion circuit of a second VI conversion circuit according to an embodiment of the present invention.
Fig. 4 is a circuit diagram of a GM conversion circuit of a reference generating circuit according to an embodiment of the present invention.
Wherein: 1. voltage source, 2, load circuit, 3, first VI conversion circuit, 31 first input, 32, second input, 33, output, 4, IV conversion circuit, 41, input, 42, output, 5, second VI conversion circuit, 51, input, 52, output, 6, integration circuit, 61 first input, 62, second input, 63, output, 7, reference generation circuit.
Detailed Description
Preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
To achieve the object of the present invention, in some embodiments of the average current constant current control circuit, as shown in fig. 1, the average current constant current control circuit includes: a voltage source 1, a load circuit 2, a first VI conversion circuit 3, an IV conversion circuit 4, a second VI conversion circuit 5, an integration circuit 6 and a reference generation circuit 7.
The voltage source 1 is used for providing an input voltage, and the load circuit 2 is connected with the voltage source 1.
The first VI conversion circuit 3 has a first input 31, a second input 32 and an output 33, the first input 31 of the first VI conversion circuit 3 being connected to the load circuit 2, the second input 32 thereof being connected to the output 63 of the integrating circuit 6, the output 33 thereof being connected to the input 41 of the IV conversion circuit 4, the first VI conversion circuit 3 being arranged to convert the control voltage v_ct1 output by the integrating circuit 6 into a load current i_load.
The input 41 of the IV conversion circuit 4 is connected to the output 33 of the first VI conversion circuit 3, the output 42 thereof is connected to the input 51 of the second VI conversion circuit 5, and the IV conversion circuit 4 is adapted to convert the load current i_load into a sampling voltage v_s.
The input 51 of the second VI conversion circuit 5 is connected to the output 42 of the IV conversion circuit 4, the output 52 thereof is connected to the second input 62 of the integration circuit 6, and the second VI conversion circuit 5 is arranged to convert the sampling voltage v_s into a feedback current i_fb.
The integrating circuit 6 has a first input 61, a second input 62 and an output 63, the first input 61 of the integrating circuit 6 being connected to the reference generating circuit 7, the second input 62 thereof being connected to the output 52 of the second VI converting circuit 5, the output 63 thereof being connected to the second input 32 of the first VI converting circuit 3, the integrating circuit 6 being arranged to generate the control voltage v_ct1 from the feedback current i_fb and the reference current i_ref generated by the reference generating circuit 7.
The reference generating circuit 7 is for generating a reference current i_ref.
The average current constant-current control circuit is a closed-loop control circuit, and has the advantages of simple structure, low cost, high constant-current precision, small current ripple and excellent noise resistance.
In order to further optimize the implementation effect of the present invention, as shown in fig. 2, in other embodiments, the rest of the feature techniques are the same, except that the load circuit 2 is a light emitting diode.
Further, the first VI conversion circuit 3 includes: and the drain electrode of the NMOS tube is connected with the load circuit 2, the grid electrode of the NMOS tube is connected with the output end of the integrating circuit 6, and the source electrode of the NMOS tube is connected with the IV conversion circuit 4.
By adopting the preferable scheme, simple components are adopted, the cost is low, and the overhaul and maintenance are easier.
Further, the IV conversion circuit 4 includes: one end of the resistor R_sense is respectively connected with the output end of the first VI conversion circuit 3 and the input end of the second VI conversion circuit 5, and the other end of the resistor R_sense is grounded;
the input terminal of the IV conversion circuit 4 is the same terminal as the output terminal thereof.
By adopting the preferable scheme, simple components are adopted, the cost is low, and the overhaul and maintenance are easier. Wherein: the sampled voltage v_s is obtained by the following formula: v_s=i_load r_sense.
Further, the second VI conversion circuit 5 is a GM conversion circuit.
By adopting the preferable scheme, simple components are adopted, the cost is low, and the overhaul and maintenance are easier. Wherein: the feedback current i_fb is obtained by the following formula: i_fb=v_s x Gm1.Gm1 is a parameter in the Gm conversion circuit of the second VI conversion circuit 5.
Further, the integrating circuit 6 includes: one end of the capacitor C_int is respectively connected with the output end of the reference generating circuit 7, the output end of the second VI converting circuit 5 and the second input end of the first VI converting circuit 3, and the other end of the capacitor C_int is grounded;
the first input, the second input and the output of the integrating circuit 6 are the same.
By adopting the preferable scheme, simple components are adopted, the cost is low, and the overhaul and maintenance are easier. The integrating circuit 6 is configured to integrate the feedback current i_fb and the I reference current i_ref over c_int and generate the control voltage v_ct1. The integrating circuit 6 generates a stable control voltage v_ct1 if and only if the average value of i_ref is equal to the average value of i_fb.
Further, the reference generating circuit 7 is a GM conversion circuit, an input terminal of which is connected to the reference voltage v_ref, and an output terminal of which is connected to the first input terminal of the integrating circuit 6.
By adopting the preferable scheme, the cost is low. Wherein: the reference current i_ref is obtained by the following formula: i_ref=v_ref x Gm2.Gm2 is a parameter in the Gm conversion circuit of the reference generation circuit 7.
The invention relates to an average current constant current control average current I_load_avg constant current, which has the following specific formula:
compared with the existing constant current control circuit, the average current constant current control circuit provided by the invention adopts the existing simple components, is low in cost and easy to overhaul and maintain, is controlled by adopting a closed-loop control method, and has the advantages of high constant current precision, small current ripple and excellent noise resistance.
As shown in fig. 3, further, the GM conversion circuit of the second VI conversion circuit 5 includes: an amplifier, an NMOS transistor MN101, and a resistor R1; the positive input end of the amplifier is connected with the sampling voltage V_s, the negative input end of the amplifier is connected with the resistor R1, and the output end of the amplifier is connected with the grid electrode of the MN 101; the source of MN101 is connected to resistor R1 and the inverting input of the amplifier, respectively, its gate is connected to the output of the amplifier, and its drain is connected to the control voltage v_ct1.
By adopting the preferable scheme, the structure is simple, and Gm1=1/R1 of the GM conversion circuit of the second VI conversion circuit 5 is realized.
As shown in fig. 4, the GM conversion circuit of the reference generation circuit 7 further includes: an amplifier, an NMOS transistor MN201, a PMOS transistor MP202, and a resistor R2;
MP201 and MP202 are connected in a mirror image mode to form a mirror image unit;
the positive input end of the amplifier is connected with the reference voltage V_ref, the negative input end of the amplifier is connected with the resistor R2, and the output end of the amplifier is connected with the grid electrode of the MN 201;
the source of MN201 is connected to resistor R2 and the inverting input of the amplifier, respectively, its gate is connected to the output of the amplifier, and its drain is connected to the control voltage v_ct1 through the mirror unit.
By adopting the preferable scheme, the GM converter circuit of the reference generating circuit 7 has a simple structure, and is specifically gm2=1/R2.
In order to further optimize the implementation effect of the present invention, in other embodiments, the remaining feature techniques are the same, except that the first VI conversion circuit 3 includes: and the collector of the NPN tube is connected with the load circuit 2, the base of the NPN tube is connected with the output end of the integrating circuit 6, and the emitter of the NPN tube is connected with the IV conversion circuit 4.
By adopting the preferable scheme, simple components are adopted, the cost is low, and the overhaul and maintenance are easier.
In order to further optimize the implementation of the invention, in other embodiments the remaining feature techniques are the same, except that the reference generating circuit 7 is a current generator, which directly supplies the reference current i_ref.
By adopting the preferable scheme, the structure is simple, and the installation is convenient.
The invention relates to an average current constant current control average current I_load_avg constant current, which has the following specific formula:
it should be noted that, for the preferred embodiment of the present invention, it is possible for a person skilled in the art to make several variations and modifications without departing from the inventive concept of the present invention, which fall within the protection scope of the present invention.

Claims (10)

1. An average current constant current control circuit comprising:
a voltage source for providing an input voltage;
the load circuit is connected with the voltage source;
characterized by further comprising:
the first VI conversion circuit is provided with a first input end, a second input end and an output end, the first input end of the first VI conversion circuit is connected with the load circuit, the second input end of the first VI conversion circuit is connected with the output end of the integration circuit, the output end of the first VI conversion circuit is connected with the input end of the IV conversion circuit, and the first VI conversion circuit is used for converting the control voltage V_ctl output by the integration circuit into load current I_load;
the input end of the IV conversion circuit is connected with the output end of the first VI conversion circuit, the output end of the IV conversion circuit is connected with the input end of the second VI conversion circuit, and the IV conversion circuit is used for converting the load current I_load into the sampling voltage V_s;
the input end of the second VI conversion circuit is connected with the output end of the IV conversion circuit, the output end of the second VI conversion circuit is connected with the second input end of the integration circuit, and the second VI conversion circuit is used for converting the sampling voltage V_s into feedback current I_fb;
the integrating circuit is provided with a first input end, a second input end and an output end, the first input end of the integrating circuit is connected with the reference generating circuit, the second input end of the integrating circuit is connected with the output end of the second VI converting circuit, the output end of the integrating circuit is connected with the second input end of the first VI converting circuit, and the integrating circuit is used for generating a control voltage V_ctl from a feedback current I_fb and a reference current I_ref generated by the reference generating circuit;
and a reference generating circuit for generating a reference current I_ref.
2. The average current constant current control circuit according to claim 1, wherein the first VI conversion circuit includes: and the drain electrode of the NMOS tube is connected with the load circuit, the grid electrode of the NMOS tube is connected with the output end of the integrating circuit, and the source electrode of the NMOS tube is connected with the IV conversion circuit.
3. The average current constant current control circuit according to claim 1, wherein the first VI conversion circuit includes: and the collector of the NPN tube is connected with the load circuit, the base of the NPN tube is connected with the output end of the integrating circuit, and the emitter of the NPN tube is connected with the IV conversion circuit.
4. An average current constant current control circuit according to any one of claims 1 to 3, wherein the IV conversion circuit comprises: one end of the resistor R_sense is respectively connected with the output end of the first VI conversion circuit and the input end of the second VI conversion circuit, and the other end of the resistor R_sense is grounded;
the input end and the output end of the IV conversion circuit are the same.
5. A constant current control circuit for an average current according to any one of claims 1 to 3, wherein the second VI conversion circuit is a GM conversion circuit.
6. The average current constant current control circuit according to claim 5, wherein the GM conversion circuit comprises: an amplifier, an NMOS transistor MN101, and a resistor R1;
the positive input end of the amplifier is connected with the sampling voltage V_s, the negative input end of the amplifier is connected with the resistor R1, and the output end of the amplifier is connected with the grid electrode of the MN 101;
the source of MN101 is connected to resistor R1 and the inverting input of the amplifier, respectively, its gate is connected to the output of the amplifier, and its drain is connected to the control voltage v_ctl.
7. A constant current control circuit for an average current according to any one of claims 1 to 3, wherein the integrating circuit comprises: one end of the capacitor C_int is respectively connected with the output end of the reference generating circuit, the output end of the second VI conversion circuit and the second input end of the first VI conversion circuit, and the other end of the capacitor C_int is grounded;
the first input end, the second input end and the output end of the integrating circuit are the same end.
8. A constant current control circuit for an average current according to any one of claims 1 to 3, characterized in that the reference generating circuit is a current generator which directly supplies the reference current i_ref.
9. A constant current control circuit according to any one of claims 1 to 3, wherein the reference generating circuit is a GM conversion circuit, an input terminal of the GM conversion circuit is connected to a reference voltage v_ref, and an output terminal thereof is connected to a first input terminal of the integrating circuit.
10. The average current constant current control circuit according to claim 9, wherein the GM conversion circuit comprises: an amplifier, an NMOS transistor MN201, a PMOS transistor MP202, and a resistor R2;
MP201 and MP202 are connected in a mirror image mode to form a mirror image unit;
the positive input end of the amplifier is connected with the reference voltage V_ref, the negative input end of the amplifier is connected with the resistor R2, and the output end of the amplifier is connected with the grid electrode of the MN 201;
the source of MN201 is connected to resistor R2 and the inverting input of the amplifier, respectively, its gate is connected to the output of the amplifier, and its drain is connected to the control voltage v_ctl through the mirror unit.
CN201711452376.6A 2017-12-27 2017-12-27 Average current constant current control circuit Active CN107943185B (en)

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CN107943185B true CN107943185B (en) 2023-11-21

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