CN106874528A - The resistance calculations method of many finger transistors and the emulation mode of many finger transistors - Google Patents
The resistance calculations method of many finger transistors and the emulation mode of many finger transistors Download PDFInfo
- Publication number
- CN106874528A CN106874528A CN201510917657.9A CN201510917657A CN106874528A CN 106874528 A CN106874528 A CN 106874528A CN 201510917657 A CN201510917657 A CN 201510917657A CN 106874528 A CN106874528 A CN 106874528A
- Authority
- CN
- China
- Prior art keywords
- resistance
- many finger
- finger transistors
- source electrode
- grid
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/20—Design optimisation, verification or simulation
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Evolutionary Computation (AREA)
- Geometry (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Abstract
This application discloses the resistance calculations method and the emulation mode of many finger transistors of a kind of many finger transistors.Many finger transistors include the multiple grids for setting gradually, and it is arranged at source electrode and the drain electrode of the both sides of each grid, and source electrode and the interval setting successively that drains, many finger transistors include nf grid, source and drain resistor width of many finger transistors on the bearing of trend parallel to grid is w, nf >=2, the computational methods include below equation:Nrd=Ld/nf/w, nrd are the drain electrode square resistance of many finger transistors, and Ld is each drain electrode in the resistance length sum on the bearing of trend of grid;Nrs=Ls/nf/w, nrs are the source electrode square resistance of many finger transistors, and Ls is each source electrode in the resistance length sum on the bearing of trend of grid.The purpose for being emulated to transistor exactly is realized using the computational methods.
Description
Technical field
The application is related to the technical field of semiconductor integrated circuit, in particular to a kind of resistance calculations of many finger transistors
The emulation mode of method and many finger transistors.
Background technology
Transistor is a kind of important semiconductor devices in semiconductor integrated circuit, and it is extensive in integrated circuit technology field
Using.In order to predict the Performance And Reliability in environment of the transistor device residing for it, it is necessary to be emulated to transistor.Device
Part emulation has very important effect in integrated circuit design, and it is substantially shorter the design production cycle of product, improves and produce
The yield rate of product and cost-effective etc..
Many finger transistors are generally made up of multiple transistors, i.e., many finger transistors include the multiple grids for setting gradually, and
It is arranged at source electrode and the drain electrode of the both sides of each grid, and source electrode and the interval setting successively that drains.The source and drain saturation of many finger transistors
Electric current (Ids) is in non-linear reduction with the increase of the number of the resistor width and grid of source-drain electrode.Therefore, current existing skill
The method for not calculating the source electrode square resistance (nrs) and drain electrode square resistance (nrd) of many finger transistors in art also, so as to cause
Transistor cannot be emulated exactly.
The content of the invention
The application aims to provide a kind of resistance calculations method of many finger transistors and the emulation mode of many finger transistors, with accurate
Ground calculates the source electrode square resistance and drain electrode square resistance of many finger transistors.
To achieve these goals, this application provides a kind of resistance calculations method of many finger transistors, many finger transistors
Including the multiple grids for setting gradually, and source electrode and the drain electrode of the both sides of each grid are arranged at, and source electrode and drain electrode are spaced successively
Set, it is characterised in that many finger transistors include nf grid, and many finger transistors are on the bearing of trend parallel to grid
Source and drain resistor width be w, nf >=2, and the resistance calculations method include below equation:Nrd=Ld/nf/w, wherein, nrd is
The drain electrode square resistance of many finger transistors, Ld is each drain electrode in the resistance length sum on the bearing of trend of grid;With
And nrs=Ls/nf/w, wherein, nrs is the source electrode square resistance of many finger transistors, and Ls is each source electrode in the extension perpendicular to grid
Resistance length sum on direction.
Further, nf is even number, and many finger transistors include nf/2 drain electrode and nf/2+1 source electrode, and positioned at all grids
The resistance length of two source electrodes in outside be respectively sa and sb, the resistance length between neighboring gates is sd, and computational methods include
Below equation:Ld=(nf/2 × sd), and nrd=(nf/2 × sd)/nf/w=sd/ (2w);Ls=sa+sb+ (nf/2-1) × sd, and
Nrs=(sa+sb+ (nf/2-1) × sd)/nf/w.
Further, nf >=4, and sa=sb.
Further, nf is odd number, is sb positioned at the resistance length of the drain electrode in the outside of all grids, positioned at the outer of all grids
The resistance length of the source electrode of side is sb, and the resistance length between neighboring gates is sd, and computational methods include below equation:
Ld=(nf-1)/2*sd+sa, and nrd=((nf-1)/2*sd+sa)/nf/w;Ls=(nf-1)/2*sd+sb, and nrs=((nf-1)/2*sd+sa)/nf/w.
Further, nf >=3, and sa=sb.
Further, the computational methods also calculate the source of many finger transistors using drain electrode square resistance and source electrode square resistance
The step of ohmic leakage.
Present invention also provides a kind of emulation mode of many finger transistors, including using the drain electrode square resistance of many finger transistors
With the source electrode square resistance of many finger transistors to the source and drain saturation current of many finger transistors and the source-drain voltage of many finger transistors
Between relation curve the step of emulated, it is characterised in that the drain electrode square resistance of many finger transistors and many finger-like crystal
The source electrode square resistance of pipe is calculated by the resistance calculations method that the application is provided and obtained.
Further, emulated using Spice softwares.
Further, in the step of simulation process, grid voltage is 0.5~1.2V.
Further, the processing procedure of many finger transistors is 40nm or 28nm.
The resistance calculations method of many finger transistors provided using the technical scheme of the application, the application includes below equation:
Nrd=Ld/nf/w, and nrs=Ls/nf/w, using the formula can calculate exactly many finger transistors source electrode square resistance and
Drain electrode square resistance, so as to realize the purpose for being emulated to transistor exactly.
Brief description of the drawings
The Figure of description for constituting the part of the application is used for providing further understanding of the present application, the schematic reality of the application
Apply example and its illustrate for explaining the application, do not constitute the improper restriction to the application.In the accompanying drawings:
Fig. 1 shown in the resistance calculations method of many finger transistors that a kind of preferred embodiment of the application is provided, many finger-like
The cross-sectional view of transistor;
Fig. 2 shows in the resistance calculations method of many finger transistors that the application another kind preferred embodiment is provided, refers to more
The cross-sectional view of shape transistor;And
Fig. 3 shows the simulation result figure of the emulation mode of many finger transistors that the application implementation method is provided.
Specific embodiment
It should be noted that in the case where not conflicting, the feature in embodiment and embodiment in the application can be mutually combined.
Describe the application in detail below with reference to the accompanying drawings and in conjunction with the embodiments.
It should be noted that term used herein above is merely to describe specific embodiment, and be not intended to restricted root according to this Shen
Illustrative embodiments please.As used herein, unless the context clearly indicates otherwise, otherwise singulative is also intended to
Including plural form, additionally, it should be understood that, when in this manual use term "comprising" and/or " including " when,
It indicates existing characteristics, step, operation, device, component and/or combinations thereof.
For the ease of description, space relative terms can be used herein, such as " ... on ", " ... top ", " ...
Upper surface ", " above " etc., for describing such as a device shown in the figure or feature and other devices or the space of feature
Position relationship.It should be appreciated that space relative terms were intended to comprising making in addition to orientation of the device described in figure
With or operation in different azimuth.If for example, the device in accompanying drawing is squeezed, be described as " on other devices or construction
Side " or " other devices or construction on " device after will be positioned as " other devices or construction below " or "
Under other devices or construction ".Thus, exemplary term " ... top " can include " ... top " and " ...
Two kinds of lower section " orientation.The device can also other different modes positioning (being rotated by 90 ° or in other orientation), and to this
In the relative description in the space that is used make respective explanations.
As described in background technology, the source electrode square resistance (nrs) of many finger transistors is not calculated also in the prior art
With drain electrode square resistance (nrd) method, so as to lead to not that transistor is emulated exactly.Present inventor is directed to
Above mentioned problem is studied, it is proposed that a kind of resistance calculations method of many finger transistors, and many finger transistors include setting successively
The multiple grids put, and source electrode and the drain electrode of the both sides of each grid are arranged at, and source electrode and the interval setting successively that drains, and it is many
Finger transistor includes nf grid, and source and drain resistor width of many finger transistors on the bearing of trend parallel to grid is w,
Nf >=2, and the resistance calculations method includes below equation:Nrd=Ld/nf/w, wherein, nrd is the drain electrode side of many finger transistors
Block resistance, Ld is each drain electrode in the resistance length sum on the bearing of trend of grid;And nrs=Ls/nf/w, wherein,
Nrs is the source electrode square resistance of many finger transistors, Ls be each source electrode the resistance length on the bearing of trend of grid it
With.
The resistance calculations method of many finger transistors that the application is provided includes below equation:Nrd=Ld/nf/w, and
Nrs=Ls/nf/w, the source electrode square resistance and drain electrode square resistance of many finger transistors can be exactly calculated using the formula, so that
The purpose that realization is emulated to transistor exactly.
The illustrative embodiments of the resistance calculations method of many finger transistors of the application offer are provided.So
And, these illustrative embodiments can be implemented by many different forms, and should not be construed to be limited solely to institute here
The implementation method of elaboration.It should be appreciated that these embodiments are provided so that disclosure herein is thoroughly and complete,
And the design of these illustrative embodiments is fully conveyed to those of ordinary skill in the art
In above-mentioned resistance calculations method, nf can be even number or odd number, and when nf be even number or odd number when resistance calculations method public affairs
Formula is different.In a preferred embodiment, as shown in figure 1, nf is even number, many finger transistors include nf/2
Drain electrode and nf/2+1 source electrode, and the resistance length of two source electrodes positioned at the outside of all grids is respectively sa and sb, adjacent gate
Resistance length between pole is sd, and computational methods include below equation:Ld=(nf/2 × sd), and nrd=(nf/2 ×
Sd)/nf/w=sd/ (2w);Ls=sa+sb+ (nf/2-1) × sd, and nrs=(sa+sb+ (nf/2-1) × sd)/nf/w.Wherein it is preferred to,
Nf >=4, and sa=sb.It should be noted that when nf is even number, many finger transistors can also include nf/2 source electrode and nf/2+1
Individual drain electrode.
In another preferred embodiment, as shown in Fig. 2 nf is odd number, positioned at the electricity of the drain electrode in the outside of all grids
Resistance length is sb, is sb positioned at the resistance length of the source electrode in the outside of all grids, and the resistance length between neighboring gates is sd,
Computational methods include below equation:Ld=(nf-1)/2*sd+sa, and nrd=((nf-1)/2*sd+sa)/nf/w;Ls=(nf-1)/2*sd+sb,
And nrs=((nf-1)/2*sd+sa)/nf/w.Preferably, nf >=3, and sa=sb.Certainly, the technical scheme and not only that the application is provided
It is limited to above-mentioned preference.
After drain electrode square resistance and source electrode square resistance is obtained using above-mentioned resistance calculations method, can also be using the square that drains
The step of resistance and source electrode square resistance calculate the source and drain resistance of many finger transistors.Its specific computational methods shows for this area
There is technology, will not be repeated here.
Meanwhile, present invention also provides a kind of emulation mode of many finger transistors, including using the drain electrode side of many finger transistors
The source electrode square resistance of block resistance and many finger transistors is to the source and drain saturation current of many finger transistors and the source of many finger transistors
The step of relation curve between drain voltage is emulated, wherein the drain electrode square resistance and many finger transistors of many finger transistors
The resistance calculations method that is provided by the application of source electrode square resistance calculate and obtain.Due to the resistance calculations side provided using the application
Method can exactly calculate the source electrode square resistance and drain electrode square resistance of many finger transistors, so that imitating transistor
Genuine result is more accurate.
The illustrative embodiments of the emulation mode of many finger transistors provided according to the application are provided.However,
These illustrative embodiments can be implemented by many different forms, and should not be construed to be limited solely to described herein
Implementation method.It should be appreciated that these embodiments are provided so that disclosure herein is thoroughly and complete, and
The design of these illustrative embodiments is fully conveyed to those of ordinary skill in the art
In above-mentioned emulation mode, can be emulated using simulation software common in this area.In one kind preferred embodiment
In, emulated using Spice softwares.Spice (simulation program with integrated circuit emphasis) is one
The general integrated circuit simulating software of money, was developed by Univ California-Berkeley in 1972.Then, version is constantly more
Newly, function constantly strengthens and perfect.Spice is decided to be American National industrial standard within 1988.It can enter to numerous components
Row simulation analysis.During transistor Spice models are extracted, the model suitable for different emulation forms need to be typically extracted.
Meanwhile, the step of simulation process in, grid voltage can be set according to the actual requirements, it is preferable that grid voltage
It is 0.5~1.2V.In addition, the processing procedure of many finger transistors can be processing procedure common in this area, it is, for example, less than 60nm.It is preferred that
Ground, the processing procedure of many finger transistors is 40nm or 28nm, and inventor has used the emulation mode that the application is provided to processing procedure
For many finger transistors of 40nm or 28nm are emulated, simulation result is as shown in Figure 3.
In Fig. 3, discrete point is test result, and continuous lines are simulation result.From figure 3, it can be seen that in difference
Grid voltage (0.5V/0.75V/0.90V/1.10V/1.12V0) under conditions of, used the application provide emulation mode
The result emulated to many finger transistors is coincide substantially with actual test result, illustrates the emulation mode provided using the application
Transistor can be emulated exactly.
As can be seen from the above description, the application the above embodiments realize following technique effect:What the application was provided
The resistance calculations method of many finger transistors includes below equation:Nrd=Ld/nf/w, and nrs=Ls/nf/w, using the formula energy
Enough source electrode square resistances for calculating many finger transistors exactly and drain electrode square resistance, so as to realize exactly carrying out transistor
The purpose of emulation.
The preferred embodiment of the application is the foregoing is only, the application is not limited to, for those skilled in the art
For, the application can have various modifications and variations.All any modifications within spirit herein and principle, made, etc.
With replacement, improvement etc., should be included within the protection domain of the application.
Claims (10)
1. a kind of resistance calculations method of many finger transistors, many finger transistors include the multiple grids for setting gradually, and
It is arranged at source electrode and the drain electrode of the both sides of each grid, and the source electrode and the drain electrode interval setting, its feature successively
It is that many finger transistors include the nf grid, and many finger transistors are in prolonging parallel to the grid
The source and drain resistor width on direction is stretched for w, nf >=2, and the resistance calculations method includes below equation:
Nrd=Ld/nf/w, wherein, nrd is the drain electrode square resistance of many finger transistors, and Ld exists for each drain electrode
Resistance length sum on the bearing of trend of the grid;And
Nrs=Ls/nf/w, wherein, nrs is the source electrode square resistance of many finger transistors, and Ls is that each source electrode is hanging down
Directly in the resistance length sum on the bearing of trend of the grid.
2. resistance calculations method according to claim 1, it is characterised in that nf is even number, and many finger transistors include
The nf/2 drain electrode and the nf/2+1 source electrode, and positioned at two electricity of the source electrode in the outside of all grids
Resistance length is respectively sa and sb, and the resistance length between the adjacent grid is sd, and the computational methods include below equation:
Ld=(nf/2 × sd), and nrd=(nf/2 × sd)/nf/w=sd/ (2w);
Ls=sa+sb+ (nf/2-1) × sd, and nrs=(sa+sb+ (nf/2-1) × sd)/nf/w.
3. resistance calculations method according to claim 2, it is characterised in that nf >=4, and sa=sb.
4. resistance calculations method according to claim 1, it is characterised in that nf is odd number, positioned at the outer of all grids
The resistance length of the drain electrode of side is sb, is sb positioned at the resistance length of the source electrode in the outside of all grids,
Resistance length between the adjacent grid is sd, and the computational methods include below equation:
Ld=(nf-1)/2*sd+sa, and nrd=((nf-1)/2*sd+sa)/nf/w;
Ls=(nf-1)/2*sd+sb, and nrs=((nf-1)/2*sd+sa)/nf/w.
5. resistance calculations method according to claim 4, it is characterised in that nf >=3, and sa=sb.
6. computational methods according to any one of claim 1 to 5, it is characterised in that the computational methods also using
The step of drain electrode square resistance and the source electrode square resistance calculate the source and drain resistance of many finger transistors.
7. a kind of emulation mode of many finger transistors, including the drain electrode square resistance and the finger more for using many finger transistors
The source electrode square resistance of shape transistor is to the source and drain saturation current of many finger transistors and the source of many finger transistors
The step of relation curve between drain voltage carries out simulation process, it is characterised in that the drain electrode side of many finger transistors
The source electrode square resistance of block resistance and many finger transistors is as the resistance calculations any one of claim 1 to 6
Method is calculated and obtained.
8. emulation mode according to claim 7, the simulation process is carried out using Spice softwares.
9. in the step of emulation mode according to claim 7, simulation process, grid voltage is 0.5~1.2V.
10. the emulation mode according to any one of claim 7 to 9, it is characterised in that the processing procedure of many finger transistors
It is 40nm or 28nm.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201510917657.9A CN106874528A (en) | 2015-12-10 | 2015-12-10 | The resistance calculations method of many finger transistors and the emulation mode of many finger transistors |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201510917657.9A CN106874528A (en) | 2015-12-10 | 2015-12-10 | The resistance calculations method of many finger transistors and the emulation mode of many finger transistors |
Publications (1)
Publication Number | Publication Date |
---|---|
CN106874528A true CN106874528A (en) | 2017-06-20 |
Family
ID=59176892
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201510917657.9A Pending CN106874528A (en) | 2015-12-10 | 2015-12-10 | The resistance calculations method of many finger transistors and the emulation mode of many finger transistors |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN106874528A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111983411A (en) * | 2020-07-10 | 2020-11-24 | 中国电子科技集团公司第十三研究所 | Method and device for testing thermal resistance of multi-finger-gate transistor and terminal equipment |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1612354A (en) * | 2003-10-28 | 2005-05-04 | 联华电子股份有限公司 | Multi finger-like transistor |
CN101179070A (en) * | 2006-11-10 | 2008-05-14 | 台湾积体电路制造股份有限公司 | Serpentine ballasting resistors for multi-finger ESD protection device |
CN102983166A (en) * | 2012-11-13 | 2013-03-20 | 无锡中星微电子有限公司 | Multi-grid-electrode high pressure field effect transistor |
US8762911B1 (en) * | 2013-05-07 | 2014-06-24 | International Business Machines Corporation | Layout and design system for increasing electric current in CMOS inverters |
-
2015
- 2015-12-10 CN CN201510917657.9A patent/CN106874528A/en active Pending
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1612354A (en) * | 2003-10-28 | 2005-05-04 | 联华电子股份有限公司 | Multi finger-like transistor |
CN101179070A (en) * | 2006-11-10 | 2008-05-14 | 台湾积体电路制造股份有限公司 | Serpentine ballasting resistors for multi-finger ESD protection device |
CN102983166A (en) * | 2012-11-13 | 2013-03-20 | 无锡中星微电子有限公司 | Multi-grid-electrode high pressure field effect transistor |
US8762911B1 (en) * | 2013-05-07 | 2014-06-24 | International Business Machines Corporation | Layout and design system for increasing electric current in CMOS inverters |
Non-Patent Citations (1)
Title |
---|
(美)WAI-KAI CHEN编,杨兵等译: "《模拟与超大规模集成电路(第3版)=ANALOG AND VLSI CIRCUITS THIRD EDITION》", 30 November 2013 * |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111983411A (en) * | 2020-07-10 | 2020-11-24 | 中国电子科技集团公司第十三研究所 | Method and device for testing thermal resistance of multi-finger-gate transistor and terminal equipment |
CN111983411B (en) * | 2020-07-10 | 2022-12-27 | 中国电子科技集团公司第十三研究所 | Method and device for testing thermal resistance of multi-finger-gate transistor and terminal equipment |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN103310030B (en) | Realize for the LVS of FinFET design | |
CN106484928B (en) | Based on the united Switching Power Supply electro thermal coupling emulation mode of more softwares | |
CN105184026B (en) | A kind of the Building of Simulation Model method and emulation mode of MOS variable capacitances | |
CN105095537B (en) | The simulation model of high tension apparatus and the modeling method of simulation model of high-voltage device | |
CN104808126B (en) | The test structure and method of testing of MOS transistor | |
CN108062442A (en) | A kind of AlGaN/GaN HEMT microwave power devices small-signal intrinsic parameters extracting method | |
US10846451B1 (en) | Methods of modelling irregular shaped transistor devices in circuit simulation | |
CN102142057A (en) | BSIM4 stress model applied to MOSFET electrical simulation | |
CN108027844B (en) | Contact resistance reduces | |
CN107679261A (en) | The modeling method of dead resistance between a kind of MOS device source and drain and substrate | |
CN105022878A (en) | Radio frequency SOI-MOS varactor substrate model and parameter extracting method thereof | |
CN105302943B (en) | A kind of dominant relevant mismatch model of bias voltage and its extracting method | |
CN105528471A (en) | Power transistor model | |
CN106874528A (en) | The resistance calculations method of many finger transistors and the emulation mode of many finger transistors | |
CN101739470B (en) | Establishing method of process deviation model of MOS (Metal Oxide Semiconductor) transistor multi-size component | |
CN103390086A (en) | Modeling method of resistance model | |
CN104331580B (en) | The method that self-heating effect is described using high voltage field effect transistor sub-circuit model | |
CN102147828B (en) | Equivalent electrical model of SOI field effect transistor of body leading-out structure and modeling method | |
CN101957883A (en) | Method for establishing field-effect transistor noise model | |
CN103455648B (en) | A kind of emulation mode of LDMOS array | |
Kim et al. | The efficient DTCO compact modeling solutions to improve MHC and reduce TAT | |
CN101329693A (en) | Method for modeling MOS tube resistor | |
CN106383941A (en) | Simulation method for describing capacitance characteristics of LDMOS transistor | |
CN105843974B (en) | Circuit aging emulation mode and device | |
Lai et al. | LDMOS modeling |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
RJ01 | Rejection of invention patent application after publication | ||
RJ01 | Rejection of invention patent application after publication |
Application publication date: 20170620 |