CN106301051B - The drain current suppressing method and inhibition device of single-phase non-isolated Cascade H bridge inverter - Google Patents

The drain current suppressing method and inhibition device of single-phase non-isolated Cascade H bridge inverter Download PDF

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CN106301051B
CN106301051B CN201610790560.0A CN201610790560A CN106301051B CN 106301051 B CN106301051 B CN 106301051B CN 201610790560 A CN201610790560 A CN 201610790560A CN 106301051 B CN106301051 B CN 106301051B
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level
mould group
exports
bridge
control
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CN106301051A (en
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于世能
杨乐
毛旺
徐君
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Sungrow Power Supply Co Ltd
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Sungrow Power Supply Co Ltd
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/5387—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
    • H02J3/383—
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0003—Details of control, feedback or regulation circuits
    • H02M1/0038—Circuits or arrangements for suppressing, e.g. by masking incorrect turn-on or turn-off signals, e.g. due to current spikes in current mode control
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0067—Converter structures employing plural converter units, other than for parallel operation of the units on a single load
    • H02M1/007—Plural converter units in cascade
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/56—Power conversion systems, e.g. maximum power point trackers

Abstract

This application discloses the drain current suppressing method of single-phase non-isolated Cascade H bridge inverter and inhibit device, which is cascaded by 1~2k H bridge module, and No. i is collectively referred to as a mould group, i=1,2 ..., k with 2k-i+1 H bridge module；This method comprises: obtaining the DC voltage of each H bridge module；Calculate the sum of the DC voltage error of two H bridge modules in each mould group；The principle that the bigger mould group of the sum of the DC voltage error for making internal two H bridge modules obtains bigger output power, the output power of two H bridge modules in same mould group is made to keep equal and keep constant total parasitic capacitor voltage is followed, the modulated signal of each H bridge module is calculated；The modulated signal being calculated is sent to corresponding H bridge module, to inhibit leakage current.

Description

The drain current suppressing method and inhibition device of single-phase non-isolated Cascade H bridge inverter
Technical field
The present invention relates to power electronics fields, more specifically to the leakage of single-phase non-isolated Cascade H bridge inverter Electric current suppressing method and inhibition device.
Background technique
Single-phase non-isolated Cascade H bridge inverter is cascaded by multiple H bridge modules, topological structure each H as shown in Figure 1: The direct current of bridge module flanks independent photovoltaic battery panel, and power grid through filter inductance is accessed after being connected in series in the exchange side of each H bridge module. Single-phase non-isolated Cascade H bridge inverter is by carrying out independent MPPT (Maximum Power Point to each photovoltaic battery panel Tracking, MPPT maximum power point tracking) it controls to obtain maximum photovoltaic energy utilization rate.
There is direct electrical connection in single-phase non-isolated Cascade H bridge inverter, between power grid and photovoltaic battery panel, leads Cause parasitic capacitance (the i.e. capacitor C in Fig. 1 of photovoltaic battery panelP1~CPn) can be generated under common-mode voltage and differential mode voltage effect Certain electric leakage, this not only brings conduction and radiation interference, increases grid current harmonic content and system loss, it is also possible to Injure relevant device and personnel safety.
Summary of the invention
In view of this, the present invention provides the drain current suppressing method and inhibition of a kind of single-phase non-isolated Cascade H bridge inverter Device, to effectively inhibit leakage current.
A kind of drain current suppressing method of single-phase non-isolated Cascade H bridge inverter, the single-phase non-isolated cascaded H-bridges inversion Device is cascaded by 1~2k H bridge module, and No. i is collectively referred to as a mould group, i=1,2 ..., k with 2k-i+1 H bridge module；It is described Method includes:
Obtain the DC voltage of each H bridge module；
According to the DC voltage got, be calculated two H bridge modules in each mould group DC voltage error it With；
It follows the bigger mould group of the sum of the DC voltage error for making internal two H bridge modules and obtains bigger output work Rate, the principle for making the output power of two H bridge modules in same mould group keep equal and keep constant total parasitic capacitor voltage, Calculate the modulated signal of each H bridge module；
The modulated signal being calculated is sent to corresponding H bridge module.
Wherein, it is described follow the bigger mould group of the sum of DC voltage error for making internal two H bridge modules obtain it is bigger Output power, so that the output power of two H bridge modules is kept equal and total parasitic capacitor voltage made to keep permanent Fixed principle calculates the modulated signal of each H bridge module, comprising:
The sequence of the sum of DC voltage error according to two H bridge modules in each mould group from big to small will remove described No. k Other Mo Zu except mould group are defined as 1~k-1 mould group respectively, wherein the k mould group refers to including No. k and k+1 H The mould group of bridge module；
The sum of the DC voltage of two H bridge modules in each mould group is calculated；
The sum of the DC voltage of two H bridge modules in i mould group is indicated with Udi；Use VrefIndicate single-phase non-isolated cascade The instantaneous voltage of total modulating wave of H bridge inverter；With Uei indicate two H bridge modules of i mould group DC voltage error it With；Two stacking triangular carriers, and 1 >=Vc2 >=0.5 >=Vc1 >=0 are indicated with Vc1 and Vc2 respectively；When When, it defines total modulating wave and is located at modulating range m+, whenWhen, it defines total modulating wave and is located at Modulating range m-, m=1,2 ..., k；
When total modulating wave is in positive half period, believe according to the modulation that following rule calculates 1~2k H bridge module Number:
WhenAnd when m=1, control 1~k mould group exports 0 level；
WhenAnd 1<when m: if Uek>Ue (m-1), control m-1 mould group export 0 level, k Number mould group exports+2 level, m~k-1 mould group exports 0 level, residual mode group exports+2 level；Otherwise (i.e. Ue (m-1) > Uek > Uem or Ue (m-1) > Uem > Uek), control m-1 mould group exports+2 level, and k mould group exports 0 level, m~k-1 mould group 0 level is exported, residual mode group exports+2 level；
WhenAnd when m=1, control 1~k-1 mould group exports 0 level, k mould Group+1 level of output；
WhenAnd when 1 < m, control m~k-1 mould group exports 0 level, k mould group Export+1 level, residual mode group exports+2 level；
WhenAnd when m=k, control 1~k mould group exports+2 level；
WhenAnd m<when k: if Uek>Uem, control m mould group export 0 level, k mould + 2 level of group output, 1~m-1 mould group export+2 level, residual mode group exports 0 level；Otherwise, control m mould group output+2 Level, k mould group exports 0 level, 1~m-1 mould group exports+2 level, residual mode group exports 0 level；
When total modulating wave is in negative half-cycle, believe according to the modulation that following rule calculates 1~2k H bridge module Number:
WhenAnd when m=1, control 1~k mould group exports 0 level；
WhenAnd when m > 1: if Uek > Ue (m-1), 0 electricity of control m-1 mould group output Flat, k mould group exports -2 level, m~k-1 mould group exports 0 level, residual mode group exports -2 level；Otherwise, m-1 mould group Export -2 level, k mould group exports 0 level, m~k-1 mould group exports 0 level, residual mode group exports -2 level；
WhenAnd when m=1, control m~k-1 mould group exports 0 level, mould group Vk exports -1 level；
WhenAnd when m > 1, control m~k-1 mould group exports 0 level, mould group Vk exports -1 level, residual mode group exports -2 level；
WhenAnd when m=k, control 1~k mould group exports -2 level；
WhenAnd m<when k: if Uek>Uem, control m mould group export 0 level, k Number mould group exports -2 level, m+1~k-1 mould group exports 0 level, residual mode group exports -2 level；Otherwise, m mould group is controlled Export -2 level, k mould group exports 0 level, m+1~k-1 mould group exports 0 level, residual mode group exports -2 level.
Wherein, described two stacking triangular carriers are the stacking triangular carrier of two same-phases.
Wherein, described two stacking triangular carriers are the stacking triangular carrier of two antiphases.
A kind of drain current suppressing device of single-phase non-isolated Cascade H bridge inverter, the single-phase non-isolated cascaded H-bridges inversion Device is cascaded by 1~2k H bridge module, and i H bridge module and 2k-i+1 H bridge module are collectively referred to as a mould group, i=1, and 2 ..., k；Described device includes:
Acquiring unit, for obtaining the DC voltage of each H bridge module；
First computing unit, for two H bridge modules according to the DC voltage that gets, to be calculated in each mould group The sum of DC voltage error；
Second computing unit, for following the bigger mould group of the sum of DC voltage error for making internal two H bridge modules Bigger output power is obtained, the output power of two H bridge modules in same mould group is made to keep equal and makes total parasitic capacitance electricity The principle kept constant is pressed, the modulated signal of each H bridge module is calculated；
Output unit, for the modulated signal being calculated to be sent to corresponding H bridge module.
Wherein, second computing unit is specifically used for:
The sequence of the sum of DC voltage error according to two H bridge modules in each mould group from big to small will remove described No. k Other Mo Zu except mould group are defined as 1~k-1 mould group respectively, wherein the k mould group refers to including No. k and k+1 H The mould group of bridge module；
The sum of the DC voltage of two H bridge modules in each mould group is calculated；
The sum of the DC voltage of two H bridge modules in i mould group is indicated with Udi；Use VrefIndicate single-phase non-isolated cascade The instantaneous voltage of total modulating wave of H bridge inverter；With Uei indicate two H bridge modules of i mould group DC voltage error it With；Two stacking triangular carriers, and 1 >=Vc2 >=0.5 >=Vc1 >=0 are indicated with Vc1 and Vc2 respectively；When When, it defines total modulating wave and is located at modulating range m+, and work asWhen, define total modulating wave position In modulating range m-, m=1,2 ..., k；
When total modulating wave is in positive half period, believe according to the modulation that following rule calculates 1~2k H bridge module Number:
WhenAnd when m=1, control 1~k mould group exports 0 level；
WhenAnd 1<when m: if Uek>Ue (m-1), control m-1 mould group export 0 level, k Number mould group exports+2 level, m~k-1 mould group exports 0 level, residual mode group exports+2 level；Otherwise (i.e. Ue (m-1) > Uek > Uem or Ue (m-1) > Uem > Uek), control m-1 mould group exports+2 level, and k mould group exports 0 level, m~k-1 mould group 0 level is exported, residual mode group exports+2 level；
WhenAnd when m=1, control 1~k-1 mould group exports 0 level, k mould Group+1 level of output；
WhenAnd when 1 < m, control m~k-1 mould group exports 0 level, k mould group Export+1 level, residual mode group exports+2 level；
WhenAnd when m=k, control 1~k mould group exports+2 level；
WhenAnd m<when k: if Uek>Uem, control m mould group export 0 level, k mould + 2 level of group output, 1~m-1 mould group export+2 level, residual mode group exports 0 level；Otherwise, control m mould group output+2 Level, k mould group exports 0 level, 1~m-1 mould group exports+2 level, residual mode group exports 0 level；
When total modulating wave is in negative half-cycle, believe according to the modulation that following rule calculates 1~2k H bridge module Number:
WhenAnd when m=1, control 1~k mould group exports 0 level；
WhenAnd when m > 1: if Uek > Ue (m-1), 0 electricity of control m-1 mould group output Flat, k mould group exports -2 level, m~k-1 mould group exports 0 level, residual mode group exports -2 level；Otherwise, m-1 mould group Export -2 level, k mould group exports 0 level, m~k-1 mould group exports 0 level, residual mode group exports -2 level；
WhenAnd when m=1, control m~k-1 mould group exports 0 level, mould group Vk exports -1 level；
WhenAnd when m > 1, control m~k-1 mould group exports 0 level, mould group Vk exports -1 level, residual mode group exports -2 level；
WhenAnd when m=k, control 1~k mould group exports -2 level；
WhenAnd m<when k: if Uek>Uem, control m mould group export 0 level, k Number mould group exports -2 level, m+1~k-1 mould group exports 0 level, residual mode group exports -2 level；Otherwise, m mould group is controlled Export -2 level, k mould group exports 0 level, m+1~k-1 mould group exports 0 level, residual mode group exports -2 level.
Wherein, described two stacking triangular carriers are the stacking triangular carrier of two same-phases.
Wherein, described two stacking triangular carriers are the stacking triangular carrier of two antiphases.
It can be seen from the above technical scheme that the present invention eliminates common mode by enabling total parasitic capacitor voltage keep constant The influence of voltage and differential mode voltage to leakage current, to effectively inhibit leakage current.In addition, the present invention, which also follows, makes inside two The bigger mould group of the sum of the DC voltage error of H bridge module obtains bigger output power and makes two H bridges in same mould group The output power of module keeps equal principle, to calculate the modulated signal of each H bridge module, to avoid the output of each H bridge module There are biggish differences for power, to improve system generating efficiency.
Detailed description of the invention
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this Some embodiments of invention for those of ordinary skill in the art without creative efforts, can be with It obtains other drawings based on these drawings.
Fig. 1 is the single-phase non-isolated cascaded H-bridges inverter structure schematic diagram of one kind disclosed in the prior art；
Fig. 2 is the drain current suppressing method stream of the single-phase non-isolated Cascade H bridge inverter of one kind disclosed by the embodiments of the present invention Cheng Tu；
Fig. 3 is a kind of modulating range distribution schematic diagram of positive half period disclosed by the embodiments of the present invention；
Fig. 4 is a kind of modulation schematic diagram of positive half period disclosed by the embodiments of the present invention；
Fig. 5 is the parasitic capacitor voltage and leakage current waveform diagram of each H bridge module；
Fig. 6 is the drain current suppressing device knot of the single-phase non-isolated Cascade H bridge inverter of one kind disclosed by the embodiments of the present invention Structure schematic diagram.
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete Site preparation description, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on Embodiment in the present invention, it is obtained by those of ordinary skill in the art without making creative efforts every other Embodiment shall fall within the protection scope of the present invention.
Referring to fig. 2, the embodiment of the invention discloses a kind of drain current suppressing sides of single-phase non-isolated Cascade H bridge inverter Method keeps each H bridge module output power balanced to realize while inhibiting leakage current, comprising:
Step S01: the DC voltage of each H bridge module in single-phase non-isolated Cascade H bridge inverter is obtained.
Step S02: according to the DC voltage got, each mould in single-phase non-isolated Cascade H bridge inverter is calculated The sum of the DC voltage error of two H bridge modules in group.
The mould group what is single-phase non-isolated Cascade H bridge inverter: the applicable single-phase non-isolated grade of the present embodiment is described below Connection H bridge inverter cascaded by 1~2k H bridge module, as shown in Figure 1, for ease of description, the present embodiment by i (i=1, 2 ..., k) number H bridge module and 2k-i+1 H bridge module be collectively referred to as a mould group, k mould group is always obtained.Wherein, by No. k and k The mould group of+No. 1 H bridge module synthesis is known as k mould group.
The DC voltage error of H bridge module refers to the actual value of this H bridge module DC voltage and the difference of instruction value. The actual value and instruction value for defining i H bridge module DC voltage are respectively Vdci and Vdri, 2k-i+1 H bridge module direct current The actual value and instruction value of side voltage are respectively Vdc (2k-i+1) and Vdr (2k-i+1), then calculate i H bridge mould in same module The sum of the DC voltage error of block and 2k-i+1 H bridge module exactly calculates Vdci-Vdri+Vdc (2k-i+1)-Vdr (2k- i+1)。
Step S03: it is bigger to follow the bigger mould group acquisition of the sum of DC voltage error for making internal two H bridge modules Output power makes the output power of two H bridge modules in same mould group keep equal and keeps constant total parasitic capacitor voltage Principle, calculate the modulated signal of each H bridge module.
Wherein, total parasitic capacitor voltage is kept constant, is to inhibit leakage current, derivation process is as follows:
The leakage current i of known single-phase non-isolated Cascade H bridge inverterlgAre as follows:
In formula: CPV1For the parasitic capacitance capacitance of i H bridge module；vNiOFor the parasitic capacitor voltage of i H bridge module；vNtO For the sum of the parasitic capacitor voltage of all H bridge modules；Assuming that all H bridge module parasitic capacitor voltages are identical, i.e. CPV=CPV1= CPV2=...=CPVn, n=2k.
The parasitic capacitor voltage of each H bridge module known are as follows:
In formula: vCMiAnd vDMiThe respectively common-mode voltage and differential mode voltage of i H bridge module.
According to formula 2, total parasitic capacitor voltage expression formula, which can be obtained, is
In formula: vCMFor total common-mode voltage of 1~2k H bridge module.
It can be seen that just total parasitic capacitor voltage must be kept constant it is found that inhibit leakage current by formula 1.It can by formula 3 Know, the method for keeping total parasitic capacitor voltage constant are as follows: for the mould group in addition to k mould group, due to vDMiWith vDM(n-i+1)'s Coefficient is on the contrary, can make the differential mode voltage of two H bridge modules in same mould group keep equal, while keeping two H in same mould group The sum of bridge module common-mode voltage is constant can to eliminate the influence of the mould group to leakage current；For k mould group, opened by using specific Combination is closed, it can -0.5v in formula 3DMk+0.5vDM(k+1)-vDMk-vDM(k+1)It keeps constant, to maintain total parasitic capacitor voltage It is constant, eliminate leakage current.
Herein it should be noted that the level number as contained by the output waveform of single-phase non-isolated Cascade H bridge inverter is 4k+ 1, so under the premise of meeting the requirement for eliminating leakage current, to enable single-phase non-isolated Cascade H bridge inverter to work normally, Can it is direct, beyond all doubt it is confirmed that: when calculating the modulated signal of each H bridge module, it is necessary to meet 1~k-1 mould Two H bridge modules are that three level export and (export+2,0, -2 three kind of level), two H bridge modules are five electricity in k mould group in group Flat output (i.e.+2 ,+1,0, -1, -2 five kind of level of output).
But in view of the modulated signal only in accordance with above-mentioned requirements to calculate each H bridge module, although can guarantee single-phase The normal work of non-isolated Cascade H bridge inverter and leakage current is inhibited, but does not ensure that each H bridge module output power is equal Weighing apparatus.And for single-phase non-isolated Cascade H bridge inverter, if each H bridge module output power is uneven, it will cause system power generation The problem of low efficiency, so in the modulated signal of each H bridge module of calculating, it is defeated to be also added into each H bridge module of balance for the present embodiment The requirement of power out.
There are corresponding relationships between the DC voltage and output power of known any H bridge module: when the direct current of H bridge module When side voltage reaches maximum power point, the output power of this H bridge module is maximum.So the H different for two DC voltages For bridge module, the direct current voltage error of which H bridge module is bigger, and the output power and this H bridge module of which H bridge module are most The deviation of big output power is bigger, then to balance the output power of the two H bridge modules it is necessary to keep direct current voltage error bigger H bridge module obtain bigger output power.Same reason, to balance 1~2k H bridge module output power it is necessary to The H bridge module for keeping direct current voltage error bigger obtains bigger output power.
Under the premise of the output power of two H bridge modules is identical in the same mould group of guarantee, the output of each H bridge module is balanced Power, that is, the output power of each mould group is balanced, so the present embodiment is in the output for guaranteeing two H bridge modules in same mould group In the case that power keeps equal, as long as following the bigger mould group of the sum of the DC voltage error for making internal two H bridge modules The principle of bigger output power is obtained to calculate the modulated signal of each H bridge module, so that it may avoid the output work of each H bridge module There are biggish differences for rate.
Step S04: the modulated signal being calculated is sent to corresponding H bridge module, to meet effective inhibition Leakage current, and avoid the output power of each H bridge module there are biggish differences.
Seen from the above description, the present embodiment eliminates common-mode voltage and difference by enabling total parasitic capacitor voltage keep constant Influence of the mode voltage to leakage current, to effectively inhibit leakage current.In addition, the present embodiment, which also follows, makes internal two H bridge moulds The bigger mould group of the sum of the DC voltage error of block obtains bigger output power and makes two H bridge modules in same mould group Output power keep equal principle, to calculate the modulated signal of each H bridge module, to avoid the output power of each H bridge module There are biggish differences, to improve system generating efficiency.
In the following, providing one of implementation of the step S03.
Step S031:, will according to the sequence of the sum of DC voltage error of two H bridge modules in each mould group from big to small Other Mo Zu in addition to k mould group are defined as 1~k-1 mould group respectively.
Step S032: the sum of the DC voltage of two H bridge modules in each mould group is calculated.
To be described below conveniently, the sum of the DC voltage of two H bridge modules in i mould group is indicated with Udi；Use VrefTable Show the instantaneous voltage of total modulating wave of single-phase non-isolated Cascade H bridge inverter；The straight of two H bridge modules of i mould group is indicated with Uei Flow the sum of side voltage error；Two stacking triangular carriers, and 1 >=Vc2 >=0.5 >=Vc1 >=0 are indicated with Vc1 and Vc2 respectively.
VrefMeet between UdiIfThen define total modulation Wave is located at modulating range m+, wherein m=1,2 ... k, as shown in Figure 3；IfIt then defines described total Modulating wave is located at modulating range m-.
Step S033: when total modulating wave is in positive half period, the tune of 1~2k H bridge module is calculated according to following rule Signal processed, as shown in Figure 4 when 1 < m < k (Fig. 4 illustrate only the case where):
1) whenAnd when m=1, control 1~k mould group exports 0 level；
2) whenAnd 1<when m: if Uek>Ue (m-1), control m-1 mould group export 0 level, K mould group exports+2 level, m~k-1 mould group exports 0 level, residual mode group exports+2 level；Otherwise (i.e. Ue (m-1) > Uek > Uem or Ue (m-1) > Uem > Uek), control m-1 mould group exports+2 level, and k mould group exports 0 level, m~k-1 mould group 0 level is exported, residual mode group exports+2 level；
3) whenAnd when m=1, control 1~k-1 mould group exports 0 level, No. k Mould group exports+1 level；
4) whenAnd when 1 < m, control m~k-1 mould group exports 0 level, k mould + 1 level of group output, residual mode group export+2 level；
5) whenAnd when m=k, control 1~k mould group exports+2 level；
6) whenAnd m<when k: if Uek>Uem, control m mould group export 0 level, No. k Mould group exports+2 level, 1~m-1 mould group exports+2 level, residual mode group exports 0 level；Otherwise, control m mould group output+ 2 level, k mould group exports 0 level, 1~m-1 mould group exports+2 level, residual mode group exports 0 level.
When total modulating wave is in negative half-cycle, believe according to the modulation that following rule calculates 1~2k H bridge module Number:
1) whenAnd when m=1, control 1~k mould group exports 0 level；
2) whenAnd when m > 1: if Uek > Ue (m-1), 0 electricity of control m-1 mould group output Flat, k mould group exports -2 level, m~k-1 mould group exports 0 level, residual mode group exports -2 level；Otherwise, m-1 mould group Export -2 level, k mould group exports 0 level, m~k-1 mould group exports 0 level, residual mode group exports -2 level；
3) whenAnd when m=1, control m~k-1 mould group exports 0 level, mould Group Vk exports -1 level；
4) whenAnd when m > 1, control m~k-1 mould group exports 0 level, mould Group Vk exports -1 level, residual mode group exports -2 level；
5) whenAnd when m=k, control 1~k mould group exports -2 level；
6) whenAnd m<when k: if Uek>Uem, 0 electricity of control m mould group output Flat, k mould group exports -2 level, m+1~k-1 mould group exports 0 level, residual mode group exports -2 level；Otherwise, No. m is controlled Mould group exports -2 level, k mould group exports 0 level, m+1~k-1 mould group exports 0 level, residual mode group exports -2 level.
Wherein, two stacking triangular carriers in the present embodiment can be the stacking triangular carrier of two same-phases, can also Think the stacking triangular carrier of two antiphases.
For the correctness and validity for verifying the program, which is emulated.Simulation parameter is as follows: Using the single-phase non-isolated Cascade H bridge inverter with 4 H bridge modules, DC side command voltage is 35V, grid voltage amplitude For 110V, frequency 50Hz, filter inductance 1mH, the parasitic capacitance of each photovoltaic battery panel is 10nF.It is available after emulation The parasitic capacitor voltage and leakage current waveform of each H bridge module as shown in Figure 5, it can be seen that after using the program, although each H The parasitic capacitor voltage amplitude of bridge module is different, but the high fdrequency component of the parasitic capacitor voltage of each H bridge module is inhibited, and And it is 0.8mA that system, which stablizes back leak current effective value, fully meets grid connection security standard.
In addition, the embodiment of the invention also discloses a kind of drain current suppressing device of single-phase non-isolated Cascade H bridge inverter, The single-phase non-isolated Cascade H bridge inverter is cascaded by 1~2k H bridge module, i H bridge module and 2k-i+1 H bridge mould Block is collectively referred to as a mould group, i=1,2 ..., k；Described device includes:
Acquiring unit 100, for obtaining the DC voltage of each H bridge module；
First computing unit 200, for two H bridge moulds in each mould group to be calculated according to the DC voltage got The sum of DC voltage error of block；
Second computing unit 300, for following the bigger mould of the sum of DC voltage error for making internal two H bridge modules Group obtains bigger output power, so that the output power of two H bridge modules in same mould group is kept equal and make total parasitic capacitance The principle of voltages keep constant calculates the modulated signal of each H bridge module；
Output unit 400, for the modulated signal being calculated to be sent to corresponding H bridge module.
Wherein, the second computing unit 300 is specifically used for:
The sequence of the sum of DC voltage error according to two H bridge modules in each mould group from big to small will remove k mould group Except other Mo Zu be defined as 1~k-1 mould group respectively；
The sum of the DC voltage of two H bridge modules in each mould group is calculated；
The sum of the DC voltage of two H bridge modules in i mould group is indicated with Udi；Use VrefIndicate single-phase non-isolated cascade The instantaneous voltage of total modulating wave of H bridge inverter；With Uei indicate two H bridge modules of i mould group DC voltage error it With；Two stacking triangular carriers, and 1 >=Vc2 >=0.5 >=Vc1 >=0 are indicated with Vc1 and Vc2 respectively；When When, it defines total modulating wave and is located at modulating range m+, whenWhen, it defines total modulating wave and is located at Modulating range m-, m=1,2 ..., k；
When total modulating wave is in positive half period, believe according to the modulation that following rule calculates 1~2k H bridge module Number:
WhenAnd when m=1, control 1~k mould group exports 0 level；
WhenAnd 1<when m: if Uek>Ue (m-1), control m-1 mould group export 0 level, k Number mould group exports+2 level, m~k-1 mould group exports 0 level, residual mode group exports+2 level；Otherwise (i.e. Ue (m-1) > Uek > Uem or Ue (m-1) > Uem > Uek), control m-1 mould group exports+2 level, and k mould group exports 0 level, m~k-1 mould group 0 level is exported, residual mode group exports+2 level；
WhenAnd when m=1, control 1~k-1 mould group exports 0 level, k mould Group+1 level of output；
WhenAnd when 1 < m, control m~k-1 mould group exports 0 level, k mould group Export+1 level, residual mode group exports+2 level；
WhenAnd when m=k, control 1~k mould group exports+2 level；
WhenAnd m<when k: if Uek>Uem, control m mould group export 0 level, k mould + 2 level of group output, 1~m-1 mould group export+2 level, residual mode group exports 0 level；Otherwise, control m mould group output+2 Level, k mould group exports 0 level, 1~m-1 mould group exports+2 level, residual mode group exports 0 level；
When total modulating wave is in negative half-cycle, believe according to the modulation that following rule calculates 1~2k H bridge module Number:
WhenAnd when m=1, control 1~k mould group exports 0 level；
WhenAnd when m > 1: if Uek > Ue (m-1), 0 electricity of control m-1 mould group output Flat, k mould group exports -2 level, m~k-1 mould group exports 0 level, residual mode group exports -2 level；Otherwise, m-1 mould group Export -2 level, k mould group exports 0 level, m~k-1 mould group exports 0 level, residual mode group exports -2 level；
WhenAnd when m=1, control m~k-1 mould group exports 0 level, mould group Vk exports -1 level；
WhenAnd when m > 1, control m~k-1 mould group exports 0 level, mould group Vk exports -1 level, residual mode group exports -2 level；
WhenAnd when m=k, control 1~k mould group exports -2 level；
WhenAnd m<when k: if Uek>Uem, control m mould group export 0 level, k Number mould group exports -2 level, m+1~k-1 mould group exports 0 level, residual mode group exports -2 level；Otherwise, m mould group is controlled Export -2 level, k mould group exports 0 level, m+1~k-1 mould group exports 0 level, residual mode group exports -2 level.
Wherein, described two stacking triangular carriers are the stacking triangular carrier of two same-phases.
Wherein, described two stacking triangular carriers are the stacking triangular carrier of two antiphases.
In conclusion the present invention eliminates common-mode voltage and differential mode voltage pair by enabling total parasitic capacitor voltage keep constant The influence of leakage current, to effectively inhibit leakage current.In addition, the present invention also follows the DC side for making internal two H bridge modules The bigger mould group of the sum of voltage error obtains bigger output power and makes the output power of two H bridge modules in same mould group Equal principle is kept, to calculate the modulated signal of each H bridge module, there are biggish to avoid the output power of each H bridge module Difference, to improve system generating efficiency.
Each embodiment in this specification is described in a progressive manner, the highlights of each of the examples are with other The difference of embodiment, the same or similar parts in each embodiment may refer to each other.For device disclosed in embodiment For, since it is corresponded to the methods disclosed in the examples, so being described relatively simple, related place is said referring to method part It is bright.
The foregoing description of the disclosed embodiments enables those skilled in the art to implement or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, as defined herein General Principle can be realized in other embodiments in the case where not departing from the spirit or scope of the embodiment of the present invention.Therefore, The embodiment of the present invention is not intended to be limited to the embodiments shown herein, and be to fit to principles disclosed herein and The consistent widest scope of features of novelty.

Claims (6)

1. a kind of drain current suppressing method of single-phase non-isolated Cascade H bridge inverter, which is characterized in that the single-phase non-isolated grade Connection H bridge inverter is cascaded by 1~2k H bridge module, and No. i is collectively referred to as a mould group with 2k-i+1 H bridge module, i=1, 2,…,k；The described method includes:
Obtain the DC voltage of each H bridge module；
According to the DC voltage got, the sum of the DC voltage error of two H bridge modules in each mould group is calculated；
The bigger mould group of the sum of the DC voltage error for making internal two H bridge modules is followed to obtain bigger output power, make The principle that the output power of two H bridge modules keeps equal and keeps constant total parasitic capacitor voltage in same mould group calculates The modulated signal of each H bridge module；
The modulated signal being calculated is sent to corresponding H bridge module；
Wherein, it is described follow the bigger mould group of the sum of DC voltage error for making internal two H bridge modules obtain it is bigger defeated Out power, so that the output power of two H bridge modules in same mould group is kept equal and keep constant total parasitic capacitor voltage Principle calculates the modulated signal of each H bridge module, comprising:
The sequence of the sum of DC voltage error according to two H bridge modules in each mould group from big to small, will be in addition to k mould group Other Mo Zu be defined as 1~k-1 mould group respectively, wherein the k mould group refers to including No. k and k+1 H bridge module Mould group；
The sum of the DC voltage of two H bridge modules in each mould group is calculated；
The sum of the DC voltage of two H bridge modules in i mould group is indicated with Udi；Use VrefIndicate single-phase non-isolated cascaded H-bridges The instantaneous voltage of total modulating wave of inverter；The sum of the DC voltage error of two H bridge modules of i mould group is indicated with Uei；Point Two stacking triangular carriers, and 1 >=Vc2 >=0.5 >=Vc1 >=0 are not indicated with Vc1 and Vc2；WhenWhen, it is fixed Justice total modulating wave is located at modulating range m+, whenWhen, it defines total modulating wave and is located at modulator zone Between m-, m=1,2 ..., k；
When total modulating wave is in positive half period, the modulated signal of 1~2k H bridge module is calculated according to following rule:
WhenAnd when m=1, control 1~k mould group exports 0 level；
WhenAnd 1<when m: if Uek>Ue (m-1), control m-1 mould group export 0 level, k mould group Export+2 level, m~k-1 mould group exports 0 level, residual mode group exports+2 level；Otherwise, control m-1 mould group output+2 Level, k mould group export 0 level, and m~k-1 mould group exports 0 level, and residual mode group exports+2 level；
WhenAnd when m=1, control 1~k-1 mould group exports 0 level, the output of k mould group + 1 level；
WhenAnd when 1 < m, control m~k-1 mould group exports 0 level, the output of k mould group + 1 level, residual mode group export+2 level；
WhenAnd when m=k, control 1~k mould group exports+2 level；
WhenAnd m<when k: if Uek>Uem, it is defeated that control m mould group exports 0 level, k mould group + 2 level, 1~m-1 mould group export+2 level out, residual mode group exports 0 level；Otherwise, control m mould group exports+2 level, K mould group exports 0 level, 1~m-1 mould group exports+2 level, residual mode group exports 0 level；
When total modulating wave is in negative half-cycle, the modulated signal of 1~2k H bridge module is calculated according to following rule:
WhenAnd when m=1, control 1~k mould group exports 0 level；
WhenAnd when m > 1: if Uek > Ue (m-1), control m-1 mould group exports 0 level, No. k Mould group exports -2 level, m~k-1 mould group exports 0 level, residual mode group exports -2 level；Otherwise, m-1 mould group output -2 Level, k mould group export 0 level, m~k-1 mould group exports 0 level, residual mode group exports -2 level；
WhenAnd when m=1, it is defeated that control m~k-1 mould group exports 0 level, k mould group - 1 level out；
WhenAnd when m > 1, it is defeated that control m~k-1 mould group exports 0 level, k mould group - 1 level, residual mode group export -2 level out；
WhenAnd when m=k, control 1~k mould group exports -2 level；
WhenAnd m<when k: if Uek>Uem, control m mould group export 0 level, k mould - 2 level of group output, m+1~k-1 mould group export 0 level, residual mode group exports -2 level；Otherwise, control m mould group output- 2 level, k mould group export 0 level, m+1~k-1 mould group exports 0 level, residual mode group exports -2 level.
2. the method according to claim 1, wherein described two stacking triangular carriers are the layer of two same-phases Folded triangular carrier.
3. the method according to claim 1, wherein described two stacking triangular carriers are the layer of two antiphases Folded triangular carrier.
4. a kind of drain current suppressing device of single-phase non-isolated Cascade H bridge inverter, which is characterized in that the single-phase non-isolated grade Connection H bridge inverter is cascaded by 1~2k H bridge module, and i H bridge module and 2k-i+1 H bridge module are collectively referred to as a mould group, i =1,2 ..., k；Described device includes:
Acquiring unit, for obtaining the DC voltage of each H bridge module；
First computing unit, for the direct current of two H bridge modules in each mould group to be calculated according to the DC voltage got The sum of side voltage error；
Second computing unit obtains the bigger mould group of the sum of DC voltage error of internal two H bridge modules for following Bigger output power makes the output power of two H bridge modules in same mould group keep equal and protects total parasitic capacitor voltage Constant principle is held, the modulated signal of each H bridge module is calculated；
Output unit, for the modulated signal being calculated to be sent to corresponding H bridge module；
Wherein, second computing unit is specifically used for:
The sequence of the sum of DC voltage error according to two H bridge modules in each mould group from big to small, will be in addition to k mould group Other Mo Zu be defined as 1~k-1 mould group respectively, wherein the k mould group refers to including No. k and k+1 H bridge module Mould group；
The sum of the DC voltage of two H bridge modules in each mould group is calculated；
The sum of the DC voltage of two H bridge modules in i mould group is indicated with Udi；Use VrefIndicate single-phase non-isolated cascaded H-bridges The instantaneous voltage of total modulating wave of inverter；The sum of the DC voltage error of two H bridge modules of i mould group is indicated with Uei；Point Two stacking triangular carriers, and 1 >=Vc2 >=0.5 >=Vc1 >=0 are not indicated with Vc1 and Vc2；WhenWhen, it is fixed Justice total modulating wave is located at modulating range m+, and works asWhen, it defines total modulating wave and is located at modulation Section m-, m=1,2 ..., k；
When total modulating wave is in positive half period, the modulated signal of 1~2k H bridge module is calculated according to following rule:
WhenAnd when m=1, control 1~k mould group exports 0 level；
WhenAnd 1<when m: if Uek>Ue (m-1), control m-1 mould group export 0 level, k mould group Export+2 level, m~k-1 mould group exports 0 level, residual mode group exports+2 level；Otherwise, control m-1 mould group output+2 Level, k mould group export 0 level, and m~k-1 mould group exports 0 level, and residual mode group exports+2 level；
WhenAnd when m=1, it is defeated that control 1~k-1 mould group exports 0 level, k mould group + 1 level out；
WhenAnd when 1 < m, control m~k-1 mould group exports 0 level, the output of k mould group + 1 level, residual mode group export+2 level；
WhenAnd when m=k, control 1~k mould group exports+2 level；
WhenAnd m<when k: if Uek>Uem, it is defeated that control m mould group exports 0 level, k mould group + 2 level, 1~m-1 mould group export+2 level out, residual mode group exports 0 level；Otherwise, control m mould group exports+2 level, K mould group exports 0 level, 1~m-1 mould group exports+2 level, residual mode group exports 0 level；
When total modulating wave is in negative half-cycle, the modulated signal of 1~2k H bridge module is calculated according to following rule:
WhenAnd when m=1, control 1~k mould group exports 0 level；
WhenAnd when m > 1: if Uek > Ue (m-1), control m-1 mould group exports 0 level, No. k Mould group exports -2 level, m~k-1 mould group exports 0 level, residual mode group exports -2 level；Otherwise, m-1 mould group output -2 Level, k mould group export 0 level, m~k-1 mould group exports 0 level, residual mode group exports -2 level；
WhenAnd when m=1, control m~k-1 mould group exports 0 level, k mould group Export -1 level；
WhenAnd when m > 1, it is defeated that control m~k-1 mould group exports 0 level, k mould group - 1 level, residual mode group export -2 level out；
WhenAnd when m=k, control 1~k mould group exports -2 level；
WhenAnd m<when k: if Uek>Uem, control m mould group export 0 level, k mould - 2 level of group output, m+1~k-1 mould group export 0 level, residual mode group exports -2 level；Otherwise, control m mould group output- 2 level, k mould group export 0 level, m+1~k-1 mould group exports 0 level, residual mode group exports -2 level.
5. device according to claim 4, which is characterized in that described two stacking triangular carriers are the layer of two same-phases Folded triangular carrier.
6. device according to claim 4, which is characterized in that described two stacking triangular carriers are the layer of two antiphases Folded triangular carrier.
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