CN105720947B - A kind of super low-power consumption oscillator - Google Patents

A kind of super low-power consumption oscillator Download PDF

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Publication number
CN105720947B
CN105720947B CN201610042262.3A CN201610042262A CN105720947B CN 105720947 B CN105720947 B CN 105720947B CN 201610042262 A CN201610042262 A CN 201610042262A CN 105720947 B CN105720947 B CN 105720947B
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tube
grid
point
pmos tube
nmos
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CN105720947A (en
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方镜清
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ZHONGSHAN XINDA ELECTRONIC TECHNOLOGY Co Ltd
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ZHONGSHAN XINDA ELECTRONIC TECHNOLOGY Co Ltd
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/01—Details
    • H03K3/012—Modifications of generator to improve response time or to decrease power consumption

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Abstract

The present invention proposes a kind of super low-power consumption oscillator, it is characterised in that：Including start-oscillation circuit；It initiates to vibrate for receiving clock signal, which has a first end and a second end；Biasing circuit；For generating the bias voltage to the second end of the start-oscillation circuit, to reduce the oscillation amplitude of oscillating circuit；Pressure-raising circuit；Output pressure-raising for oscillator signal；And output circuit；There are multiple nodes being crossed-over between the start-oscillation circuit and pressure-raising circuit.The present invention is using the staggeredly mode of connection for being different from traditional scheme, same phase control is carried out to start-oscillation circuit and pressure-raising circuit, solve the problems, such as short circuit current present in conventional circuit, big short circuit current when component being avoided to carry out switching has important role to reducing circuit power consumption and promoting circuit stability；Simultaneously because the presence of pressure-raising circuit, enables circuit oscillation amplitude to be reduced, to further decrease the power consumption of integral oscillation device circuit.

Description

A kind of super low-power consumption oscillator
Technical field
The invention belongs to microelectronic circuit arts fields, and in particular to a kind of super low-power consumption oscillator.
Background technique
With the development of microelectric technique, demand of the microelectronic circuit to low-power consumption, high stable is also more more and more intense.Example Such as, it requires battery that can possess the time that uses as permanent as possible in the heart heartstart of surgical operation, or even wishes entire All no replacement is required in product life cycle battery.Extend the means of service time of battery nothing more than two kinds：Hold first is that increasing battery Amount；Second is that relying on Low-power Technology, lower and control the power consumption of integrated circuit；The former room for promotion is limited, especially For tiny device this kind of for heart heartstart, thus the latter by be the art study frontier.
Oscillator is the essential part of generation system clock in this kind of microelectronics system, therefore its power consumption control It is particularly critical, it can control and realize that the working frequency of oscillator is lower, the power consumption the low then ideal for it, general way is to utilize Low-power Technology means so that oscillator service intermittent time-count cycle, but there are apparent defects for such way：Commonly Based on RC（Resistance capacitance）Oscillator need the resistance and capacitor of the larger value, in this way if requiring frequency of oscillation lower Not only chip area can be enabled excessive, but also cost also greatly increases.It is too low there are many cannot be also down to using working frequency.Cause This, it is necessary to the new low-power consumption oscillator scheme of one kind is proposed to overcome the above problem.
Summary of the invention
The problem of based on mentioned in background technique, the present invention propose a kind of super low-power consumption oscillator, meet microelectronics electricity Demand of the road to low-power consumption, high stable, specific technical solution are as follows：
A kind of super low-power consumption oscillator, including
Start-oscillation circuit；It initiates to vibrate for receiving clock enabling signal, which has a first end and a second end, Its first end connects DC source VEE, and second end is connected with biasing circuit；
Biasing circuit；For generating the bias voltage to the second end of the start-oscillation circuit, to reduce the oscillation of oscillating circuit Amplitude, the biasing circuit have a first end and a second end, and first end connects DC source VEE, second end connection signal ground terminal VSS；
Pressure-raising circuit；For the output pressure-raising of oscillator signal, which is had a first end and a second end, first end Connect DC source VEE, second end connection signal ground terminal VSS；And
Output circuit；The output circuit has first end, second end and output end, and first end connects DC source VEE, the Two end connection signal ground terminal VSS；
With the node that several are crossed-over between the start-oscillation circuit, biasing circuit and pressure-raising circuit.
In one or more embodiments of the invention, the start-oscillation circuit includes following elements：
First PMOS tube, the second PMOS tube, the first NMOS tube and the second NMOS tube concatenation are connected to the first end and second Between end, wherein the grid of the first PMOS tube and the grid of the second NMOS tube are connected to point B, the grid of the second PMOS tube and The grid of one NMOS tube is connected to point C, and the series connection point of the second PMOS tube and the first NMOS tube is point A；
Third PMOS tube, the 4th PMOS tube, third NMOS tube, the 4th NMOS tube and the 11st NMOS tube concatenation are connected to this Between first end and second end, wherein the grid of third PMOS tube and the grid of the 4th NMOS tube are connected to point C, the 4th PMOS The grid of pipe and the grid of third NMOS tube are connected to point D, and the series connection point of the 4th PMOS tube and third NMOS tube is point B, The grid of 11st NMOS tube is connected to point W；
5th PMOS tube, the 6th PMOS tube, the 5th NMOS tube and the 6th NMOS tube concatenation are connected to the first end and second Between end, wherein the grid of the 5th PMOS tube and the grid of the 6th NMOS tube are connected to point D, the grid of the 6th PMOS tube and The grid of five NMOS tubes is connected to point E, and the series connection point of the 6th PMOS tube and the 5th NMOS tube is point C；
16th PMOS tube, the 7th PMOS tube, the 8th PMOS tube, the 7th NMOS tube and the 8th NMOS tube concatenation are connected to this Between first end and second end, wherein the grid of the 7th PMOS tube and the grid of the 8th NMOS tube are connected to point E, the 8th PMOS The grid of pipe and the grid of the 7th NMOS tube are connected to point A, and the series connection point of the 8th PMOS tube and the 7th NMOS tube is point D, The grid of 16th NMOS tube is connected to point X；
17th PMOS tube, the 9th PMOS tube, the tenth PMOS tube, the 9th NMOS tube and the tenth NMOS tube concatenation are connected to this Between first end and second end, wherein the grid of the 9th PMOS tube and the grid of the tenth NMOS tube are connected to point A, the tenth PMOS The grid of pipe and the grid of the 9th NMOS tube are connected to point B, and the series connection point of the tenth PMOS tube and the 8th NMOS tube is point E, The grid of 17th NMOS tube is connected to point X；
18th PMOS tube is connected between the first end and point B, and grid is connected to point W；
19th PMOS tube and the tenth point of NMOS tube are connected in series between the first end and the end VSS, the grid of the two It is connected to point W, the series connection point of the two is connected to point X；
16th NMOS tube is connected between point E and the second end, and the 17th NMOS tube is connected to point D and described second Between end, the grid of the 16th NMOS tube and the grid of the 17th NMOS tube are connected to point X.
In one or more embodiments of the invention, the pressure-raising circuit includes following elements：
26th PMOS tube, the 27th PMOS tube and the 23rd NMOS tube be connected to first end and second end it Between, the grid of the 26th PMOS tube is connected to point B, and the grid of the 27th PMOS tube is connected to point C, the 27th PMOS tube Point M is connected to the series connection point of the 23rd NMOS tube；
24th PMOS tube, the 25th PMOS tube and the 22nd NMOS tube be connected to first end and second end it Between, the grid of the 24th PMOS tube is connected to point E, and the grid of the 25th PMOS tube is connected to point A；
22nd PMOS tube, the 23rd PMOS tube and the 21st NMOS tube be connected to first end and second end it Between, the grid of the 22nd PMOS tube is connected to point C, and the grid of the 23rd PMOS tube is connected to point E；
20th PMOS tube, the 21st PMOS tube and the 20th NMOS tube are connected between first end and second end, the The grid of 20 PMOS tube is connected to point C, and the grid of the 21st PMOS tube is connected to point D, the 21st PMOS tube and second The series connection point of ten NMOS tubes is connected to point N；
The grid of 22nd NMOS tube is connected to point M, the grid of the 20th NMOS tube and the grid of the 21st NMOS tube Pole is commonly connected to the series connection point of the 25th PMOS tube Yu the 22nd NMOS tube；
In one or more embodiments of the invention, the biasing circuit includes following elements：
31st PMOS tube, the 30th NMOS tube, the 32nd NMOS tube and the 27th NMOS tube are connected in series in Between first end and second end, wherein the grid of the 31st PMOS tube and the grid of the 30th NMOS tube are connected to point F, the The series connection point of 31 PMOS tube and the 30th NMOS tube is connected to point F, and the grid of the 32nd PMOS tube is connected to The series connection point of 30 NMOS tubes and the 32nd NMOS tube, the grid of the 27th NMOS tube are connected to point I；
35th NMOS tube is connected between the second end of start-oscillation circuit and the second end of pressure-raising circuit, grid connection In point I；
29th NMOS tube is connected between the second end of start-oscillation circuit and the second end of pressure-raising circuit, grid and The grid of 18 NMOS tubes is commonly connected to point X, and the 18th NMOS tube is connected in parallel with the 23rd NMOS tube；
28th PMOS tube, the 29th PMOS tube and the 26th NMOS tube are connected in series in first end and second end Between, wherein the grid of the 28th PMOS tube is connected to point F, and the grid of the 29th PMOS tube is connected to the 27th The series connection point of NMOS tube and the 32nd NMOS tube；
30th PMOS tube and the 25th NMOS tube are connected in series between the 28th PMOS tube and second end, In, the grid of the 30th PMOS tube is connected to the 29th NMOS tube, connects between the grid and second end of the 30th PMOS tube There is the 24th NMOS tube, is connected to capacitor C1 between the grid of the 24th NMOS tube and the grid of the 30th PMOS tube, second The grid of 14 NMOS tubes is connected to the series connection point of the 29th PMOS tube and the 26th NMOS tube.
In one or more embodiments of the invention, the output circuit includes following elements：
12nd PMOS tube, the 13rd PMOS tube, the 14th PMOS tube, the 12nd NMOS tube and the series connection of the 13rd NMOS tube It is connected between first end and second end, wherein the grid of the 12nd PMOS tube and the grid of the 13rd NMOS tube are connected to a little M, grid, the grid of the 14th PMOS tube and the grid of the 12nd NMOS tube of the 13rd PMOS tube are connected to point N, and the 13rd The series connection point of PMOS tube and the 14th PMOS tube is point I, the series connection point of the 14th PMOS tube and the 12nd NMOS tube For point J, the 14th NMOS tube is connected between point I and point J, the grid of the 14th NMOS tube connects the grid of the 14th PMOS tube Pole；
15th PMOS tube and the 15th NMOS tube are connected in series between first end and second end, the 36th PMOS tube And the 36th NMOS tube be connected in series between first end and second end, the grid of the 15th PMOS tube is connected to point I, the tenth The grid of five NMOS tubes is connected to point J, and the grid of the 36th PMOS tube and the grid of the 36th NMOS tube are commonly connected to The series connection point of 15th PMOS tube and the 15th NMOS tube, the company of series connection of the 36th PMOS tube and the 36th NMOS tube Output of the contact as circuit.
Compared with prior art, the present invention its superiority is embodied in：Using be different from traditional scheme staggeredly the mode of connection, Same phase control is carried out to start-oscillation circuit and pressure-raising circuit, short circuit current present in conventional circuit is solved the problems, such as, avoids member Device carries out big short circuit current when switching, has important work to reducing circuit power consumption and promoting circuit stability With；Simultaneously because the presence of pressure-raising circuit, enables circuit oscillation amplitude to be reduced, to further decrease integral oscillation The power consumption of device circuit.The present invention gets rid of the limitation of traditional circuit, using the super low-power consumption oscillator circuit structure of innovation, realizes electricity Road persistently, is steadily run, and greatly extends all having no matter from practicability or economy using the time for battery Excellent performance is particularly suitable for requiring circuit power consumption to use on stringent product heart heartstart is this kind of.
Detailed description of the invention
Fig. 1 is the functional block diagram of super low-power consumption oscillator of the invention.
Fig. 2 is the circuit structure diagram of super low-power consumption oscillator of the invention.
Specific embodiment
As follows in conjunction with attached drawing 1 to 2, application scheme is further described：
A kind of super low-power consumption oscillator, including
Start-oscillation circuit 1；It initiates to vibrate for receiving clock signal, which has first end 101 and second end 102, first end 101 connects DC source VEE, and second end 102 is connected with biasing circuit 2；
Biasing circuit 2；For generating the bias voltage of the second end to the start-oscillation circuit 1, to reduce the vibration of oscillating circuit 1 Amplitude is swung, which has first end 201 and second end 202, and first end 201 connects DC source VEE, second end 202 Connection signal ground terminal VSS；By taking 5V voltage as an example, which is equivalent to start-oscillation circuit 1 connects, and biasing circuit 2 will generate The bias voltage of 3V or so then enables the oscillation amplitude of start-oscillation circuit 1 be reduced to 2V or so by 5V, so not only consumed by oscillation Power is reducing greatly, and low pressure oscillation is conducive to the stabilization of circuit；
Pressure-raising circuit 3；For the output pressure-raising of oscillator signal, which has first end 301 and second end 302, Its first end 301 connects DC source VEE, 302 connection signal ground terminal VSS of second end；And
Output circuit 4；The output circuit 4 has first end 401, second end 402 and output end OSC1, OSC2, and first End 401 connection DC source VEE, 402 connection signal ground terminal VSS of second end；
The node that between the start-oscillation circuit 1, biasing circuit 2 and pressure-raising circuit 3 there are several to be crossed-over, those Node includes A, B, C, D, E, F, I, M, N, X, and point W is clock signal input node.
The start-oscillation circuit 1 includes following elements：
First PMOS tube, the second PMOS tube, the first NMOS tube and the second NMOS tube concatenation are connected to the first end and second Between end, wherein the grid of the first PMOS tube and the grid of the second NMOS tube are connected to point B, the grid of the second PMOS tube and The grid of one NMOS tube is connected to point C, and the series connection point of the second PMOS tube and the first NMOS tube is point A；
Third PMOS tube, the 4th PMOS tube, third NMOS tube, the 4th NMOS tube and the 11st NMOS tube concatenation are connected to this Between first end and second end, wherein the grid of third PMOS tube and the grid of the 4th NMOS tube are connected to point C, the 4th PMOS The grid of pipe and the grid of third NMOS tube are connected to point D, and the series connection point of the 4th PMOS tube and third NMOS tube is point B, The grid of 11st NMOS tube is connected to point W；
5th PMOS tube, the 6th PMOS tube, the 5th NMOS tube and the 6th NMOS tube concatenation are connected to the first end and second Between end, wherein the grid of the 5th PMOS tube and the grid of the 6th NMOS tube are connected to point D, the grid of the 6th PMOS tube and The grid of five NMOS tubes is connected to point E, and the series connection point of the 6th PMOS tube and the 5th NMOS tube is point C；
16th PMOS tube, the 7th PMOS tube, the 8th PMOS tube, the 7th NMOS tube and the 8th NMOS tube concatenation are connected to this Between first end and second end, wherein the grid of the 7th PMOS tube and the grid of the 8th NMOS tube are connected to point E, the 8th PMOS The grid of pipe and the grid of the 7th NMOS tube are connected to point A, and the series connection point of the 8th PMOS tube and the 7th NMOS tube is point D, The grid of 16th NMOS tube is connected to point X；
17th PMOS tube, the 9th PMOS tube, the tenth PMOS tube, the 9th NMOS tube and the tenth NMOS tube concatenation are connected to this Between first end and second end, wherein the grid of the 9th PMOS tube and the grid of the tenth NMOS tube are connected to point A, the tenth PMOS The grid of pipe and the grid of the 9th NMOS tube are connected to point B, and the series connection point of the tenth PMOS tube and the 8th NMOS tube is point E, The grid of 17th NMOS tube is connected to point X；
18th PMOS tube is connected between the first end and point B, and grid is connected to point W；
19th PMOS tube and the tenth point of NMOS tube are connected in series between the first end and the end VSS, the grid of the two It is connected to point W, the series connection point of the two is connected to point X；
16th NMOS tube is connected between point E and the second end, and the 17th NMOS tube is connected to point D and described second Between end, the grid of the 16th NMOS tube and the grid of the 17th NMOS tube are connected to point X.
The pressure-raising circuit 3 includes following elements：
26th PMOS tube, the 27th PMOS tube and the 23rd NMOS tube be connected to first end and second end it Between, the grid of the 26th PMOS tube is connected to point B, and the grid of the 27th PMOS tube is connected to point C, the 27th PMOS tube Point M is connected to the series connection point of the 23rd NMOS tube；
24th PMOS tube, the 25th PMOS tube and the 22nd NMOS tube be connected to first end and second end it Between, the grid of the 24th PMOS tube is connected to point E, and the grid of the 25th PMOS tube is connected to point A；
22nd PMOS tube, the 23rd PMOS tube and the 21st NMOS tube be connected to first end and second end it Between, the grid of the 22nd PMOS tube is connected to point C, and the grid of the 23rd PMOS tube is connected to point E；
20th PMOS tube, the 21st PMOS tube and the 20th NMOS tube are connected between first end and second end, the The grid of 20 PMOS tube is connected to point C, and the grid of the 21st PMOS tube is connected to point D, the 21st PMOS tube and second The series connection point of ten NMOS tubes is connected to point N；
The grid of 22nd NMOS tube is connected to point M, the grid of the 20th NMOS tube and the grid of the 21st NMOS tube Pole is commonly connected to the series connection point of the 25th PMOS tube Yu the 22nd NMOS tube；
The biasing circuit packet 2 has included following elements：
31st PMOS tube, the 30th NMOS tube, the 32nd NMOS tube and the 27th NMOS tube are connected in series in Between first end and second end, wherein the grid of the 31st PMOS tube and the grid of the 30th NMOS tube are connected to point F, the The series connection point of 31 PMOS tube and the 30th NMOS tube is connected to point F, and the grid of the 32nd PMOS tube is connected to The series connection point of 30 NMOS tubes and the 32nd NMOS tube, the grid of the 27th NMOS tube are connected to point I；
35th NMOS tube is connected between the second end of start-oscillation circuit and the second end of pressure-raising circuit, grid connection In point I；
29th NMOS tube is connected between the second end of start-oscillation circuit and the second end of pressure-raising circuit, grid and The grid of 18 NMOS tubes is commonly connected to point X, and the 18th NMOS tube is connected in parallel with the 23rd NMOS tube；
28th PMOS tube, the 29th PMOS tube and the 26th NMOS tube are connected in series in first end and second end Between, wherein the grid of the 28th PMOS tube is connected to point F, and the grid of the 29th PMOS tube is connected to the 27th The series connection point of NMOS tube and the 32nd NMOS tube；
30th PMOS tube and the 25th NMOS tube are connected in series between the 28th PMOS tube and second end, In, the grid of the 30th PMOS tube is connected to the 29th NMOS tube, connects between the grid and second end of the 30th PMOS tube There is the 24th NMOS tube, is connected to capacitor C1 between the grid of the 24th NMOS tube and the grid of the 30th PMOS tube, second The grid of 14 NMOS tubes is connected to the series connection point of the 29th PMOS tube and the 26th NMOS tube.
The output circuit 4 includes following elements：
12nd PMOS tube, the 13rd PMOS tube, the 14th PMOS tube, the 12nd NMOS tube and the series connection of the 13rd NMOS tube It is connected between first end and second end, wherein the grid of the 12nd PMOS tube and the grid of the 13rd NMOS tube are connected to a little M, grid, the grid of the 14th PMOS tube and the grid of the 12nd NMOS tube of the 13rd PMOS tube are connected to point N, and the 13rd The series connection point of PMOS tube and the 14th PMOS tube is point I, the series connection point of the 14th PMOS tube and the 12nd NMOS tube For point J, the 14th NMOS tube is connected between point I and point J, the grid of the 14th NMOS tube connects the grid of the 14th PMOS tube Pole；
15th PMOS tube and the 15th NMOS tube are connected in series between first end and second end, the 36th PMOS tube And the 36th NMOS tube be connected in series between first end and second end, the grid of the 15th PMOS tube is connected to point I, the tenth The grid of five NMOS tubes is connected to point J, and the grid of the 36th PMOS tube and the grid of the 36th NMOS tube are commonly connected to The series connection point of 15th PMOS tube and the 15th NMOS tube, the company of series connection of the 36th PMOS tube and the 36th NMOS tube Output of the contact as circuit.
It is that above-mentioned preferred embodiment should be regarded as application scheme embodiment for example, all with application scheme thunder Same, approximate or technology deduction, replacement, improvement for making based on this etc., are regarded as the protection scope of this patent.

Claims (2)

1. a kind of super low-power consumption oscillator, it is characterised in that：Including
Start-oscillation circuit；It initiates to vibrate for receiving clock signal, which has a first end and a second end, first end DC source VEE is connected, second end is connected with biasing circuit；
Biasing circuit；For generating the bias voltage to the second end of the start-oscillation circuit, to reduce the oscillation amplitude of oscillating circuit, The biasing circuit has a first end and a second end, and first end connects DC source VEE, second end connection signal ground terminal VSS；
Pressure-raising circuit；For the output pressure-raising of oscillator signal, which is had a first end and a second end, first end connection DC source VEE, second end connection signal ground terminal VSS；And
Output circuit；The output circuit has first end, second end and output end, and first end connects DC source VEE, second end Connection signal ground terminal VSS；
With the node that several are crossed-over between the start-oscillation circuit, biasing circuit and pressure-raising circuit；
The start-oscillation circuit includes following elements：
First PMOS tube, the second PMOS tube, the first NMOS tube and the second NMOS tube concatenation be connected to the first end and second end it Between, wherein the grid of the first PMOS tube and the grid of the second NMOS tube are connected to point B, the grid of the second PMOS tube and first The grid of NMOS tube is connected to point C, and the series connection point of the second PMOS tube and the first NMOS tube is point A；
Third PMOS tube, the 4th PMOS tube, third NMOS tube, the 4th NMOS tube and the 11st NMOS tube concatenation be connected to this first Between end and second end, wherein the grid of third PMOS tube and the grid of the 4th NMOS tube are connected to point C, the 4th PMOS tube The grid of grid and third NMOS tube is connected to point D, and the series connection point of the 4th PMOS tube and third NMOS tube is point B, and the tenth The grid of one NMOS tube is connected to point W；
5th PMOS tube, the 6th PMOS tube, the 5th NMOS tube and the 6th NMOS tube concatenation be connected to the first end and second end it Between, wherein the grid of the 5th PMOS tube and the grid of the 6th NMOS tube are connected to point D, the grid and the 5th of the 6th PMOS tube The grid of NMOS tube is connected to point E, and the series connection point of the 6th PMOS tube and the 5th NMOS tube is point C；
16th PMOS tube, the 7th PMOS tube, the 8th PMOS tube, the 7th NMOS tube and the 8th NMOS tube concatenation be connected to this first Between end and second end, wherein the grid of the 7th PMOS tube and the grid of the 8th NMOS tube are connected to point E, the 8th PMOS tube Grid and the grid of the 7th NMOS tube are connected to point A, and the series connection point of the 8th PMOS tube and the 7th NMOS tube is point D, and the tenth The grid of six NMOS tubes is connected to point X；
17th PMOS tube, the 9th PMOS tube, the tenth PMOS tube, the 9th NMOS tube and the tenth NMOS tube concatenation be connected to this first Between end and second end, wherein the grid of the 9th PMOS tube and the grid of the tenth NMOS tube are connected to point A, the tenth PMOS tube Grid and the grid of the 9th NMOS tube are connected to point B, and the series connection point of the tenth PMOS tube and the 8th NMOS tube is point E, and the tenth The grid of seven NMOS tubes is connected to point X；
18th PMOS tube is connected between the first end and point B, and grid is connected to point W；
19th PMOS tube and the tenth point of NMOS tube are connected in series between the first end and the end VSS, the grid connection of the two Point X is connected in the series connection point of point W, the two；
16th NMOS tube is connected between point E and the second end, the 17th NMOS tube be connected to point D and the second end it Between, the grid of the 16th NMOS tube and the grid of the 17th NMOS tube are connected to point X；
The pressure-raising circuit includes following elements：
26th PMOS tube, the 27th PMOS tube and the 23rd NMOS tube are connected between first end and second end, the The grid of 26 PMOS tube is connected to point B, and the grid of the 27th PMOS tube is connected to point C, the 27th PMOS tube and the The series connection point of 23 NMOS tubes is connected to point M；
24th PMOS tube, the 25th PMOS tube and the 22nd NMOS tube are connected between first end and second end, the The grid of 24 PMOS tube is connected to point E, and the grid of the 25th PMOS tube is connected to point A；
22nd PMOS tube, the 23rd PMOS tube and the 21st NMOS tube are connected between first end and second end, the The grid of 22 PMOS tube is connected to point C, and the grid of the 23rd PMOS tube is connected to point E；
20th PMOS tube, the 21st PMOS tube and the 20th NMOS tube are connected between first end and second end, and the 20th The grid of PMOS tube is connected to point C, and the grid of the 21st PMOS tube is connected to point D, the 21st PMOS tube and the 20th The series connection point of NMOS tube is connected to point N；
The grid of 22nd NMOS tube is connected to point M, and the grid of the 20th NMOS tube and the grid of the 21st NMOS tube are total With the series connection point for being connected to the 25th PMOS tube Yu the 22nd NMOS tube；
The biasing circuit includes following elements：
31st PMOS tube, the 30th NMOS tube, the 32nd NMOS tube and the 27th NMOS tube are connected in series in first Between end and second end, wherein the grid of the 31st PMOS tube and the grid of the 30th NMOS tube are connected to point F, and the 30th The series connection point of one PMOS tube and the 30th NMOS tube is connected to point F, and the grid of the 32nd PMOS tube is connected to the 30th The series connection point of NMOS tube and the 32nd NMOS tube, the grid of the 27th NMOS tube are connected to point I；
35th NMOS tube is connected between the second end of start-oscillation circuit and the second end of pressure-raising circuit, and grid is connected to a little I；
29th NMOS tube is connected between the second end of start-oscillation circuit and the second end of pressure-raising circuit, grid and the 18th The grid of NMOS tube is commonly connected to point X, and the 18th NMOS tube is connected in parallel with the 23rd NMOS tube；
28th PMOS tube, the 29th PMOS tube and the 26th NMOS tube be connected in series in first end and second end it Between, wherein the grid of the 28th PMOS tube is connected to point F, and the grid of the 29th PMOS tube is connected to the 27th NMOS The series connection point of pipe and the 32nd NMOS tube；
30th PMOS tube and the 25th NMOS tube are connected in series between the 28th PMOS tube and second end, wherein the The grid of 30 PMOS tube is connected to the 29th NMOS tube, is connected with second between the grid and second end of the 30th PMOS tube 14 NMOS tubes, are connected to capacitor C1 between the grid of the 24th NMOS tube and the grid of the 30th PMOS tube, and the 24th The grid of NMOS tube is connected to the series connection point of the 29th PMOS tube and the 26th NMOS tube.
2. super low-power consumption oscillator according to claim 1, which is characterized in that the output circuit includes following member Part：
12nd PMOS tube, the 13rd PMOS tube, the 14th PMOS tube, the 12nd NMOS tube and the 13rd NMOS tube are connected in series Between first end and second end, wherein the grid of the 12nd PMOS tube and the grid of the 13rd NMOS tube are connected to point M, the The grid of the grid of 13 PMOS tube, the grid of the 14th PMOS tube and the 12nd NMOS tube is connected to point N, the 13rd PMOS tube It is point I with the series connection point of the 14th PMOS tube, the series connection point of the 14th PMOS tube and the 12nd NMOS tube is point J, The 14th NMOS tube is connected between point I and point J, the grid of the 14th NMOS tube connects the grid of the 14th PMOS tube；
15th PMOS tube and the 15th NMOS tube are connected in series between first end and second end, the 36th PMOS tube and 36 NMOS tubes are connected in series between first end and second end, and the grid of the 15th PMOS tube is connected to point I, and the 15th The grid of NMOS tube is connected to point J, and the grid of the grid of the 36th PMOS tube and the 36th NMOS tube is commonly connected to The series connection point of 15 PMOS tube and the 15th NMOS tube, the series connection of the 36th PMOS tube and the 36th NMOS tube Output of the point as circuit.
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CN110113032B (en) * 2019-05-17 2023-06-02 芯翼信息科技(南京)有限公司 Crystal oscillation control circuit and control method thereof

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CN101212174A (en) * 2006-12-31 2008-07-02 中国科学院半导体研究所 Charge pump circuit for passive radio frequency identification system
CN104104331A (en) * 2013-04-15 2014-10-15 深圳先进技术研究院 Transconductance enhancement circuit unit and crystal oscillator circuit
CN204993275U (en) * 2015-10-15 2016-01-20 深圳市博巨兴实业发展有限公司 Low -power consumption low -speed clock circuit and wearable equipment

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CN101212174A (en) * 2006-12-31 2008-07-02 中国科学院半导体研究所 Charge pump circuit for passive radio frequency identification system
CN104104331A (en) * 2013-04-15 2014-10-15 深圳先进技术研究院 Transconductance enhancement circuit unit and crystal oscillator circuit
CN204993275U (en) * 2015-10-15 2016-01-20 深圳市博巨兴实业发展有限公司 Low -power consumption low -speed clock circuit and wearable equipment

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