CN105450062B - Method for calculating three-level inverter circuit losses of SiC MOSFETs - Google Patents

Method for calculating three-level inverter circuit losses of SiC MOSFETs Download PDF

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Publication number
CN105450062B
CN105450062B CN201510900848.4A CN201510900848A CN105450062B CN 105450062 B CN105450062 B CN 105450062B CN 201510900848 A CN201510900848 A CN 201510900848A CN 105450062 B CN105450062 B CN 105450062B
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sic
loss
diode
switch mosfet
mosfet pipe
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CN105450062A (en
Inventor
孟向军
吕淼
牛化鹏
张海龙
姚为正
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Xian XJ Power Electronics Technology Co Ltd
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Xian XJ Power Electronics Technology Co Ltd
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0048—Circuits or arrangements for reducing losses
    • H02M1/0054—Transistor switching losses
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

The invention discloses a method for calculating three-level inverter circuit losses of SiC MOSFETs. The method comprises the following steps: building a switch tube conduction loss calculation model and a switch tube switching loss calculation model according to a T-shaped three-level circuit topology; building a loss calculation model for four single-phase SiC MOSFETs and diodes according to the built switch tube conduction loss calculation model and the switch tube switching loss calculation model; and adding the losses of the four single-phase SiC MOSFETs and the diodes, and multiplying the sum by three, so as to obtain the three-level inverter circuit losses of the SiC MOSFETs. According to the method, the power losses under various conditions can be quickly estimated according to known characteristic parameters of the used SiC MOSFETs in a rated state; and the method is accurate in calculation result and high in calculation speed, and can meet the engineering requirements.

Description

A kind of SiC MOSFET three-level inverter circuit loss computing methods
【Technical field】
The present invention relates to a kind of circuit loss computational methods, and in particular to a kind of SiC MOSFET three-level inverter circuits are damaged Consumption computational methods.
【Background technology】
The characteristics of the high pressure resistant of SiC MOSFET, high temperature and speed-sensitive switch characteristic, low-loss, high stability, more meets right The requirement of power semiconductor development, has become the emphasis of power device research.It has been reported that, SiC MOSFET will replace Si IGBT become the power device that high voltage appearance field voltage drives.
T-shaped three-level inverter circuit is widely used, at present using the three-level inverter circuit loss calculation method of Si devices Can look on website.And SiC device has bigger difference due to characteristics such as switching speed, driving voltages with traditional Si MOSFET, Therefore the loss computing method for applying mechanically Si devices completely is irrational, but the tri-level switch loss of reply SiC device is set up Correspondence calculating means.
【The content of the invention】
It is an object of the invention to overcome above-mentioned deficiency, there is provided a kind of SiC MOSFET three-level inverter circuit loss calculations Method, the result of calculation of the method is accurate, meets requirement of engineering.
In order to achieve the above object, the present invention is comprised the following steps：
Step one, according to T-shaped tri-level circuit topology switching tube conduction loss computation model is set up；
Step 2, according to T-shaped tri-level circuit topology switching tube switching loss computation model is set up；
Step 3, according to switching tube conduction loss computation model and switching tube switching loss computation model is set up, sets up single The loss calculation model of 4 SiC MOSFET of phase and diode；
Step 4, single-phase 4 SiC MOSFET in step 3 are added with the loss of diode, and sum is multiplied by three, obtains final product To the loss of SiC MOSFET three-level inverter circuits.
In the step one, switching device voltage current relationship in carrier cycle, the modulation methods for being adopted fully are analyzed Switching tube conducting dutycycle in formula and carrier cycle, gets corresponding conducting and damages to each device in the interval inner product of conducting Consumption.
In the step one, the three characteristics of the middle term is symmetrical in T-shaped tri-level circuit topology, only to a wherein facies analysis, with A phases As a example by be analyzed, it is assumed that voltage x current is respectively：
U, I are voltage x current peak value, and φ is voltage current phase difference；
Relation between device and voltage, electric current is opened in carrier cycle is,In interval, a SiC MOSFET are opened Close pipe T1, the 2nd SiC switch mosfet pipe T2 and threeth diode D3 antiparallel with the 3rd SiC switch mosfet pipe T3 to lead It is logical；
When being modulated using SPWM, switching tube conducting dutycycle is in carrier cycleWherein, M is modulation Than defining modulation ratio M is：,
SiC MOSFET terminal voltages UdsWith electric current IdBetween relation can be approximated to be：
Uds=Uds0+Rds(on)×Id(t)(3)
In formula, UdsoRepresent threshold voltage.Rds(on)For Uds-IdSlope resistance, takes the slope of 10% and 90% two-point defined line；
In the same manner, the slope resistance r of diode can be obtained by the U-I characteristics of diodefFor：
UfoFor diode current flow threshold voltage.
To each device, integration can obtain corresponding conduction loss in conducting is interval, with a SiC switch mosfets As a example by pipe T1, it is integrated and is obtained：
I.e.：
Can obtain in the same manner the 2nd SiC switch mosfet pipe T2, respectively with a SiC switch mosfet pipe T1 and second The conduction loss of SiC switch mosfet pipe T2 antiparallel first diode D1 and the second diode D2, is understood to divide by complementarity Not with the 3rd SiC switch mosfet pipe T3 and antiparallel 3rd diode D3 and the 4th of the 4th SiC switch mosfet pipe T4 The conduction loss of diode D4, the 3rd SiC switch mosfet pipe T3 and the 4th SiC switch mosfet pipe T4.
In the step 2, according to the related data in production firm's power device service manual in T-shaped tri-level circuit, Obtain switching tube switching loss.
In the step 2, turn-on consumption Eo under measurement condition is obtained by product manualnWith turn-off power loss Eoff, switch Loss EswLinearly sue for peace equal to both.
In the step 3, the loss of a SiC switch mosfet pipe T1 and the 4th SiC switch mosfet pipe T4：
Wherein Inom, UnomFor the test voltage current value that product manual is found, KI, KU, GIFor correction coefficient, fsw is SiC MOSFET element switching frequency, Esw=Eon-Eoff；
The loss of the 2nd SiC switch mosfet pipe T2 and the 3rd SiC switch mosfet pipe T3：
The loss of the first diode D1 and the 4th diode D4：
The loss of the second diode D2 and the 3rd diode D3：
Compared with prior art, present invention switching device voltage current relationship in carrier cycle carries out labor Afterwards, it is proposed that a kind of SiC MOSFET three-level inverter circuit loss computing methods, the SiC that the method is used according to known to Characterisitic parameter of the MOSFET element under rated condition, can quickly estimate it is various under the conditions of power attenuation, the meter of the method Calculate result accurate, calculating speed is fast, disclosure satisfy that requirement of engineering.
【Description of the drawings】
Fig. 1 is T-shaped tri-level circuit topological diagram in the present invention；
Fig. 2 is switching device voltage current relationship figure in carrier cycle.
【Specific embodiment】
Below in conjunction with the accompanying drawings the present invention will be further described.
Referring to Fig. 1 and Fig. 2, the present invention is comprised the following steps：
Step one, according to T-shaped tri-level circuit topology switching tube conduction loss computation model is set up；
The three characteristics of the middle term is symmetrical in T-shaped tri-level circuit topology, only to a wherein facies analysis, is analyzed by taking A phases as an example, Assume that voltage x current is respectively：
U, I are voltage x current peak value, and φ is voltage current phase difference.
Relation between device and voltage, electric current is opened in carrier cycle is,In interval, a SiC MOSFET are opened Close pipe T1, the 2nd SiC switch mosfet pipe T2 and threeth diode D3 antiparallel with the 3rd SiC switch mosfet pipe T3 to lead It is logical；
When being modulated using SPWM, switching tube conducting dutycycle is in carrier cycleWherein, M is modulation Than, defining modulation ratio M is,
SiC MOSFET terminal voltages UdsWith electric current IdBetween relation can be approximated to be：
Uds=Uds0+Rds(on)×Id(t) (3)
In formula, UdsoRepresent threshold voltage.Rds(on)For Uds-IdSlope resistance, takes the slope of 10% and 90% two-point defined line；
In the same manner, the slope resistance r of diode can be obtained by the U-I characteristics of diodefFor：
UfoFor diode current flow threshold voltage.
To each device, integration can obtain corresponding conduction loss in conducting is interval, with a SiC switch mosfets Pipe T1, is integrated to it and obtains：
I.e.：
Can obtain in the same manner the 2nd SiC switch mosfet pipe T2, respectively with a SiC switch mosfet pipe T1 and second The conduction loss of SiC switch mosfet pipe T2 antiparallel first diode D1 and the second diode D2, is understood to divide by complementarity Not with the 3rd SiC switch mosfet pipe T3 and antiparallel 3rd diode D3 and the 4th of the 4th SiC switch mosfet pipe T4 The conduction loss of diode D4, the 3rd SiC switch mosfet pipe T3 and the 4th SiC switch mosfet pipe T4.
Step 2, according to T-shaped tri-level circuit topology switching tube switching loss computation model is set up；Obtained by product manual The turn-on consumption E under measurement conditiononWith turn-off power loss Eoff, switching loss EswLinearly sue for peace equal to both；
Step 3, according to switching tube conduction loss computation model and switching tube switching loss computation model is set up, sets up single The loss calculation model of 4 SiC MOSFET of phase and diode and triode；
The loss of the first SiC switch mosfet pipe T1 and the 4th SiC switch mosfet pipe T4：
Wherein Inom, UnomFor the test voltage current value that product manual is found, KI, KU, GIFor correction coefficient, fsw is SiC MOSFET element switching frequency, Esw=Eon-Eoff；
The loss of the 2nd SiC switch mosfet pipe T2 and the 3rd SiC switch mosfet pipe T3：
The loss of the first diode D1 and the 4th diode D4：
The loss of the second diode D2 and the 3rd diode D3：
Step 4, single-phase 4 SiC MOSFET in step 3 are added with the loss of diode, and sum is multiplied by three, obtains final product To the loss of SiC MOSFET three-level inverter circuits.
In step one, the modulation system for fully analyze switching device voltage current relationship in carrier cycle, being adopted with And switching tube conducting dutycycle in carrier cycle, corresponding conduction loss is got in the interval inner product of conducting to each device.
In step 2, according to the related data in production firm's power device service manual in T-shaped tri-level circuit, obtain Switching tube switching loss.
During using different modulation systems, dutycycle is different.When being modulated using SPWM, switching tube in carrier cycle Conducting dutycycle is as shown in table 1,
Table 1
Correction coefficient in step 3, as shown in table 2,
Table 2

Claims (5)

1. a kind of SiC MOSFET three-level inverter circuit loss computing methods, it is characterised in that comprise the following steps：
Step one, according to T-shaped tri-level circuit topology switching tube conduction loss computation model is set up；T-shaped tri-level circuit topology The middle three characteristics of the middle term is symmetrical, only to a wherein facies analysis, is analyzed by taking A phases as an example, it is assumed that voltage x current is respectively：
U, I are voltage x current peak value, and φ is voltage current phase difference；
Relation between device and voltage, electric current is opened in carrier cycle is,In interval, a SiC switch mosfet pipes T1, the 2nd SiC switch mosfet pipe T2 and threeth diode D3 antiparallel with the 3rd SiC switch mosfet pipe T3 are turned on；
When being modulated using SPWM, switching tube conducting dutycycle is in carrier cycleWherein, M is modulation ratio, fixed Adopted modulation ratio M is：
M = 2 U / 3 U d c / 2 - - - ( 2 )
SiC MOSFET terminal voltages UdsWith electric current IdBetween relation can be approximated to be：
Uds=Uds0+Rds(on)×Id(t) (3)
In formula, UdsoRepresent threshold voltage, Rds(on)For Uds-IdSlope resistance, takes the slope of 10% and 90% two-point defined line；
In the same manner, the slope resistance r of diode can be obtained by the U-I characteristics of diodefFor：
r f = U f - U f 0 I f - - - ( 4 )
UfoFor diode current flow threshold voltage；
To each device, integration can obtain corresponding conduction loss in conducting is interval, with a SiC switch mosfet pipe T1 As a example by, it is integrated and is obtained：
I.e.：
Can obtain in the same manner the 2nd SiC switch mosfet pipe T2, respectively with SiC a switch mosfet pipe T1 and the 2nd SiC The conduction loss of switch mosfet pipe T2 antiparallel first diode D1 and the second diode D2, by complementarity understand respectively with 3rd SiC switch mosfet pipe T3 and the antiparallel 3rd diode D3 of the 4th SiC switch mosfet pipe T4 and the four or two pole The conduction loss of pipe D4, the 3rd SiC switch mosfet pipe T3 and the 4th SiC switch mosfet pipe T4；
Step 2, according to T-shaped tri-level circuit topology switching tube switching loss computation model is set up；
Step 3, according to switching tube conduction loss computation model and switching tube switching loss computation model is set up, sets up single-phase 4 The loss calculation model of SiC MOSFET and diode；
Step 4, single-phase 4 SiC MOSFET in step 3 are added with the loss of diode, and sum is multiplied by three, that is, obtain SiC MOSFET three-level inverter circuits are lost.
2. a kind of SiC MOSFET three-level inverter circuit loss computing methods according to claim 1, it is characterised in that In the step one, switching device voltage current relationship in carrier cycle, the modulation system for being adopted and load are fully analyzed Switching tube conducting dutycycle in period of wave, corresponding conduction loss is got to each device in the interval inner product of conducting.
3. a kind of SiC MOSFET three-level inverter circuit loss computing methods according to claim 1, it is characterised in that In the step 2, according to the related data in production firm's power device service manual in T-shaped tri-level circuit, switched Pipe switching loss.
4. a kind of SiC MOSFET three-level inverter circuit loss computing methods according to claim 1, it is characterised in that In the step 2, turn-on consumption E under measurement condition is obtained by product manualonWith turn-off power loss Eoff, switching loss EswDeng Linearly sue for peace in both.
5. a kind of SiC MOSFET three-level inverter circuit loss computing methods according to claim 4, it is characterised in that In the step 3, the loss of a SiC switch mosfet pipe T1 and the 4th SiC switch mosfet pipe T4：
Wherein Inom, UnomFor the test voltage current value that product manual is found, KI, KU, GIFor correction coefficient, fswFor SiCMOSFET Devices switch frequency, Esw=Eon+Eoff；
The loss of the 2nd SiC switch mosfet pipe T2 and the 3rd SiC switch mosfet pipe T3：
P c o n d = 1 2 π · I 2 · R d s ( o n ) · 1 2 π = 1 4 · I 2 · R d s ( o n ) - - - ( 9 )
The loss of the first diode D1 and the 4th diode D4：
The loss of the second diode D2 and the 3rd diode D3：
CN201510900848.4A 2015-12-08 2015-12-08 Method for calculating three-level inverter circuit losses of SiC MOSFETs Expired - Fee Related CN105450062B (en)

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CN108429478A (en) * 2018-03-23 2018-08-21 南京铁道职业技术学院 A kind of single-phase three level T-type inverter efficiency optimal control method
CN109557828B (en) * 2018-10-31 2022-03-25 西安理工大学 SiCMOS MOSFET simulation circuit model parameter precision correction method
CN109873570A (en) * 2019-03-26 2019-06-11 沈阳远大电力电子科技有限公司 Three level T font topological structures of one kind and single-phase inverter and three-phase inverter
CN110323954B (en) * 2019-08-08 2020-11-03 中车青岛四方车辆研究所有限公司 Three-level traction power module based on SiC power device and inverter circuit

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