CN104953876B - The method that H bridge cascaded multilevel inverters on-off times minimize modulation - Google Patents

The method that H bridge cascaded multilevel inverters on-off times minimize modulation Download PDF

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CN104953876B
CN104953876B CN201510424612.8A CN201510424612A CN104953876B CN 104953876 B CN104953876 B CN 104953876B CN 201510424612 A CN201510424612 A CN 201510424612A CN 104953876 B CN104953876 B CN 104953876B
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董秀成
余小梅
钟顺时
袁知文
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Xihua University
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Abstract

The invention discloses a kind of method that H bridges cascaded multilevel inverter on-off times minimize modulation, belong to the modulation field of cascaded multilevel inverter.Conventional unipolar SPWM can bring unnecessary on-off times, and with the increase of concatenation unit number, this unnecessary on-off times will be superimposed.The problem of present invention can bring unnecessary on-off times for unipolarity modulation system proposes a kind of cascaded multilevel inverter on-off times and minimizes modulation strategy, including cascade structure uses the modulation system of phase-shifting carrier wave on the whole;Improved unipolarity modulation system is used in single concatenation unit, the on off state of the switching tube on each H-bridge unit copped wave arm of cascade multilevel inverter is improved;Calculate in a modulation period percentage of time shared by off state on copped wave arm.The more conventional Unipolar SPWM of the modulation strategy can substantially reduce on-off times, and will not cause the variation of output performance due to the reduction of on-off times.

Description

The method that H bridge cascaded multilevel inverters on-off times minimize modulation
Technical field
The present invention relates to the modulation field of cascaded multilevel inverter, a kind of H bridges cascaded multilevel inverter switch is refered in particular to The method that number of times minimizes modulation.
Background technology
Voltage stress on H bridge cascaded multilevel inverter switching devices is small, the degree of modularity is high, level number is more, be easy to Redundancy is realized, is easy to extend and controls, harmonic wave of output voltage characteristic is good, failure tolerant ability is strong etc., low-voltage power electronics is used Device realizes that high-power electric energy is changed, and can be applied to D.C. high voltage transmission, STATCOM and active power filtering The high-power such as the energy source regeneration apparatus such as device, photovoltaic generation and fuel cell power generation and high-power high swallow variable-frequency motor driving In device.
Modulation technique is the key technology of H bridge cascade multilevel inverters.What H bridges cascade multilevel inverter was used Modulator approach mainly includes Staircase wave, particular harmonic and eliminates PWM, carrier phase-shifted PWM and many level SVPWMs etc..Wherein Phase-shifted SPWM makes a kind of modulation technique that current cascaded multilevel inverter is generally used.Traditional phase-shifted SPWM one As use frequency multiplication SPWM modulator approaches, thus each power modules need 2 PWM generators to produce drive signals, for H bridges For cascaded multilevel inverter, it is necessarily required to occupy substantial amounts of processor resource.Unipolar SPWM modulation system is incorporated into In phase-shifted SPWM, more traditional use frequency multiplication SPWM modulator approaches can reduce the PWM generator of half, save a large amount of Processor resource.
Conventional unipolar SPWM modulation systems have that switching loss is small, harmonic distortion is low compared with bipolar SPWM modulation system Advantage;Compared with the PWM generator that multiple-frequency SPWM modulation system can reduce half, processor resource has been saved.However, conventional single Polarity S PWM can bring unnecessary on-off times to the device for power switching on H bridge inverter copped wave arms, and as H bridges are cascaded The series of multi-electrical level inverter increases this unnecessary on-off times will be more obvious.
The content of the invention
The purpose of the present invention is that the power device on H bridge inverter copped wave arms is brought for conventional unipolar SPWM need not The problem of wanting on-off times, it is proposed that a kind of method that H bridges cascaded multilevel inverter on-off times minimize modulation, it is intended to subtract The on-off times of few H cascaded multilevel inverters.
1st, the invention provides a kind of method that H bridges cascaded multilevel inverter on-off times minimize modulation, H bridges are set In cascade multilevel inverter, the triangle carrier signal excursion of each submodule is identical, and is change between -1~1, The triangular carrier phase angle difference of two neighboring submodule is 360 °/N, and wherein N is cascade submodule number;The method of the modulation is such as Under:
(1) after amplitude is compared for -1 to 1 sinewave modulation signal with zero level, square-wave signal, the party are obtained Ripple signal is followed successively by the drive signal all the way of each submodule pitman arm device for power switching of H bridges cascaded multilevel inverter Vgn1;
(2) the square-wave signal logical inversion obtained to step (1), obtains H bridges cascaded multilevel inverter each submodule Another road drive signal Vgn2 of pitman arm device for power switching;
(3) by the sinewave modulation signal in step (1) and H bridges cascaded multilevel inverter each submodule corresponding three Angle carrier signal obtains pwm pulse signal associated with each power modules copped wave arm device for power switching all the way more afterwards Vg3n’;
(4) the pwm pulse signal logical inversion for obtaining step (3), obtains another road and each power modules copped wave The associated pwm pulse signal Vg4n ' of arm device for power switching;
H bridge cascaded multilevel inverters are made up of the directly cascade of multiple H-bridge unit structures, single H-bridge unit pitman arm Obtained with copped wave arm drive signal by following steps:
(5) using step (1) and step (2) obtain the drive signal Vgn1 of single power model pitman arm power device with Vgn2;
(6) it is n-th of H bridge list to obtain two-way pwm pulse signal Vgn3 ' and Vgn4 ', n using step (3) and step (4) Member;
(7) under passive linear load, fundametal compoment I01Lag behind fundamental voltage U01, and phase difference formula is:
ω is inversion angular frequency, L0For load inductance, R0For load resistance;
(8) within a modulation period, when the Vgn1 signals that step (5) is obtained are low level by high level saltus step, bear It is zero to carry magnitude of voltage, and obtains now load current value I by step (7) phase difference formula, and this moment is defined as into one Zero moment, obtained electric current is initial current I0
(9) on the basis of step (8), it is assumed that when Vgn1 signals are low, the Vgn3 ' signals of correspondence step (6) are height, this When single power model mode of operation be by load, diode Dn2And switching tube Sn3Discharge loop 1 is constituted, loop equation is:
It can obtain:
R is load resistance, and L is load inductance;
(10) on the basis of step (9), work as Vgn3 ' signals and low level is changed into from high level, now single power model Mode of operation is by diode Dn4, load, the discharge loop 2 of electric power generating composition, loop equation is:
U is supply voltage;
Wherein, i0For by the current value exported on a upper discharge loop back loading;
It can obtain:
(11) t in step (9) and step (10)aAnd tbIt is the discharge time of discharge loop 1 and discharge loop 2 respectively, adopts Calculating discharge time t is converted to the SPWM pulse generation methods of asymmetric regular sampling methodaAnd tb, until passing through discharge circuit Calculate the current value i=0 or i of load output in step (9) or step (10)<0;
(12) the time t calculatedaWith tbSum is just supported in a modulation period for what step (8) was recorded, Vgn1 letters Total time t used in zero is discharged into after number step-downxIf a square-wave signal is Vgx, and its dutycycle is:
Tx is Vgx cycle;
(13) the square-wave signal Vgx that the pwm signal Vgn3 ' for obtaining step (6) is obtained with step (12) carries out logical AND Computing, obtains the drive signal Vgn3 all the way of power device on single power model copped wave arm;
(14) the square-wave signal Vgx of step (12) is obtained into Vgx ' signals to 180 ° of reach;
(15) the square-wave signal Vgx ' that the pwm signal Vgn4 ' for obtaining step (6) is obtained with step (14) carries out logical AND Computing, obtains another road drive signal Vgn4 of power device on single power model copped wave arm.
Compared with prior art, such scheme of the invention, can make each level using phase-shifted SPWM modulation system The active power that receipts or other documents in duplicate member is born is equal;Unipolar SPWM modulation system will be improved to be incorporated into phase-shifted SPWM compared with frequency multiplier type SPWM can save resource, and more conventional Unipolar SPWM of the invention can reduce switch under conditions of output harmonic wave content is constant Number of times.
Brief description of the drawings
Fig. 1 is single-phase H bridges cascaded multilevel inverter topology diagram of the invention;
Fig. 2 is a kind of method that single-phase H bridge inverters minimize modulation using H bridges cascaded multilevel inverter on-off times Obtained PWM drive signal;
Fig. 3 is a kind of method that single-phase H bridge inverters minimize modulation using H bridges cascaded multilevel inverter on-off times The voltage waveform of output;
Fig. 4 is that one-phase five-level inverter minimizes modulation using a kind of H bridges cascaded multilevel inverter on-off times Each submodule PWM drive signal of method;
Fig. 5 is that one-phase five-level inverter minimizes modulation using a kind of H bridges cascaded multilevel inverter on-off times Method output voltage waveforms.
Embodiment
In order that those skilled in the art more fully understand the technical scheme in the present invention, below in conjunction with of the invention real The accompanying drawing in example is applied, the technical scheme in the embodiment of the present invention is clearly and completely described, it is clear that described implementation Example only a part of embodiment of the invention, rather than whole embodiments.
Embodiment one
With reference to Fig. 2, modulation is minimized it illustrates a kind of H bridges cascaded multilevel inverter on-off times that the present invention is provided Method be applied to the power device drive signal that Cell1 in Fig. 1 is obtained, specifically include following steps:
1) single-phase H bridge inverters, triangular carrier u are setcAmplitude excursion be -1 to 1 between;
2) modulation wave signal is set as sine wave, modulation wave period fs is 50Hz, modulation depth m is 0.8;
3) by step 2) in obtained sinewave modulation signal compared with zero level, obtain work(on H bridge inverter pitman arms Rate device SA1Drive signal Vg1;
4) by step 3) obtained drive signal Vg1 logical inversions, obtain power device S on H bridge inverter pitman armsA2's Drive signal Vg2;
5) by step 1) triangular carrier ucWith step 2) sinewave modulation signal be compared and obtain pulse signal Vg3’;
6) by step 5) pulse signal Vg3 logical inversions obtain pulse signal Vg4 ';
7) under passive linear load, fundametal compoment I01Lag behind fundamental voltage U01, and phase difference formula is:
ω is inversion angular frequency, L0For load inductance, R0For load resistance;
8) within a modulation period, when step 3) obtained Vg1 signals are when by high level saltus step being low level, load electricity Pressure value is zero, and by step 7) phase difference formula obtains now load current value I, and when this moment is defined as into one zero Carve, obtained electric current is initial current I0
9) in step 8) on the basis of, it is assumed that Vg1 signals for it is low when correspondence step 5) Vg3 ' signals be height, it is now single The mode of operation of power model is by load, diode D2And switching tube SA3Discharge loop 1 is constituted, loop equation is:
It can obtain:
R is load inductance, and L is load resistance;
10) in step 9) on the basis of, work as Vg3 ' signals and low level is changed into from high level, now the work of single power model Pattern is by D4, load, the discharge loop 2 of electric power generating composition, loop equation is:
U is supply voltage;
It can obtain:
i0For by the current value exported on a upper discharge loop back loading;
11) step 9) and step 10) in taAnd tbIt is the discharge time of discharge loop 1 and discharge loop 2 respectively, uses The SPWM pulse generation methods of asymmetric regular sampling method are converted to calculating discharge time taAnd tb, until passing through discharge circuit meter Calculate step 9) or step 10) the middle current value i=0 or i for loading output<0;
12) step 11) the time t that calculatesaWith tbSum is just to be supported in a modulation period, after Vg1 signal step-downs Total time t used in load discharge to zerox, a square-wave signal Vgx is obtained, its dutycycle is:
The cycle that Tx is Vgx (the present embodiment value is 0.02s);
13) by step 5) obtained drive signal Vg3 ' and step 12) obtained square-wave signal Vgx logic and operations, obtain The power device S on copped wave arm on Cell1 into Fig. 1A3Drive signal Vg3;
14) by step 12) square-wave signal Vgx to reach 180 °, obtain Vgx ' signals;
15) by step 6) obtained drive signal Vg4 ' and step 14) obtained square-wave signal Vgx ' logic and operations, obtain The power device S on copped wave arm on Cell1 into Fig. 1A4Drive signal Vg4;
Embodiment two
With reference to Fig. 4, modulation is minimized it illustrates a kind of H bridges cascaded multilevel inverter on-off times that the present invention is provided Method, when H bridges cascade number be 2 when, obtained output voltage waveforms be five level it is as shown in Figure 5.As shown in Figure 4, each height PWM drive signal in module.Modulator approach specifically includes following steps:
1) the corresponding triangle carrier signal u of two submodules is setc1And uc2, its frequency is identical with amplitude, phase angle difference 180°;
2) use and compared with a kind of identical sinewave modulation signal of embodiment with zero level, on two submodule pitman arms Power device drive signal Vgn1 (n=1,2) all the way, power device on drive signal Vgn1 logical inversion computing pitman arms is another Drive signal Vgn2 (n=1,2) all the way;
3) by modulation wave signal and step 1) in corresponding triangular carrier be compared obtain pwm pulse signal respectively Vgn3 ' (n=1,2);
4) by step 2) in pwm pulse signal Vgn3 ' carry out logical inversion computing obtain pwm pulse signal Vgn4 ' (n =1,2);
5) using step 7 in embodiment one) arrive step 15) driving that obtains each power device in two power models believes Number Vgn3, Vgn4 (n=1,2).
In summary:The on off state of switching tube on each H-bridge unit copped wave arm is improved, single H bridges are calculated Minimize under on-off times modulation strategy, switching tube on-off times account for the percentage of time of a modulation period on copped wave arm;
On single H bridges copped wave arm the on-off times of one of switching tube account for one modulation period percentage of time:
Ts is modulation period.
Therefore within a modulation period, on-off times modulation strategy is minimized compared to conventional unipolar SPWM modulation strategies The on-off times of switching tube are substantially reduced.
One of ordinary skill in the art will be appreciated that embodiment described here is to aid in reader and understands this hair Bright implementation, it should be understood that protection scope of the present invention is not limited to such especially statement and embodiment.Ability The those of ordinary skill in domain can be made according to these technical inspirations disclosed by the invention it is various do not depart from essence of the invention its Its various specific deformations and combination, these deformations and combination are still within the scope of the present invention.

Claims (1)

1. a kind of method that H bridges cascaded multilevel inverter on-off times minimize modulation, it is characterised in that:Set the cascade of H bridges In type multi-electrical level inverter, the triangle carrier signal excursion of each submodule is identical, and is change between -1~1, adjacent The triangular carrier phase angle difference of two submodules is 360 °/N, and wherein N is cascade submodule number;The method of the modulation is as follows:
(1) after amplitude is compared for -1 to 1 sinewave modulation signal with zero level, square-wave signal is obtained, square wave letter Number it is followed successively by the drive signal Vgn1 all the way of each submodule pitman arm device for power switching of H bridges cascaded multilevel inverter;
(2) the square-wave signal logical inversion obtained to step (1), obtains H bridges cascaded multilevel inverter each submodule Block direction Another road drive signal Vgn2 of arm device for power switching;
(3) triangle corresponding with H bridges cascaded multilevel inverter each submodule of the sinewave modulation signal in step (1) is carried Ripple signal obtains pwm pulse signal associated with each power modules copped wave arm device for power switching all the way more afterwards Vg3n’;
(4) the pwm pulse signal logical inversion for obtaining step (3), obtains another road and each power modules copped wave arm work( The associated pwm pulse signal Vg4n ' of rate switching device;
H bridge cascaded multilevel inverters are made up of the directly cascade of multiple H-bridge unit structures, single H-bridge unit pitman arm and are cut Ripple arm drive signal is obtained by following steps:
(5) using step (1) and step (2) obtain the drive signal Vgn1 of single power model pitman arm power device with Vgn2;
(6) it is n-th of H-bridge unit to obtain two-way pwm pulse signal Vgn3 ' and Vgn4 ', n using step (3) and step (4);
(7) under passive linear load, fundametal compoment I01Lag behind fundamental voltage U01, and phase difference formula is:
ω is inversion angular frequency, L0For load inductance, R0For load resistance;
(8) within a modulation period, when the Vgn1 signals that step (5) is obtained are low level by high level saltus step, load electricity Pressure value is zero, and obtains now load current value I by step (7) phase difference formula, and when this moment is defined as into one zero Carve, obtained electric current is initial current I0
(9) on the basis of step (8), it is assumed that when Vgn1 signals are low, the Vgn3 ' signals of correspondence step (6) are height, now single The mode of operation of individual power model is by load, diode Dn2And switching tube Sn3Discharge loop 1 is constituted, loop equation is:
<mrow> <mi>L</mi> <mfrac> <mrow> <mi>d</mi> <mi>i</mi> </mrow> <mrow> <msub> <mi>dt</mi> <mi>a</mi> </msub> </mrow> </mfrac> <mo>+</mo> <mi>i</mi> <mi>R</mi> <mo>=</mo> <mn>0</mn> </mrow>
It can obtain:
R is load resistance, and L is load inductance;
(10) on the basis of step (9), work as Vgn3 ' signals and low level is changed into from high level, now the work of single power model Pattern is by diode Dn4, load, the discharge loop 2 of electric power generating composition, loop equation is:
U is supply voltage;
Wherein, i0For by the current value exported on a upper discharge loop back loading;
It can obtain:
<mrow> <mi>i</mi> <mo>=</mo> <mi>C</mi> <mo>*</mo> <msup> <mi>e</mi> <mrow> <mo>-</mo> <mfrac> <mi>R</mi> <mi>L</mi> </mfrac> <msub> <mi>t</mi> <mi>b</mi> </msub> </mrow> </msup> <mo>-</mo> <mfrac> <mi>U</mi> <mi>R</mi> </mfrac> <mo>;</mo> </mrow>
(11) t in step (9) and step (10)aAnd tbIt is the discharge time of discharge loop 1 and discharge loop 2 respectively, using not The SPWM pulse generation methods of symmetric regular-sampled method are converted to calculating discharge time taAnd tb, calculated until by discharge circuit Go out the current value i=0 or i of load output in step (9) or step (10)<0;
(12) the time t calculatedaWith tbSum is just supported in a modulation period for what step (8) was recorded, and Vgn1 signals become Total time t used in zero is discharged into after lowxIf a square-wave signal is Vgx, and its dutycycle is:
<mrow> <mi>D</mi> <mo>=</mo> <mfrac> <mrow> <mi>T</mi> <mi>x</mi> <mo>/</mo> <mn>2</mn> <mo>+</mo> <mi>t</mi> <mi>x</mi> </mrow> <mrow> <mi>T</mi> <mi>x</mi> </mrow> </mfrac> <mo>&amp;times;</mo> <mn>100</mn> <mi>%</mi> </mrow>
Tx is Vgx cycle;
(13) the square-wave signal Vgx that the pwm signal Vgn3 ' for obtaining step (6) is obtained with step (12) carries out logic and operation, Obtain the drive signal Vgn3 all the way of power device on single power model copped wave arm;
(14) the square-wave signal Vgx of step (12) is obtained into Vgx ' signals to 180 ° of reach;
(15) the square-wave signal Vgx ' that the pwm signal Vgn4 ' for obtaining step (6) is obtained with step (14) carries out logical AND fortune Calculate, obtain another road drive signal Vgn4 of power device on single power model copped wave arm.
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CN106891744B (en) * 2015-12-18 2019-11-08 比亚迪股份有限公司 The control method of electric car and its onboard charger and onboard charger
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WO2018232403A1 (en) * 2017-06-16 2018-12-20 Tae Technologies, Inc. Multi-level hysteresis voltage controllers for voltage modulators and methods for control thereof
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CN110112938A (en) * 2019-03-08 2019-08-09 四川大学 A kind of single-phase cascaded H-bridges Multilevel Inverters real-time computing technique
CN113054860B (en) * 2019-12-26 2022-06-14 比亚迪股份有限公司 Inversion system

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7808125B1 (en) * 2006-07-31 2010-10-05 Sustainable Energy Technologies Scheme for operation of step wave power converter
CN103633874A (en) * 2013-11-13 2014-03-12 中国西电电气股份有限公司 Unipolar SPWM (Sine Pulse Width Modulation) dead-time-free modulation method of H-bridge cascade multilevel converter
CN103795085A (en) * 2014-03-03 2014-05-14 苏州大学 Photovoltaic grid-connected inverter

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7808125B1 (en) * 2006-07-31 2010-10-05 Sustainable Energy Technologies Scheme for operation of step wave power converter
CN103633874A (en) * 2013-11-13 2014-03-12 中国西电电气股份有限公司 Unipolar SPWM (Sine Pulse Width Modulation) dead-time-free modulation method of H-bridge cascade multilevel converter
CN103795085A (en) * 2014-03-03 2014-05-14 苏州大学 Photovoltaic grid-connected inverter

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
级联H桥型变流器的调制方法建模与优化策略;高志刚、李永东;《电力自动化设备》;20101031;第30卷(第10期);第12-16页 *

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