CN104486059B - A kind of photovoltaic DC-to-AC converter parallel system carrier synchronization method and device - Google Patents
A kind of photovoltaic DC-to-AC converter parallel system carrier synchronization method and device Download PDFInfo
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- CN104486059B CN104486059B CN201510001906.XA CN201510001906A CN104486059B CN 104486059 B CN104486059 B CN 104486059B CN 201510001906 A CN201510001906 A CN 201510001906A CN 104486059 B CN104486059 B CN 104486059B
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Abstract
The application provides a kind of photovoltaic DC-to-AC converter parallel system carrier synchronization method, is set by CPLD carrier synchronization processes units according to priority, PWM synchronizing clock signals whether are received to Host Detection；Detect whether to receive the synchronizing signal of carrier Control circuit output described in upper level to slave, using the synchronizing signal of upper level carrier Control circuit output as PWM synchronizing clock signals when detecting；Two carrier Control circuits being connected with the carrier Control circuit receive the PWM synchronizing clock signals, realize that carrier synchronization controls by circular communication.Using the photovoltaic DC-to-AC converter parallel system carrier synchronization method, realize carrier synchronization control, even if the distance between each inverter is farther out, the carrier Control circuit being connected with each inverter is connected with annular shape, it can solve the problem of that the big one master and multiple slaves mode of being disturbed property of prior art long range carrier synchronization realizes difficulty.
Description
Technical field
The present invention relates to photovoltaic DC-to-AC converter technical field more particularly to a kind of photovoltaic DC-to-AC converter parallel system carrier synchronization sides
Method and device.
Background technology
In two or more photovoltaic DC-to-AC converter parallel systems, there are the circulation problems between inverter, are influencing system just
Often work, when each inverter direct-current voltage is inconsistent or difference is larger, circulation problem and the DC common-mode electricity thus brought
Pressure problem can be protruded more.Presently mainly pass through the equal flow control of carry out to photovoltaic DC-to-AC converter each in inverter parallel system
It makes or seals in impedor in inverter outlet side and achieve the purpose that inhibit circulation, however can not fundamentally solve inverter
Between voltage, phase etc. difference, also just can not fundamentally solve circulation problem；Even by double transformer with split windings
Circulation is eliminated, two parallel connections is realized, but considerably increases cost of investment.
Therefore the prior art often solves above-mentioned circulation problem with Carrier Synchronization, and parallel system is in mostly with modular form
Existing, shunt chopper is spatially very close to when carrier synchronization is realized between such inverter, by interconnection line, and mostly
It is sent out using host, the pattern that slave is received.But in parallel between single inverter, there are a certain distance between inverter, especially
When shunt chopper number of units increase, distance brings difficulty to the realization method of carrier synchronization one master and multiple slaves between inverter.
Invention content
In view of this, the present invention provides a kind of photovoltaic DC-to-AC converter parallel system carrier synchronization method and device, to solve
The problem of being disturbed property of prior art long range carrier synchronization is big, and one master and multiple slaves mode realizes difficulty.
To achieve these goals, technical solution provided in an embodiment of the present invention is as follows：
A kind of photovoltaic DC-to-AC converter parallel system carrier synchronization method is filled applied to photovoltaic DC-to-AC converter parallel system carrier synchronization
It puts, the photovoltaic DC-to-AC converter parallel system carrier synchronization device includes the carrier Control being connected respectively with each inverter major loop
Circuit, and carrier Control circuit series connection is annular；Each carrier Control circuit includes：It is connected with inverter major loop
Digital signal processor and the CPLD carrier synchronization processes units that are connected with the digital signal processor, the photovoltaic it is inverse
Become device parallel system carrier synchronization method to include：
The CPLD carrier synchronization processes unit is set according to priority, judges whether connected inverter is host；
When the inverter that the CPLD carrier synchronization processes unit judges are connected is host, detect whether to receive described
The PWM synchronizing clock signals of digital signal processor output；
When the CPLD carrier synchronization processes unit detects the PWM synchronizing clock signals, when the PWM is synchronized
Clock output signal is handled and is exported；
When the inverter that the CPLD carrier synchronization processes unit judges are connected is slave, detect whether to receive one
The synchronizing signal of the grade carrier Control circuit output；
When the CPLD carrier synchronization processes unit detects the synchronizing signal of the upper level carrier Control circuit output
When, it handles and exports using the synchronizing signal of the upper level carrier Control circuit output as the PWM synchronizing clock signals.
Preferably, pass through optical fiber transmission signal, each carrier Control circuit between each carrier Control circuit
It further includes：The first photoelectric conversion unit and the second opto-electronic conversion list being connected respectively with the CPLD carrier synchronization processes unit
The other end of member, first photoelectric conversion unit and the second photoelectric conversion unit is connected respectively with other carrier Control circuits；
The photovoltaic DC-to-AC converter parallel system carrier synchronization method further includes：
First photoelectric conversion unit and the second photoelectric conversion unit receive the PWM synchronised clocks output signal, and
Two carrier wave controls that output is extremely connected with this carrier Control circuit respectively after the PWM synchronised clocks output signal is converted
Circuit processed.
Preferably, each carrier Control circuit further includes：It is connected with the CPLD carrier synchronization processes unit excellent
First grade sets circuit；The photovoltaic DC-to-AC converter parallel system carrier synchronization method further includes：
The priority setting circuit is connected inverter setting priority.
Preferably, the priority setting can manual setting.
Preferably, it when the inverter that the CPLD carrier synchronization processes unit judges are connected is host, detects whether to connect
It is further included after the step of receiving the PWM synchronizing clock signals of the digital signal processor output：
When the PWM synchronised clocks of the digital signal processor output are not detected in the CPLD carrier synchronization processes unit
During signal, output digit signals processor fault alarm signal；
The CPLD carrier synchronization processes unit is exported default carrier signal as PWM synchronizing clock signals.
Preferably, it when the inverter that the CPLD carrier synchronization processes unit judges are connected is slave, detects whether to connect
It is further included after the step of receiving the synchronizing signal of the upper level carrier Control circuit output：
When the synchronous letter of the upper level carrier Control circuit output is not detected in the CPLD carrier synchronization processes unit
Number when, detect whether to receive the synchronizing signal of carrier Control circuit output described in next stage；
When the CPLD carrier synchronization processes unit detects the synchronizing signal of the next stage carrier Control circuit output
When, it handles and exports using the synchronizing signal of the next stage carrier Control circuit output as the PWM synchronizing clock signals.
Preferably, when the upper level carrier Control circuit output is not detected in the CPLD carrier synchronization processes unit
During synchronizing signal, further included after the step of detecting whether to receive the synchronizing signal of the next stage carrier Control circuit output：
When the synchronous letter of the next stage carrier Control circuit output is not detected in the CPLD carrier synchronization processes unit
Number when, judge whether the inverter that is connected with carrier Control circuit described in upper level is host；
When the CPLD carrier synchronization processes unit judges are with the inverter that carrier Control circuit described in upper level is connected
During host, when whether the duration for judging the synchronizing signal of the next stage carrier Control circuit output is not detected is more than default
It is long；
When the same of the next stage carrier Control circuit output is not detected in the CPLD carrier synchronization processes unit judges
When walking the duration of signal more than preset duration, the priority setting circuit sets the inverter being connected with this carrier Control circuit
For host.
Preferably, when the next stage carrier Control circuit output is not detected in the CPLD carrier synchronization processes unit
During synchronizing signal, further included after judging the step of whether inverter that is connected with carrier Control circuit described in upper level is host：
When the inverter that the CPLD carrier synchronization processes unit judges are connected with carrier Control circuit described in upper level not
During for host, output inverter carrier failure alarm signal.
Preferably, it further includes：
The CPLD carrier synchronization processes unit receives and detects two carrier waves being connected with this carrier Control circuit
Whether the synchronizing signal of control circuit output is correct.
Preferably, when the CPLD carrier synchronization processes unit detects the same of the upper level carrier Control circuit output
It is further included after the step of walking signal：
Whether the synchronizing signal of upper level carrier Control circuit output described in the CPLD carrier synchronization processes unit judges
It is consistent with built-in expection host carrier signal；
When the synchronizing signal of upper level carrier Control circuit output described in the CPLD carrier synchronization processes unit judges with
When built-in expection host carrier signal is consistent, using the synchronizing signal of the upper level carrier Control circuit output as described in
PWM synchronizing clock signals are handled and are exported；
When the synchronizing signal of upper level carrier Control circuit output described in the CPLD carrier synchronization processes unit judges with
When built-in expection host carrier signal is inconsistent, detect whether to receive the synchronization of carrier Control circuit output described in next stage
Signal.
Preferably, when the CPLD carrier synchronization processes unit detects the same of the next stage carrier Control circuit output
It is further included after the step of walking signal：
Whether the synchronizing signal of next stage carrier Control circuit output described in the CPLD carrier synchronization processes unit judges
It is consistent with built-in expection host carrier signal；
When the synchronizing signal of next stage carrier Control circuit output described in the CPLD carrier synchronization processes unit judges with
When built-in expection host carrier signal is consistent, using the synchronizing signal of the next stage carrier Control circuit output as described in
PWM synchronizing clock signals are handled and are exported；
When the synchronizing signal of next stage carrier Control circuit output described in the CPLD carrier synchronization processes unit judges with
When built-in expection host carrier signal is inconsistent, judge the inverter that is connected with carrier Control circuit described in upper level whether be
Host；
When the CPLD carrier synchronization processes unit judges are with the inverter that carrier Control circuit described in upper level is connected
During host, when whether the duration for judging the synchronizing signal of the next stage carrier Control circuit output is not detected is more than default
It is long；
When the same of the next stage carrier Control circuit output is not detected in the CPLD carrier synchronization processes unit judges
When walking the duration of signal more than preset duration, the priority setting circuit sets the inverter being connected with this carrier Control circuit
For host.
Preferably, when the synchronization of upper level carrier Control circuit output described in the CPLD carrier synchronization processes unit judges
When signal is consistent with built-in expection host carrier signal, using the synchronizing signal of the upper level carrier Control circuit output as
It is further included after the step of PWM synchronizing clock signals are handled and exported：
Whether the synchronizing signal of next stage carrier Control circuit output described in the CPLD carrier synchronization processes unit judges
It is consistent with the built-in expection host carrier signal；
When the synchronizing signal of next stage carrier Control circuit output described in the CPLD carrier synchronization processes unit judges with
When expection host carrier signal built in described is inconsistent, next stage carrier Control circuit carrier abnormal alarm signal is exported.
Preferably, when the next stage carrier Control circuit output is not detected in the CPLD carrier synchronization processes unit
The synchronous letter of next stage carrier Control circuit output during synchronizing signal or described in the CPLD carrier synchronization processes unit judges
Number with built-in expection host carrier signal it is inconsistent when, the photovoltaic DC-to-AC converter parallel system carrier synchronization method further includes：
The CPLD carrier synchronization processes unit exports upper level carrier Control circuit carrier abnormal alarm signal.
Preferably, the step of inverter that the priority setting circuit setting is connected with this carrier Control circuit is host
After further include：CPLD carrier synchronization processes unit output upper level carrier Control circuit carrier abnormal alarm signal and next
Grade carrier Control circuit carrier abnormal alarm signal.
Preferably, when the synchronization of upper level carrier Control circuit output described in the CPLD carrier synchronization processes unit judges
When signal and inconsistent built-in expection host carrier signal, detect whether to receive carrier Control circuit output described in next stage
Synchronizing signal the step of after include：
When the CPLD carrier synchronization processes unit detects the synchronizing signal of the next stage carrier Control circuit output
When, judge the synchronizing signal of the next stage carrier Control circuit output and the built-in expection host carrier signal whether one
It causes；
When the synchronizing signal of next stage carrier Control circuit output described in the CPLD carrier synchronization processes unit judges with
When the built-in expection host carrier signal is inconsistent, export upper level carrier Control circuit carrier abnormal alarm signal and under
First carriers control circuit carrier wave abnormal alarm signal.
A kind of photovoltaic DC-to-AC converter parallel system carrier synchronization device, including the load being connected respectively with each inverter major loop
Wave control circuit, and carrier Control circuit series connection is annular；Each carrier Control circuit includes：
The digital signal processor being connected with inverter major loop；
The CPLD carrier synchronization processes units being connected with the digital signal processor；
The photovoltaic DC-to-AC converter parallel system carrier synchronization device is using any of the above-described photovoltaic DC-to-AC converter taken in conjunction
Carrier synchronization method of uniting realizes the carrier synchronization between inverter.
Preferably, it is annular by optical fiber series connection between the carrier Control circuit；Each carrier Control circuit is also
Including：The first photoelectric conversion unit and the second photoelectric conversion unit being connected respectively with the CPLD carrier synchronization processes unit；
The other end of first photoelectric conversion unit and the second photoelectric conversion unit is connected respectively with other carrier Control circuits.
Preferably, each carrier Control circuit further includes：It is connected with the CPLD carrier synchronization processes unit excellent
First grade sets circuit.
The application provides a kind of photovoltaic DC-to-AC converter parallel system carrier synchronization method, applied to photovoltaic DC-to-AC converter parallel system
Carrier synchronization device, the photovoltaic DC-to-AC converter parallel system carrier synchronization device include with each inverter major loop being connected respectively
Carrier Control circuit, and the carrier Control circuit series connection for annular；The photovoltaic DC-to-AC converter parallel system carrier synchronization side
Method is set by CPLD carrier synchronization processes units according to priority, judges whether connected inverter is host, to Host Detection
Whether the PWM synchronizing clock signals of the digital signal processor output are received；Slave is detected whether to receive upper level
The synchronizing signal of the carrier Control circuit output, when detecting the synchronizing signal of the upper level carrier Control circuit output,
It handles and exports using the synchronizing signal of the upper level carrier Control circuit output as the PWM synchronizing clock signals；With this
Two carrier Control circuits that carrier Control circuit is connected receive the PWM synchronizing clock signals, pass through circular communication reality
Existing carrier synchronization control.Using the photovoltaic DC-to-AC converter parallel system carrier synchronization method, carrier synchronization control is realized, even if respectively
Farther out, the carrier Control circuit being connected with each inverter is connected the distance between a inverter with annular shape, can be with
Solve the problem of that the big one master and multiple slaves mode of being disturbed property of prior art long range carrier synchronization realizes difficulty.
Description of the drawings
In order to illustrate more clearly about the embodiment of the present invention or technical scheme of the prior art, to embodiment or will show below
There is attached drawing needed in technology description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
The embodiment of invention, for those of ordinary skill in the art, without creative efforts, can also basis
The attached drawing of offer obtains other attached drawings.
Fig. 1 is a kind of photovoltaic DC-to-AC converter parallel system carrier synchronization method flow chart provided by the embodiments of the present application；
Fig. 2 is a kind of photovoltaic DC-to-AC converter parallel system carrier synchronization method flow chart that another embodiment of the application provides；
Fig. 3 is a kind of photovoltaic DC-to-AC converter parallel system carrier synchronization method flow chart that another embodiment of the application provides；
Fig. 4 is a kind of photovoltaic DC-to-AC converter parallel system carrier synchronization method flow chart that another embodiment of the application provides；
Fig. 5 is a kind of photovoltaic DC-to-AC converter parallel system carrier synchronization method flow chart that another embodiment of the application provides；
Fig. 6 is a kind of photovoltaic DC-to-AC converter parallel system carrier synchronization method flow chart that another embodiment of the application provides；
Fig. 7 is a kind of photovoltaic DC-to-AC converter parallel system carrier synchronization method flow chart that another embodiment of the application provides；
Fig. 8 is a kind of photovoltaic DC-to-AC converter parallel system carrier synchronization method flow chart that another embodiment of the application provides；
Fig. 9 is a kind of carrier Control circuit diagram that another embodiment of the application provides.
Specific embodiment
Below in conjunction with the attached drawing in the embodiment of the present invention, the technical solution in the embodiment of the present invention is carried out clear, complete
Site preparation describes, it is clear that described embodiment is only part of the embodiment of the present invention, instead of all the embodiments.It is based on
Embodiment in the present invention, those of ordinary skill in the art are obtained every other without making creative work
Embodiment shall fall within the protection scope of the present invention.
It is long to solve the prior art the present invention provides a kind of photovoltaic DC-to-AC converter parallel system carrier synchronization method and device
It is big apart from being disturbed property of carrier synchronization, the problem of one master and multiple slaves mode realizes difficulty.
Specifically, the photovoltaic DC-to-AC converter parallel system carrier synchronization method, carries applied to photovoltaic DC-to-AC converter parallel system
Wave synchronizing device, the photovoltaic DC-to-AC converter parallel system carrier synchronization device include what is be connected respectively with each inverter major loop
Carrier Control circuit, and carrier Control circuit series connection is annular；Each carrier Control circuit includes：With inverter master
The digital signal processor that circuit is connected and the CPLD carrier synchronization processes units being connected with the digital signal processor.
As shown in Figure 1, the photovoltaic DC-to-AC converter parallel system carrier synchronization method includes：
S101, the CPLD carrier synchronization processes unit are set according to the priority of the priority setting circuit, are judged
Whether connected inverter is host；
The CPLD carrier synchronization processes unit in each carrier Control circuit is all in accordance with described in being attached thereto
Whether inverter determines the work step of itself for host.
S102, when the inverter that the CPLD carrier synchronization processes unit judges are connected be host when, detect whether to receive
The PWM synchronizing clock signals exported to the digital signal processor；
The digital signal processor exports the PWM synchronizing clock signals, and the inverter major loop with being connected carries out
The output and reception of signal, major function are same as the prior art.
S103, when the CPLD carrier synchronization processes unit detects the PWM synchronizing clock signals, by the PWM
Synchronised clock output signal is handled and is exported；
The CPLD carrier synchronization processes unit in host is used for the PWM synchronised clocks output signal that will be received
It handles and exports to first photoelectric conversion unit and the second photoelectric conversion unit.
S104, first photoelectric conversion unit and the second photoelectric conversion unit receive the PWM synchronised clocks output letter
Number, and described in output is extremely connected with this carrier Control circuit respectively after the PWM synchronised clocks output signal is converted two
Carrier Control circuit；
First photoelectric conversion unit is used to implement the machine and the carrier wave of upper level inverter is transmitted and fed back.Described
Two photoelectric conversion units realize that the carrier wave of the machine and next stage inverter is transmitted and fed back.
S105, when the inverter that the CPLD carrier synchronization processes unit judges are connected be slave when, detect whether to receive
To the synchronizing signal of carrier Control circuit output described in upper level；
The CPLD carrier synchronization processes unit in slave needs to receive carrier Control circuit output described in upper level
Synchronizing signal is handled the synchronizing signal of the upper level carrier Control circuit output as the PWM synchronizing clock signals.
S106, the synchronization of the upper level carrier Control circuit output is detected when the CPLD carrier synchronization processes unit
During signal, the synchronizing signal of the upper level carrier Control circuit output is handled as the PWM synchronizing clock signals and defeated
Go out；
Slave carries out carrier Control according to the synchronizing signal that host exports, using the synchronizing signal of host output as described in
PWM synchronizing clock signals are handled and are exported.
Two carrier Control circuits being connected with the carrier Control circuit receive the PWM synchronizing clock signals, i.e.,
It can realize that carrier synchronization controls by circular communication；Using the photovoltaic DC-to-AC converter parallel system carrier synchronization method, realize and carry
Wave Synchronization Control, even if the distance between each inverter is farther out, the carrier Control circuit that is connected with each inverter with
Annular shape is connected, and can solve that being disturbed property of prior art long range carrier synchronization is big, and one master and multiple slaves mode is realized difficult
Problem.
Preferably, the photovoltaic DC-to-AC converter parallel system carrier synchronization method further includes after step s 106：
First photoelectric conversion unit and the second photoelectric conversion unit receive the upper level carrier Control circuit output
Synchronizing signal, and will the upper level carrier Control circuit output synchronizing signal convert after respectively output to the control of this carrier wave
Two carrier Control circuits that circuit processed is connected.
It is exported respectively to carrier wave control described in upper level after the synchronizing signal conversion of the upper level carrier Control circuit output
Circuit processed is exported to next stage carrier Control circuit as feedback as synchronizing signal.
Preferably, the carrier Control circuit further includes：The priority being connected with the CPLD carrier synchronization processes unit
Circuit is set；The photovoltaic DC-to-AC converter parallel system carrier synchronization method further includes：
The priority setting circuit is connected inverter setting priority；
In specific practical application, may be used priority setting circuit number it is smaller, priority is higher；Priority is most
High is set as host, remaining each inverter is set as slave；In slave inverter, the relatively upper inverter of the machine be slave, phase
It is host to next inverter.
Preferably, the priority setting can manual setting.
Manual setting can change the address of machine, change its priority by changing machine address.Described in software
Priority setting circuit judges priority further according to the address of machine.In specific practical application, the priority setting can
Come the respective priority of manual setting, not limit according to software algorithm and actual needs, it made specifically to apply ring herein
Depending on border.
Preferably, as shown in Fig. 2, the photovoltaic DC-to-AC converter parallel system carrier synchronization method also wraps after step s 102
It includes：
S201, the PWM that digital signal processor output is not detected when the CPLD carrier synchronization processes unit are same
During step clock signal, output digit signals processor fault alarm signal；
The PWM that the digital signal processor output is not detected in the CPLD carrier synchronization processes unit in host is same
Step clock signal illustrates the digital signal processor failure being connected with host, needs at this time at the CPLD carrier synchronizations
Manage unit output digit signals processor fault alarm signal.
S202, the CPLD carrier synchronization processes unit are exported default carrier signal as PWM synchronizing clock signals；
The CPLD carrier synchronization processes unit is built-in with the default carrier signal, when digital signal processor event
During barrier, carrier Control can be carried out according to the default carrier signal, be a kind of alternative.
Preferably, as shown in figure 3, the photovoltaic DC-to-AC converter parallel system carrier synchronization method also wraps after step S105
It includes：
S301, the same of the upper level carrier Control circuit output is not detected when the CPLD carrier synchronization processes unit
When walking signal, detect whether to receive the synchronizing signal of carrier Control circuit output described in next stage；
When the synchronous letter of the upper level carrier Control circuit output is not detected in the CPLD carrier synchronization processes unit
Number when, illustrate that the upper level carrier Control circuit breaks down, other signals needed to replace the PWM synchronizing clock signals.
S302, the synchronization of the next stage carrier Control circuit output is detected when the CPLD carrier synchronization processes unit
During signal, the synchronizing signal of the next stage carrier Control circuit output is handled as the PWM synchronizing clock signals and defeated
Go out；
The synchronizing signal of the next stage carrier Control circuit output can be used as an alternative signal same as the PWM
Step clock signal is handled and is exported.
Preferably, as shown in figure 4, the photovoltaic DC-to-AC converter parallel system carrier synchronization method also wraps after step S301
It includes：
S401, the same of the next stage carrier Control circuit output is not detected when the CPLD carrier synchronization processes unit
When walking signal, whether the inverter for judging to be connected with carrier Control circuit described in upper level is host；
When the inverter being connected with carrier Control circuit described in upper level is host, it is connected with this carrier Control circuit inverse
Host can directly be upgraded to by becoming device；
S402, the inversion being connected with carrier Control circuit described in upper level when the CPLD carrier synchronization processes unit judges
When device is host, whether the duration for judging the synchronizing signal of the next stage carrier Control circuit output is not detected is more than default
Duration；
In specific practical application, a preset duration can be set control be connected with this carrier Control circuit it is inverse
Become the stand-by period that device upgrades to host, in order to avoid erroneous judgement caused by interference signal, and the preset duration can be according to specific
Actual conditions be configured, be not specifically limited herein.
S403, the next stage carrier Control circuit output is not detected when the CPLD carrier synchronization processes unit judges
The duration of synchronizing signal when being more than preset duration, priority setting circuit setting is connected inverse with this carrier Control circuit
Change device is host.
The inverter being connected with this carrier Control circuit is that the execution step after host is S102.
Preferably, as shown in figure 5, the photovoltaic DC-to-AC converter parallel system carrier synchronization method also wraps after step S401
It includes：
S501, the inversion being connected with carrier Control circuit described in upper level when the CPLD carrier synchronization processes unit judges
When device is not host, output inverter carrier failure alarm signal.
In practical applications, can also judge whether to need to shut down according to specific grid-connected situation.
Preferably, the photovoltaic DC-to-AC converter parallel system carrier synchronization method further includes：
The CPLD carrier synchronization processes unit receives and detects two carrier waves being connected with this carrier Control circuit
Whether the synchronizing signal of control circuit output is correct.
The CPLD carrier synchronization processes unit also passes through first photoelectric conversion unit and the second photoelectric conversion unit
The synchronizing signal of two carrier Control circuit outputs being connected with this carrier Control circuit is received, and is detected described two same
It whether correct walks signal, increases the reliability of the photovoltaic DC-to-AC converter parallel system carrier synchronization method.
Preferably, as shown in fig. 6, the photovoltaic DC-to-AC converter parallel system carrier synchronization method also wraps before step S106
It includes：
The synchronizing signal of upper level carrier Control circuit output described in S601, the CPLD carrier synchronization processes unit judges
It is whether consistent with built-in expection host carrier signal；
When the synchronizing signal of upper level carrier Control circuit output described in the CPLD carrier synchronization processes unit judges with
When built-in expection host carrier signal is consistent, step S106 is performed；
When the synchronizing signal of upper level carrier Control circuit output described in the CPLD carrier synchronization processes unit judges with
When built-in expection host carrier signal is inconsistent, step S301 is performed.
An expected host carrier signal built in the CPLD carrier synchronization processes unit, under being controlled to avoid annular
Error accumulation.
Preferably, the photovoltaic DC-to-AC converter parallel system carrier synchronization method further includes after step s 106：
Whether the synchronizing signal of next stage carrier Control circuit output described in the CPLD carrier synchronization processes unit judges
It is consistent with the built-in expection host carrier signal；
When the synchronizing signal of next stage carrier Control circuit output described in the CPLD carrier synchronization processes unit judges with
When expection host carrier signal built in described is inconsistent, next stage carrier Control circuit carrier abnormal alarm signal is exported.
Whether the synchronizing signal of next stage carrier Control circuit output described in the CPLD carrier synchronization processes unit judges
It is consistent with the built-in expection host carrier signal, next stage carrier Control circuit carrier can be monitored whether extremely, increased
The reliability of the photovoltaic DC-to-AC converter parallel system carrier synchronization method.
Preferably, as shown in fig. 7, the photovoltaic DC-to-AC converter parallel system carrier synchronization method also wraps before step S302
It includes：
The synchronizing signal of next stage carrier Control circuit output described in S701, the CPLD carrier synchronization processes unit judges
It is whether consistent with built-in expection host carrier signal；
When the synchronizing signal of next stage carrier Control circuit output described in the CPLD carrier synchronization processes unit judges with
When built-in expection host carrier signal is consistent, step S302 is performed；
When the synchronizing signal of next stage carrier Control circuit output described in the CPLD carrier synchronization processes unit judges with
When built-in expection host carrier signal is inconsistent, step S401 is performed.
Preferably, after step S401, the photovoltaic DC-to-AC converter parallel system carrier synchronization method further includes：
The CPLD carrier synchronization processes unit exports upper level carrier Control circuit carrier abnormal alarm signal.
Preferably, after step S403, the photovoltaic DC-to-AC converter parallel system carrier synchronization method further includes：
CPLD carrier synchronization processes unit output upper level carrier Control circuit carrier abnormal alarm signal and next
Grade carrier Control circuit carrier abnormal alarm signal.
Preferably, as shown in figure 8, the photovoltaic DC-to-AC converter parallel system carrier synchronization method is after step S301 is performed
It further includes：
S801, the synchronization of the next stage carrier Control circuit output is detected when the CPLD carrier synchronization processes unit
During signal, the synchronizing signal and the built-in expection host carrier signal that judge the next stage carrier Control circuit output are
It is no consistent；
S802, the synchronous letter when next stage carrier Control circuit output described in the CPLD carrier synchronization processes unit judges
Number with the built-in expection host carrier signal it is inconsistent when, export upper level carrier Control circuit carrier abnormal alarm signal
And next stage carrier Control circuit carrier abnormal alarm signal.
Synchronizing signal and the next stage carrier Control circuit output when the upper level carrier Control circuit output
Synchronizing signal exists, but with the built-in expection host carrier signal it is inconsistent when, illustrate with this carrier Control electricity
Two carrier Control circuits that road is connected break down, therefore export upper level carrier Control circuit carrier abnormal alarm
Signal and next stage carrier Control circuit carrier abnormal alarm signal, play prompting alarm function.
Another embodiment of the present invention additionally provides a kind of photovoltaic DC-to-AC converter parallel system carrier synchronization device, including respectively with
The carrier Control circuit that each inverter major loop is connected, and carrier Control circuit series connection is annular；Each carrier wave
Control circuit as shown in figure 9, including：
The digital signal processor 101 being connected with inverter major loop；
The CPLD carrier synchronization processes unit 102 being connected with digital signal processor 101；
Preferably, it is annular by optical fiber series connection between the carrier Control circuit.As shown in figure 9, each carrier wave
Control circuit further includes：The first photoelectric conversion unit 103 and the second light being connected respectively with CPLD carrier synchronization processes unit 102
Electric converting unit 104；The other end of first photoelectric conversion unit 103 and the second photoelectric conversion unit 104 respectively with other carrier waves
Control circuit is connected；Optical fiber can improve the anti-interference of long range carrier signal transmission.
Preferably, as shown in figure 9, each carrier Control circuit further includes：With CPLD carrier synchronization processes unit 102
Connected priority setting circuit 105.
The photovoltaic DC-to-AC converter parallel system carrier synchronization device is using the photovoltaic DC-to-AC converter described in any of the above-described embodiment
Parallel system carrier synchronization method realizes the carrier synchronization between inverter, and concrete principle is same as the previously described embodiments, herein no longer
It repeats.
Each embodiment is described by the way of progressive in the present invention, the highlights of each of the examples are with other realities
Apply the difference of example, just to refer each other for identical similar portion between each embodiment.For device disclosed in embodiment
Speech, since it is corresponded to the methods disclosed in the examples, so description is fairly simple, related part is referring to method part illustration
.
It the above is only the preferred embodiment of the present invention, make skilled artisans appreciate that or realizing of the invention.It is right
A variety of modifications of these embodiments will be apparent to one skilled in the art, general original as defined herein
Reason can be realized in other embodiments without departing from the spirit or scope of the present invention.Therefore, the present invention will not
Be intended to be limited to the embodiments shown herein, and be to fit to it is consistent with the principles and novel features disclosed herein most
Wide range.
Claims (17)
1. a kind of photovoltaic DC-to-AC converter parallel system carrier synchronization method, which is characterized in that applied to photovoltaic DC-to-AC converter parallel system
Carrier synchronization device, the photovoltaic DC-to-AC converter parallel system carrier synchronization device include with each inverter major loop being connected respectively
Carrier Control circuit, and the carrier Control circuit series connection for annular；Pass through optical fiber between each carrier Control circuit
Signal is transmitted, each carrier Control circuit includes：The digital signal processor being connected with inverter major loop, with the number
CPLD carrier synchronization processes unit that word signal processor is connected and it is connected respectively with the CPLD carrier synchronization processes unit
First photoelectric conversion unit and the second photoelectric conversion unit, first photoelectric conversion unit and the second photoelectric conversion unit it is another
One end is connected respectively with other carrier Control circuits；The photovoltaic DC-to-AC converter parallel system carrier synchronization method includes：
The CPLD carrier synchronization processes unit is set according to priority, judges whether connected inverter is host；
When the inverter that the CPLD carrier synchronization processes unit judges are connected is host, detect whether to receive the number
The PWM synchronizing clock signals of signal processor output；
It is when the CPLD carrier synchronization processes unit detects the PWM synchronizing clock signals, the PWM synchronised clocks is defeated
Go out signal processing and export；
When the inverter that the CPLD carrier synchronization processes unit judges are connected is slave, detect whether to receive upper level institute
State the synchronizing signal of carrier Control circuit output；
It, will when the CPLD carrier synchronization processes unit detects the synchronizing signal of the upper level carrier Control circuit output
The synchronizing signal of the upper level carrier Control circuit output is handled and is exported as the PWM synchronizing clock signals；
First photoelectric conversion unit and the second photoelectric conversion unit receive the PWM synchronised clocks output signal, and by institute
State two carrier Controls electricity that output is extremely connected with this carrier Control circuit respectively after the conversion of PWM synchronised clocks output signal
Road.
2. photovoltaic DC-to-AC converter parallel system carrier synchronization method according to claim 1, which is characterized in that each load
Wave control circuit further includes：The priority setting circuit being connected with the CPLD carrier synchronization processes unit；The photovoltaic inversion
Device parallel system carrier synchronization method further includes：
The priority setting circuit is connected inverter setting priority.
3. photovoltaic DC-to-AC converter parallel system carrier synchronization method according to claim 1, which is characterized in that the priority
Setting can manual setting.
4. photovoltaic DC-to-AC converter parallel system carrier synchronization method according to claim 1, which is characterized in that as the CPLD
When the inverter that carrier synchronization processes unit judges are connected is host, detect whether to receive the digital signal processor output
PWM synchronizing clock signals the step of after further include：
When the PWM synchronizing clock signals of the digital signal processor output are not detected in the CPLD carrier synchronization processes unit
When, output digit signals processor fault alarm signal；
The CPLD carrier synchronization processes unit is exported default carrier signal as PWM synchronizing clock signals.
5. photovoltaic DC-to-AC converter parallel system carrier synchronization method according to any one of claims 1 to 4, which is characterized in that when
When the inverter that the CPLD carrier synchronization processes unit judges are connected is slave, detect whether to receive the upper level carrier wave
It is further included after the step of synchronizing signal of control circuit output：
When the synchronizing signal of the upper level carrier Control circuit output is not detected in the CPLD carrier synchronization processes unit,
Detect whether to receive the synchronizing signal of carrier Control circuit output described in next stage；
It, will when the CPLD carrier synchronization processes unit detects the synchronizing signal of the next stage carrier Control circuit output
The synchronizing signal of the next stage carrier Control circuit output is handled and is exported as the PWM synchronizing clock signals.
6. photovoltaic DC-to-AC converter parallel system carrier synchronization method according to claim 5, which is characterized in that as the CPLD
When the synchronizing signal of the upper level carrier Control circuit output is not detected in carrier synchronization processes unit, detect whether to receive
It is further included after the step of synchronizing signal of the next stage carrier Control circuit output：
When the synchronizing signal of the next stage carrier Control circuit output is not detected in the CPLD carrier synchronization processes unit,
Whether the inverter for judging to be connected with carrier Control circuit described in upper level is host；
When the inverter that the CPLD carrier synchronization processes unit judges are connected with carrier Control circuit described in upper level is host
When, whether the duration for judging the synchronizing signal of the next stage carrier Control circuit output is not detected is more than preset duration；
When the synchronous letter of the next stage carrier Control circuit output is not detected in the CPLD carrier synchronization processes unit judges
Number duration when being more than preset duration, based on the inverter that priority setting circuit setting is connected with this carrier Control circuit
Machine.
7. photovoltaic DC-to-AC converter parallel system carrier synchronization method according to claim 6, which is characterized in that as the CPLD
When the synchronizing signal of the next stage carrier Control circuit output is not detected in carrier synchronization processes unit, judge and upper level institute
It is further included after stating the step of whether inverter that carrier Control circuit is connected is host：
When the inverter that the CPLD carrier synchronization processes unit judges are connected with carrier Control circuit described in upper level not based on
During machine, output inverter carrier failure alarm signal.
8. photovoltaic DC-to-AC converter parallel system carrier synchronization method according to any one of claims 1 to 4, which is characterized in that also
Including：
The CPLD carrier synchronization processes unit receives and detects two carrier Controls being connected with this carrier Control circuit
Whether the synchronizing signal of circuit output is correct.
9. photovoltaic DC-to-AC converter parallel system carrier synchronization method according to any one of claims 1 to 4, which is characterized in that when
The CPLD carrier synchronization processes unit is gone back after detecting the step of synchronizing signal of the upper level carrier Control circuit output
Including：
The synchronizing signal of upper level carrier Control circuit output described in the CPLD carrier synchronization processes unit judges whether with it is interior
The expection host carrier signal put is consistent；
When the synchronizing signal of upper level carrier Control circuit output described in the CPLD carrier synchronization processes unit judges with it is built-in
Expection host carrier signal it is consistent when, the synchronizing signal of the upper level carrier Control circuit output is same as the PWM
Step clock signal is handled and is exported；
When the synchronizing signal of upper level carrier Control circuit output described in the CPLD carrier synchronization processes unit judges with it is built-in
Expection host carrier signal it is inconsistent when, detect whether to receive the synchronous letter of carrier Control circuit output described in next stage
Number.
10. photovoltaic DC-to-AC converter parallel system carrier synchronization method according to claim 5, which is characterized in that when described
CPLD carrier synchronization processes units further include after detecting the step of synchronizing signal of the next stage carrier Control circuit output：
The synchronizing signal of next stage carrier Control circuit output described in the CPLD carrier synchronization processes unit judges whether with it is interior
The expection host carrier signal put is consistent；
When the synchronizing signal of next stage carrier Control circuit output described in the CPLD carrier synchronization processes unit judges with it is built-in
Expection host carrier signal it is consistent when, the synchronizing signal of the next stage carrier Control circuit output is same as the PWM
Step clock signal is handled and is exported；
When the synchronizing signal of next stage carrier Control circuit output described in the CPLD carrier synchronization processes unit judges with it is built-in
Expection host carrier signal it is inconsistent when, judge the inverter that is connected with carrier Control circuit described in upper level whether based on
Machine；
When the inverter that the CPLD carrier synchronization processes unit judges are connected with carrier Control circuit described in upper level is host
When, whether the duration for judging the synchronizing signal of the next stage carrier Control circuit output is not detected is more than preset duration；
When the synchronous letter of the next stage carrier Control circuit output is not detected in the CPLD carrier synchronization processes unit judges
Number duration when being more than preset duration, based on the inverter that priority setting circuit setting is connected with this carrier Control circuit
Machine.
11. photovoltaic DC-to-AC converter parallel system carrier synchronization method according to claim 9, which is characterized in that when described
The synchronizing signal of upper level carrier Control circuit output described in CPLD carrier synchronization processes unit judges and built-in expection host
When carrier signal is consistent, using the synchronizing signal of the upper level carrier Control circuit output as the PWM synchronizing clock signals
It is further included after the step of handling and exporting：
The synchronizing signal of next stage carrier Control circuit output described in the CPLD carrier synchronization processes unit judges whether with institute
It is consistent to state built-in expection host carrier signal；
When the synchronizing signal of next stage carrier Control circuit output described in the CPLD carrier synchronization processes unit judges with it is described
When built-in expection host carrier signal is inconsistent, next stage carrier Control circuit carrier abnormal alarm signal is exported.
12. according to photovoltaic DC-to-AC converter parallel system carrier synchronization method according to any one of claims 10, which is characterized in that as the CPLD
When the synchronizing signal of the next stage carrier Control circuit output is not detected in carrier synchronization processes unit or the CPLD is carried
Wave synchronous processing unit judges that the synchronizing signal of the next stage carrier Control circuit output and built-in expection host carrier wave are believed
When number inconsistent, the photovoltaic DC-to-AC converter parallel system carrier synchronization method further includes：
The CPLD carrier synchronization processes unit exports upper level carrier Control circuit carrier abnormal alarm signal.
13. according to the photovoltaic DC-to-AC converter parallel system carrier synchronization method described in claim 6, which is characterized in that the priority
It is further included after the step of setting circuit sets the inverter being connected with this carrier Control circuit to be host：The CPLD carrier synchronizations
Processing unit exports upper level carrier Control circuit carrier abnormal alarm signal and next stage carrier Control circuit carrier is reported extremely
Alert signal.
14. photovoltaic DC-to-AC converter parallel system carrier synchronization method according to claim 9, which is characterized in that when described
The synchronizing signal of upper level carrier Control circuit output described in CPLD carrier synchronization processes unit judges and built-in expection host
When carrier signal is inconsistent, wrapped after the step of detecting whether to receive the synchronizing signal of carrier Control circuit output described in next stage
It includes：
When the CPLD carrier synchronization processes unit detects the synchronizing signal of the next stage carrier Control circuit output, sentence
Whether the synchronizing signal and the built-in expection host carrier signal for the next stage carrier Control circuit output of breaking are consistent；
When the synchronizing signal of next stage carrier Control circuit output described in the CPLD carrier synchronization processes unit judges with it is described
When built-in expection host carrier signal is inconsistent, upper level carrier Control circuit carrier abnormal alarm signal and next stage are exported
Carrier Control circuit carrier abnormal alarm signal.
15. a kind of photovoltaic DC-to-AC converter parallel system carrier synchronization device, which is characterized in that including being returned respectively with each inverter master
The carrier Control circuit that road is connected, and carrier Control circuit series connection is annular；Each carrier Control circuit includes：
The digital signal processor being connected with inverter major loop；
The CPLD carrier synchronization processes units being connected with the digital signal processor；
The photovoltaic DC-to-AC converter parallel system carrier synchronization device uses any photovoltaic DC-to-AC converter of claim 1 to 14 simultaneously
Contact system carrier synchronization method realizes the carrier synchronization between inverter.
16. photovoltaic DC-to-AC converter parallel system carrier synchronization device according to claim 15, which is characterized in that the carrier wave
It is connected between control circuit by optical fiber as annular；Each carrier Control circuit further includes：Respectively with the CPLD carrier waves
The first photoelectric conversion unit and the second photoelectric conversion unit that synchronous processing unit is connected；First photoelectric conversion unit and
The other end of two photoelectric conversion units is connected respectively with other carrier Control circuits.
17. photovoltaic DC-to-AC converter parallel system carrier synchronization device according to claim 15 or 16, which is characterized in that described
Each carrier Control circuit further includes：The priority setting circuit being connected with the CPLD carrier synchronization processes unit.
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| CN104901333B (en) * | 2015-05-05 | 2017-04-12 | 浙江大学 | Three-phase inverter without parallel signal interconnection lines and carrier signal synchronizing method thereof |
| CN105743634B (en) * | 2016-03-28 | 2019-02-01 | 阳光电源股份有限公司 | A kind of parallel connection device systems and its carrier synchronization control method |
| CN110679074B (en) | 2017-05-25 | 2020-12-25 | 华为技术有限公司 | Device, inversion system and method for carrier synchronization |
| EP3681007B1 (en) | 2017-09-28 | 2022-08-10 | Huawei Technologies Co., Ltd. | Pwm control signal synchronization method for inverter, inverter, and power grid system |
| CN108111601A (en) * | 2017-12-20 | 2018-06-01 | 湖南红太阳新能源科技有限公司 | A kind of photovoltaic plant collecting method and system |
| CN109687750B (en) * | 2018-12-29 | 2020-08-25 | 深圳市英威腾交通技术有限公司 | Control method, system and equipment of auxiliary power supply system |
| CN109787464B (en) * | 2019-03-27 | 2022-07-12 | 阳光电源股份有限公司 | Topological unit parallel protection method, device and system |
| CN110392009A (en) * | 2019-06-26 | 2019-10-29 | 天津电气科学研究院有限公司 | Multi-inverter parallel carrier synchronization device and its synchronous method with redundancy feature |
| CN110971557B (en) * | 2019-11-26 | 2023-05-26 | 阳光电源股份有限公司 | Carrier synchronization method and system for parallel operation of multiple converters |
| CN111030514B (en) * | 2019-12-26 | 2021-10-08 | 深圳市英威腾电气股份有限公司 | Frequency converter parallel operation control system |
| CN111817592B (en) * | 2020-06-03 | 2021-11-02 | 中国人民解放军海军工程大学 | High-power inverter parallel system based on SPI communication, synchronization method and online switching method |
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