CN104201897B - The dynamic process detection method of a kind of Switching Power Supply and fast response circuit - Google Patents
The dynamic process detection method of a kind of Switching Power Supply and fast response circuit Download PDFInfo
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Abstract
The invention provides a kind of Switching Power Supply fast response circuit and dynamic process detection method, high output voltage precision can be obtained there is again fast dynamic responding speed.Not only there is the output voltage precision of secondary side feedback control mode, in the dynamic process that output loading changes suddenly, it can be quickly detected generation the action before secondary voltage negative feedback of this event, regulate output voltage in time, thus there is again the dynamic responding speed that primary side feedback is the same.
Description
Technical field
The present invention relates to dynamic process detection method and the fast response circuit of Switching Power Supply, particularly to secondary side feedback Switching Power Supply
Dynamic process detection method and fast response circuit.
Background technology
Along with the development of switch power technology, Switching Power Supply has become the main power supply of electrical appliance, and uses transformator
Realize electrical equipment isolation and improve safety.Fig. 1 is the inverse-excitation type switch power-supply that conventional secondary side feedback controls, resistance R1 and R2
Being output voltage sampling resistor, their dividing potential drop is as the input signal of TL431, and this signal is through being made up of TL431 and optocoupler
Trsanscondutance amplifier amplify after be transferred to the FB input of control chip.So the voltage V of FB portFBReflect power supply output electricity
Pressure VOUTSize, frequently referred to voltage feedback loop, again because being to sense fed-back output voltage from the secondary of transformator, so again
Can be described as secondary voltage feedback control loop.Controller is according to VFBSize modulations GATE output dutycycle size control output electricity
Pressure, as output voltage VOUTTime higher, optocoupler extracts more electric current from FB pin, makes VFBDecline, the dutycycle of GATE output
Diminish, output voltage VOUTIt is gradually reduced；When output voltage is less than normal, optocoupler extracts less electric current from FB pin, makes VFBIncrease
Adding, the dutycycle of GATE output becomes big, output voltage VOUTIt is gradually increased.Therefore output voltage is made by constantly adjusting of loop
Stable in the value set.Control to be from the direct sampled voltage of outfan due to this secondary, output voltage precision can be made the highest,
So using in the application high to output voltage required precision in a large number.But the bandwidth of the voltage feedback loop that secondary controls limits
The speed of dynamic response, so that output voltage precision is high, loop stability is good, the Bandwidth-Constrained of feedback control loop, and
Limited in order to meet the Slew Rate at low standby power loss FB so that power supply output VOUTLoad changing time, dynamic process i.e. occurs,
Response speed is slow and makes exporting change amplitude the biggest.Especially, along with people's enhancing to environmental consciousness, lighter in order to improve
The efficiency of load and reduce stand-by power consumption, present power-supply controller of electric sets frequency reducing pattern often in light load, certain carry (as
Semi-load) below time chip operating frequency along with load reduction, the operating frequency of controller is gradually reduced, thus reduce switch damage
Consume and no-load power consumption, but owing to light load and the reduction of frequency time unloaded make output dynamic response worse.
In order to reduce TL431 and cost that optocoupler brings and power consumption and the restriction of bandwidth, primary side feedback as shown in Figure 2 controls
Device solves these problems, has the control advantage of oneself.It assists the port voltage of winding when transformator demagnetization by sampling
VACarry out sampling and outputting voltage, because the secondary limit winding of transformator is in the same direction with auxiliary winding, two ports when transformator demagnetization
The V of voltageSWith VAProportional relation, it may be assumed thatWherein NAAnd NSTransformator auxiliary winding and time limit respectively around
The number of turn of group.V againOUTWith VSOnly one diode drop of difference, as long as after this voltage-drop compensation being balanced out during sampling, voltage
VAJust with output voltage VOUTIt is directly proportional, so controller is at FB port sampling VADividing potential drop after voltage just reflect output electricity
The size of pressure.Regulate the sampled voltage at FB by the dutycycle of regulation GATE and just can control output voltage in the value set.
Owing to output voltage is that the winding by transformator is returned in primary side feedback, so referred to as primary side feedback controls.Transformator anti-
Feedback is the propagation of magnetic, and speed is very fast, almost without time delay, so primary side feedback can sampling and outputting voltage rapidly, and to defeated
Go out voltage to be adjusted.So frequency controls have good fast dynamic response in the primary side feedback of more than audio frequency 22K, but
Due to output diode different electric currents, at a temperature of pressure drop different, and its size changes and directly affects output voltage
Size, additionally transformer turn, divider resistance RSAnd RS1Precision also directly affect the precision of output voltage, so primary side feedback
The output voltage precision of control mode can not show a candle to secondary control mode.
Summary of the invention
1, it is an object of the present invention to provide a kind of fast response circuit, including: the FR end of controller, the FB of controller
End, the CS end of controller and the GATE end of controller, output voltage sampling circuit, multilevel iudge circuit, control signal are produced
Raw circuit, pwm signal generator and current generating circuit；
The first input port of described output voltage sampling circuit is connected with the FR end of described controller, the second input port
It is connected with the GATE end of described controller；First output port of described output voltage sampling circuit and described relatively sentencing
The first input port of deenergizing is connected, the second output port of described output voltage sampling circuit and described multilevel iudge electricity
Second input port on road is connected；Described output voltage sampling circuit not only each cycle is sampled and preserves the sampling electricity of current period
Pressure, but also the sampled voltage in the cycle before preserving current period, and send the sampled voltage of preservation to described relatively sentence
Deenergizing；
The first input port of described multilevel iudge circuit and the second input port receive respectively from described output voltage sampling electricity
Road the first output port and the sampled voltage of the second output port, and judge whether occurrence dynamics thing according to the size of sampled voltage
Part, and it is sent to described control signal generation circuit by quickly responding useful signal by the output port of multilevel iudge circuit；
Described control signal produces the first input port of circuit and receives from quickly responding of described multilevel iudge circuit effective
After signal, can produce two-way fast-response control pulse signal, first via control signal produces the first of circuit by control signal
Output port sends the first input port of pwm signal generator to, and the second tunnel control signal produces circuit by control signal
The second output port send the input port of current generating circuit to；Control signal produces the second input port of circuit and receives
Operating clock signals from the second output port of described pwm signal generator；
Second input port of described pwm signal generator is connected with the FB end of described controller, the 3rd input port and institute
The CS pin stating controller is connected, the first output port of described pwm signal generator and the GATE of described controller
End is connected；After described pwm signal generator receives described first via control signal, promote rapidly described controller
The output duty cycle of GATE end；
After the input of described current generating circuit receives the second described tunnel control signal, produce big electric current to described control
The FB end charging of device processed.
Preferably, described output voltage sampling circuit includes pulse generator, the first transmission gate, the second transmission gate, the first electricity
Appearance, the second electric capacity, voltage follower and cycle counter；First transmission port of described first transmission gate and described output electricity
The first input port of pressure sample circuit connects, the positive negative control port of described first transmission gate effective with pulse generator respectively
Low and high level output port is connected；Second transmission port of described first transmission gate respectively at voltage follower positive input terminal, the
The positive input terminal of one electric capacity is connected with the first outfan of output voltage sampling circuit；The output port of described voltage follower, institute
First transmission port of the negative input port and described second transmission gate of stating voltage follower is connected；The second described transmission gate is just
Negative control port is connected with effective positive-negative output end mouth of described cycle counter respectively；Second transmission of the second described transmission gate
Port, the anode of described second electric capacity are connected with the second output port of described output voltage sampling circuit；The negative terminal of the first electric capacity
Be connected to the negative terminal of the second electric capacity " "；The input port of described pulse generator and the input port of described cycle counter with
Second input port of described output voltage sampling circuit is connected.
Preferably, described first electric capacity preserves the voltage of current period, and the second described electric capacity preserves before current period 1～4
The voltage in individual cycle.
Preferably, described multilevel iudge circuit include the first P-channel metal-oxide-semiconductor, the second P-channel metal-oxide-semiconductor, the 5th resistance,
Current mirror and the first comparator；The grid of the first metal-oxide-semiconductor is connected with the first input port of described multilevel iudge circuit, and first
The drain electrode of metal-oxide-semiconductor connect " ", the source electrode of the first metal-oxide-semiconductor and the second port of the 5th resistance are connected；The grid of the second metal-oxide-semiconductor
Pole is connected with the second input port of described multilevel iudge circuit, the drain electrode of the second metal-oxide-semiconductor connect " ", the second metal-oxide-semiconductor
Source electrode be connected with the first comparator negative input port and current mirror outputs mouth respectively；First port of the 5th resistance, current mirror
Output port and the first comparator positive input port are connected；First comparator output terminal mouth and the outfan of described multilevel iudge circuit
Mouth is connected.
Preferably, described control signal generation circuit includes: the first rest-set flip-flop and control pulsewidth enumerator；Oneth RS triggers
The first input port that the triggering port S of device produces circuit with described control signal is connected；Control the input of pulsewidth enumerator
Mouth is connected with the first rest-set flip-flop output port Q, and the triggering port R of the first output port and the first rest-set flip-flop is connected,
Control the second output port of pulsewidth enumerator, the 3rd output port and the 4th output port and produce electricity with described control signal respectively
Second output port on road, the first output port and the second input port are connected.
Preferably, described pwm signal generator includes audion, the first resistance, the 3rd resistance and the 4th resistance, the second ratio
Relatively device, agitator, the second rest-set flip-flop and the 4th P-channel metal-oxide-semiconductor；The base stage of audion, transistor collector and first
Second port of resistance the second input port with described pwm signal generator respectively is connected；The emitter stage of audion, the 3rd
First port of resistance and the drain electrode of the 4th P-channel metal-oxide-semiconductor are connected with the input port of agitator respectively；The of 3rd resistance
The positive input port of Two-port netwerk and the first port of the 4th resistance and the second comparator is connected；The negative input port of the second comparator with
3rd input port of described pwm signal generator is connected, and port R put by output port and second trigger of the second comparator
It is connected；The output port of agitator respectively with port S and second outfan of pwm signal generator of the second rest-set flip-flop
Mouth is connected；Second rest-set flip-flop output port Q is connected with the first output port of pwm signal generator；First resistance
The source electrode of the first port and the 4th P-channel metal-oxide-semiconductor meets internal electric source VCC；4th resistance R4 the second port connect " ".
Preferably, described current generating circuit includes the 3rd P-channel switching tube and the second resistance；The leakage of the 3rd P-channel switching tube
Pole is connected with the first port of the second resistance, the grid of the 3rd P-channel switching tube and the input port phase of described current generating circuit
Even, the source electrode of the 3rd P-channel switching tube meets internal electric source VCC；Second port of the second resistance and described current generating circuit
Output port is connected.
It is a further object to provide a kind of dynamic process detection method utilizing above-mentioned fast response circuit, described method
Including:
Described output voltage sampling circuit senses the change of output voltage by the dividing potential drop of sampling transformator auxiliary winding, is referred to as
First original edge voltage feedback control loop, the first described original edge voltage feedback control loop not only each cycle is sampled and preserves adopting of current period
Sample voltage, but also preserve the sampled voltage in 1～4 cycle before of current period；Described output voltage sampling circuit will be current
The sampled voltage in cycle and front 1～4 cycle sends described multilevel iudge circuit to；
Described multilevel iudge circuit judges according to the size of the sampled voltage in front 1～4 cycle and the sampled voltage of current period
Export whether occurrence dynamics process, if front 1 sampled voltage to 4 cycles is more than than the difference with current period sampled voltage
Δ V, Δ V are reference voltages set, then it is assumed that output occurrence dynamics event, and send quick response useful signal to control
Signal generating circuit processed；
Described control signal produces circuit and receives after the quickly response useful signal of described multilevel iudge circuit, can produce
Two-way fast-response control pulse signal, first via control signal sends pwm signal generator to, and the second tunnel control signal passes
Give current generating circuit；
After described pwm signal generator receives described first via control signal, promote rapidly the output duty cycle of GATE；
After described current generating circuit receives described second tunnel control signal, produce big electric current to secondary voltage feedback control loop
Controller input FB charges, and improves the voltage of FB port.
Described first via control wave makes controller output duty cycle increase sharply, and can contain that electric power output voltage is due to prominent
So load and under the trend fallen, described second tunnel control signal makes FB port voltage increase, thus described first via control arteries and veins
Can also maintain big dutycycle after rushing blackout, electric power output voltage is rapidly restored to setting value, it is achieved that the most dynamically ring
The purpose answered.
The FB pin of controller is the feedback port of the second secondary voltage feedback control loop, the second secondary voltage feedback control loop by
Output voltage sampling network and optocoupler that TL431, sampling resistor, compensation electric capacity are formed are constituted.Second secondary voltage feedback control loop
Ensure that high electric power output voltage precision, output voltage can be greatly improved by the first original edge voltage feedback control loop again simultaneously
Dynamic responding speed, and the raising of this rapid response speed be the short time effect, the most again by the second secondary side feedback loop from
Row regulation output voltage, it is to avoid the long-term positive action that the second secondary voltage is fed back by the first original edge voltage feedback control loop, thus
Do not interfere with output voltage during stable state.
A kind of Switching Power Supply dynamic process detection method of the present invention and fast response circuit, can obtain high output voltage
Precision has again fast dynamic responding speed.Not only there is the output voltage precision of secondary side feedback control mode, dash forward in output loading
In the dynamic process so changed, it can be quickly detected generation the action before secondary voltage negative feedback of this event,
Regulate output voltage in time, thus there is again the dynamic responding speed that primary side feedback is the same.
Accompanying drawing explanation
Fig. 1 is the application circuit of the inverse-excitation type switch power-supply that secondary side feedback controls
Fig. 2 is the application circuit of the inverse-excitation type switch power-supply that primary side feedback controls
Fig. 3 is the application circuit of the controller comprising dynamic process of the present invention detection and fast response circuit
Fig. 4 is the schematic diagram of the fast response circuit described in the embodiment of the present invention one
Fig. 5 is the sample waveform to output voltage of voltage sample module of the present invention
Detailed description of the invention
In order to make the purpose of the present invention, technical scheme and advantage clearer, below in conjunction with drawings and Examples, to this
Bright further description.Should be appreciated that specific embodiment described herein, only in order to explain the present invention, is not used to limit
Determine the present invention.
Embodiment one
Fig. 4 is the circuit theory diagrams of embodiment one.A kind of fast response circuit of Switching Power Supply, including: include the FR of controller
End, the FB end of controller, the CS end of controller, the GATE end of controller, output voltage sampling circuit 101, multilevel iudge
Circuit 102, control signal produce circuit 103, pwm signal generator 104, current generating circuit 105.Output voltage is sampled
Circuit has the FR pin of two input port D11 and D14, two output port D12 and D13, input port D11 and controller
Being connected, another input port D14 and GATE pin is connected, two output port D12 and D13 export respectively Vo_new with
Vo_old signal is to two input ports of multilevel iudge circuit 102；Another output port output of multilevel iudge circuit 102
Vo_fast signal produces an input port of circuit 103 to control signal；Another input port of 103 receives from PWM
The CLK signal of signal generator 104, it addition, 103 also have two output ports, an output FC1Control signal is believed to PWM
Number generator 104, another exports FC2Control signal is to current generating circuit 105；One of pwm signal generator 104 defeated
Go out port to be connected with the GATE pin of controller；One number port of current generating circuit and the FB port of controller and PWM
One input port of signal generator 104 is connected.
Output voltage sampling circuit 101 includes: pulse generator, transmission gate TG1, the voltage sample electric capacity of preservation current period
Before C1, voltage follower OPA, transmission gate TG2, current period, 1～4 periodic voltage preserves electric capacity C2, cycle count
Device.First transmission port A1 and the D11 port of transmission gate TG1 is connected, positive negative control port respectively with the having of pulse generator
Effect low and high level output port is connected；The second transmission positive input terminal of port B1, OPA, the positive input terminal of electric capacity C1 of TG1
It is connected together with D12 port；The output port of OPA, the negative input port of OPA transmit port with the first of transmission gate TG2
A2 is connected；The positive negative control port of transmission gate TG2 is connected with effective positive-negative output end mouth of cycle counter respectively；TG2's
Second transmission port B2, the anode of electric capacity C2 are connected with D13 port；Electric capacity C1 and C2 respective negative terminal mouth be connected to " "；
Pulse generator is connected with D14 with the input port of cycle counter.
Described multilevel iudge circuit 102 includes: current potential translates P-channel metal-oxide-semiconductor MP1 and MP2, return difference arranges resistance R5,
Current mirror, comparator CMP1.The grid of MP1 is connected with D21 port, drain electrode connect " ", the second of source electrode and resistance R5
Port is connected；The grid of MP2 is connected with D22 port, drain electrode connect " ", source electrode and comparator negative input port, current mirror
Output port is connected；First end of resistance R5, current mirror outputs mouth are connected with comparator positive input port；Comparator exports
Port is connected with D23 port.
Described control signal produces circuit 103 and includes: rest-set flip-flop RS1, control pulsewidth enumerator." 1 " of trigger RS1
Trigger port S and D31 port to be connected；The input port controlling pulsewidth enumerator is connected with rest-set flip-flop output port Q, the
" 0 " of one output port and RS1 trigger is triggered port R and is connected, the other three port respectively with port D32, D33,
D34 is connected.
Described pwm signal generator 104 includes: level shift audion Q1, pull-up resistor R1, divider resistance R3 and
R4, PWM comparator CMP2, agitator, rest-set flip-flop RS2, P-channel metal-oxide-semiconductor MP4.The base stage of audion Q1,
Colelctor electrode, second port of resistance R1 are connected with D41 port；The emitter stage of audion, first port of resistance R3, P ditch
The drain electrode of road metal-oxide-semiconductor MP4 is connected with the input port of agitator；Second port of resistance R3, first port of R4 and PWM
The positive input port of comparator CMP2 is connected；The negative input port of comparator is connected with D42 port, output port and trigger
The reset port R of RS2 is connected；Set port S, D44 port phase of the output port of agitator and trigger RS2
Even；Trigger RS2 output port Q and D45 port is connected；Resistance R1 the first port and MP4 source electrode meet internal electric source VCC；
Resistance R4 the second port connect " ".
Described current generating circuit 105 includes: P-channel switching tube MP3, resistance R2.The of the drain electrode of MP3 and resistance R2
Single port is connected, and grid is connected with D52 port, and source electrode meets internal electric source VCC；Second port of resistance R2 and D51 port
It is connected.
The operation principle of each circuit module is as follows:
The operation principle of described output voltage sampling circuit 101: after GATE becomes low level, there is the voltage wave of demagnetization in FR
Shape, its size reflects the size of electric power output voltage, postpones a bit of sampling delay time afterpulse generator and sends pulse
Signal, opening the transmission gate a bit of time is preserved the voltage swing of FR by electric capacity C1, the waveform of sampling process such as figure
Shown in 5；Voltage follower OPA replicates the voltage of C1, to provide certain driving force；Cycle counter every 4
Individual (not limiting) cycle opens a transmission gate TG2, makes the voltage on electric capacity C2 equal to the voltage on electric capacity C1.So
The effect of 101 is exactly, and the output voltage of each cycle (not limiting) electric capacity C1 sampling power supply, every 4 cycle electric capacity C2 are multiple
Making the voltage on a C1, so, the voltage of the upper preservation of C2 is exactly the output voltage before 1～4 cycle just pass by.
The operation principle of described multilevel iudge circuit 102: the grid of P-channel metal-oxide-semiconductor MP1 and MP2 receive respectively electric capacity C1 and
Voltage on electric capacity C2, the effect of MP1 and MP2 is that the voltage on C1 and C2 carries out current potential translation respectively, i.e. at C1 and
The source gate voltage V of difference one identical PMOS of superposition on the voltage of C2SG, the electric current that current mirror produces produces on resistance R5
A raw small voltage Δ V, thus the voltage of comparator input anode deducts the voltage of input negative terminal equal to the voltage on electric capacity C1
Vo_new and Δ V sum deduct the voltage Vo_old on electric capacity C2 again, say, that in the case of Vo_new with Vo_old is identical,
The positive input terminal voltage of comparator CMP1 exceeds Δ V than negative input end, then only when Vo_new than Vo_old low go out Δ V time
The output of comparator CMP1 becomes low level, represents that bigger falling occurs in electric power output voltage.
Described control signal produces the operation principle of circuit 103: when falling more greatly occurs in electric power output voltage, can be trigger
RS1 triggers into one state, i.e. electric power output voltage is occurred that falling more greatly this logout gets off.And then, arteries and veins is controlled
Wide timer output two path control signal FC1 and FC2, they are Low level effectives.The input port D34 of 103 receives chip
Operating clock signals CLK, clock cycle T are as the least unit time of FC1 and FC2.FC1 and FC2 useful signal disappears
After mistake, trigger RS1 is set to again " 0 " state, again waits for the generation of dynamic event.
The operation principle of described pwm signal generator 104: pull-up resistor R1, current potential translation triode Q1, divider resistance
Form conventional pwm signal generation circuit together with R3 with R4, comparator CMP2, trigger RS2, control GATE end
The dutycycle of mouth output pulse width stablizes the voltage of out-put supply.The frequency of agitator is also controlled by FB port voltage, can root
According to the operating frequency of the size control chip of load, optimize efficiency during light load.When the grid of MP4 becomes low level, three poles
Pipe emitter voltage improves rapidly, thus frequency increases sharply；The voltage of the positive input port of CMP2 increases sharply, thus CS
Port peak electric current increases sharply.So, dutycycle and the frequency of GATE all increases sharply.
The operation principle of described current generating circuit 105: after the grid of P-channel metal-oxide-semiconductor MP3 becomes low level, MP3 turns on,
The circuit I that so power supply VCC is produced by less resistance R2FBThe compensation electric capacity external to FB port charges rapidly.
Visible, above 5 modular circuits jointly complete output voltage and fall suddenly the detection of this dynamic process, control signal
Send and quickly respond this series of task.By the size of FR port sampling and outputting voltage, and this cycle samples
Voltage to compare with the voltage obtained of sampling before, only this week sampling voltage ratio before low more than Δ V just think
It is that output voltage big falling occurs.Δ V is appropriately designed the output voltage that reason causes such as just can be avoided interference and fall and judge by accident
Situation about falling for dynamic process.Turned on by P-channel metal-oxide-semiconductor MP4 in 104, improve rapidly frequency and dutycycle,
Can contain that the trend fallen more greatly occurs owing to loading suddenly in output voltage at once.Because the side of this rapid raising dutycycle
Formula is enforceable, is the feedback voltage not taking FB port into account, is open loop, so can not the most mandatory raising
Frequency and dutycycle, otherwise there is a possibility that the output voltage of power supply charges too high and damages power supply, must cancel after a period of time
This positive action allows the negative feedback of loop be automatically adjusted electric power output voltage.But force in 104 to improve dutycycle and frequency
After the signal of rate is cancelled, the voltage of FB port is likely to be due to external compensation electric capacity and rises to greatly and not required voltage so that
Dutycycle and frequency reduce again, and output voltage falls again.Thus, charged by the electric capacity external to FB port in 105
Improving rapidly the voltage of FB port, rear dutycycle is cancelled in the positive action in 104 and frequency will not reduce again by the time, but
It is automatically adjusted output voltage by the feedback of FB port.So 104 and 105 complete the process of quickly response, Ji Nengli jointly
Carve the containment trend fallen of output voltage and make amplitude of falling little, again can be anti-eventually through self regulation output voltage of loop
Stop enforceable accommodative excess.Reach and quickly respond fast, accurate, ruthless beneficial effect.
Embodiment two
The present embodiment is to propose a kind of dynamic process detection method utilizing circuit described in embodiment one, it is characterised in that:
Output voltage sampling circuit dividing potential drop (the signal electricity that the most described controller FR pin goes out by sampling transformator auxiliary winding
Pressure) sense the change of output voltage, not only each cycle is sampled and preserves the sampled voltage of current period, but also preserves previous
Individual or the sampled voltage in several cycle；Described output voltage sampling circuit is by 1～4 cycle before current period and current period
Sampled voltage sends described multilevel iudge circuit to, and the most described multilevel iudge circuit judges defeated according to the size of the two voltage
Go out whether occurrence dynamics process, if front 1 sampled voltage to 4 cycles than the difference with current period sampled voltage more than Δ V,
Δ V is a reference voltage (such as 50mV) set, then it is assumed that output occurrence dynamics event, and sends quickly response effectively
Signal produces circuit to control signal；
Described control signal produces circuit and receives after the quickly response useful signal of described multilevel iudge circuit, can produce two
Road fast-response control pulse signal, first via control signal sends pwm signal generator, the second tunnel control signal transmission to
To current generating circuit；
After described pwm signal generator receives described first via control signal, promote rapidly the output duty cycle of GATE；
After described current generating circuit receives described second tunnel control signal, produce the control to secondary voltage feedback control loop of the big electric current
Device input FB processed charges, and improves the voltage of FB port.
Embodiments of the present invention are not limited to this, according to the foregoing of the present invention, utilize the ordinary technical knowledge of this area and are used to
By means, without departing under the present invention above-mentioned basic fundamental thought premise, the present invention can also make other various ways amendment,
Replace or change, within the scope of all falling within rights protection of the present invention.
Claims (8)
1. the fast response circuit of a Switching Power Supply, it is characterised in that: include the FR end of controller, control
The FB end of device processed, the CS end of controller, GATE end, the output voltage sampling circuit of controller, compare
Decision circuitry, control signal produce circuit, pwm signal generator and current generating circuit；
The first input port of described output voltage sampling circuit is connected with the FR end of described controller, the
Two input ports are connected with the GATE end of described controller；The first of described output voltage sampling circuit is defeated
Go out port to be connected with the first input port of described multilevel iudge circuit, described output voltage sampling circuit
Second output port is connected with the second input port of described multilevel iudge circuit；Described output voltage sampling
Circuit not only each cycle is sampled and preserves the sampled voltage of current period, but also the week before preserving current period
The sampled voltage of phase, and the sampled voltage of preservation is sent to described multilevel iudge circuit；
The first input port of described multilevel iudge circuit and the second input port receive respectively from described defeated
Go out voltage sampling circuit the first output port and the sampled voltage of the second output port, and big according to sampled voltage
The little occurrence dynamics event that judges whether, and will quickly respond the useful signal outfan by multilevel iudge circuit
Mouth is sent to described control signal and produces circuit；
Described control signal produces the first input port of circuit and receives from described multilevel iudge circuit
Quickly after response useful signal, can produce two-way fast-response control pulse signal, first via control signal is passed through
First output port of control signal generation circuit sends the first input port of pwm signal generator to, the
The second output port that two tunnel control signals produce circuit by control signal sends the defeated of current generating circuit to
Inbound port；Control signal produces the second input port of circuit and receives from described pwm signal generator
The operating clock signals of the second output port；
Second input port of described pwm signal generator is connected with the FB end of described controller, and the 3rd
Input port is connected with the CS pin of described controller, the first outfan of described pwm signal generator
Mouth is connected with the GATE end of described controller；Described pwm signal generator receives the described first via
After control signal, promote rapidly the output duty cycle of the GATE end of described controller；
After the input of described current generating circuit receives the second described tunnel control signal, produce big electric current
Charge to the FB end of described controller.
Fast response circuit the most according to claim 1, it is characterised in that: described output voltage is adopted
Sample circuit includes pulse generator, the first transmission gate, the second transmission gate, the first electric capacity, the second electric capacity, voltage
Follower and cycle counter；First transmission port of described first transmission gate and described output voltage sampling electricity
The first input port on road connects, the positive negative control port of described first transmission gate respectively with the having of pulse generator
Effect low and high level output port is connected；Second transmission port of described first transmission gate is respectively at voltage follower
Positive input terminal, the positive input terminal of the first electric capacity are connected with the first outfan of output voltage sampling circuit；Described electricity
First biography of the pressure output port of follower, the negative input port of described voltage follower and described second transmission gate
Defeated port is connected；The positive negative control port of the second described transmission gate respectively with described cycle counter effectively the most just
Negative output port is connected；Second transmission port, the anode of described second electric capacity and the institute of the second described transmission gate
The second output port stating output voltage sampling circuit is connected；The negative terminal of the first electric capacity and the negative terminal of the second electric capacity are even
Receive " "；The input port of described pulse generator and the input port of described cycle counter are defeated with described
The second input port going out voltage sampling circuit is connected.
Fast response circuit the most according to claim 2, it is characterised in that: the first described electric capacity is protected
Deposit the voltage of current period, the voltage in 1～4 cycle before the second described electric capacity preservation current period.
Fast response circuit the most according to claim 1, it is characterised in that: described multilevel iudge electricity
Road includes the first P-channel metal-oxide-semiconductor, the second P-channel metal-oxide-semiconductor, the 5th resistance, current mirror and the first ratio
Relatively device；The grid of the first metal-oxide-semiconductor is connected with the first input port of described multilevel iudge circuit, a MOS
The drain electrode of pipe connect " ", the source electrode of the first metal-oxide-semiconductor and the second port of the 5th resistance are connected；2nd MOS
The grid of pipe is connected with the second input port of described multilevel iudge circuit, the drain electrode of the second metal-oxide-semiconductor connect " ",
Second metal-oxide-semiconductor source electrode be connected with the first comparator negative input port and current mirror outputs mouth respectively；The
First port of five resistance, current mirror outputs mouth and the first comparator positive input port are connected；First comparator
Output port is connected with the output port of described multilevel iudge circuit.
Fast response circuit the most according to claim 1, it is characterised in that: described control signal produces
Circuit includes: the first rest-set flip-flop and control pulsewidth enumerator；The triggering port S of the first rest-set flip-flop with
Described control signal produces the first input port of circuit and is connected；Control the input port and the of pulsewidth enumerator
One rest-set flip-flop output port Q is connected, and the first output port and the RS that control pulsewidth enumerator trigger
The triggering port R of device is connected, and controls the second output port of pulsewidth enumerator, the 3rd output port and the 4th
It is defeated that output port produces the second output port of circuit, the first output port and second with described control signal respectively
Inbound port is connected.
Fast response circuit the most according to claim 1, it is characterised in that: described pwm signal produces
Raw device include audion, the first resistance, the 3rd resistance and the 4th resistance, the second comparator, agitator, second
Rest-set flip-flop and the 4th P-channel metal-oxide-semiconductor；The base stage of audion, transistor collector and the first resistance
Second port the second input port with described pwm signal generator respectively is connected；The emitter stage of audion,
First port of the 3rd resistance and the drain electrode of the 4th P-channel metal-oxide-semiconductor respectively with the input port phase of agitator
Even；Second port of the 3rd resistance and the positive input port phase of the first port of the 4th resistance and the second comparator
Even；The negative input port of the second comparator is connected with the 3rd input port of described pwm signal generator, the
The output port of two comparators and the second trigger are put port R and are connected；The output port of agitator is respectively with
The port S of two rest-set flip-flops is connected with the second output port of pwm signal generator；2nd RS triggers
Device output port Q is connected with the first output port of pwm signal generator；First port of the first resistance
Internal electric source VCC is met with the source electrode of the 4th P-channel metal-oxide-semiconductor；4th resistance R4 the second port connect " ".
Fast response circuit the most according to claim 1, it is characterised in that: described current generating circuit
Including the 3rd P-channel switching tube and the second resistance；The drain electrode of the 3rd P-channel switching tube and the of the second resistance
Single port is connected, and the grid of the 3rd P-channel switching tube is connected with the input port of described current generating circuit, the
The source electrode of three P-channel switching tubes meets internal electric source VCC；Second port of the second resistance produces with described electric current
The output port of circuit is connected.
8. utilize a dynamic process detection method for fast response circuit described in any one of claim 1-7,
It is characterized in that:
Described output voltage sampling circuit senses output voltage by the dividing potential drop of sampling transformator auxiliary winding
Change, the referred to as first original edge voltage feedback control loop, the first described original edge voltage feedback control loop not only each cycle
Sample and preserve the sampled voltage of current period, but also preserve current period before the sampling in 1～4 cycle
Voltage；The sampled voltage of current period and front 1～4 cycle is sent to described by described output voltage sampling circuit
Multilevel iudge circuit；
Described multilevel iudge circuit is according to the sampled voltage in front 1～4 cycle and the sampled voltage of current period
Size judge to export whether occurrence dynamics process, if front 1 to 4 cycles sampled voltage than with currently
The difference of periodic sampling voltage is a reference voltage set more than Δ V, Δ V, then it is assumed that output occurs dynamic
State event, and send quickly response useful signal and produce circuit to control signal；
Described control signal produces circuit and receives the quickly response effectively letter from described multilevel iudge circuit
After number, can produce two-way fast-response control pulse signal, first via control signal sends pwm signal to and produces
Raw device, the second tunnel control signal sends current generating circuit to；
After described pwm signal generator receives described first via control signal, promote rapidly GATE's
Output duty cycle；
After described current generating circuit receives described second tunnel control signal, produce big electric current to secondary voltage
The controller input FB charging of feedback control loop, improves the voltage of FB port.
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| CN105403753B (en) * | 2015-11-26 | 2018-02-06 | 成都启臣微电子股份有限公司 | A kind of Switching Power Supply primary inductance peak point current auxiliary sampling circuit |
| CN105429440B (en) * | 2015-12-23 | 2018-02-27 | 西安理工大学 | A kind of High Power IGBT Driver Circuit of the automatic tracing control of switching process |
| CN106685211A (en) * | 2016-08-22 | 2017-05-17 | 武汉盛帆电子股份有限公司 | Switching power supply, electrical isolation method and ammeter |
| CN106849667B (en) * | 2017-02-07 | 2019-05-07 | 湖南汇德电子有限公司 | A kind of primary side feedback constant pressure and flow controller sample circuit |
| CN108880258B (en) * | 2017-05-12 | 2021-03-23 | 通嘉科技股份有限公司 | Controller applied to secondary side of power converter and operation method thereof |
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