CN103746584B - Based on the multi-electrical level inverter neutral-point voltage balance method of carrier offset - Google Patents

Abstract

The invention discloses a kind of multi-electrical level inverter neutral-point voltage balance method based on carrier offset.The method step is: the sampling unit of digital processing control module detects the electric capacity instantaneous voltage between the mid point of multi-electrical level inverter DC bus and positive pole, electric capacity instantaneous voltage between the mid point of DC bus and negative pole, and determine the deviation of these two electric capacity instantaneous voltages, regulate through the carrier offset amount of carrier offset regulating and controlling unit to current time, the regulating and controlling signal of carrier offset regulating and controlling unit exports to SVPWM vector control unit, the operating state of multi-electrical level inverter is controlled through drive circuit output pwm signal, control the neutral point voltage balance of multi-electrical level inverter simultaneously.The present invention is on the basis keeping original SVPWM control method, do not increase control method complexity, the balance of mid-point voltage is only controlled by changing carrier offset, output voltage, current harmonics can be reduced, improve output waveform quality, there is the advantage that real-time is good, processing procedure simple and be easy to realization.

Description

Based on the multi-electrical level inverter neutral-point voltage balance method of carrier offset

Technical field

The invention belongs to the control technology field in Technics of Power Electronic Conversion technology, particularly a kind of multi-electrical level inverter neutral-point voltage balance method based on carrier offset.

Background technology

Multi-electrical level inverter has that the voltage withstand class of switching device is low, equivalent switching frequency is high and the advantage such as output waveform harmonic wave is little, is thus used widely in the high-power conversion occasion of mesohigh.Be that neutral point clamp type inverter or T-shaped inverter all exist the unbalanced problem of mid-point voltage, this is a common problem.Multi-electrical level inverter mid-point voltage imbalance will increase the harmonic wave of system output voltage, affects output waveform quality.At present, the software controlling strategies of neutral point voltage balance mainly contains two kinds, and a kind of is Sine Pulse Width Modulation technology based on carrier wave, maintains neutral point voltage balance by injecting zero-sequence component; Another kind is based on space vector pulse width modulation SVPWM technology, controls neutral point voltage balance by regulating the action time of redundancy small vector.Under SPWM mode, mainly through injecting zero-sequence component to maintain neutral point voltage balance in three-phase modulations ripple; But the calculating of zero-sequence component needs skill, be generally the method by " estimate-verify-revise ", amount of calculation is large, and computational methods are complicated.Method conventional under SVPWM mode is the dispensed factor, and the computing formula of distribution factor k is as follows:

$k=\frac{I_b{T}_a+I_c(T_a+T_b)+Q_{\mathrm{NPO}}}{(I_c-I_a)(T_a+T_b)-I_b(T_b-T_a)}$

Wherein I _j(j=a, b, c) is the threephase load electric current in a control cycle, T _j(j=a, b, c) is the action time of a little Atria summit vector, Q _nPOit is the mean charge flowing into mid point in a control cycle.The relativity time of often pair of redundancy small vector is determined by distribution factor.When blended space vector is in sectors different in vector distribution map, in different delta-shaped regions, the formula that distribution factor calculates is different; These computational methods need the parameter used more, calculate more complicated, and operand is large and be unfavorable for digitized realization.

Summary of the invention

The object of the present invention is to provide that a kind of processing procedure is simple, operand is little and be convenient to the digitized multi-electrical level inverter neutral-point voltage balance method based on carrier offset.

The technical solution realizing the object of the invention is: a kind of multi-electrical level inverter neutral-point voltage balance method based on carrier offset, the sampling unit of digital processing control module detects the electric capacity instantaneous voltage between the mid point of multi-electrical level inverter DC bus and positive pole, electric capacity instantaneous voltage between the mid point of DC bus and negative pole, and determine the deviation of these two electric capacity instantaneous voltages, regulate through the carrier offset amount of carrier offset regulating and controlling unit to current time, the regulating and controlling signal of carrier offset regulating and controlling unit exports to SVPWM vector control unit, the operating state of multi-electrical level inverter is controlled through drive circuit output pwm signal, control the neutral point voltage balance of multi-electrical level inverter simultaneously, specifically comprise the following steps:

Step 1, sampling unit are sampled three-phase voltage signal that electric capacity instantaneous voltage between the DC bus-bar voltage of multi-electrical level inverter, electric capacity instantaneous voltage between the mid point of DC bus and positive pole, the mid point of DC bus and negative pole, multi-electrical level inverter export and the three-phase current signal that multi-electrical level inverter exports respectively;

Step 2, carrier offset regulating and controlling unit according to the deviation signal of two electric capacity instantaneous voltages described in step 1, by the carrier offset amount Δ T of carrier offset control method determination current time _offset;

Step 3, SVPWM vector control unit are according to the carrier offset amount Δ T of gained current time in the three-phase voltage signal of sampling unit output in step 1 and three-phase current signal, DC bus-bar voltage signal and step 2 _offset, determine the control signal of every phase brachium pontis switching tube of multi-electrical level inverter in current switch period;

The switch controlled signal that SVPWM vector control unit exports is distributed to every each switching tube of phase brachium pontis of multi-electrical level inverter by step 4, drive circuit, controls operating state and the neutral point voltage balance of multi-electrical level inverter.

Compared with prior art, remarkable advantage of the present invention is: (1), on the basis keeping original SVPWM control method, does not increase control method complexity, only controls the balance of mid-point voltage by becoming carrier offset; (2) output voltage, current harmonics can be reduced, improve output waveform quality; (3) have that real-time is good, the simple and easy advantage such as Digital Realization of processing procedure.

Accompanying drawing explanation

Fig. 1 is the structure drawing of device of the multi-electrical level inverter neutral-point voltage balance method that the present invention is based on carrier offset.

Fig. 2 is the topology diagram of T-shaped three level and the topology diagram of NPC type three level.

Fig. 3 is the local space vector distribution map of the first sector in 3 level space vector distribution map.

Fig. 4 is the three-phase output level variation diagram in Fig. 3 before and after the first little triangle superposition in sector second carrier offset amount.

Fig. 5 is the flow chart of the multi-electrical level inverter neutral-point voltage balance method that the present invention is based on carrier offset.

Fig. 6 is the oscillogram of DC bus-bar voltage up and down added when 0.02s in embodiment before and after control mode of the present invention.

Embodiment

The present invention adopts the SVPWM control method becoming carrier offset, achieve dynamic adjustments inverter being exported to a, b, c three-phase voltage high and low level state duration in each switch periods, namely alignment voltage close loop regulates, and guarantees that mid-point voltage is operated in the poised state in error range.Carrier offset regulating and controlling unit is according to the electric capacity instantaneous voltage between the mid point of the electric capacity instantaneous voltage between the mid point of DC bus and positive pole, DC bus and negative pole, and determine the deviation of these two electric capacity instantaneous voltages, by the carrier offset amount of closed loop control method determination current switch period, finally be added on carrier wave, a, b, c three-phase output voltage high and low level state duration in adjustment current switch period, realize mid-point voltage stable state.

Composition graphs 1, the present invention is based on the multi-electrical level inverter neutral-point voltage balance method of carrier offset, the sampling unit of digital processing control module detects the electric capacity instantaneous voltage between the mid point of multi-electrical level inverter DC bus and positive pole, electric capacity instantaneous voltage between the mid point of DC bus and negative pole, and determine the deviation of these two electric capacity instantaneous voltages, regulate through the carrier offset amount of carrier offset regulating and controlling unit to current time, the regulating and controlling signal of carrier offset regulating and controlling unit exports to SVPWM vector control unit, the operating state of multi-electrical level inverter is controlled through drive circuit output pwm signal, control the neutral point voltage balance of multi-electrical level inverter simultaneously, specifically comprise the following steps:

Step 1, sampling unit are sampled three-phase voltage signal that electric capacity instantaneous voltage between the DC bus-bar voltage of multi-electrical level inverter, electric capacity instantaneous voltage between the mid point of DC bus and positive pole, the mid point of DC bus and negative pole, multi-electrical level inverter export and the three-phase current signal that multi-electrical level inverter exports respectively;

Step 2, carrier offset regulating and controlling unit according to the deviation signal of two electric capacity instantaneous voltages described in step 1, by the carrier offset amount Δ T of carrier offset control method determination current time _offset; Comprise the following steps:

1st step, judges DC bus mid-point voltage variation delta V _nPwhether in error range: if | Δ V _nP| < Verro, then do not carry out any operation to carrier wave; Otherwise, enter the 2nd step, wherein DC bus mid-point voltage variation delta V _nPfor:

$\mathrm{\&Delta;}{V}_{\mathrm{NP}}=-\frac{(V_{c1}-V_{c2})}{2}$

In formula, V _c1for electric capacity instantaneous voltage, V between the positive pole of DC bus and mid point _c2for the electric capacity instantaneous voltage between the mid point of DC bus and negative pole, Verro is less than the DC bus-bar voltage of 0.05 times;

2nd step, judges DC bus mid-point voltage variation delta V _nPwhether be less than 0: if Δ V _nP< 0 enters the 3rd step, otherwise goes to the 4th step;

3rd step, judges this mid-point voltage variation delta V _{nP (K)}with mid-point voltage variation delta V last time _{nP (K-1)}size: if | Δ V _{nP (K)}| > | Δ V _{nP (K-1)}|, then the carrier offset amount Δ T that superposition one is positive on current carrier basis _offset; Otherwise carrier wave is not operated;

4th step, judges this mid-point voltage variation delta V _{nP (K)}with mid-point voltage variation delta V last time _{nP (K-1)}size: if | Δ V _{nP (K)}| > | Δ V _{nP (K-1)}|, then the carrier offset amount Δ T that superposition one is negative on current carrier basis _offset; Otherwise carrier wave is not operated.

Described carrier offset amount Δ T _offsetscope be:

$\frac{1}{1000}\left(\frac{T_s}{2}\right)\&le;\left|\mathrm{\&Delta;}{T}_{\mathrm{offset}}\right|\&le;\frac{T_s}{2}$

In formula, T _sfor the switch periods of multi-electrical level inverter.

Described superposition carrier offset amount Δ T _offsetafter carrier wave upward peak T _hppwith lower peak value T _lppmeet the following conditions respectively:

T _hpp≥max{t _aon,t _bon,t _con}

T _lpp≤min{t _aon,t _bon,t _con}

In formula, t _aon, t _bon, t _conbe respectively A, B, C three-phase output voltage action moment of multi-electrical level inverter.

Step 3, SVPWM vector control unit are according to the carrier offset amount Δ T of gained current time in the three-phase voltage signal of sampling unit output in step 1 and three-phase current signal, DC bus-bar voltage signal and step 2 _offset, determine the control signal of every phase brachium pontis switching tube of multi-electrical level inverter in current switch period;

The switch controlled signal that SVPWM vector control unit exports is distributed to every each switching tube of phase brachium pontis of multi-electrical level inverter by step 4, drive circuit, controls operating state and the neutral point voltage balance of multi-electrical level inverter.Described digital processing control module is STM32F407 chip.

Below for three-level inverter, the specific embodiment of the present invention process is described by reference to the accompanying drawings.

Table 1 describes three-level inverter on off state and the relation exporting three-phase voltage level in detail, and P represents positive bus-bar voltage level, N represents negative busbar voltage level, DC bus mid point 0 represents with reference to zero potential.

Table 1 three-level inverter on off state and the relation reference table exporting three-phase voltage level

Under ideal conditions, when neutral point voltage balance is (namely relative to zero potential mid-point voltage variation delta V _nP=0) time, dc-link capacitance C ₁, C ₂voltage when mid-point voltage is uneven and offset from zero current potential, dc-link capacitance C ₁, C ₂voltage unequal time, mid-point voltage variation delta V _nPexpression formula be

As shown in Figure 2, mid point current i _owith flow through upper and lower dc-link capacitance C ₁, C ₂current i ₁, i ₂relation as follows: make DC bus C ₁, C ₂capacitance equal, i.e. C ₁=C ₂=C.

$\left\{\begin{array}{c}{i}_1=C_1\frac{d{V}_{c1}}{\mathrm{dt}}\\ i_2=C_2\frac{d{V}_{c2}}{\mathrm{dt}}\\ i_o=i_1-i_2\\ \mathrm{\&Delta;}{V}_{\mathrm{NP}}=-\frac{(V_{c1}-V_{c2})}{2}\end{array}\right.$

Mid-point voltage variation delta V can be obtained fom the above equation _nPexpression formula be

$\mathrm{\&Delta;}{V}_{\mathrm{NP}}=\&Integral;-\frac{1}{2C}{i}_o\mathrm{dt}---\left(1\right)$

V in formula _c1, V _c2meet V _c1+ V _c2=V _dc, mid-point voltage variation delta V can be obtained _nPdirectly related with mid point electric current.

Make the output level state of every phase voltage by $S_j=\left\{\begin{array}{c}1\\ 0\\ -1\end{array}\right.(j=a,b,c)$ Represent, 1 represents P-state, and 0 represents O state, and-1 represents N state.The expression formula of mid point electric current is:

$\begin{array}{c}{i}_o=(1-|S_a\left|\right)\&CenterDot;i_a+(1-|S_b\left|\right)\&CenterDot;i_b+(1-|S_c\left|\right)\&CenterDot;i_c\\ =i_a+i_b+i_c-\left(\right|S_a|\&CenterDot;i_a+|S_b|\&CenterDot;i_b+|S_c|\&CenterDot;i_c)\end{array}$

For three-phase three-wire system inverter system, three-phase output current meets expression formula: i _a+ i _b+ i _c=0

So i _o=-(| S _a| i _a+ | S _b| i _b+ | S _c| i _c), substitute into formula (1) and mid-point voltage variation delta V can be obtained _nPexpression formula be:

$\mathrm{\&Delta;}{V}_{\mathrm{NP}}=\&Integral;\frac{1}{2C}\left(\right|S_a|\&CenterDot;i_a+|S_b|\&CenterDot;i_b+|S_c|\&CenterDot;i_c)\mathrm{dt}---\left(2\right)$

In three-level inverter, what SVPWM vector control adopted usually is seven segmentation vector sequences, and each sequence for the vector that starts, is termination vector with negative small vector (positive small vector) with negative small vector (positive small vector).If for little DELTA vectors district, the first sector second shown in Fig. 3, its seven segmentations vector sequence is: [OON]-[PON]-[PPN]-[PPO]-[PPN]-[PON]-[OON].Wherein, when on off state is positive small vector (PPO), due to very high (20kHZ-200kHZ) that switching frequency is chosen usually, so can think three-phase current i in this switch periods _a, i _b, i _cinvariable, and rated current outflow direction is just.Mid-point voltage variation delta V _nPexpression formula be

$\mathrm{\&Delta;}{V}_{\mathrm{NP}}=\frac{1}{2C}(i_a+i_b)\&CenterDot;\mathrm{\&Delta;T}=-\frac{1}{2C}{i}_c\&CenterDot;\mathrm{\&Delta;T}$

I in this on off state time period _c<0, so Δ V _nP>0, PPO effect during this period of time in, as the above analysis the variable quantity of mid-point voltage be on the occasion of, so positive small vector can make mid-point voltage raise.

Same should on off state be positive small vector (OON): mid-point voltage variation delta V _nPformula can be expressed as

$\mathrm{\&Delta;}{V}_{\mathrm{NP}}=\frac{1}{2C}{i}_c\&CenterDot;\mathrm{\&Delta;T}$

Δ V _nP<0, OON effect during this period of time in, the variable quantity of mid-point voltage is negative.So negative small vector can make mid-point voltage reduce.

To sum up can obtain: if mid-point voltage is on the low side, then should increase ABC three-phase and be in P(high level) time of state, corresponding reduction is in N(low level) time of state, mid-point voltage just can be made to rise to predetermined value (close to zero potential).Otherwise, then should reduce a, b, c three-phase and be in P(high level) and time of state, corresponding increasing is in N(low level) time of state.

When mid-point voltage is uneven, then according to mid-point voltage variation delta V _nPdetermine the size and Orientation of the amount of bias superposed.If mid-point voltage is on the low side, then accordingly carrier wave is superposed a little positive bias amount, use Δ T _offsetrepresent.Before and after superposition carrier offset amount, process as shown in Figure 4, and in figure, the amplitude of carrier wave is the switch periods value of 1/2 times.For the little triangle in first sector second, before can drawing superposition amount of bias, the switch motion time of each phase is: the action time of large vector (PPN) is 2 (t _con-t _bon); The action time of middle vector (PON) is 2 (t _bon-t _aon); The action time of the positive small vector of redundancy (PPO) is the action time that redundancy bears small vector (OON) is 2t _aon;

It is Δ T that carrier wave superposes an amplitude _offsetafter amount of bias, the switch motion time variations of each phase is as follows:

t′ _aon＝t _aon-ΔT _offset

t′ _bon＝t _bon-ΔT _offset

t′ _con＝t _con-ΔT _offset

Action time of large vector (PPN) be 2 (t ' _con-t ' _bon)=2 [(t _con-Δ T _offset)-(t _bon-Δ T _offset)]=2 (t _con-t _bon); Action time of middle vector (PON) be 2 (t ' _bon-t ' _aon)=2 [(t _bon-Δ T _offset)-(t _aon-Δ T _offset)]=2 (t _bon-t _aon); The action time of the positive small vector of redundancy (PPO) is the action time that redundancy bears small vector (OON) is 2t ' _aon; Wherein (t ' _con< t _con).

Visible, not change action time of large vector (PPN), middle vector (PON), and the action time of the positive small vector of redundancy (PPO) is extended, the time that redundancy bears small vector (OON) is shortened.

Carrier wave superposition amount of bias Δ T _offsetbefore, mid-point voltage variable quantity

Carrier wave superposition amount of bias Δ T _offsetafter, mid-point voltage variable quantity is:

In this sector, i _c<0, i _b>0, t _bon-t _aon> 0, from (3) formula: Δ V _nP<0, again because Δ T _offsetchoose generally than t _aont _bont _conlittle one to three order of magnitude, so by (3), (4) known Δ V _nP< Δ V ' _nP<0.Therefore, after the positive bias amount that superposition one is little, mid-point voltage increases, then next switch periods still continues superposition carrier offset amount, along with constantly superposing Δ T after several switch periods by this step-length _offset, mid-point voltage variable quantity | Δ V _nP| within < Verro(mid-point voltage deviation reaches expection set point, then stop superposition amount of bias), finally realize neutral point voltage balance.Carrier offset amount adjustment process constraints is the carrier wave upward peak T after superposition amount of bias _hppwith lower peak value T _lppmeet the following conditions respectively:

T _hpp≥max{t _aon,t _bon,t _con}

T _lpp≤min{t _aon,t _bon,t _con}

In formula, t _aon, t _bon, t _conbe respectively a, b, c three-phase action moment of multi-electrical level inverter.

What the positive small vector of redundancy and negative small vector represented on the 3 level space vector distribution map shown in Fig. 3 is same vector, and before superposition amount of bias, the action time of this vector is after superposition amount of bias, the action time of this vector is:

$2(\frac{T_s}{2}-t_{\mathrm{con}}^{\&prime;})+2t_{\mathrm{aon}}^{\&prime;}=2(\frac{T_s}{2}-t_{\mathrm{con}}^{\&prime;}+t_{\mathrm{aon}}^{\&prime;})=2[\frac{T_s}{2}-(t_{\mathrm{con}}-\mathrm{\&Delta;}{T}_{\mathrm{offset}})+(t_{\mathrm{aon}}-\mathrm{\&Delta;}{T}_{\mathrm{offset}})]=2(\frac{T_s}{2}-t_{\mathrm{con}}+t_{\mathrm{aon}})$

According to voltage-second balance principle, synthesized reference vector V before superposition amount of bias _refat T _sthe action effect of time can represent by following formula:

$V_{\mathrm{ref}}\&CenterDot;T_s=V_2\&CenterDot;2(\frac{T_s}{2}-t_{\mathrm{con}}+t_{\mathrm{aon}})+V_4\&CenterDot;2(t_{\mathrm{bon}}-t_{\mathrm{aon}})+V_5\&CenterDot;2(t_{\mathrm{con}}-t_{\mathrm{bon}})---\left(5\right)$

Synthesized reference vector V after superposition amount of bias ' _refat T _sthe action effect of time can represent by following formula:

$\begin{array}{c}{V}_{\mathrm{ref}}^{\&prime;}\&CenterDot;T_s=V_2\&CenterDot;2(\frac{T_s}{2}-t_{\mathrm{con}}^{\&prime;}+t_{\mathrm{aon}}^{\&prime;})+V_4\&CenterDot;2(t_{\mathrm{bon}}^{\&prime;}-t_{\mathrm{aon}}^{\&prime;})+V_5\&CenterDot;2(t_{\mathrm{con}}^{\&prime;}-t_{\mathrm{bon}}^{\&prime;})\\ =V_2\&CenterDot;2(\frac{T_s}{2}-t_{\mathrm{con}}+t_{\mathrm{aon}})+V_4\&CenterDot;2(t_{\mathrm{bon}}-t_{\mathrm{aon}})+V_5\&CenterDot;2(t_{\mathrm{con}}-t_{\mathrm{bon}})\end{array}---\left(6\right)$

Relatively (5), (6) formula, before and after known superposition carrier offset, the action effect of synthesized reference vector is consistent, so the three-phase voltage waveform that three-level inverter exports can not change.Visible superposition carrier offset amount, does not affect output voltage, current waveform, but can reach the object of balance mid-point voltage.

The present invention proposes, based on the multi-electrical level inverter neutral-point voltage balance method becoming carrier offset, effectively to realize neutral-point voltage balance.Fig. 5 is the flow chart based on carrier offset multi-electrical level inverter neutral-point voltage balance method of the present invention, and specific implementation process is as follows:

(1) the electric capacity instantaneous voltage of sampling between electric capacity instantaneous voltage between the mid point of multi-electrical level inverter DC bus and positive pole, the mid point of DC bus and negative pole, the DC bus-bar voltage signal of multi-electrical level inverter, the three-phase voltage signal that multi-electrical level inverter exports and the three-phase current signal that multi-electrical level inverter exports, enter (2);

(2) DC bus mid-point voltage variation delta V is judged _nPwhether meet | Δ V _nP| < Verro, namely close to balance point, wherein Verro is definite value, if meet above-mentioned Rule of judgment, does not then carry out any operation to carrier wave, jumps to (6); If do not meet, then enter (3); Otherwise jump to (5);

(4) this mid-point voltage variation delta V is judged _{nP (K)}with mid-point voltage variation delta V last time _{nP (K-1)}size.If | Δ V _{nP (K)}| > | Δ V _{nP (K-1)}|, then on current carrier basis, superpose a positive carrier amount of bias Δ T _offsetotherwise any operation is not carried out to carrier wave.After executing, jump to (6);

(5) this mid-point voltage variation delta V is judged _{nP (K)}with mid-point voltage variation delta V last time _{nP (K-1)}size.If | Δ V _{nP (K)}| > | Δ V _{nP (K-1)}|, then on current carrier basis, superpose a negative carrier amount of bias Δ T _offset; Otherwise any operation is not carried out to carrier wave.After executing, jump to (6);

(6) SVPWM vector control unit is according to the DC bus-bar voltage signal of sampling gained multi-electrical level inverter in (1), the three-phase voltage signal that multi-electrical level inverter exports and the three-phase current signal that multi-electrical level inverter exports, and the carrier wave after the renewal determined according to (4) and (5), if carrier wave upward peak T in adjustment process _hppwith lower peak value T _lppdo not satisfy condition: T _hpp>=max{t _aon, t _bon, t _conand T _lpp≤ min{t _aon, t _bon, t _con, then make T _hpp=max{t _aon, t _bon, t _conor T _lpp=min{t _aon, t _bon, t _con; according to the job order of the symmetrical output form of seven segmentation vectors; determine the control signal of multi-electrical level inverter every phase brachium pontis switching tube in current switch period; distribute to each switching tube of multi-electrical level inverter every phase brachium pontis through drive circuit, control operating state and the neutral point voltage balance of multi-electrical level inverter; Be back to (1) after process terminates, enter the circulation of next switch periods.

Embodiment 1

The present embodiment utilizes the Simulink instrument in MATLAB to build three-level inverter circuit, and direct current exports three-phase voltage by tri-level circuit inversion after dc-link capacitance, exports smooth three phase sine voltage through EMI filter circuit.Electric parameter in simulation process is arranged as following table:

Fig. 6 is the dc-link capacitance C under above-mentioned electric parameter is arranged ₁, C ₂voltage V _c1, V _c2simulation waveform.Control mode of the present invention is added in the 0.02s moment, when not adding control mode of the present invention, dc-link capacitance C ₁, C ₂voltage V _c1, V _c2average value about 30V, system is in mid-point voltage non-equilibrium state, after the 0.02s moment adds control mode of the present invention, can find out that system enters stable state after about power frequency period 0.02s Timing, dc-link capacitance C ₁, C ₂voltage V _c1, V _c2the difference of mean value within 5V, achieve neutral point voltage balance, visible control method control effects of the present invention is remarkable.

In sum, of the present invention based on carrier offset multi-electrical level inverter neutral-point voltage balance method, by measuring the electric capacity instantaneous voltage between the mid point of multi-electrical level inverter DC bus and positive pole in real time, electric capacity instantaneous voltage between the mid point of DC bus and negative pole, and determine the deviation of these two electric capacity instantaneous voltages, regulate through the carrier offset amount of carrier offset regulating and controlling unit to current time, the regulating and controlling signal of carrier offset regulating and controlling unit exports to SVPWM vector control unit, the operating state of multi-electrical level inverter is controlled through drive circuit output pwm signal, control the neutral point voltage balance of multi-electrical level inverter simultaneously.The present invention is on the basis keeping original SVPWM control method, do not increase control method complexity, the balance of mid-point voltage is only controlled by becoming carrier offset, have that real-time is good, processing procedure is simple and easily realize and can reduce output voltage, current harmonics, improve the advantages such as output waveform quality, there is great engineer applied and be worth.

Claims (4)

1. the multi-electrical level inverter neutral-point voltage balance method based on carrier offset, it is characterized in that, the sampling unit of digital processing control module detects the electric capacity instantaneous voltage between the mid point of multi-electrical level inverter DC bus and positive pole, electric capacity instantaneous voltage between the mid point of DC bus and negative pole, and determine the deviation of these two electric capacity instantaneous voltages, regulate through the carrier offset amount of carrier offset regulating and controlling unit to current time, the regulating and controlling signal of carrier offset regulating and controlling unit exports to SVPWM vector control unit, the operating state of multi-electrical level inverter is controlled through drive circuit output pwm signal, control the neutral point voltage balance of multi-electrical level inverter simultaneously, specifically comprise the following steps:

Step 1, sampling unit are sampled three-phase voltage signal that electric capacity instantaneous voltage between the DC bus-bar voltage of multi-electrical level inverter, electric capacity instantaneous voltage between the mid point of DC bus and positive pole, the mid point of DC bus and negative pole, multi-electrical level inverter export and the three-phase current signal that multi-electrical level inverter exports respectively;

Step 2, carrier offset regulating and controlling unit according to the deviation of two electric capacity instantaneous voltages described in step 1, by the carrier offset amount Δ T of carrier offset control method determination current time _offset, comprise the following steps:

1st step, judges DC bus mid-point voltage variation delta V _nPwhether in error range: if | Δ V _nP| < Verro, then do not carry out any operation to carrier wave; Otherwise, enter the 2nd step, wherein DC bus mid-point voltage variation delta V _nPfor:

${\mathrm{\&Delta;V}}_{NP}=-\frac{(V_{c1}-V_{c2})}{2}$

In formula, V _c1for electric capacity instantaneous voltage, V between the positive pole of DC bus and mid point _c2for the electric capacity instantaneous voltage between the mid point of DC bus and negative pole, Verro is less than the DC bus-bar voltage of 0.05 times;

2nd step, judges DC bus mid-point voltage variation delta V _nPwhether be less than 0: if Δ V _nP< 0 enters the 3rd step, otherwise goes to the 4th step;

3rd step, judges this DC bus mid-point voltage variation delta V _{nP (K)}with DC bus mid-point voltage variation delta V last time _{nP (K-1)}size: if | Δ V _{nP (K)}| > | Δ V _{nP (K-1)}|, then the carrier offset amount Δ T that superposition one is positive on current carrier basis _offset; Otherwise carrier wave is not operated;

4th step, judges this DC bus mid-point voltage variation delta V _{nP (K)}with DC bus mid-point voltage variation delta V last time _{nP (K-1)}size: if | Δ V _{nP (K)}| > | Δ V _{nP (K-1)}|, then the carrier offset amount Δ T that superposition one is negative on current carrier basis _offset; Otherwise carrier wave is not operated;

Step 3, SVPWM vector control unit are according to the carrier offset amount Δ T of gained current time in the three-phase voltage signal of sampling unit output in step 1 and three-phase current signal, DC bus-bar voltage and step 2 _offset, determine the control signal of every phase brachium pontis switching tube of multi-electrical level inverter in current switch period;

The switch controlled signal that SVPWM vector control unit exports is distributed to every each switching tube of phase brachium pontis of multi-electrical level inverter by step 4, drive circuit, controls operating state and the neutral point voltage balance of multi-electrical level inverter.

2. the multi-electrical level inverter neutral-point voltage balance method based on carrier offset according to claim 1, it is characterized in that, described digital processing control module is STM32F407 chip.

3. the multi-electrical level inverter neutral-point voltage balance method based on carrier offset according to claim 1, is characterized in that, step 2 the 3rd step and the carrier offset amount Δ T described in the 4th step _offsetscope be:

$\frac{1}{1000}\left(\frac{T_s}{2}\right)\&le;\left|{\mathrm{\&Delta;T}}_{offset}\right|\&le;\frac{T_s}{2}$

In formula, T _sfor the switch periods of multi-electrical level inverter.

4. the multi-electrical level inverter neutral-point voltage balance method based on carrier offset according to claim 1, is characterized in that, the carrier offset amount Δ T that described in step 2 the 3rd step, superposition one is positive on current carrier basis _offset, the carrier offset amount Δ T that described in the 4th step, superposition one is negative on current carrier basis _offset, superposition carrier offset amount Δ T _offsetafter carrier wave upward peak T _hppwith lower peak value T _lppmeet the following conditions respectively:

T _hpp≥max{t _aon,t _bon,t _con}

T _lpp≤min{t _aon,t _bon,t _con}

In formula, t _aon, t _bon, t _conbe respectively a, b, c threephase switch action moment of multi-electrical level inverter.